1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -global-isel -mtriple=amdgcn-unknown-amdhsa < %s | FileCheck %s
3
4declare i32 @llvm.umin.i32(i32, i32)
5declare i32 @llvm.umax.i32(i32, i32)
6declare i32 @llvm.smin.i32(i32, i32)
7declare i32 @llvm.smax.i32(i32, i32)
8
9declare <4 x i32> @llvm.umin.v4i32(<4 x i32>, <4 x i32>)
10declare <4 x i32> @llvm.umax.v4i32(<4 x i32>, <4 x i32>)
11declare <4 x i32> @llvm.smin.v4i32(<4 x i32>, <4 x i32>)
12declare <4 x i32> @llvm.smax.v4i32(<4 x i32>, <4 x i32>)
13
14define i32 @test_umin_i32(i32 %a, i32 %b) {
15; CHECK-LABEL: test_umin_i32:
16; CHECK:       ; %bb.0:
17; CHECK-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
18; CHECK-NEXT:    v_min_u32_e32 v0, v0, v1
19; CHECK-NEXT:    s_setpc_b64 s[30:31]
20  %r = call i32 @llvm.umin.i32(i32 %a, i32 %b)
21  ret i32 %r
22}
23
24define i32 @test_umax_i32(i32 %a, i32 %b) {
25; CHECK-LABEL: test_umax_i32:
26; CHECK:       ; %bb.0:
27; CHECK-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
28; CHECK-NEXT:    v_max_u32_e32 v0, v0, v1
29; CHECK-NEXT:    s_setpc_b64 s[30:31]
30  %r = call i32 @llvm.umax.i32(i32 %a, i32 %b)
31  ret i32 %r
32}
33
34define i32 @test_smin_i32(i32 %a, i32 %b) {
35; CHECK-LABEL: test_smin_i32:
36; CHECK:       ; %bb.0:
37; CHECK-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
38; CHECK-NEXT:    v_min_i32_e32 v0, v0, v1
39; CHECK-NEXT:    s_setpc_b64 s[30:31]
40  %r = call i32 @llvm.smin.i32(i32 %a, i32 %b)
41  ret i32 %r
42}
43
44define i32 @test_smax_i32(i32 %a, i32 %b) {
45; CHECK-LABEL: test_smax_i32:
46; CHECK:       ; %bb.0:
47; CHECK-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
48; CHECK-NEXT:    v_max_i32_e32 v0, v0, v1
49; CHECK-NEXT:    s_setpc_b64 s[30:31]
50  %r = call i32 @llvm.smax.i32(i32 %a, i32 %b)
51  ret i32 %r
52}
53
54define <4 x i32> @test_umin_v4i32(<4 x i32> %a, <4 x i32> %b) {
55; CHECK-LABEL: test_umin_v4i32:
56; CHECK:       ; %bb.0:
57; CHECK-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
58; CHECK-NEXT:    v_min_u32_e32 v0, v0, v4
59; CHECK-NEXT:    v_min_u32_e32 v1, v1, v5
60; CHECK-NEXT:    v_min_u32_e32 v2, v2, v6
61; CHECK-NEXT:    v_min_u32_e32 v3, v3, v7
62; CHECK-NEXT:    s_setpc_b64 s[30:31]
63  %r = call <4 x i32> @llvm.umin.v4i32(<4 x i32> %a, <4 x i32> %b)
64  ret <4 x i32> %r
65}
66
67define <4 x i32> @test_umax_v4i32(<4 x i32> %a, <4 x i32> %b) {
68; CHECK-LABEL: test_umax_v4i32:
69; CHECK:       ; %bb.0:
70; CHECK-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
71; CHECK-NEXT:    v_max_u32_e32 v0, v0, v4
72; CHECK-NEXT:    v_max_u32_e32 v1, v1, v5
73; CHECK-NEXT:    v_max_u32_e32 v2, v2, v6
74; CHECK-NEXT:    v_max_u32_e32 v3, v3, v7
75; CHECK-NEXT:    s_setpc_b64 s[30:31]
76  %r = call <4 x i32> @llvm.umax.v4i32(<4 x i32> %a, <4 x i32> %b)
77  ret <4 x i32> %r
78}
79
80define <4 x i32> @test_smin_v4i32(<4 x i32> %a, <4 x i32> %b) {
81; CHECK-LABEL: test_smin_v4i32:
82; CHECK:       ; %bb.0:
83; CHECK-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
84; CHECK-NEXT:    v_min_i32_e32 v0, v0, v4
85; CHECK-NEXT:    v_min_i32_e32 v1, v1, v5
86; CHECK-NEXT:    v_min_i32_e32 v2, v2, v6
87; CHECK-NEXT:    v_min_i32_e32 v3, v3, v7
88; CHECK-NEXT:    s_setpc_b64 s[30:31]
89  %r = call <4 x i32> @llvm.smin.v4i32(<4 x i32> %a, <4 x i32> %b)
90  ret <4 x i32> %r
91}
92
93define <4 x i32> @test_smax_v4i32(<4 x i32> %a, <4 x i32> %b) {
94; CHECK-LABEL: test_smax_v4i32:
95; CHECK:       ; %bb.0:
96; CHECK-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
97; CHECK-NEXT:    v_max_i32_e32 v0, v0, v4
98; CHECK-NEXT:    v_max_i32_e32 v1, v1, v5
99; CHECK-NEXT:    v_max_i32_e32 v2, v2, v6
100; CHECK-NEXT:    v_max_i32_e32 v3, v3, v7
101; CHECK-NEXT:    s_setpc_b64 s[30:31]
102  %r = call <4 x i32> @llvm.smax.v4i32(<4 x i32> %a, <4 x i32> %b)
103  ret <4 x i32> %r
104}
105