1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -global-isel -amdgpu-codegenprepare-disable-idiv-expansion=1 -mtriple=amdgcn-mesa-mesa3d -mcpu=hawaii -denormal-fp-math-f32=preserve-sign < %s | FileCheck -check-prefixes=CHECK,GISEL %s 3; RUN: llc -global-isel -amdgpu-codegenprepare-disable-idiv-expansion=0 -mtriple=amdgcn-mesa-mesa3d -mcpu=hawaii -denormal-fp-math-f32=preserve-sign < %s | FileCheck -check-prefixes=CHECK,CGP %s 4 5; The same 32-bit expansion is implemented in the legalizer and in AMDGPUCodeGenPrepare. 6 7define i64 @v_srem_i64(i64 %num, i64 %den) { 8; CHECK-LABEL: v_srem_i64: 9; CHECK: ; %bb.0: 10; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 11; CHECK-NEXT: v_or_b32_e32 v5, v1, v3 12; CHECK-NEXT: v_mov_b32_e32 v4, 0 13; CHECK-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[4:5] 14; CHECK-NEXT: ; implicit-def: $vgpr4_vgpr5 15; CHECK-NEXT: s_and_saveexec_b64 s[4:5], vcc 16; CHECK-NEXT: s_xor_b64 s[6:7], exec, s[4:5] 17; CHECK-NEXT: s_cbranch_execz BB0_2 18; CHECK-NEXT: ; %bb.1: 19; CHECK-NEXT: v_ashrrev_i32_e32 v4, 31, v3 20; CHECK-NEXT: v_add_i32_e32 v5, vcc, v2, v4 21; CHECK-NEXT: v_addc_u32_e32 v3, vcc, v3, v4, vcc 22; CHECK-NEXT: v_xor_b32_e32 v3, v3, v4 23; CHECK-NEXT: v_xor_b32_e32 v5, v5, v4 24; CHECK-NEXT: v_cvt_f32_u32_e32 v4, v5 25; CHECK-NEXT: v_cvt_f32_u32_e32 v6, v3 26; CHECK-NEXT: v_ashrrev_i32_e32 v7, 31, v1 27; CHECK-NEXT: v_mac_f32_e32 v4, 0x4f800000, v6 28; CHECK-NEXT: v_rcp_iflag_f32_e32 v4, v4 29; CHECK-NEXT: v_add_i32_e32 v6, vcc, v0, v7 30; CHECK-NEXT: v_addc_u32_e32 v1, vcc, v1, v7, vcc 31; CHECK-NEXT: v_sub_i32_e32 v9, vcc, 0, v5 32; CHECK-NEXT: v_mul_f32_e32 v4, 0x5f7ffffc, v4 33; CHECK-NEXT: v_mul_f32_e32 v8, 0x2f800000, v4 34; CHECK-NEXT: v_trunc_f32_e32 v8, v8 35; CHECK-NEXT: v_mac_f32_e32 v4, 0xcf800000, v8 36; CHECK-NEXT: v_cvt_u32_f32_e32 v4, v4 37; CHECK-NEXT: v_cvt_u32_f32_e32 v8, v8 38; CHECK-NEXT: v_subb_u32_e32 v10, vcc, 0, v3, vcc 39; CHECK-NEXT: v_xor_b32_e32 v6, v6, v7 40; CHECK-NEXT: v_mul_lo_u32 v11, v10, v4 41; CHECK-NEXT: v_mul_lo_u32 v12, v9, v8 42; CHECK-NEXT: v_mul_hi_u32 v14, v9, v4 43; CHECK-NEXT: v_mul_lo_u32 v13, v9, v4 44; CHECK-NEXT: v_xor_b32_e32 v1, v1, v7 45; CHECK-NEXT: v_add_i32_e32 v11, vcc, v11, v12 46; CHECK-NEXT: v_add_i32_e32 v11, vcc, v11, v14 47; CHECK-NEXT: v_mul_lo_u32 v12, v8, v13 48; CHECK-NEXT: v_mul_lo_u32 v14, v4, v11 49; CHECK-NEXT: v_mul_hi_u32 v15, v4, v13 50; CHECK-NEXT: v_mul_hi_u32 v13, v8, v13 51; CHECK-NEXT: v_add_i32_e32 v12, vcc, v12, v14 52; CHECK-NEXT: v_cndmask_b32_e64 v14, 0, 1, vcc 53; CHECK-NEXT: v_add_i32_e32 v12, vcc, v12, v15 54; CHECK-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc 55; CHECK-NEXT: v_mul_lo_u32 v15, v8, v11 56; CHECK-NEXT: v_add_i32_e32 v12, vcc, v14, v12 57; CHECK-NEXT: v_mul_hi_u32 v14, v4, v11 58; CHECK-NEXT: v_mul_hi_u32 v11, v8, v11 59; CHECK-NEXT: v_add_i32_e32 v13, vcc, v15, v13 60; CHECK-NEXT: v_cndmask_b32_e64 v15, 0, 1, vcc 61; CHECK-NEXT: v_add_i32_e32 v13, vcc, v13, v14 62; CHECK-NEXT: v_cndmask_b32_e64 v14, 0, 1, vcc 63; CHECK-NEXT: v_add_i32_e32 v14, vcc, v15, v14 64; CHECK-NEXT: v_add_i32_e32 v12, vcc, v13, v12 65; CHECK-NEXT: v_cndmask_b32_e64 v13, 0, 1, vcc 66; CHECK-NEXT: v_add_i32_e32 v13, vcc, v14, v13 67; CHECK-NEXT: v_add_i32_e32 v11, vcc, v11, v13 68; CHECK-NEXT: v_add_i32_e32 v4, vcc, v4, v12 69; CHECK-NEXT: v_addc_u32_e64 v12, s[4:5], v8, v11, vcc 70; CHECK-NEXT: v_mul_lo_u32 v10, v10, v4 71; CHECK-NEXT: v_mul_lo_u32 v13, v9, v12 72; CHECK-NEXT: v_mul_lo_u32 v14, v9, v4 73; CHECK-NEXT: v_mul_hi_u32 v9, v9, v4 74; CHECK-NEXT: v_add_i32_e64 v8, s[4:5], v8, v11 75; CHECK-NEXT: v_add_i32_e64 v10, s[4:5], v10, v13 76; CHECK-NEXT: v_mul_hi_u32 v11, v4, v14 77; CHECK-NEXT: v_add_i32_e64 v9, s[4:5], v10, v9 78; CHECK-NEXT: v_mul_lo_u32 v10, v12, v14 79; CHECK-NEXT: v_mul_lo_u32 v13, v4, v9 80; CHECK-NEXT: v_mul_hi_u32 v14, v12, v14 81; CHECK-NEXT: v_add_i32_e64 v10, s[4:5], v10, v13 82; CHECK-NEXT: v_cndmask_b32_e64 v13, 0, 1, s[4:5] 83; CHECK-NEXT: v_add_i32_e64 v10, s[4:5], v10, v11 84; CHECK-NEXT: v_cndmask_b32_e64 v10, 0, 1, s[4:5] 85; CHECK-NEXT: v_mul_lo_u32 v11, v12, v9 86; CHECK-NEXT: v_add_i32_e64 v10, s[4:5], v13, v10 87; CHECK-NEXT: v_mul_hi_u32 v13, v4, v9 88; CHECK-NEXT: v_mul_hi_u32 v9, v12, v9 89; CHECK-NEXT: v_add_i32_e64 v11, s[4:5], v11, v14 90; CHECK-NEXT: v_cndmask_b32_e64 v14, 0, 1, s[4:5] 91; CHECK-NEXT: v_add_i32_e64 v11, s[4:5], v11, v13 92; CHECK-NEXT: v_cndmask_b32_e64 v13, 0, 1, s[4:5] 93; CHECK-NEXT: v_add_i32_e64 v13, s[4:5], v14, v13 94; CHECK-NEXT: v_add_i32_e64 v10, s[4:5], v11, v10 95; CHECK-NEXT: v_cndmask_b32_e64 v11, 0, 1, s[4:5] 96; CHECK-NEXT: v_add_i32_e64 v11, s[4:5], v13, v11 97; CHECK-NEXT: v_add_i32_e64 v9, s[4:5], v9, v11 98; CHECK-NEXT: v_addc_u32_e32 v8, vcc, v8, v9, vcc 99; CHECK-NEXT: v_add_i32_e32 v4, vcc, v4, v10 100; CHECK-NEXT: v_addc_u32_e32 v8, vcc, 0, v8, vcc 101; CHECK-NEXT: v_mul_lo_u32 v9, v1, v4 102; CHECK-NEXT: v_mul_lo_u32 v10, v6, v8 103; CHECK-NEXT: v_mul_hi_u32 v11, v6, v4 104; CHECK-NEXT: v_mul_hi_u32 v4, v1, v4 105; CHECK-NEXT: v_add_i32_e32 v9, vcc, v9, v10 106; CHECK-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 107; CHECK-NEXT: v_add_i32_e32 v9, vcc, v9, v11 108; CHECK-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc 109; CHECK-NEXT: v_mul_lo_u32 v11, v1, v8 110; CHECK-NEXT: v_add_i32_e32 v9, vcc, v10, v9 111; CHECK-NEXT: v_mul_hi_u32 v10, v6, v8 112; CHECK-NEXT: v_mul_hi_u32 v8, v1, v8 113; CHECK-NEXT: v_add_i32_e32 v4, vcc, v11, v4 114; CHECK-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc 115; CHECK-NEXT: v_add_i32_e32 v4, vcc, v4, v10 116; CHECK-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 117; CHECK-NEXT: v_add_i32_e32 v10, vcc, v11, v10 118; CHECK-NEXT: v_add_i32_e32 v4, vcc, v4, v9 119; CHECK-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc 120; CHECK-NEXT: v_add_i32_e32 v9, vcc, v10, v9 121; CHECK-NEXT: v_add_i32_e32 v8, vcc, v8, v9 122; CHECK-NEXT: v_mul_lo_u32 v9, v3, v4 123; CHECK-NEXT: v_mul_lo_u32 v8, v5, v8 124; CHECK-NEXT: v_mul_lo_u32 v10, v5, v4 125; CHECK-NEXT: v_mul_hi_u32 v4, v5, v4 126; CHECK-NEXT: v_add_i32_e32 v8, vcc, v9, v8 127; CHECK-NEXT: v_add_i32_e32 v4, vcc, v8, v4 128; CHECK-NEXT: v_sub_i32_e32 v6, vcc, v6, v10 129; CHECK-NEXT: v_subb_u32_e64 v8, s[4:5], v1, v4, vcc 130; CHECK-NEXT: v_sub_i32_e64 v1, s[4:5], v1, v4 131; CHECK-NEXT: v_cmp_ge_u32_e64 s[4:5], v8, v3 132; CHECK-NEXT: v_cndmask_b32_e64 v4, 0, -1, s[4:5] 133; CHECK-NEXT: v_cmp_ge_u32_e64 s[4:5], v6, v5 134; CHECK-NEXT: v_cndmask_b32_e64 v9, 0, -1, s[4:5] 135; CHECK-NEXT: v_cmp_eq_u32_e64 s[4:5], v8, v3 136; CHECK-NEXT: v_subb_u32_e32 v1, vcc, v1, v3, vcc 137; CHECK-NEXT: v_cndmask_b32_e64 v4, v4, v9, s[4:5] 138; CHECK-NEXT: v_sub_i32_e32 v9, vcc, v6, v5 139; CHECK-NEXT: v_subbrev_u32_e64 v10, s[4:5], 0, v1, vcc 140; CHECK-NEXT: v_cmp_ge_u32_e64 s[4:5], v10, v3 141; CHECK-NEXT: v_cndmask_b32_e64 v11, 0, -1, s[4:5] 142; CHECK-NEXT: v_cmp_ge_u32_e64 s[4:5], v9, v5 143; CHECK-NEXT: v_subb_u32_e32 v1, vcc, v1, v3, vcc 144; CHECK-NEXT: v_cndmask_b32_e64 v12, 0, -1, s[4:5] 145; CHECK-NEXT: v_cmp_eq_u32_e64 s[4:5], v10, v3 146; CHECK-NEXT: v_sub_i32_e32 v3, vcc, v9, v5 147; CHECK-NEXT: v_cndmask_b32_e64 v11, v11, v12, s[4:5] 148; CHECK-NEXT: v_subbrev_u32_e32 v1, vcc, 0, v1, vcc 149; CHECK-NEXT: v_cmp_ne_u32_e32 vcc, 0, v11 150; CHECK-NEXT: v_cndmask_b32_e32 v3, v9, v3, vcc 151; CHECK-NEXT: v_cndmask_b32_e32 v1, v10, v1, vcc 152; CHECK-NEXT: v_cmp_ne_u32_e32 vcc, 0, v4 153; CHECK-NEXT: v_cndmask_b32_e32 v3, v6, v3, vcc 154; CHECK-NEXT: v_cndmask_b32_e32 v1, v8, v1, vcc 155; CHECK-NEXT: v_xor_b32_e32 v3, v3, v7 156; CHECK-NEXT: v_xor_b32_e32 v1, v1, v7 157; CHECK-NEXT: v_sub_i32_e32 v4, vcc, v3, v7 158; CHECK-NEXT: v_subb_u32_e32 v5, vcc, v1, v7, vcc 159; CHECK-NEXT: BB0_2: ; %Flow 160; CHECK-NEXT: s_or_saveexec_b64 s[4:5], s[6:7] 161; CHECK-NEXT: s_xor_b64 exec, exec, s[4:5] 162; CHECK-NEXT: s_cbranch_execz BB0_4 163; CHECK-NEXT: ; %bb.3: 164; CHECK-NEXT: v_cvt_f32_u32_e32 v1, v2 165; CHECK-NEXT: v_sub_i32_e32 v3, vcc, 0, v2 166; CHECK-NEXT: v_mov_b32_e32 v5, 0 167; CHECK-NEXT: v_rcp_iflag_f32_e32 v1, v1 168; CHECK-NEXT: v_mul_f32_e32 v1, 0x4f7ffffe, v1 169; CHECK-NEXT: v_cvt_u32_f32_e32 v1, v1 170; CHECK-NEXT: v_mul_lo_u32 v3, v3, v1 171; CHECK-NEXT: v_mul_hi_u32 v3, v1, v3 172; CHECK-NEXT: v_add_i32_e32 v1, vcc, v1, v3 173; CHECK-NEXT: v_mul_hi_u32 v1, v0, v1 174; CHECK-NEXT: v_mul_lo_u32 v1, v1, v2 175; CHECK-NEXT: v_sub_i32_e32 v0, vcc, v0, v1 176; CHECK-NEXT: v_sub_i32_e32 v1, vcc, v0, v2 177; CHECK-NEXT: v_cmp_ge_u32_e32 vcc, v0, v2 178; CHECK-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc 179; CHECK-NEXT: v_sub_i32_e32 v1, vcc, v0, v2 180; CHECK-NEXT: v_cmp_ge_u32_e32 vcc, v0, v2 181; CHECK-NEXT: v_cndmask_b32_e32 v4, v0, v1, vcc 182; CHECK-NEXT: BB0_4: 183; CHECK-NEXT: s_or_b64 exec, exec, s[4:5] 184; CHECK-NEXT: v_mov_b32_e32 v0, v4 185; CHECK-NEXT: v_mov_b32_e32 v1, v5 186; CHECK-NEXT: s_setpc_b64 s[30:31] 187 %result = srem i64 %num, %den 188 ret i64 %result 189} 190 191; FIXME: This is a workaround for not handling uniform VGPR case. 192declare i32 @llvm.amdgcn.readfirstlane(i32) 193 194define amdgpu_ps i64 @s_srem_i64(i64 inreg %num, i64 inreg %den) { 195; CHECK-LABEL: s_srem_i64: 196; CHECK: ; %bb.0: 197; CHECK-NEXT: s_or_b64 s[6:7], s[2:3], s[4:5] 198; CHECK-NEXT: s_mov_b32 s0, 0 199; CHECK-NEXT: s_mov_b32 s1, -1 200; CHECK-NEXT: s_and_b64 s[6:7], s[6:7], s[0:1] 201; CHECK-NEXT: v_cmp_ne_u64_e64 vcc, s[6:7], 0 202; CHECK-NEXT: s_cbranch_vccz BB1_2 203; CHECK-NEXT: ; %bb.1: 204; CHECK-NEXT: s_ashr_i32 s0, s5, 31 205; CHECK-NEXT: s_ashr_i32 s6, s3, 31 206; CHECK-NEXT: s_add_u32 s8, s2, s6 207; CHECK-NEXT: s_cselect_b32 s7, 1, 0 208; CHECK-NEXT: s_and_b32 s7, s7, 1 209; CHECK-NEXT: s_cmp_lg_u32 s7, 0 210; CHECK-NEXT: s_addc_u32 s9, s3, s6 211; CHECK-NEXT: s_add_u32 s10, s4, s0 212; CHECK-NEXT: s_cselect_b32 s3, 1, 0 213; CHECK-NEXT: s_and_b32 s3, s3, 1 214; CHECK-NEXT: s_cmp_lg_u32 s3, 0 215; CHECK-NEXT: s_mov_b32 s1, s0 216; CHECK-NEXT: s_addc_u32 s11, s5, s0 217; CHECK-NEXT: s_xor_b64 s[10:11], s[10:11], s[0:1] 218; CHECK-NEXT: v_cvt_f32_u32_e32 v0, s10 219; CHECK-NEXT: v_cvt_f32_u32_e32 v1, s11 220; CHECK-NEXT: s_mov_b32 s7, s6 221; CHECK-NEXT: s_xor_b64 s[8:9], s[8:9], s[6:7] 222; CHECK-NEXT: s_sub_u32 s3, 0, s10 223; CHECK-NEXT: v_mac_f32_e32 v0, 0x4f800000, v1 224; CHECK-NEXT: v_rcp_iflag_f32_e32 v0, v0 225; CHECK-NEXT: s_cselect_b32 s0, 1, 0 226; CHECK-NEXT: s_and_b32 s0, s0, 1 227; CHECK-NEXT: s_cmp_lg_u32 s0, 0 228; CHECK-NEXT: v_mul_f32_e32 v0, 0x5f7ffffc, v0 229; CHECK-NEXT: v_mul_f32_e32 v1, 0x2f800000, v0 230; CHECK-NEXT: v_trunc_f32_e32 v1, v1 231; CHECK-NEXT: v_mac_f32_e32 v0, 0xcf800000, v1 232; CHECK-NEXT: v_cvt_u32_f32_e32 v0, v0 233; CHECK-NEXT: v_cvt_u32_f32_e32 v1, v1 234; CHECK-NEXT: s_subb_u32 s5, 0, s11 235; CHECK-NEXT: v_mov_b32_e32 v6, s11 236; CHECK-NEXT: v_mul_lo_u32 v2, s5, v0 237; CHECK-NEXT: v_mul_lo_u32 v3, s3, v1 238; CHECK-NEXT: v_mul_hi_u32 v5, s3, v0 239; CHECK-NEXT: v_mul_lo_u32 v4, s3, v0 240; CHECK-NEXT: v_add_i32_e32 v2, vcc, v2, v3 241; CHECK-NEXT: v_add_i32_e32 v2, vcc, v2, v5 242; CHECK-NEXT: v_mul_lo_u32 v3, v1, v4 243; CHECK-NEXT: v_mul_lo_u32 v5, v0, v2 244; CHECK-NEXT: v_mul_hi_u32 v7, v0, v4 245; CHECK-NEXT: v_mul_hi_u32 v4, v1, v4 246; CHECK-NEXT: v_add_i32_e32 v3, vcc, v3, v5 247; CHECK-NEXT: v_cndmask_b32_e64 v5, 0, 1, vcc 248; CHECK-NEXT: v_add_i32_e32 v3, vcc, v3, v7 249; CHECK-NEXT: v_cndmask_b32_e64 v3, 0, 1, vcc 250; CHECK-NEXT: v_mul_lo_u32 v7, v1, v2 251; CHECK-NEXT: v_add_i32_e32 v3, vcc, v5, v3 252; CHECK-NEXT: v_mul_hi_u32 v5, v0, v2 253; CHECK-NEXT: v_mul_hi_u32 v2, v1, v2 254; CHECK-NEXT: v_add_i32_e32 v4, vcc, v7, v4 255; CHECK-NEXT: v_cndmask_b32_e64 v7, 0, 1, vcc 256; CHECK-NEXT: v_add_i32_e32 v4, vcc, v4, v5 257; CHECK-NEXT: v_cndmask_b32_e64 v5, 0, 1, vcc 258; CHECK-NEXT: v_add_i32_e32 v5, vcc, v7, v5 259; CHECK-NEXT: v_add_i32_e32 v3, vcc, v4, v3 260; CHECK-NEXT: v_cndmask_b32_e64 v4, 0, 1, vcc 261; CHECK-NEXT: v_add_i32_e32 v4, vcc, v5, v4 262; CHECK-NEXT: v_add_i32_e32 v2, vcc, v2, v4 263; CHECK-NEXT: v_add_i32_e32 v0, vcc, v0, v3 264; CHECK-NEXT: v_addc_u32_e64 v3, s[0:1], v1, v2, vcc 265; CHECK-NEXT: v_mul_lo_u32 v4, s5, v0 266; CHECK-NEXT: v_mul_lo_u32 v5, s3, v3 267; CHECK-NEXT: v_mul_hi_u32 v8, s3, v0 268; CHECK-NEXT: v_mul_lo_u32 v7, s3, v0 269; CHECK-NEXT: v_add_i32_e64 v1, s[0:1], v1, v2 270; CHECK-NEXT: v_add_i32_e64 v4, s[0:1], v4, v5 271; CHECK-NEXT: v_add_i32_e64 v4, s[0:1], v4, v8 272; CHECK-NEXT: v_mul_lo_u32 v5, v3, v7 273; CHECK-NEXT: v_mul_lo_u32 v8, v0, v4 274; CHECK-NEXT: v_mul_hi_u32 v2, v0, v7 275; CHECK-NEXT: v_mul_hi_u32 v7, v3, v7 276; CHECK-NEXT: v_add_i32_e64 v5, s[0:1], v5, v8 277; CHECK-NEXT: v_cndmask_b32_e64 v8, 0, 1, s[0:1] 278; CHECK-NEXT: v_add_i32_e64 v2, s[0:1], v5, v2 279; CHECK-NEXT: v_cndmask_b32_e64 v2, 0, 1, s[0:1] 280; CHECK-NEXT: v_mul_lo_u32 v5, v3, v4 281; CHECK-NEXT: v_add_i32_e64 v2, s[0:1], v8, v2 282; CHECK-NEXT: v_mul_hi_u32 v8, v0, v4 283; CHECK-NEXT: v_mul_hi_u32 v3, v3, v4 284; CHECK-NEXT: v_add_i32_e64 v5, s[0:1], v5, v7 285; CHECK-NEXT: v_cndmask_b32_e64 v7, 0, 1, s[0:1] 286; CHECK-NEXT: v_add_i32_e64 v5, s[0:1], v5, v8 287; CHECK-NEXT: v_cndmask_b32_e64 v8, 0, 1, s[0:1] 288; CHECK-NEXT: v_add_i32_e64 v7, s[0:1], v7, v8 289; CHECK-NEXT: v_add_i32_e64 v2, s[0:1], v5, v2 290; CHECK-NEXT: v_cndmask_b32_e64 v5, 0, 1, s[0:1] 291; CHECK-NEXT: v_add_i32_e64 v4, s[0:1], v7, v5 292; CHECK-NEXT: v_add_i32_e64 v3, s[0:1], v3, v4 293; CHECK-NEXT: v_addc_u32_e32 v1, vcc, v1, v3, vcc 294; CHECK-NEXT: v_add_i32_e32 v0, vcc, v0, v2 295; CHECK-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc 296; CHECK-NEXT: v_mul_lo_u32 v2, s9, v0 297; CHECK-NEXT: v_mul_lo_u32 v3, s8, v1 298; CHECK-NEXT: v_mul_hi_u32 v5, s8, v0 299; CHECK-NEXT: v_mul_hi_u32 v0, s9, v0 300; CHECK-NEXT: v_mov_b32_e32 v4, s9 301; CHECK-NEXT: v_add_i32_e32 v2, vcc, v2, v3 302; CHECK-NEXT: v_cndmask_b32_e64 v3, 0, 1, vcc 303; CHECK-NEXT: v_add_i32_e32 v2, vcc, v2, v5 304; CHECK-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc 305; CHECK-NEXT: v_mul_lo_u32 v5, s9, v1 306; CHECK-NEXT: v_add_i32_e32 v2, vcc, v3, v2 307; CHECK-NEXT: v_mul_hi_u32 v3, s8, v1 308; CHECK-NEXT: v_mul_hi_u32 v1, s9, v1 309; CHECK-NEXT: v_add_i32_e32 v0, vcc, v5, v0 310; CHECK-NEXT: v_cndmask_b32_e64 v5, 0, 1, vcc 311; CHECK-NEXT: v_add_i32_e32 v0, vcc, v0, v3 312; CHECK-NEXT: v_cndmask_b32_e64 v3, 0, 1, vcc 313; CHECK-NEXT: v_add_i32_e32 v3, vcc, v5, v3 314; CHECK-NEXT: v_add_i32_e32 v0, vcc, v0, v2 315; CHECK-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc 316; CHECK-NEXT: v_add_i32_e32 v2, vcc, v3, v2 317; CHECK-NEXT: v_add_i32_e32 v1, vcc, v1, v2 318; CHECK-NEXT: v_mul_lo_u32 v2, s11, v0 319; CHECK-NEXT: v_mul_lo_u32 v1, s10, v1 320; CHECK-NEXT: v_mul_lo_u32 v3, s10, v0 321; CHECK-NEXT: v_mul_hi_u32 v0, s10, v0 322; CHECK-NEXT: v_add_i32_e32 v1, vcc, v2, v1 323; CHECK-NEXT: v_add_i32_e32 v0, vcc, v1, v0 324; CHECK-NEXT: v_sub_i32_e32 v1, vcc, s8, v3 325; CHECK-NEXT: v_subb_u32_e64 v2, s[0:1], v4, v0, vcc 326; CHECK-NEXT: v_sub_i32_e64 v0, s[0:1], s9, v0 327; CHECK-NEXT: v_cmp_le_u32_e64 s[0:1], s11, v2 328; CHECK-NEXT: v_cndmask_b32_e64 v3, 0, -1, s[0:1] 329; CHECK-NEXT: v_cmp_le_u32_e64 s[0:1], s10, v1 330; CHECK-NEXT: v_cndmask_b32_e64 v4, 0, -1, s[0:1] 331; CHECK-NEXT: v_cmp_eq_u32_e64 s[0:1], s11, v2 332; CHECK-NEXT: v_subb_u32_e32 v0, vcc, v0, v6, vcc 333; CHECK-NEXT: v_cndmask_b32_e64 v2, v3, v4, s[0:1] 334; CHECK-NEXT: v_subrev_i32_e32 v3, vcc, s10, v1 335; CHECK-NEXT: v_subbrev_u32_e32 v0, vcc, 0, v0, vcc 336; CHECK-NEXT: v_cmp_le_u32_e32 vcc, s11, v0 337; CHECK-NEXT: v_cndmask_b32_e64 v4, 0, -1, vcc 338; CHECK-NEXT: v_cmp_le_u32_e32 vcc, s10, v3 339; CHECK-NEXT: v_cndmask_b32_e64 v5, 0, -1, vcc 340; CHECK-NEXT: v_cmp_eq_u32_e32 vcc, s11, v0 341; CHECK-NEXT: v_cndmask_b32_e32 v0, v4, v5, vcc 342; CHECK-NEXT: v_subrev_i32_e32 v4, vcc, s10, v3 343; CHECK-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0 344; CHECK-NEXT: v_cndmask_b32_e32 v0, v3, v4, vcc 345; CHECK-NEXT: v_cmp_ne_u32_e32 vcc, 0, v2 346; CHECK-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc 347; CHECK-NEXT: v_xor_b32_e32 v0, s6, v0 348; CHECK-NEXT: v_subrev_i32_e32 v0, vcc, s6, v0 349; CHECK-NEXT: s_mov_b32 s1, 0 350; CHECK-NEXT: s_branch BB1_3 351; CHECK-NEXT: BB1_2: 352; CHECK-NEXT: ; implicit-def: $vgpr0_vgpr1 353; CHECK-NEXT: BB1_3: ; %Flow 354; CHECK-NEXT: s_xor_b32 s0, s1, -1 355; CHECK-NEXT: s_and_b32 s0, s0, 1 356; CHECK-NEXT: s_cmp_lg_u32 s0, 0 357; CHECK-NEXT: s_cbranch_scc1 BB1_5 358; CHECK-NEXT: ; %bb.4: 359; CHECK-NEXT: v_cvt_f32_u32_e32 v0, s4 360; CHECK-NEXT: s_sub_i32 s0, 0, s4 361; CHECK-NEXT: v_rcp_iflag_f32_e32 v0, v0 362; CHECK-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v0 363; CHECK-NEXT: v_cvt_u32_f32_e32 v0, v0 364; CHECK-NEXT: v_mul_lo_u32 v1, s0, v0 365; CHECK-NEXT: v_mul_hi_u32 v1, v0, v1 366; CHECK-NEXT: v_add_i32_e32 v0, vcc, v0, v1 367; CHECK-NEXT: v_mul_hi_u32 v0, s2, v0 368; CHECK-NEXT: v_mul_lo_u32 v0, v0, s4 369; CHECK-NEXT: v_sub_i32_e32 v0, vcc, s2, v0 370; CHECK-NEXT: v_subrev_i32_e32 v1, vcc, s4, v0 371; CHECK-NEXT: v_cmp_le_u32_e32 vcc, s4, v0 372; CHECK-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc 373; CHECK-NEXT: v_subrev_i32_e32 v1, vcc, s4, v0 374; CHECK-NEXT: v_cmp_le_u32_e32 vcc, s4, v0 375; CHECK-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc 376; CHECK-NEXT: BB1_5: 377; CHECK-NEXT: v_readfirstlane_b32 s0, v0 378; CHECK-NEXT: s_mov_b32 s1, s0 379; CHECK-NEXT: ; return to shader part epilog 380 %result = srem i64 %num, %den 381 %cast = bitcast i64 %result to <2 x i32> 382 %elt.0 = extractelement <2 x i32> %cast, i32 0 383 %elt.1 = extractelement <2 x i32> %cast, i32 1 384 %res.0 = call i32 @llvm.amdgcn.readfirstlane(i32 %elt.0) 385 %res.1 = call i32 @llvm.amdgcn.readfirstlane(i32 %elt.1) 386 %ins.0 = insertelement <2 x i32> undef, i32 %res.0, i32 0 387 %ins.1 = insertelement <2 x i32> %ins.0, i32 %res.0, i32 1 388 %cast.back = bitcast <2 x i32> %ins.1 to i64 389 ret i64 %cast.back 390} 391 392define <2 x i64> @v_srem_v2i64(<2 x i64> %num, <2 x i64> %den) { 393; GISEL-LABEL: v_srem_v2i64: 394; GISEL: ; %bb.0: 395; GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 396; GISEL-NEXT: v_ashrrev_i32_e32 v8, 31, v5 397; GISEL-NEXT: v_add_i32_e32 v4, vcc, v4, v8 398; GISEL-NEXT: v_addc_u32_e32 v5, vcc, v5, v8, vcc 399; GISEL-NEXT: v_xor_b32_e32 v5, v5, v8 400; GISEL-NEXT: v_xor_b32_e32 v4, v4, v8 401; GISEL-NEXT: v_cvt_f32_u32_e32 v8, v4 402; GISEL-NEXT: v_cvt_f32_u32_e32 v9, v5 403; GISEL-NEXT: v_ashrrev_i32_e32 v10, 31, v1 404; GISEL-NEXT: v_add_i32_e32 v0, vcc, v0, v10 405; GISEL-NEXT: v_addc_u32_e32 v1, vcc, v1, v10, vcc 406; GISEL-NEXT: v_mac_f32_e32 v8, 0x4f800000, v9 407; GISEL-NEXT: v_rcp_iflag_f32_e32 v8, v8 408; GISEL-NEXT: v_sub_i32_e32 v11, vcc, 0, v4 409; GISEL-NEXT: v_subb_u32_e32 v12, vcc, 0, v5, vcc 410; GISEL-NEXT: v_xor_b32_e32 v0, v0, v10 411; GISEL-NEXT: v_mul_f32_e32 v8, 0x5f7ffffc, v8 412; GISEL-NEXT: v_mul_f32_e32 v9, 0x2f800000, v8 413; GISEL-NEXT: v_trunc_f32_e32 v9, v9 414; GISEL-NEXT: v_mac_f32_e32 v8, 0xcf800000, v9 415; GISEL-NEXT: v_cvt_u32_f32_e32 v8, v8 416; GISEL-NEXT: v_cvt_u32_f32_e32 v9, v9 417; GISEL-NEXT: v_xor_b32_e32 v1, v1, v10 418; GISEL-NEXT: v_mul_lo_u32 v13, v12, v8 419; GISEL-NEXT: v_mul_lo_u32 v14, v11, v9 420; GISEL-NEXT: v_mul_hi_u32 v16, v11, v8 421; GISEL-NEXT: v_mul_lo_u32 v15, v11, v8 422; GISEL-NEXT: v_add_i32_e32 v13, vcc, v13, v14 423; GISEL-NEXT: v_add_i32_e32 v13, vcc, v13, v16 424; GISEL-NEXT: v_mul_lo_u32 v14, v9, v15 425; GISEL-NEXT: v_mul_lo_u32 v16, v8, v13 426; GISEL-NEXT: v_mul_hi_u32 v17, v8, v15 427; GISEL-NEXT: v_mul_hi_u32 v15, v9, v15 428; GISEL-NEXT: v_add_i32_e32 v14, vcc, v14, v16 429; GISEL-NEXT: v_cndmask_b32_e64 v16, 0, 1, vcc 430; GISEL-NEXT: v_add_i32_e32 v14, vcc, v14, v17 431; GISEL-NEXT: v_cndmask_b32_e64 v14, 0, 1, vcc 432; GISEL-NEXT: v_mul_lo_u32 v17, v9, v13 433; GISEL-NEXT: v_add_i32_e32 v14, vcc, v16, v14 434; GISEL-NEXT: v_mul_hi_u32 v16, v8, v13 435; GISEL-NEXT: v_mul_hi_u32 v13, v9, v13 436; GISEL-NEXT: v_add_i32_e32 v15, vcc, v17, v15 437; GISEL-NEXT: v_cndmask_b32_e64 v17, 0, 1, vcc 438; GISEL-NEXT: v_add_i32_e32 v15, vcc, v15, v16 439; GISEL-NEXT: v_cndmask_b32_e64 v16, 0, 1, vcc 440; GISEL-NEXT: v_add_i32_e32 v16, vcc, v17, v16 441; GISEL-NEXT: v_add_i32_e32 v14, vcc, v15, v14 442; GISEL-NEXT: v_cndmask_b32_e64 v15, 0, 1, vcc 443; GISEL-NEXT: v_add_i32_e32 v15, vcc, v16, v15 444; GISEL-NEXT: v_add_i32_e32 v13, vcc, v13, v15 445; GISEL-NEXT: v_add_i32_e32 v8, vcc, v8, v14 446; GISEL-NEXT: v_addc_u32_e64 v14, s[4:5], v9, v13, vcc 447; GISEL-NEXT: v_mul_lo_u32 v12, v12, v8 448; GISEL-NEXT: v_mul_lo_u32 v15, v11, v14 449; GISEL-NEXT: v_mul_lo_u32 v16, v11, v8 450; GISEL-NEXT: v_mul_hi_u32 v11, v11, v8 451; GISEL-NEXT: v_add_i32_e64 v9, s[4:5], v9, v13 452; GISEL-NEXT: v_add_i32_e64 v12, s[4:5], v12, v15 453; GISEL-NEXT: v_mul_hi_u32 v13, v8, v16 454; GISEL-NEXT: v_add_i32_e64 v11, s[4:5], v12, v11 455; GISEL-NEXT: v_mul_lo_u32 v12, v14, v16 456; GISEL-NEXT: v_mul_lo_u32 v15, v8, v11 457; GISEL-NEXT: v_mul_hi_u32 v16, v14, v16 458; GISEL-NEXT: v_add_i32_e64 v12, s[4:5], v12, v15 459; GISEL-NEXT: v_cndmask_b32_e64 v15, 0, 1, s[4:5] 460; GISEL-NEXT: v_add_i32_e64 v12, s[4:5], v12, v13 461; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, s[4:5] 462; GISEL-NEXT: v_mul_lo_u32 v13, v14, v11 463; GISEL-NEXT: v_add_i32_e64 v12, s[4:5], v15, v12 464; GISEL-NEXT: v_mul_hi_u32 v15, v8, v11 465; GISEL-NEXT: v_mul_hi_u32 v11, v14, v11 466; GISEL-NEXT: v_add_i32_e64 v13, s[4:5], v13, v16 467; GISEL-NEXT: v_cndmask_b32_e64 v16, 0, 1, s[4:5] 468; GISEL-NEXT: v_add_i32_e64 v13, s[4:5], v13, v15 469; GISEL-NEXT: v_cndmask_b32_e64 v15, 0, 1, s[4:5] 470; GISEL-NEXT: v_add_i32_e64 v15, s[4:5], v16, v15 471; GISEL-NEXT: v_add_i32_e64 v12, s[4:5], v13, v12 472; GISEL-NEXT: v_cndmask_b32_e64 v13, 0, 1, s[4:5] 473; GISEL-NEXT: v_add_i32_e64 v13, s[4:5], v15, v13 474; GISEL-NEXT: v_add_i32_e64 v11, s[4:5], v11, v13 475; GISEL-NEXT: v_addc_u32_e32 v9, vcc, v9, v11, vcc 476; GISEL-NEXT: v_add_i32_e32 v8, vcc, v8, v12 477; GISEL-NEXT: v_addc_u32_e32 v9, vcc, 0, v9, vcc 478; GISEL-NEXT: v_mul_lo_u32 v11, v1, v8 479; GISEL-NEXT: v_mul_lo_u32 v12, v0, v9 480; GISEL-NEXT: v_mul_hi_u32 v13, v0, v8 481; GISEL-NEXT: v_mul_hi_u32 v8, v1, v8 482; GISEL-NEXT: v_add_i32_e32 v11, vcc, v11, v12 483; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc 484; GISEL-NEXT: v_add_i32_e32 v11, vcc, v11, v13 485; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc 486; GISEL-NEXT: v_mul_lo_u32 v13, v1, v9 487; GISEL-NEXT: v_add_i32_e32 v11, vcc, v12, v11 488; GISEL-NEXT: v_mul_hi_u32 v12, v0, v9 489; GISEL-NEXT: v_mul_hi_u32 v9, v1, v9 490; GISEL-NEXT: v_add_i32_e32 v8, vcc, v13, v8 491; GISEL-NEXT: v_cndmask_b32_e64 v13, 0, 1, vcc 492; GISEL-NEXT: v_add_i32_e32 v8, vcc, v8, v12 493; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc 494; GISEL-NEXT: v_add_i32_e32 v12, vcc, v13, v12 495; GISEL-NEXT: v_add_i32_e32 v8, vcc, v8, v11 496; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc 497; GISEL-NEXT: v_add_i32_e32 v11, vcc, v12, v11 498; GISEL-NEXT: v_add_i32_e32 v9, vcc, v9, v11 499; GISEL-NEXT: v_mul_lo_u32 v11, v5, v8 500; GISEL-NEXT: v_mul_lo_u32 v9, v4, v9 501; GISEL-NEXT: v_mul_lo_u32 v12, v4, v8 502; GISEL-NEXT: v_mul_hi_u32 v8, v4, v8 503; GISEL-NEXT: v_add_i32_e32 v9, vcc, v11, v9 504; GISEL-NEXT: v_add_i32_e32 v8, vcc, v9, v8 505; GISEL-NEXT: v_sub_i32_e32 v0, vcc, v0, v12 506; GISEL-NEXT: v_subb_u32_e64 v9, s[4:5], v1, v8, vcc 507; GISEL-NEXT: v_sub_i32_e64 v1, s[4:5], v1, v8 508; GISEL-NEXT: v_cmp_ge_u32_e64 s[4:5], v9, v5 509; GISEL-NEXT: v_cndmask_b32_e64 v8, 0, -1, s[4:5] 510; GISEL-NEXT: v_cmp_ge_u32_e64 s[4:5], v0, v4 511; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, -1, s[4:5] 512; GISEL-NEXT: v_cmp_eq_u32_e64 s[4:5], v9, v5 513; GISEL-NEXT: v_subb_u32_e32 v1, vcc, v1, v5, vcc 514; GISEL-NEXT: v_cndmask_b32_e64 v8, v8, v11, s[4:5] 515; GISEL-NEXT: v_sub_i32_e32 v11, vcc, v0, v4 516; GISEL-NEXT: v_subbrev_u32_e64 v12, s[4:5], 0, v1, vcc 517; GISEL-NEXT: v_cmp_ge_u32_e64 s[4:5], v12, v5 518; GISEL-NEXT: v_cndmask_b32_e64 v13, 0, -1, s[4:5] 519; GISEL-NEXT: v_cmp_ge_u32_e64 s[4:5], v11, v4 520; GISEL-NEXT: v_subb_u32_e32 v1, vcc, v1, v5, vcc 521; GISEL-NEXT: v_sub_i32_e32 v4, vcc, v11, v4 522; GISEL-NEXT: v_cndmask_b32_e64 v14, 0, -1, s[4:5] 523; GISEL-NEXT: v_cmp_eq_u32_e64 s[4:5], v12, v5 524; GISEL-NEXT: v_cndmask_b32_e64 v13, v13, v14, s[4:5] 525; GISEL-NEXT: v_subbrev_u32_e32 v1, vcc, 0, v1, vcc 526; GISEL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v13 527; GISEL-NEXT: v_cndmask_b32_e32 v4, v11, v4, vcc 528; GISEL-NEXT: v_cndmask_b32_e32 v1, v12, v1, vcc 529; GISEL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v8 530; GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc 531; GISEL-NEXT: v_ashrrev_i32_e32 v4, 31, v7 532; GISEL-NEXT: v_cndmask_b32_e32 v1, v9, v1, vcc 533; GISEL-NEXT: v_add_i32_e32 v5, vcc, v6, v4 534; GISEL-NEXT: v_addc_u32_e32 v6, vcc, v7, v4, vcc 535; GISEL-NEXT: v_xor_b32_e32 v5, v5, v4 536; GISEL-NEXT: v_xor_b32_e32 v4, v6, v4 537; GISEL-NEXT: v_cvt_f32_u32_e32 v6, v5 538; GISEL-NEXT: v_cvt_f32_u32_e32 v7, v4 539; GISEL-NEXT: v_ashrrev_i32_e32 v8, 31, v3 540; GISEL-NEXT: v_add_i32_e32 v2, vcc, v2, v8 541; GISEL-NEXT: v_addc_u32_e32 v3, vcc, v3, v8, vcc 542; GISEL-NEXT: v_mac_f32_e32 v6, 0x4f800000, v7 543; GISEL-NEXT: v_rcp_iflag_f32_e32 v6, v6 544; GISEL-NEXT: v_sub_i32_e32 v9, vcc, 0, v5 545; GISEL-NEXT: v_subb_u32_e32 v11, vcc, 0, v4, vcc 546; GISEL-NEXT: v_xor_b32_e32 v0, v0, v10 547; GISEL-NEXT: v_mul_f32_e32 v6, 0x5f7ffffc, v6 548; GISEL-NEXT: v_mul_f32_e32 v7, 0x2f800000, v6 549; GISEL-NEXT: v_trunc_f32_e32 v7, v7 550; GISEL-NEXT: v_mac_f32_e32 v6, 0xcf800000, v7 551; GISEL-NEXT: v_cvt_u32_f32_e32 v6, v6 552; GISEL-NEXT: v_cvt_u32_f32_e32 v7, v7 553; GISEL-NEXT: v_xor_b32_e32 v2, v2, v8 554; GISEL-NEXT: v_xor_b32_e32 v3, v3, v8 555; GISEL-NEXT: v_mul_lo_u32 v12, v11, v6 556; GISEL-NEXT: v_mul_lo_u32 v13, v9, v7 557; GISEL-NEXT: v_mul_hi_u32 v15, v9, v6 558; GISEL-NEXT: v_mul_lo_u32 v14, v9, v6 559; GISEL-NEXT: v_xor_b32_e32 v1, v1, v10 560; GISEL-NEXT: v_add_i32_e32 v12, vcc, v12, v13 561; GISEL-NEXT: v_add_i32_e32 v12, vcc, v12, v15 562; GISEL-NEXT: v_mul_lo_u32 v13, v7, v14 563; GISEL-NEXT: v_mul_lo_u32 v15, v6, v12 564; GISEL-NEXT: v_mul_hi_u32 v16, v6, v14 565; GISEL-NEXT: v_mul_hi_u32 v14, v7, v14 566; GISEL-NEXT: v_add_i32_e32 v13, vcc, v13, v15 567; GISEL-NEXT: v_cndmask_b32_e64 v15, 0, 1, vcc 568; GISEL-NEXT: v_add_i32_e32 v13, vcc, v13, v16 569; GISEL-NEXT: v_cndmask_b32_e64 v13, 0, 1, vcc 570; GISEL-NEXT: v_mul_lo_u32 v16, v7, v12 571; GISEL-NEXT: v_add_i32_e32 v13, vcc, v15, v13 572; GISEL-NEXT: v_mul_hi_u32 v15, v6, v12 573; GISEL-NEXT: v_mul_hi_u32 v12, v7, v12 574; GISEL-NEXT: v_add_i32_e32 v14, vcc, v16, v14 575; GISEL-NEXT: v_cndmask_b32_e64 v16, 0, 1, vcc 576; GISEL-NEXT: v_add_i32_e32 v14, vcc, v14, v15 577; GISEL-NEXT: v_cndmask_b32_e64 v15, 0, 1, vcc 578; GISEL-NEXT: v_add_i32_e32 v15, vcc, v16, v15 579; GISEL-NEXT: v_add_i32_e32 v13, vcc, v14, v13 580; GISEL-NEXT: v_cndmask_b32_e64 v14, 0, 1, vcc 581; GISEL-NEXT: v_add_i32_e32 v14, vcc, v15, v14 582; GISEL-NEXT: v_add_i32_e32 v12, vcc, v12, v14 583; GISEL-NEXT: v_add_i32_e32 v6, vcc, v6, v13 584; GISEL-NEXT: v_addc_u32_e64 v13, s[4:5], v7, v12, vcc 585; GISEL-NEXT: v_mul_lo_u32 v11, v11, v6 586; GISEL-NEXT: v_mul_lo_u32 v14, v9, v13 587; GISEL-NEXT: v_mul_lo_u32 v15, v9, v6 588; GISEL-NEXT: v_mul_hi_u32 v9, v9, v6 589; GISEL-NEXT: v_add_i32_e64 v7, s[4:5], v7, v12 590; GISEL-NEXT: v_add_i32_e64 v11, s[4:5], v11, v14 591; GISEL-NEXT: v_mul_hi_u32 v12, v6, v15 592; GISEL-NEXT: v_add_i32_e64 v9, s[4:5], v11, v9 593; GISEL-NEXT: v_mul_lo_u32 v11, v13, v15 594; GISEL-NEXT: v_mul_lo_u32 v14, v6, v9 595; GISEL-NEXT: v_mul_hi_u32 v15, v13, v15 596; GISEL-NEXT: v_add_i32_e64 v11, s[4:5], v11, v14 597; GISEL-NEXT: v_cndmask_b32_e64 v14, 0, 1, s[4:5] 598; GISEL-NEXT: v_add_i32_e64 v11, s[4:5], v11, v12 599; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, 1, s[4:5] 600; GISEL-NEXT: v_mul_lo_u32 v12, v13, v9 601; GISEL-NEXT: v_add_i32_e64 v11, s[4:5], v14, v11 602; GISEL-NEXT: v_mul_hi_u32 v14, v6, v9 603; GISEL-NEXT: v_mul_hi_u32 v9, v13, v9 604; GISEL-NEXT: v_add_i32_e64 v12, s[4:5], v12, v15 605; GISEL-NEXT: v_cndmask_b32_e64 v15, 0, 1, s[4:5] 606; GISEL-NEXT: v_add_i32_e64 v12, s[4:5], v12, v14 607; GISEL-NEXT: v_cndmask_b32_e64 v14, 0, 1, s[4:5] 608; GISEL-NEXT: v_add_i32_e64 v14, s[4:5], v15, v14 609; GISEL-NEXT: v_add_i32_e64 v11, s[4:5], v12, v11 610; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, s[4:5] 611; GISEL-NEXT: v_add_i32_e64 v12, s[4:5], v14, v12 612; GISEL-NEXT: v_add_i32_e64 v9, s[4:5], v9, v12 613; GISEL-NEXT: v_addc_u32_e32 v7, vcc, v7, v9, vcc 614; GISEL-NEXT: v_add_i32_e32 v6, vcc, v6, v11 615; GISEL-NEXT: v_addc_u32_e32 v7, vcc, 0, v7, vcc 616; GISEL-NEXT: v_sub_i32_e32 v0, vcc, v0, v10 617; GISEL-NEXT: v_mul_lo_u32 v9, v3, v6 618; GISEL-NEXT: v_mul_lo_u32 v11, v2, v7 619; GISEL-NEXT: v_subb_u32_e32 v1, vcc, v1, v10, vcc 620; GISEL-NEXT: v_mul_hi_u32 v10, v2, v6 621; GISEL-NEXT: v_mul_hi_u32 v6, v3, v6 622; GISEL-NEXT: v_add_i32_e32 v9, vcc, v9, v11 623; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc 624; GISEL-NEXT: v_add_i32_e32 v9, vcc, v9, v10 625; GISEL-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc 626; GISEL-NEXT: v_mul_lo_u32 v10, v3, v7 627; GISEL-NEXT: v_add_i32_e32 v9, vcc, v11, v9 628; GISEL-NEXT: v_mul_hi_u32 v11, v2, v7 629; GISEL-NEXT: v_mul_hi_u32 v7, v3, v7 630; GISEL-NEXT: v_add_i32_e32 v6, vcc, v10, v6 631; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 632; GISEL-NEXT: v_add_i32_e32 v6, vcc, v6, v11 633; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc 634; GISEL-NEXT: v_add_i32_e32 v10, vcc, v10, v11 635; GISEL-NEXT: v_add_i32_e32 v6, vcc, v6, v9 636; GISEL-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc 637; GISEL-NEXT: v_add_i32_e32 v9, vcc, v10, v9 638; GISEL-NEXT: v_add_i32_e32 v7, vcc, v7, v9 639; GISEL-NEXT: v_mul_lo_u32 v9, v4, v6 640; GISEL-NEXT: v_mul_lo_u32 v7, v5, v7 641; GISEL-NEXT: v_mul_lo_u32 v10, v5, v6 642; GISEL-NEXT: v_mul_hi_u32 v6, v5, v6 643; GISEL-NEXT: v_add_i32_e32 v7, vcc, v9, v7 644; GISEL-NEXT: v_add_i32_e32 v6, vcc, v7, v6 645; GISEL-NEXT: v_sub_i32_e32 v2, vcc, v2, v10 646; GISEL-NEXT: v_subb_u32_e64 v7, s[4:5], v3, v6, vcc 647; GISEL-NEXT: v_sub_i32_e64 v3, s[4:5], v3, v6 648; GISEL-NEXT: v_cmp_ge_u32_e64 s[4:5], v7, v4 649; GISEL-NEXT: v_cndmask_b32_e64 v6, 0, -1, s[4:5] 650; GISEL-NEXT: v_cmp_ge_u32_e64 s[4:5], v2, v5 651; GISEL-NEXT: v_cndmask_b32_e64 v9, 0, -1, s[4:5] 652; GISEL-NEXT: v_cmp_eq_u32_e64 s[4:5], v7, v4 653; GISEL-NEXT: v_subb_u32_e32 v3, vcc, v3, v4, vcc 654; GISEL-NEXT: v_cndmask_b32_e64 v6, v6, v9, s[4:5] 655; GISEL-NEXT: v_sub_i32_e32 v9, vcc, v2, v5 656; GISEL-NEXT: v_subbrev_u32_e64 v10, s[4:5], 0, v3, vcc 657; GISEL-NEXT: v_cmp_ge_u32_e64 s[4:5], v10, v4 658; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, -1, s[4:5] 659; GISEL-NEXT: v_cmp_ge_u32_e64 s[4:5], v9, v5 660; GISEL-NEXT: v_subb_u32_e32 v3, vcc, v3, v4, vcc 661; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, -1, s[4:5] 662; GISEL-NEXT: v_cmp_eq_u32_e64 s[4:5], v10, v4 663; GISEL-NEXT: v_sub_i32_e32 v4, vcc, v9, v5 664; GISEL-NEXT: v_cndmask_b32_e64 v11, v11, v12, s[4:5] 665; GISEL-NEXT: v_subbrev_u32_e32 v3, vcc, 0, v3, vcc 666; GISEL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v11 667; GISEL-NEXT: v_cndmask_b32_e32 v4, v9, v4, vcc 668; GISEL-NEXT: v_cndmask_b32_e32 v3, v10, v3, vcc 669; GISEL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v6 670; GISEL-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc 671; GISEL-NEXT: v_cndmask_b32_e32 v3, v7, v3, vcc 672; GISEL-NEXT: v_xor_b32_e32 v2, v2, v8 673; GISEL-NEXT: v_xor_b32_e32 v3, v3, v8 674; GISEL-NEXT: v_sub_i32_e32 v2, vcc, v2, v8 675; GISEL-NEXT: v_subb_u32_e32 v3, vcc, v3, v8, vcc 676; GISEL-NEXT: s_setpc_b64 s[30:31] 677; 678; CGP-LABEL: v_srem_v2i64: 679; CGP: ; %bb.0: 680; CGP-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 681; CGP-NEXT: v_mov_b32_e32 v9, v1 682; CGP-NEXT: v_mov_b32_e32 v8, v0 683; CGP-NEXT: v_or_b32_e32 v1, v9, v5 684; CGP-NEXT: v_mov_b32_e32 v0, 0 685; CGP-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[0:1] 686; CGP-NEXT: ; implicit-def: $vgpr0_vgpr1 687; CGP-NEXT: s_and_saveexec_b64 s[4:5], vcc 688; CGP-NEXT: s_xor_b64 s[6:7], exec, s[4:5] 689; CGP-NEXT: s_cbranch_execz BB2_2 690; CGP-NEXT: ; %bb.1: 691; CGP-NEXT: v_ashrrev_i32_e32 v0, 31, v5 692; CGP-NEXT: v_add_i32_e32 v1, vcc, v4, v0 693; CGP-NEXT: v_addc_u32_e32 v5, vcc, v5, v0, vcc 694; CGP-NEXT: v_xor_b32_e32 v1, v1, v0 695; CGP-NEXT: v_xor_b32_e32 v0, v5, v0 696; CGP-NEXT: v_cvt_f32_u32_e32 v5, v1 697; CGP-NEXT: v_cvt_f32_u32_e32 v10, v0 698; CGP-NEXT: v_ashrrev_i32_e32 v11, 31, v9 699; CGP-NEXT: v_mac_f32_e32 v5, 0x4f800000, v10 700; CGP-NEXT: v_rcp_iflag_f32_e32 v5, v5 701; CGP-NEXT: v_add_i32_e32 v10, vcc, v8, v11 702; CGP-NEXT: v_addc_u32_e32 v9, vcc, v9, v11, vcc 703; CGP-NEXT: v_sub_i32_e32 v13, vcc, 0, v1 704; CGP-NEXT: v_mul_f32_e32 v5, 0x5f7ffffc, v5 705; CGP-NEXT: v_mul_f32_e32 v12, 0x2f800000, v5 706; CGP-NEXT: v_trunc_f32_e32 v12, v12 707; CGP-NEXT: v_mac_f32_e32 v5, 0xcf800000, v12 708; CGP-NEXT: v_cvt_u32_f32_e32 v5, v5 709; CGP-NEXT: v_cvt_u32_f32_e32 v12, v12 710; CGP-NEXT: v_subb_u32_e32 v14, vcc, 0, v0, vcc 711; CGP-NEXT: v_xor_b32_e32 v10, v10, v11 712; CGP-NEXT: v_mul_lo_u32 v15, v14, v5 713; CGP-NEXT: v_mul_lo_u32 v16, v13, v12 714; CGP-NEXT: v_mul_hi_u32 v18, v13, v5 715; CGP-NEXT: v_mul_lo_u32 v17, v13, v5 716; CGP-NEXT: v_xor_b32_e32 v9, v9, v11 717; CGP-NEXT: v_add_i32_e32 v15, vcc, v15, v16 718; CGP-NEXT: v_add_i32_e32 v15, vcc, v15, v18 719; CGP-NEXT: v_mul_lo_u32 v16, v12, v17 720; CGP-NEXT: v_mul_lo_u32 v18, v5, v15 721; CGP-NEXT: v_mul_hi_u32 v19, v5, v17 722; CGP-NEXT: v_mul_hi_u32 v17, v12, v17 723; CGP-NEXT: v_add_i32_e32 v16, vcc, v16, v18 724; CGP-NEXT: v_cndmask_b32_e64 v18, 0, 1, vcc 725; CGP-NEXT: v_add_i32_e32 v16, vcc, v16, v19 726; CGP-NEXT: v_cndmask_b32_e64 v16, 0, 1, vcc 727; CGP-NEXT: v_mul_lo_u32 v19, v12, v15 728; CGP-NEXT: v_add_i32_e32 v16, vcc, v18, v16 729; CGP-NEXT: v_mul_hi_u32 v18, v5, v15 730; CGP-NEXT: v_mul_hi_u32 v15, v12, v15 731; CGP-NEXT: v_add_i32_e32 v17, vcc, v19, v17 732; CGP-NEXT: v_cndmask_b32_e64 v19, 0, 1, vcc 733; CGP-NEXT: v_add_i32_e32 v17, vcc, v17, v18 734; CGP-NEXT: v_cndmask_b32_e64 v18, 0, 1, vcc 735; CGP-NEXT: v_add_i32_e32 v18, vcc, v19, v18 736; CGP-NEXT: v_add_i32_e32 v16, vcc, v17, v16 737; CGP-NEXT: v_cndmask_b32_e64 v17, 0, 1, vcc 738; CGP-NEXT: v_add_i32_e32 v17, vcc, v18, v17 739; CGP-NEXT: v_add_i32_e32 v15, vcc, v15, v17 740; CGP-NEXT: v_add_i32_e32 v5, vcc, v5, v16 741; CGP-NEXT: v_addc_u32_e64 v16, s[4:5], v12, v15, vcc 742; CGP-NEXT: v_mul_lo_u32 v14, v14, v5 743; CGP-NEXT: v_mul_lo_u32 v17, v13, v16 744; CGP-NEXT: v_mul_lo_u32 v18, v13, v5 745; CGP-NEXT: v_mul_hi_u32 v13, v13, v5 746; CGP-NEXT: v_add_i32_e64 v12, s[4:5], v12, v15 747; CGP-NEXT: v_add_i32_e64 v14, s[4:5], v14, v17 748; CGP-NEXT: v_mul_hi_u32 v15, v5, v18 749; CGP-NEXT: v_add_i32_e64 v13, s[4:5], v14, v13 750; CGP-NEXT: v_mul_lo_u32 v14, v16, v18 751; CGP-NEXT: v_mul_lo_u32 v17, v5, v13 752; CGP-NEXT: v_mul_hi_u32 v18, v16, v18 753; CGP-NEXT: v_add_i32_e64 v14, s[4:5], v14, v17 754; CGP-NEXT: v_cndmask_b32_e64 v17, 0, 1, s[4:5] 755; CGP-NEXT: v_add_i32_e64 v14, s[4:5], v14, v15 756; CGP-NEXT: v_cndmask_b32_e64 v14, 0, 1, s[4:5] 757; CGP-NEXT: v_mul_lo_u32 v15, v16, v13 758; CGP-NEXT: v_add_i32_e64 v14, s[4:5], v17, v14 759; CGP-NEXT: v_mul_hi_u32 v17, v5, v13 760; CGP-NEXT: v_mul_hi_u32 v13, v16, v13 761; CGP-NEXT: v_add_i32_e64 v15, s[4:5], v15, v18 762; CGP-NEXT: v_cndmask_b32_e64 v18, 0, 1, s[4:5] 763; CGP-NEXT: v_add_i32_e64 v15, s[4:5], v15, v17 764; CGP-NEXT: v_cndmask_b32_e64 v17, 0, 1, s[4:5] 765; CGP-NEXT: v_add_i32_e64 v17, s[4:5], v18, v17 766; CGP-NEXT: v_add_i32_e64 v14, s[4:5], v15, v14 767; CGP-NEXT: v_cndmask_b32_e64 v15, 0, 1, s[4:5] 768; CGP-NEXT: v_add_i32_e64 v15, s[4:5], v17, v15 769; CGP-NEXT: v_add_i32_e64 v13, s[4:5], v13, v15 770; CGP-NEXT: v_addc_u32_e32 v12, vcc, v12, v13, vcc 771; CGP-NEXT: v_add_i32_e32 v5, vcc, v5, v14 772; CGP-NEXT: v_addc_u32_e32 v12, vcc, 0, v12, vcc 773; CGP-NEXT: v_mul_lo_u32 v13, v9, v5 774; CGP-NEXT: v_mul_lo_u32 v14, v10, v12 775; CGP-NEXT: v_mul_hi_u32 v15, v10, v5 776; CGP-NEXT: v_mul_hi_u32 v5, v9, v5 777; CGP-NEXT: v_add_i32_e32 v13, vcc, v13, v14 778; CGP-NEXT: v_cndmask_b32_e64 v14, 0, 1, vcc 779; CGP-NEXT: v_add_i32_e32 v13, vcc, v13, v15 780; CGP-NEXT: v_cndmask_b32_e64 v13, 0, 1, vcc 781; CGP-NEXT: v_mul_lo_u32 v15, v9, v12 782; CGP-NEXT: v_add_i32_e32 v13, vcc, v14, v13 783; CGP-NEXT: v_mul_hi_u32 v14, v10, v12 784; CGP-NEXT: v_mul_hi_u32 v12, v9, v12 785; CGP-NEXT: v_add_i32_e32 v5, vcc, v15, v5 786; CGP-NEXT: v_cndmask_b32_e64 v15, 0, 1, vcc 787; CGP-NEXT: v_add_i32_e32 v5, vcc, v5, v14 788; CGP-NEXT: v_cndmask_b32_e64 v14, 0, 1, vcc 789; CGP-NEXT: v_add_i32_e32 v14, vcc, v15, v14 790; CGP-NEXT: v_add_i32_e32 v5, vcc, v5, v13 791; CGP-NEXT: v_cndmask_b32_e64 v13, 0, 1, vcc 792; CGP-NEXT: v_add_i32_e32 v13, vcc, v14, v13 793; CGP-NEXT: v_add_i32_e32 v12, vcc, v12, v13 794; CGP-NEXT: v_mul_lo_u32 v13, v0, v5 795; CGP-NEXT: v_mul_lo_u32 v12, v1, v12 796; CGP-NEXT: v_mul_lo_u32 v14, v1, v5 797; CGP-NEXT: v_mul_hi_u32 v5, v1, v5 798; CGP-NEXT: v_add_i32_e32 v12, vcc, v13, v12 799; CGP-NEXT: v_add_i32_e32 v5, vcc, v12, v5 800; CGP-NEXT: v_sub_i32_e32 v10, vcc, v10, v14 801; CGP-NEXT: v_subb_u32_e64 v12, s[4:5], v9, v5, vcc 802; CGP-NEXT: v_sub_i32_e64 v5, s[4:5], v9, v5 803; CGP-NEXT: v_cmp_ge_u32_e64 s[4:5], v12, v0 804; CGP-NEXT: v_cndmask_b32_e64 v9, 0, -1, s[4:5] 805; CGP-NEXT: v_cmp_ge_u32_e64 s[4:5], v10, v1 806; CGP-NEXT: v_cndmask_b32_e64 v13, 0, -1, s[4:5] 807; CGP-NEXT: v_cmp_eq_u32_e64 s[4:5], v12, v0 808; CGP-NEXT: v_subb_u32_e32 v5, vcc, v5, v0, vcc 809; CGP-NEXT: v_cndmask_b32_e64 v9, v9, v13, s[4:5] 810; CGP-NEXT: v_sub_i32_e32 v13, vcc, v10, v1 811; CGP-NEXT: v_subbrev_u32_e64 v14, s[4:5], 0, v5, vcc 812; CGP-NEXT: v_cmp_ge_u32_e64 s[4:5], v14, v0 813; CGP-NEXT: v_cndmask_b32_e64 v15, 0, -1, s[4:5] 814; CGP-NEXT: v_cmp_ge_u32_e64 s[4:5], v13, v1 815; CGP-NEXT: v_cndmask_b32_e64 v16, 0, -1, s[4:5] 816; CGP-NEXT: v_cmp_eq_u32_e64 s[4:5], v14, v0 817; CGP-NEXT: v_subb_u32_e32 v0, vcc, v5, v0, vcc 818; CGP-NEXT: v_sub_i32_e32 v1, vcc, v13, v1 819; CGP-NEXT: v_cndmask_b32_e64 v15, v15, v16, s[4:5] 820; CGP-NEXT: v_subbrev_u32_e32 v0, vcc, 0, v0, vcc 821; CGP-NEXT: v_cmp_ne_u32_e32 vcc, 0, v15 822; CGP-NEXT: v_cndmask_b32_e32 v1, v13, v1, vcc 823; CGP-NEXT: v_cndmask_b32_e32 v0, v14, v0, vcc 824; CGP-NEXT: v_cmp_ne_u32_e32 vcc, 0, v9 825; CGP-NEXT: v_cndmask_b32_e32 v1, v10, v1, vcc 826; CGP-NEXT: v_cndmask_b32_e32 v0, v12, v0, vcc 827; CGP-NEXT: v_xor_b32_e32 v1, v1, v11 828; CGP-NEXT: v_xor_b32_e32 v5, v0, v11 829; CGP-NEXT: v_sub_i32_e32 v0, vcc, v1, v11 830; CGP-NEXT: v_subb_u32_e32 v1, vcc, v5, v11, vcc 831; CGP-NEXT: BB2_2: ; %Flow2 832; CGP-NEXT: s_or_saveexec_b64 s[4:5], s[6:7] 833; CGP-NEXT: s_xor_b64 exec, exec, s[4:5] 834; CGP-NEXT: s_cbranch_execz BB2_4 835; CGP-NEXT: ; %bb.3: 836; CGP-NEXT: v_cvt_f32_u32_e32 v0, v4 837; CGP-NEXT: v_sub_i32_e32 v1, vcc, 0, v4 838; CGP-NEXT: v_rcp_iflag_f32_e32 v0, v0 839; CGP-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v0 840; CGP-NEXT: v_cvt_u32_f32_e32 v0, v0 841; CGP-NEXT: v_mul_lo_u32 v1, v1, v0 842; CGP-NEXT: v_mul_hi_u32 v1, v0, v1 843; CGP-NEXT: v_add_i32_e32 v0, vcc, v0, v1 844; CGP-NEXT: v_mul_hi_u32 v0, v8, v0 845; CGP-NEXT: v_mul_lo_u32 v0, v0, v4 846; CGP-NEXT: v_sub_i32_e32 v0, vcc, v8, v0 847; CGP-NEXT: v_sub_i32_e32 v1, vcc, v0, v4 848; CGP-NEXT: v_cmp_ge_u32_e32 vcc, v0, v4 849; CGP-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc 850; CGP-NEXT: v_sub_i32_e32 v1, vcc, v0, v4 851; CGP-NEXT: v_cmp_ge_u32_e32 vcc, v0, v4 852; CGP-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc 853; CGP-NEXT: v_mov_b32_e32 v1, 0 854; CGP-NEXT: BB2_4: 855; CGP-NEXT: s_or_b64 exec, exec, s[4:5] 856; CGP-NEXT: v_or_b32_e32 v5, v3, v7 857; CGP-NEXT: v_mov_b32_e32 v4, 0 858; CGP-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[4:5] 859; CGP-NEXT: ; implicit-def: $vgpr4_vgpr5 860; CGP-NEXT: s_and_saveexec_b64 s[4:5], vcc 861; CGP-NEXT: s_xor_b64 s[6:7], exec, s[4:5] 862; CGP-NEXT: s_cbranch_execz BB2_6 863; CGP-NEXT: ; %bb.5: 864; CGP-NEXT: v_ashrrev_i32_e32 v4, 31, v7 865; CGP-NEXT: v_add_i32_e32 v5, vcc, v6, v4 866; CGP-NEXT: v_addc_u32_e32 v7, vcc, v7, v4, vcc 867; CGP-NEXT: v_xor_b32_e32 v5, v5, v4 868; CGP-NEXT: v_xor_b32_e32 v4, v7, v4 869; CGP-NEXT: v_cvt_f32_u32_e32 v7, v5 870; CGP-NEXT: v_cvt_f32_u32_e32 v8, v4 871; CGP-NEXT: v_ashrrev_i32_e32 v9, 31, v3 872; CGP-NEXT: v_mac_f32_e32 v7, 0x4f800000, v8 873; CGP-NEXT: v_rcp_iflag_f32_e32 v7, v7 874; CGP-NEXT: v_add_i32_e32 v8, vcc, v2, v9 875; CGP-NEXT: v_addc_u32_e32 v3, vcc, v3, v9, vcc 876; CGP-NEXT: v_sub_i32_e32 v11, vcc, 0, v5 877; CGP-NEXT: v_mul_f32_e32 v7, 0x5f7ffffc, v7 878; CGP-NEXT: v_mul_f32_e32 v10, 0x2f800000, v7 879; CGP-NEXT: v_trunc_f32_e32 v10, v10 880; CGP-NEXT: v_mac_f32_e32 v7, 0xcf800000, v10 881; CGP-NEXT: v_cvt_u32_f32_e32 v7, v7 882; CGP-NEXT: v_cvt_u32_f32_e32 v10, v10 883; CGP-NEXT: v_subb_u32_e32 v12, vcc, 0, v4, vcc 884; CGP-NEXT: v_xor_b32_e32 v8, v8, v9 885; CGP-NEXT: v_mul_lo_u32 v13, v12, v7 886; CGP-NEXT: v_mul_lo_u32 v14, v11, v10 887; CGP-NEXT: v_mul_hi_u32 v16, v11, v7 888; CGP-NEXT: v_mul_lo_u32 v15, v11, v7 889; CGP-NEXT: v_xor_b32_e32 v3, v3, v9 890; CGP-NEXT: v_add_i32_e32 v13, vcc, v13, v14 891; CGP-NEXT: v_add_i32_e32 v13, vcc, v13, v16 892; CGP-NEXT: v_mul_lo_u32 v14, v10, v15 893; CGP-NEXT: v_mul_lo_u32 v16, v7, v13 894; CGP-NEXT: v_mul_hi_u32 v17, v7, v15 895; CGP-NEXT: v_mul_hi_u32 v15, v10, v15 896; CGP-NEXT: v_add_i32_e32 v14, vcc, v14, v16 897; CGP-NEXT: v_cndmask_b32_e64 v16, 0, 1, vcc 898; CGP-NEXT: v_add_i32_e32 v14, vcc, v14, v17 899; CGP-NEXT: v_cndmask_b32_e64 v14, 0, 1, vcc 900; CGP-NEXT: v_mul_lo_u32 v17, v10, v13 901; CGP-NEXT: v_add_i32_e32 v14, vcc, v16, v14 902; CGP-NEXT: v_mul_hi_u32 v16, v7, v13 903; CGP-NEXT: v_mul_hi_u32 v13, v10, v13 904; CGP-NEXT: v_add_i32_e32 v15, vcc, v17, v15 905; CGP-NEXT: v_cndmask_b32_e64 v17, 0, 1, vcc 906; CGP-NEXT: v_add_i32_e32 v15, vcc, v15, v16 907; CGP-NEXT: v_cndmask_b32_e64 v16, 0, 1, vcc 908; CGP-NEXT: v_add_i32_e32 v16, vcc, v17, v16 909; CGP-NEXT: v_add_i32_e32 v14, vcc, v15, v14 910; CGP-NEXT: v_cndmask_b32_e64 v15, 0, 1, vcc 911; CGP-NEXT: v_add_i32_e32 v15, vcc, v16, v15 912; CGP-NEXT: v_add_i32_e32 v13, vcc, v13, v15 913; CGP-NEXT: v_add_i32_e32 v7, vcc, v7, v14 914; CGP-NEXT: v_addc_u32_e64 v14, s[4:5], v10, v13, vcc 915; CGP-NEXT: v_mul_lo_u32 v12, v12, v7 916; CGP-NEXT: v_mul_lo_u32 v15, v11, v14 917; CGP-NEXT: v_mul_lo_u32 v16, v11, v7 918; CGP-NEXT: v_mul_hi_u32 v11, v11, v7 919; CGP-NEXT: v_add_i32_e64 v10, s[4:5], v10, v13 920; CGP-NEXT: v_add_i32_e64 v12, s[4:5], v12, v15 921; CGP-NEXT: v_mul_hi_u32 v13, v7, v16 922; CGP-NEXT: v_add_i32_e64 v11, s[4:5], v12, v11 923; CGP-NEXT: v_mul_lo_u32 v12, v14, v16 924; CGP-NEXT: v_mul_lo_u32 v15, v7, v11 925; CGP-NEXT: v_mul_hi_u32 v16, v14, v16 926; CGP-NEXT: v_add_i32_e64 v12, s[4:5], v12, v15 927; CGP-NEXT: v_cndmask_b32_e64 v15, 0, 1, s[4:5] 928; CGP-NEXT: v_add_i32_e64 v12, s[4:5], v12, v13 929; CGP-NEXT: v_cndmask_b32_e64 v12, 0, 1, s[4:5] 930; CGP-NEXT: v_mul_lo_u32 v13, v14, v11 931; CGP-NEXT: v_add_i32_e64 v12, s[4:5], v15, v12 932; CGP-NEXT: v_mul_hi_u32 v15, v7, v11 933; CGP-NEXT: v_mul_hi_u32 v11, v14, v11 934; CGP-NEXT: v_add_i32_e64 v13, s[4:5], v13, v16 935; CGP-NEXT: v_cndmask_b32_e64 v16, 0, 1, s[4:5] 936; CGP-NEXT: v_add_i32_e64 v13, s[4:5], v13, v15 937; CGP-NEXT: v_cndmask_b32_e64 v15, 0, 1, s[4:5] 938; CGP-NEXT: v_add_i32_e64 v15, s[4:5], v16, v15 939; CGP-NEXT: v_add_i32_e64 v12, s[4:5], v13, v12 940; CGP-NEXT: v_cndmask_b32_e64 v13, 0, 1, s[4:5] 941; CGP-NEXT: v_add_i32_e64 v13, s[4:5], v15, v13 942; CGP-NEXT: v_add_i32_e64 v11, s[4:5], v11, v13 943; CGP-NEXT: v_addc_u32_e32 v10, vcc, v10, v11, vcc 944; CGP-NEXT: v_add_i32_e32 v7, vcc, v7, v12 945; CGP-NEXT: v_addc_u32_e32 v10, vcc, 0, v10, vcc 946; CGP-NEXT: v_mul_lo_u32 v11, v3, v7 947; CGP-NEXT: v_mul_lo_u32 v12, v8, v10 948; CGP-NEXT: v_mul_hi_u32 v13, v8, v7 949; CGP-NEXT: v_mul_hi_u32 v7, v3, v7 950; CGP-NEXT: v_add_i32_e32 v11, vcc, v11, v12 951; CGP-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc 952; CGP-NEXT: v_add_i32_e32 v11, vcc, v11, v13 953; CGP-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc 954; CGP-NEXT: v_mul_lo_u32 v13, v3, v10 955; CGP-NEXT: v_add_i32_e32 v11, vcc, v12, v11 956; CGP-NEXT: v_mul_hi_u32 v12, v8, v10 957; CGP-NEXT: v_mul_hi_u32 v10, v3, v10 958; CGP-NEXT: v_add_i32_e32 v7, vcc, v13, v7 959; CGP-NEXT: v_cndmask_b32_e64 v13, 0, 1, vcc 960; CGP-NEXT: v_add_i32_e32 v7, vcc, v7, v12 961; CGP-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc 962; CGP-NEXT: v_add_i32_e32 v12, vcc, v13, v12 963; CGP-NEXT: v_add_i32_e32 v7, vcc, v7, v11 964; CGP-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc 965; CGP-NEXT: v_add_i32_e32 v11, vcc, v12, v11 966; CGP-NEXT: v_add_i32_e32 v10, vcc, v10, v11 967; CGP-NEXT: v_mul_lo_u32 v11, v4, v7 968; CGP-NEXT: v_mul_lo_u32 v10, v5, v10 969; CGP-NEXT: v_mul_lo_u32 v12, v5, v7 970; CGP-NEXT: v_mul_hi_u32 v7, v5, v7 971; CGP-NEXT: v_add_i32_e32 v10, vcc, v11, v10 972; CGP-NEXT: v_add_i32_e32 v7, vcc, v10, v7 973; CGP-NEXT: v_sub_i32_e32 v8, vcc, v8, v12 974; CGP-NEXT: v_subb_u32_e64 v10, s[4:5], v3, v7, vcc 975; CGP-NEXT: v_sub_i32_e64 v3, s[4:5], v3, v7 976; CGP-NEXT: v_cmp_ge_u32_e64 s[4:5], v10, v4 977; CGP-NEXT: v_cndmask_b32_e64 v7, 0, -1, s[4:5] 978; CGP-NEXT: v_cmp_ge_u32_e64 s[4:5], v8, v5 979; CGP-NEXT: v_cndmask_b32_e64 v11, 0, -1, s[4:5] 980; CGP-NEXT: v_cmp_eq_u32_e64 s[4:5], v10, v4 981; CGP-NEXT: v_subb_u32_e32 v3, vcc, v3, v4, vcc 982; CGP-NEXT: v_cndmask_b32_e64 v7, v7, v11, s[4:5] 983; CGP-NEXT: v_sub_i32_e32 v11, vcc, v8, v5 984; CGP-NEXT: v_subbrev_u32_e64 v12, s[4:5], 0, v3, vcc 985; CGP-NEXT: v_cmp_ge_u32_e64 s[4:5], v12, v4 986; CGP-NEXT: v_cndmask_b32_e64 v13, 0, -1, s[4:5] 987; CGP-NEXT: v_cmp_ge_u32_e64 s[4:5], v11, v5 988; CGP-NEXT: v_subb_u32_e32 v3, vcc, v3, v4, vcc 989; CGP-NEXT: v_cndmask_b32_e64 v14, 0, -1, s[4:5] 990; CGP-NEXT: v_cmp_eq_u32_e64 s[4:5], v12, v4 991; CGP-NEXT: v_sub_i32_e32 v4, vcc, v11, v5 992; CGP-NEXT: v_cndmask_b32_e64 v13, v13, v14, s[4:5] 993; CGP-NEXT: v_subbrev_u32_e32 v3, vcc, 0, v3, vcc 994; CGP-NEXT: v_cmp_ne_u32_e32 vcc, 0, v13 995; CGP-NEXT: v_cndmask_b32_e32 v4, v11, v4, vcc 996; CGP-NEXT: v_cndmask_b32_e32 v3, v12, v3, vcc 997; CGP-NEXT: v_cmp_ne_u32_e32 vcc, 0, v7 998; CGP-NEXT: v_cndmask_b32_e32 v4, v8, v4, vcc 999; CGP-NEXT: v_cndmask_b32_e32 v3, v10, v3, vcc 1000; CGP-NEXT: v_xor_b32_e32 v4, v4, v9 1001; CGP-NEXT: v_xor_b32_e32 v3, v3, v9 1002; CGP-NEXT: v_sub_i32_e32 v4, vcc, v4, v9 1003; CGP-NEXT: v_subb_u32_e32 v5, vcc, v3, v9, vcc 1004; CGP-NEXT: BB2_6: ; %Flow 1005; CGP-NEXT: s_or_saveexec_b64 s[4:5], s[6:7] 1006; CGP-NEXT: s_xor_b64 exec, exec, s[4:5] 1007; CGP-NEXT: s_cbranch_execz BB2_8 1008; CGP-NEXT: ; %bb.7: 1009; CGP-NEXT: v_cvt_f32_u32_e32 v3, v6 1010; CGP-NEXT: v_sub_i32_e32 v4, vcc, 0, v6 1011; CGP-NEXT: v_mov_b32_e32 v5, 0 1012; CGP-NEXT: v_rcp_iflag_f32_e32 v3, v3 1013; CGP-NEXT: v_mul_f32_e32 v3, 0x4f7ffffe, v3 1014; CGP-NEXT: v_cvt_u32_f32_e32 v3, v3 1015; CGP-NEXT: v_mul_lo_u32 v4, v4, v3 1016; CGP-NEXT: v_mul_hi_u32 v4, v3, v4 1017; CGP-NEXT: v_add_i32_e32 v3, vcc, v3, v4 1018; CGP-NEXT: v_mul_hi_u32 v3, v2, v3 1019; CGP-NEXT: v_mul_lo_u32 v3, v3, v6 1020; CGP-NEXT: v_sub_i32_e32 v2, vcc, v2, v3 1021; CGP-NEXT: v_sub_i32_e32 v3, vcc, v2, v6 1022; CGP-NEXT: v_cmp_ge_u32_e32 vcc, v2, v6 1023; CGP-NEXT: v_cndmask_b32_e32 v2, v2, v3, vcc 1024; CGP-NEXT: v_sub_i32_e32 v3, vcc, v2, v6 1025; CGP-NEXT: v_cmp_ge_u32_e32 vcc, v2, v6 1026; CGP-NEXT: v_cndmask_b32_e32 v4, v2, v3, vcc 1027; CGP-NEXT: BB2_8: 1028; CGP-NEXT: s_or_b64 exec, exec, s[4:5] 1029; CGP-NEXT: v_mov_b32_e32 v2, v4 1030; CGP-NEXT: v_mov_b32_e32 v3, v5 1031; CGP-NEXT: s_setpc_b64 s[30:31] 1032 %result = srem <2 x i64> %num, %den 1033 ret <2 x i64> %result 1034} 1035 1036define i64 @v_srem_i64_pow2k_denom(i64 %num) { 1037; CHECK-LABEL: v_srem_i64_pow2k_denom: 1038; CHECK: ; %bb.0: 1039; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1040; CHECK-NEXT: v_cvt_f32_u32_e32 v2, 0x1000 1041; CHECK-NEXT: v_cvt_f32_ubyte0_e32 v4, 0 1042; CHECK-NEXT: s_movk_i32 s6, 0xf000 1043; CHECK-NEXT: v_ashrrev_i32_e32 v3, 31, v1 1044; CHECK-NEXT: v_mac_f32_e32 v2, 0x4f800000, v4 1045; CHECK-NEXT: v_rcp_iflag_f32_e32 v2, v2 1046; CHECK-NEXT: v_add_i32_e32 v0, vcc, v0, v3 1047; CHECK-NEXT: v_addc_u32_e32 v1, vcc, v1, v3, vcc 1048; CHECK-NEXT: v_xor_b32_e32 v0, v0, v3 1049; CHECK-NEXT: v_mul_f32_e32 v2, 0x5f7ffffc, v2 1050; CHECK-NEXT: v_mul_f32_e32 v4, 0x2f800000, v2 1051; CHECK-NEXT: v_trunc_f32_e32 v4, v4 1052; CHECK-NEXT: v_mac_f32_e32 v2, 0xcf800000, v4 1053; CHECK-NEXT: v_cvt_u32_f32_e32 v2, v2 1054; CHECK-NEXT: v_cvt_u32_f32_e32 v4, v4 1055; CHECK-NEXT: v_xor_b32_e32 v1, v1, v3 1056; CHECK-NEXT: v_mul_lo_u32 v5, -1, v2 1057; CHECK-NEXT: v_mul_lo_u32 v6, s6, v4 1058; CHECK-NEXT: v_mul_hi_u32 v8, s6, v2 1059; CHECK-NEXT: v_mul_lo_u32 v7, s6, v2 1060; CHECK-NEXT: v_add_i32_e32 v5, vcc, v5, v6 1061; CHECK-NEXT: v_add_i32_e32 v5, vcc, v5, v8 1062; CHECK-NEXT: v_mul_lo_u32 v6, v4, v7 1063; CHECK-NEXT: v_mul_lo_u32 v8, v2, v5 1064; CHECK-NEXT: v_mul_hi_u32 v9, v2, v7 1065; CHECK-NEXT: v_mul_hi_u32 v7, v4, v7 1066; CHECK-NEXT: v_add_i32_e32 v6, vcc, v6, v8 1067; CHECK-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc 1068; CHECK-NEXT: v_add_i32_e32 v6, vcc, v6, v9 1069; CHECK-NEXT: v_cndmask_b32_e64 v6, 0, 1, vcc 1070; CHECK-NEXT: v_mul_lo_u32 v9, v4, v5 1071; CHECK-NEXT: v_add_i32_e32 v6, vcc, v8, v6 1072; CHECK-NEXT: v_mul_hi_u32 v8, v2, v5 1073; CHECK-NEXT: v_mul_hi_u32 v5, v4, v5 1074; CHECK-NEXT: v_add_i32_e32 v7, vcc, v9, v7 1075; CHECK-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc 1076; CHECK-NEXT: v_add_i32_e32 v7, vcc, v7, v8 1077; CHECK-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc 1078; CHECK-NEXT: v_add_i32_e32 v8, vcc, v9, v8 1079; CHECK-NEXT: v_add_i32_e32 v6, vcc, v7, v6 1080; CHECK-NEXT: v_cndmask_b32_e64 v7, 0, 1, vcc 1081; CHECK-NEXT: v_add_i32_e32 v7, vcc, v8, v7 1082; CHECK-NEXT: v_add_i32_e32 v5, vcc, v5, v7 1083; CHECK-NEXT: v_add_i32_e32 v2, vcc, v2, v6 1084; CHECK-NEXT: v_addc_u32_e64 v6, s[4:5], v4, v5, vcc 1085; CHECK-NEXT: v_mul_lo_u32 v7, -1, v2 1086; CHECK-NEXT: v_mul_lo_u32 v8, s6, v6 1087; CHECK-NEXT: v_mul_hi_u32 v10, s6, v2 1088; CHECK-NEXT: v_mul_lo_u32 v9, s6, v2 1089; CHECK-NEXT: v_add_i32_e64 v4, s[4:5], v4, v5 1090; CHECK-NEXT: v_add_i32_e64 v7, s[4:5], v7, v8 1091; CHECK-NEXT: v_add_i32_e64 v7, s[4:5], v7, v10 1092; CHECK-NEXT: v_mul_lo_u32 v8, v6, v9 1093; CHECK-NEXT: v_mul_lo_u32 v10, v2, v7 1094; CHECK-NEXT: v_mul_hi_u32 v5, v2, v9 1095; CHECK-NEXT: v_mul_hi_u32 v9, v6, v9 1096; CHECK-NEXT: s_movk_i32 s6, 0x1000 1097; CHECK-NEXT: v_add_i32_e64 v8, s[4:5], v8, v10 1098; CHECK-NEXT: v_cndmask_b32_e64 v10, 0, 1, s[4:5] 1099; CHECK-NEXT: v_add_i32_e64 v5, s[4:5], v8, v5 1100; CHECK-NEXT: v_cndmask_b32_e64 v5, 0, 1, s[4:5] 1101; CHECK-NEXT: v_mul_lo_u32 v8, v6, v7 1102; CHECK-NEXT: v_add_i32_e64 v5, s[4:5], v10, v5 1103; CHECK-NEXT: v_mul_hi_u32 v10, v2, v7 1104; CHECK-NEXT: v_mul_hi_u32 v6, v6, v7 1105; CHECK-NEXT: v_add_i32_e64 v8, s[4:5], v8, v9 1106; CHECK-NEXT: v_cndmask_b32_e64 v9, 0, 1, s[4:5] 1107; CHECK-NEXT: v_add_i32_e64 v8, s[4:5], v8, v10 1108; CHECK-NEXT: v_cndmask_b32_e64 v10, 0, 1, s[4:5] 1109; CHECK-NEXT: v_add_i32_e64 v9, s[4:5], v9, v10 1110; CHECK-NEXT: v_add_i32_e64 v5, s[4:5], v8, v5 1111; CHECK-NEXT: v_cndmask_b32_e64 v8, 0, 1, s[4:5] 1112; CHECK-NEXT: v_add_i32_e64 v7, s[4:5], v9, v8 1113; CHECK-NEXT: v_add_i32_e64 v6, s[4:5], v6, v7 1114; CHECK-NEXT: v_addc_u32_e32 v4, vcc, v4, v6, vcc 1115; CHECK-NEXT: v_add_i32_e32 v2, vcc, v2, v5 1116; CHECK-NEXT: v_addc_u32_e32 v4, vcc, 0, v4, vcc 1117; CHECK-NEXT: v_mul_lo_u32 v5, v1, v2 1118; CHECK-NEXT: v_mul_lo_u32 v6, v0, v4 1119; CHECK-NEXT: v_mul_hi_u32 v7, v0, v2 1120; CHECK-NEXT: v_mul_hi_u32 v2, v1, v2 1121; CHECK-NEXT: v_add_i32_e32 v5, vcc, v5, v6 1122; CHECK-NEXT: v_cndmask_b32_e64 v6, 0, 1, vcc 1123; CHECK-NEXT: v_add_i32_e32 v5, vcc, v5, v7 1124; CHECK-NEXT: v_cndmask_b32_e64 v5, 0, 1, vcc 1125; CHECK-NEXT: v_mul_lo_u32 v7, v1, v4 1126; CHECK-NEXT: v_add_i32_e32 v5, vcc, v6, v5 1127; CHECK-NEXT: v_mul_hi_u32 v6, v0, v4 1128; CHECK-NEXT: v_mul_hi_u32 v4, v1, v4 1129; CHECK-NEXT: v_add_i32_e32 v2, vcc, v7, v2 1130; CHECK-NEXT: v_cndmask_b32_e64 v7, 0, 1, vcc 1131; CHECK-NEXT: v_add_i32_e32 v2, vcc, v2, v6 1132; CHECK-NEXT: v_cndmask_b32_e64 v6, 0, 1, vcc 1133; CHECK-NEXT: v_add_i32_e32 v6, vcc, v7, v6 1134; CHECK-NEXT: v_add_i32_e32 v2, vcc, v2, v5 1135; CHECK-NEXT: v_cndmask_b32_e64 v5, 0, 1, vcc 1136; CHECK-NEXT: v_add_i32_e32 v5, vcc, v6, v5 1137; CHECK-NEXT: v_add_i32_e32 v4, vcc, v4, v5 1138; CHECK-NEXT: v_mul_lo_u32 v5, 0, v2 1139; CHECK-NEXT: v_mul_lo_u32 v4, s6, v4 1140; CHECK-NEXT: v_mul_lo_u32 v6, s6, v2 1141; CHECK-NEXT: v_mul_hi_u32 v2, s6, v2 1142; CHECK-NEXT: v_add_i32_e32 v4, vcc, v5, v4 1143; CHECK-NEXT: v_add_i32_e32 v2, vcc, v4, v2 1144; CHECK-NEXT: v_sub_i32_e32 v0, vcc, v0, v6 1145; CHECK-NEXT: v_subb_u32_e64 v4, s[4:5], v1, v2, vcc 1146; CHECK-NEXT: v_sub_i32_e64 v1, s[4:5], v1, v2 1147; CHECK-NEXT: v_cmp_le_u32_e64 s[4:5], 0, v4 1148; CHECK-NEXT: v_cndmask_b32_e64 v2, 0, -1, s[4:5] 1149; CHECK-NEXT: v_cmp_le_u32_e64 s[4:5], s6, v0 1150; CHECK-NEXT: v_cndmask_b32_e64 v5, 0, -1, s[4:5] 1151; CHECK-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v4 1152; CHECK-NEXT: v_subbrev_u32_e32 v1, vcc, 0, v1, vcc 1153; CHECK-NEXT: v_cndmask_b32_e64 v2, v2, v5, s[4:5] 1154; CHECK-NEXT: v_subrev_i32_e32 v5, vcc, s6, v0 1155; CHECK-NEXT: v_subbrev_u32_e32 v1, vcc, 0, v1, vcc 1156; CHECK-NEXT: v_cmp_le_u32_e32 vcc, 0, v1 1157; CHECK-NEXT: v_cndmask_b32_e64 v6, 0, -1, vcc 1158; CHECK-NEXT: v_cmp_le_u32_e32 vcc, s6, v5 1159; CHECK-NEXT: v_cndmask_b32_e64 v7, 0, -1, vcc 1160; CHECK-NEXT: v_cmp_eq_u32_e32 vcc, 0, v1 1161; CHECK-NEXT: v_cndmask_b32_e32 v6, v6, v7, vcc 1162; CHECK-NEXT: v_subrev_i32_e32 v7, vcc, s6, v5 1163; CHECK-NEXT: v_subbrev_u32_e32 v8, vcc, 0, v1, vcc 1164; CHECK-NEXT: v_cmp_ne_u32_e32 vcc, 0, v6 1165; CHECK-NEXT: v_cndmask_b32_e32 v5, v5, v7, vcc 1166; CHECK-NEXT: v_cndmask_b32_e32 v1, v1, v8, vcc 1167; CHECK-NEXT: v_cmp_ne_u32_e32 vcc, 0, v2 1168; CHECK-NEXT: v_cndmask_b32_e32 v0, v0, v5, vcc 1169; CHECK-NEXT: v_cndmask_b32_e32 v1, v4, v1, vcc 1170; CHECK-NEXT: v_xor_b32_e32 v0, v0, v3 1171; CHECK-NEXT: v_xor_b32_e32 v1, v1, v3 1172; CHECK-NEXT: v_sub_i32_e32 v0, vcc, v0, v3 1173; CHECK-NEXT: v_subb_u32_e32 v1, vcc, v1, v3, vcc 1174; CHECK-NEXT: s_setpc_b64 s[30:31] 1175 %result = srem i64 %num, 4096 1176 ret i64 %result 1177} 1178 1179define <2 x i64> @v_srem_v2i64_pow2k_denom(<2 x i64> %num) { 1180; GISEL-LABEL: v_srem_v2i64_pow2k_denom: 1181; GISEL: ; %bb.0: 1182; GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1183; GISEL-NEXT: s_movk_i32 s10, 0x1000 1184; GISEL-NEXT: s_add_u32 s4, s10, 0 1185; GISEL-NEXT: s_cselect_b32 s5, 1, 0 1186; GISEL-NEXT: s_and_b32 s5, s5, 1 1187; GISEL-NEXT: s_cmp_lg_u32 s5, 0 1188; GISEL-NEXT: s_mov_b32 s6, 0 1189; GISEL-NEXT: s_mov_b32 s7, s6 1190; GISEL-NEXT: s_addc_u32 s5, 0, 0 1191; GISEL-NEXT: s_xor_b64 s[8:9], s[4:5], s[6:7] 1192; GISEL-NEXT: v_cvt_f32_u32_e32 v4, s8 1193; GISEL-NEXT: v_cvt_f32_u32_e32 v5, s9 1194; GISEL-NEXT: s_sub_u32 s11, 0, s8 1195; GISEL-NEXT: s_cselect_b32 s4, 1, 0 1196; GISEL-NEXT: s_and_b32 s4, s4, 1 1197; GISEL-NEXT: v_mac_f32_e32 v4, 0x4f800000, v5 1198; GISEL-NEXT: v_rcp_iflag_f32_e32 v4, v4 1199; GISEL-NEXT: s_cmp_lg_u32 s4, 0 1200; GISEL-NEXT: s_subb_u32 s12, 0, s9 1201; GISEL-NEXT: v_ashrrev_i32_e32 v6, 31, v1 1202; GISEL-NEXT: v_mul_f32_e32 v4, 0x5f7ffffc, v4 1203; GISEL-NEXT: v_mul_f32_e32 v5, 0x2f800000, v4 1204; GISEL-NEXT: v_trunc_f32_e32 v5, v5 1205; GISEL-NEXT: v_mac_f32_e32 v4, 0xcf800000, v5 1206; GISEL-NEXT: v_cvt_u32_f32_e32 v4, v4 1207; GISEL-NEXT: v_cvt_u32_f32_e32 v5, v5 1208; GISEL-NEXT: v_add_i32_e32 v0, vcc, v0, v6 1209; GISEL-NEXT: v_addc_u32_e32 v1, vcc, v1, v6, vcc 1210; GISEL-NEXT: v_mul_lo_u32 v7, s12, v4 1211; GISEL-NEXT: v_mul_lo_u32 v8, s11, v5 1212; GISEL-NEXT: v_mul_hi_u32 v10, s11, v4 1213; GISEL-NEXT: v_mul_lo_u32 v9, s11, v4 1214; GISEL-NEXT: v_xor_b32_e32 v0, v0, v6 1215; GISEL-NEXT: v_add_i32_e32 v7, vcc, v7, v8 1216; GISEL-NEXT: v_add_i32_e32 v7, vcc, v7, v10 1217; GISEL-NEXT: v_mul_lo_u32 v8, v5, v9 1218; GISEL-NEXT: v_mul_lo_u32 v10, v4, v7 1219; GISEL-NEXT: v_mul_hi_u32 v11, v4, v9 1220; GISEL-NEXT: v_mul_hi_u32 v9, v5, v9 1221; GISEL-NEXT: v_xor_b32_e32 v1, v1, v6 1222; GISEL-NEXT: v_add_i32_e32 v8, vcc, v8, v10 1223; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 1224; GISEL-NEXT: v_add_i32_e32 v8, vcc, v8, v11 1225; GISEL-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc 1226; GISEL-NEXT: v_mul_lo_u32 v11, v5, v7 1227; GISEL-NEXT: v_add_i32_e32 v8, vcc, v10, v8 1228; GISEL-NEXT: v_mul_hi_u32 v10, v4, v7 1229; GISEL-NEXT: v_mul_hi_u32 v7, v5, v7 1230; GISEL-NEXT: v_add_i32_e32 v9, vcc, v11, v9 1231; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc 1232; GISEL-NEXT: v_add_i32_e32 v9, vcc, v9, v10 1233; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 1234; GISEL-NEXT: v_add_i32_e32 v10, vcc, v11, v10 1235; GISEL-NEXT: v_add_i32_e32 v8, vcc, v9, v8 1236; GISEL-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc 1237; GISEL-NEXT: v_add_i32_e32 v9, vcc, v10, v9 1238; GISEL-NEXT: v_add_i32_e32 v7, vcc, v7, v9 1239; GISEL-NEXT: v_add_i32_e32 v4, vcc, v4, v8 1240; GISEL-NEXT: v_addc_u32_e64 v8, s[4:5], v5, v7, vcc 1241; GISEL-NEXT: v_mul_lo_u32 v9, s12, v4 1242; GISEL-NEXT: v_mul_lo_u32 v10, s11, v8 1243; GISEL-NEXT: v_mul_hi_u32 v12, s11, v4 1244; GISEL-NEXT: v_mul_lo_u32 v11, s11, v4 1245; GISEL-NEXT: v_add_i32_e64 v5, s[4:5], v5, v7 1246; GISEL-NEXT: v_add_i32_e64 v9, s[4:5], v9, v10 1247; GISEL-NEXT: v_add_i32_e64 v9, s[4:5], v9, v12 1248; GISEL-NEXT: v_mul_lo_u32 v10, v8, v11 1249; GISEL-NEXT: v_mul_lo_u32 v12, v4, v9 1250; GISEL-NEXT: v_mul_hi_u32 v7, v4, v11 1251; GISEL-NEXT: v_mul_hi_u32 v11, v8, v11 1252; GISEL-NEXT: v_add_i32_e64 v10, s[4:5], v10, v12 1253; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, s[4:5] 1254; GISEL-NEXT: v_add_i32_e64 v7, s[4:5], v10, v7 1255; GISEL-NEXT: v_cndmask_b32_e64 v7, 0, 1, s[4:5] 1256; GISEL-NEXT: v_mul_lo_u32 v10, v8, v9 1257; GISEL-NEXT: v_add_i32_e64 v7, s[4:5], v12, v7 1258; GISEL-NEXT: v_mul_hi_u32 v12, v4, v9 1259; GISEL-NEXT: v_mul_hi_u32 v8, v8, v9 1260; GISEL-NEXT: v_add_i32_e64 v10, s[4:5], v10, v11 1261; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, 1, s[4:5] 1262; GISEL-NEXT: v_add_i32_e64 v10, s[4:5], v10, v12 1263; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, s[4:5] 1264; GISEL-NEXT: v_add_i32_e64 v11, s[4:5], v11, v12 1265; GISEL-NEXT: v_add_i32_e64 v7, s[4:5], v10, v7 1266; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, 1, s[4:5] 1267; GISEL-NEXT: v_add_i32_e64 v9, s[4:5], v11, v10 1268; GISEL-NEXT: v_add_i32_e64 v8, s[4:5], v8, v9 1269; GISEL-NEXT: v_addc_u32_e32 v5, vcc, v5, v8, vcc 1270; GISEL-NEXT: v_add_i32_e32 v4, vcc, v4, v7 1271; GISEL-NEXT: v_addc_u32_e32 v5, vcc, 0, v5, vcc 1272; GISEL-NEXT: v_mul_lo_u32 v7, v1, v4 1273; GISEL-NEXT: v_mul_lo_u32 v8, v0, v5 1274; GISEL-NEXT: v_mul_hi_u32 v10, v0, v4 1275; GISEL-NEXT: v_mul_hi_u32 v4, v1, v4 1276; GISEL-NEXT: v_mov_b32_e32 v9, s9 1277; GISEL-NEXT: v_add_i32_e32 v7, vcc, v7, v8 1278; GISEL-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc 1279; GISEL-NEXT: v_add_i32_e32 v7, vcc, v7, v10 1280; GISEL-NEXT: v_cndmask_b32_e64 v7, 0, 1, vcc 1281; GISEL-NEXT: v_mul_lo_u32 v10, v1, v5 1282; GISEL-NEXT: v_add_i32_e32 v7, vcc, v8, v7 1283; GISEL-NEXT: v_mul_hi_u32 v8, v0, v5 1284; GISEL-NEXT: v_mul_hi_u32 v5, v1, v5 1285; GISEL-NEXT: v_add_i32_e32 v4, vcc, v10, v4 1286; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 1287; GISEL-NEXT: v_add_i32_e32 v4, vcc, v4, v8 1288; GISEL-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc 1289; GISEL-NEXT: v_add_i32_e32 v8, vcc, v10, v8 1290; GISEL-NEXT: v_add_i32_e32 v4, vcc, v4, v7 1291; GISEL-NEXT: v_cndmask_b32_e64 v7, 0, 1, vcc 1292; GISEL-NEXT: v_add_i32_e32 v7, vcc, v8, v7 1293; GISEL-NEXT: v_add_i32_e32 v5, vcc, v5, v7 1294; GISEL-NEXT: v_mul_lo_u32 v7, s9, v4 1295; GISEL-NEXT: v_mul_lo_u32 v5, s8, v5 1296; GISEL-NEXT: v_mul_lo_u32 v8, s8, v4 1297; GISEL-NEXT: v_mul_hi_u32 v4, s8, v4 1298; GISEL-NEXT: v_add_i32_e32 v5, vcc, v7, v5 1299; GISEL-NEXT: v_add_i32_e32 v4, vcc, v5, v4 1300; GISEL-NEXT: v_sub_i32_e32 v0, vcc, v0, v8 1301; GISEL-NEXT: v_subb_u32_e64 v5, s[4:5], v1, v4, vcc 1302; GISEL-NEXT: v_sub_i32_e64 v1, s[4:5], v1, v4 1303; GISEL-NEXT: v_cmp_le_u32_e64 s[4:5], s9, v5 1304; GISEL-NEXT: v_cndmask_b32_e64 v4, 0, -1, s[4:5] 1305; GISEL-NEXT: v_cmp_le_u32_e64 s[4:5], s8, v0 1306; GISEL-NEXT: v_cndmask_b32_e64 v7, 0, -1, s[4:5] 1307; GISEL-NEXT: v_cmp_eq_u32_e64 s[4:5], s9, v5 1308; GISEL-NEXT: v_subb_u32_e32 v1, vcc, v1, v9, vcc 1309; GISEL-NEXT: v_cndmask_b32_e64 v4, v4, v7, s[4:5] 1310; GISEL-NEXT: v_subrev_i32_e32 v7, vcc, s8, v0 1311; GISEL-NEXT: v_subbrev_u32_e64 v8, s[4:5], 0, v1, vcc 1312; GISEL-NEXT: v_cmp_le_u32_e64 s[4:5], s9, v8 1313; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, -1, s[4:5] 1314; GISEL-NEXT: v_cmp_le_u32_e64 s[4:5], s8, v7 1315; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, -1, s[4:5] 1316; GISEL-NEXT: v_cmp_eq_u32_e64 s[4:5], s9, v8 1317; GISEL-NEXT: v_cndmask_b32_e64 v10, v10, v11, s[4:5] 1318; GISEL-NEXT: s_add_u32 s4, s10, 0 1319; GISEL-NEXT: v_subb_u32_e32 v1, vcc, v1, v9, vcc 1320; GISEL-NEXT: s_cselect_b32 s5, 1, 0 1321; GISEL-NEXT: v_subrev_i32_e32 v9, vcc, s8, v7 1322; GISEL-NEXT: s_and_b32 s5, s5, 1 1323; GISEL-NEXT: s_cmp_lg_u32 s5, 0 1324; GISEL-NEXT: v_subbrev_u32_e32 v1, vcc, 0, v1, vcc 1325; GISEL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v10 1326; GISEL-NEXT: s_addc_u32 s5, 0, 0 1327; GISEL-NEXT: s_xor_b64 s[6:7], s[4:5], s[6:7] 1328; GISEL-NEXT: v_cndmask_b32_e32 v7, v7, v9, vcc 1329; GISEL-NEXT: v_cndmask_b32_e32 v1, v8, v1, vcc 1330; GISEL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v4 1331; GISEL-NEXT: v_cndmask_b32_e32 v1, v5, v1, vcc 1332; GISEL-NEXT: v_cvt_f32_u32_e32 v4, s6 1333; GISEL-NEXT: v_cvt_f32_u32_e32 v5, s7 1334; GISEL-NEXT: s_sub_u32 s8, 0, s6 1335; GISEL-NEXT: s_cselect_b32 s4, 1, 0 1336; GISEL-NEXT: s_and_b32 s4, s4, 1 1337; GISEL-NEXT: v_mac_f32_e32 v4, 0x4f800000, v5 1338; GISEL-NEXT: v_rcp_iflag_f32_e32 v4, v4 1339; GISEL-NEXT: s_cmp_lg_u32 s4, 0 1340; GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v7, vcc 1341; GISEL-NEXT: s_subb_u32 s9, 0, s7 1342; GISEL-NEXT: v_mul_f32_e32 v4, 0x5f7ffffc, v4 1343; GISEL-NEXT: v_mul_f32_e32 v5, 0x2f800000, v4 1344; GISEL-NEXT: v_trunc_f32_e32 v5, v5 1345; GISEL-NEXT: v_mac_f32_e32 v4, 0xcf800000, v5 1346; GISEL-NEXT: v_cvt_u32_f32_e32 v4, v4 1347; GISEL-NEXT: v_cvt_u32_f32_e32 v5, v5 1348; GISEL-NEXT: v_xor_b32_e32 v0, v0, v6 1349; GISEL-NEXT: v_xor_b32_e32 v1, v1, v6 1350; GISEL-NEXT: v_mul_lo_u32 v7, s9, v4 1351; GISEL-NEXT: v_mul_lo_u32 v8, s8, v5 1352; GISEL-NEXT: v_sub_i32_e32 v0, vcc, v0, v6 1353; GISEL-NEXT: v_mul_hi_u32 v10, s8, v4 1354; GISEL-NEXT: v_subb_u32_e32 v1, vcc, v1, v6, vcc 1355; GISEL-NEXT: v_ashrrev_i32_e32 v6, 31, v3 1356; GISEL-NEXT: v_mul_lo_u32 v9, s8, v4 1357; GISEL-NEXT: v_add_i32_e32 v2, vcc, v2, v6 1358; GISEL-NEXT: v_addc_u32_e32 v3, vcc, v3, v6, vcc 1359; GISEL-NEXT: v_add_i32_e32 v7, vcc, v7, v8 1360; GISEL-NEXT: v_add_i32_e32 v7, vcc, v7, v10 1361; GISEL-NEXT: v_mul_lo_u32 v8, v5, v9 1362; GISEL-NEXT: v_mul_lo_u32 v10, v4, v7 1363; GISEL-NEXT: v_mul_hi_u32 v11, v4, v9 1364; GISEL-NEXT: v_mul_hi_u32 v9, v5, v9 1365; GISEL-NEXT: v_xor_b32_e32 v2, v2, v6 1366; GISEL-NEXT: v_add_i32_e32 v8, vcc, v8, v10 1367; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 1368; GISEL-NEXT: v_add_i32_e32 v8, vcc, v8, v11 1369; GISEL-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc 1370; GISEL-NEXT: v_mul_lo_u32 v11, v5, v7 1371; GISEL-NEXT: v_add_i32_e32 v8, vcc, v10, v8 1372; GISEL-NEXT: v_mul_hi_u32 v10, v4, v7 1373; GISEL-NEXT: v_mul_hi_u32 v7, v5, v7 1374; GISEL-NEXT: v_add_i32_e32 v9, vcc, v11, v9 1375; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc 1376; GISEL-NEXT: v_add_i32_e32 v9, vcc, v9, v10 1377; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 1378; GISEL-NEXT: v_add_i32_e32 v10, vcc, v11, v10 1379; GISEL-NEXT: v_add_i32_e32 v8, vcc, v9, v8 1380; GISEL-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc 1381; GISEL-NEXT: v_add_i32_e32 v9, vcc, v10, v9 1382; GISEL-NEXT: v_add_i32_e32 v7, vcc, v7, v9 1383; GISEL-NEXT: v_add_i32_e32 v4, vcc, v4, v8 1384; GISEL-NEXT: v_addc_u32_e64 v8, s[4:5], v5, v7, vcc 1385; GISEL-NEXT: v_mul_lo_u32 v9, s9, v4 1386; GISEL-NEXT: v_mul_lo_u32 v10, s8, v8 1387; GISEL-NEXT: v_mul_hi_u32 v12, s8, v4 1388; GISEL-NEXT: v_mul_lo_u32 v11, s8, v4 1389; GISEL-NEXT: v_add_i32_e64 v5, s[4:5], v5, v7 1390; GISEL-NEXT: v_add_i32_e64 v9, s[4:5], v9, v10 1391; GISEL-NEXT: v_add_i32_e64 v9, s[4:5], v9, v12 1392; GISEL-NEXT: v_mul_lo_u32 v10, v8, v11 1393; GISEL-NEXT: v_mul_lo_u32 v12, v4, v9 1394; GISEL-NEXT: v_mul_hi_u32 v7, v4, v11 1395; GISEL-NEXT: v_mul_hi_u32 v11, v8, v11 1396; GISEL-NEXT: v_xor_b32_e32 v3, v3, v6 1397; GISEL-NEXT: v_add_i32_e64 v10, s[4:5], v10, v12 1398; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, s[4:5] 1399; GISEL-NEXT: v_add_i32_e64 v7, s[4:5], v10, v7 1400; GISEL-NEXT: v_cndmask_b32_e64 v7, 0, 1, s[4:5] 1401; GISEL-NEXT: v_mul_lo_u32 v10, v8, v9 1402; GISEL-NEXT: v_add_i32_e64 v7, s[4:5], v12, v7 1403; GISEL-NEXT: v_mul_hi_u32 v12, v4, v9 1404; GISEL-NEXT: v_mul_hi_u32 v8, v8, v9 1405; GISEL-NEXT: v_add_i32_e64 v10, s[4:5], v10, v11 1406; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, 1, s[4:5] 1407; GISEL-NEXT: v_add_i32_e64 v10, s[4:5], v10, v12 1408; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, s[4:5] 1409; GISEL-NEXT: v_add_i32_e64 v11, s[4:5], v11, v12 1410; GISEL-NEXT: v_add_i32_e64 v7, s[4:5], v10, v7 1411; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, 1, s[4:5] 1412; GISEL-NEXT: v_add_i32_e64 v9, s[4:5], v11, v10 1413; GISEL-NEXT: v_add_i32_e64 v8, s[4:5], v8, v9 1414; GISEL-NEXT: v_addc_u32_e32 v5, vcc, v5, v8, vcc 1415; GISEL-NEXT: v_add_i32_e32 v4, vcc, v4, v7 1416; GISEL-NEXT: v_addc_u32_e32 v5, vcc, 0, v5, vcc 1417; GISEL-NEXT: v_mul_lo_u32 v7, v3, v4 1418; GISEL-NEXT: v_mul_lo_u32 v8, v2, v5 1419; GISEL-NEXT: v_mul_hi_u32 v10, v2, v4 1420; GISEL-NEXT: v_mul_hi_u32 v4, v3, v4 1421; GISEL-NEXT: v_mov_b32_e32 v9, s7 1422; GISEL-NEXT: v_add_i32_e32 v7, vcc, v7, v8 1423; GISEL-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc 1424; GISEL-NEXT: v_add_i32_e32 v7, vcc, v7, v10 1425; GISEL-NEXT: v_cndmask_b32_e64 v7, 0, 1, vcc 1426; GISEL-NEXT: v_mul_lo_u32 v10, v3, v5 1427; GISEL-NEXT: v_add_i32_e32 v7, vcc, v8, v7 1428; GISEL-NEXT: v_mul_hi_u32 v8, v2, v5 1429; GISEL-NEXT: v_mul_hi_u32 v5, v3, v5 1430; GISEL-NEXT: v_add_i32_e32 v4, vcc, v10, v4 1431; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 1432; GISEL-NEXT: v_add_i32_e32 v4, vcc, v4, v8 1433; GISEL-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc 1434; GISEL-NEXT: v_add_i32_e32 v8, vcc, v10, v8 1435; GISEL-NEXT: v_add_i32_e32 v4, vcc, v4, v7 1436; GISEL-NEXT: v_cndmask_b32_e64 v7, 0, 1, vcc 1437; GISEL-NEXT: v_add_i32_e32 v7, vcc, v8, v7 1438; GISEL-NEXT: v_add_i32_e32 v5, vcc, v5, v7 1439; GISEL-NEXT: v_mul_lo_u32 v7, s7, v4 1440; GISEL-NEXT: v_mul_lo_u32 v5, s6, v5 1441; GISEL-NEXT: v_mul_lo_u32 v8, s6, v4 1442; GISEL-NEXT: v_mul_hi_u32 v4, s6, v4 1443; GISEL-NEXT: v_add_i32_e32 v5, vcc, v7, v5 1444; GISEL-NEXT: v_add_i32_e32 v4, vcc, v5, v4 1445; GISEL-NEXT: v_sub_i32_e32 v2, vcc, v2, v8 1446; GISEL-NEXT: v_subb_u32_e64 v5, s[4:5], v3, v4, vcc 1447; GISEL-NEXT: v_sub_i32_e64 v3, s[4:5], v3, v4 1448; GISEL-NEXT: v_cmp_le_u32_e64 s[4:5], s7, v5 1449; GISEL-NEXT: v_cndmask_b32_e64 v4, 0, -1, s[4:5] 1450; GISEL-NEXT: v_cmp_le_u32_e64 s[4:5], s6, v2 1451; GISEL-NEXT: v_cndmask_b32_e64 v7, 0, -1, s[4:5] 1452; GISEL-NEXT: v_cmp_eq_u32_e64 s[4:5], s7, v5 1453; GISEL-NEXT: v_subb_u32_e32 v3, vcc, v3, v9, vcc 1454; GISEL-NEXT: v_cndmask_b32_e64 v4, v4, v7, s[4:5] 1455; GISEL-NEXT: v_subrev_i32_e32 v7, vcc, s6, v2 1456; GISEL-NEXT: v_subbrev_u32_e64 v8, s[4:5], 0, v3, vcc 1457; GISEL-NEXT: v_cmp_le_u32_e64 s[4:5], s7, v8 1458; GISEL-NEXT: v_subb_u32_e32 v3, vcc, v3, v9, vcc 1459; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, -1, s[4:5] 1460; GISEL-NEXT: v_cmp_le_u32_e64 s[4:5], s6, v7 1461; GISEL-NEXT: v_subrev_i32_e32 v9, vcc, s6, v7 1462; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, -1, s[4:5] 1463; GISEL-NEXT: v_cmp_eq_u32_e64 s[4:5], s7, v8 1464; GISEL-NEXT: v_cndmask_b32_e64 v10, v10, v11, s[4:5] 1465; GISEL-NEXT: v_subbrev_u32_e32 v3, vcc, 0, v3, vcc 1466; GISEL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v10 1467; GISEL-NEXT: v_cndmask_b32_e32 v7, v7, v9, vcc 1468; GISEL-NEXT: v_cndmask_b32_e32 v3, v8, v3, vcc 1469; GISEL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v4 1470; GISEL-NEXT: v_cndmask_b32_e32 v2, v2, v7, vcc 1471; GISEL-NEXT: v_cndmask_b32_e32 v3, v5, v3, vcc 1472; GISEL-NEXT: v_xor_b32_e32 v2, v2, v6 1473; GISEL-NEXT: v_xor_b32_e32 v3, v3, v6 1474; GISEL-NEXT: v_sub_i32_e32 v2, vcc, v2, v6 1475; GISEL-NEXT: v_subb_u32_e32 v3, vcc, v3, v6, vcc 1476; GISEL-NEXT: s_setpc_b64 s[30:31] 1477; 1478; CGP-LABEL: v_srem_v2i64_pow2k_denom: 1479; CGP: ; %bb.0: 1480; CGP-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1481; CGP-NEXT: v_cvt_f32_u32_e32 v4, 0x1000 1482; CGP-NEXT: v_cvt_f32_ubyte0_e32 v6, 0 1483; CGP-NEXT: s_movk_i32 s6, 0xf000 1484; CGP-NEXT: v_ashrrev_i32_e32 v5, 31, v1 1485; CGP-NEXT: v_mov_b32_e32 v7, v4 1486; CGP-NEXT: v_mac_f32_e32 v7, 0x4f800000, v6 1487; CGP-NEXT: v_rcp_iflag_f32_e32 v7, v7 1488; CGP-NEXT: v_add_i32_e32 v0, vcc, v0, v5 1489; CGP-NEXT: v_addc_u32_e32 v1, vcc, v1, v5, vcc 1490; CGP-NEXT: v_xor_b32_e32 v0, v0, v5 1491; CGP-NEXT: v_mul_f32_e32 v7, 0x5f7ffffc, v7 1492; CGP-NEXT: v_mul_f32_e32 v8, 0x2f800000, v7 1493; CGP-NEXT: v_trunc_f32_e32 v8, v8 1494; CGP-NEXT: v_mac_f32_e32 v7, 0xcf800000, v8 1495; CGP-NEXT: v_cvt_u32_f32_e32 v7, v7 1496; CGP-NEXT: v_cvt_u32_f32_e32 v8, v8 1497; CGP-NEXT: v_xor_b32_e32 v1, v1, v5 1498; CGP-NEXT: s_movk_i32 s7, 0x1000 1499; CGP-NEXT: v_mul_lo_u32 v9, -1, v7 1500; CGP-NEXT: v_mul_lo_u32 v10, s6, v8 1501; CGP-NEXT: v_mul_hi_u32 v12, s6, v7 1502; CGP-NEXT: v_mul_lo_u32 v11, s6, v7 1503; CGP-NEXT: v_mac_f32_e32 v4, 0x4f800000, v6 1504; CGP-NEXT: v_add_i32_e32 v9, vcc, v9, v10 1505; CGP-NEXT: v_add_i32_e32 v9, vcc, v9, v12 1506; CGP-NEXT: v_mul_lo_u32 v10, v8, v11 1507; CGP-NEXT: v_mul_lo_u32 v12, v7, v9 1508; CGP-NEXT: v_mul_hi_u32 v13, v7, v11 1509; CGP-NEXT: v_mul_hi_u32 v11, v8, v11 1510; CGP-NEXT: v_rcp_iflag_f32_e32 v4, v4 1511; CGP-NEXT: v_add_i32_e32 v10, vcc, v10, v12 1512; CGP-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc 1513; CGP-NEXT: v_add_i32_e32 v10, vcc, v10, v13 1514; CGP-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 1515; CGP-NEXT: v_mul_lo_u32 v13, v8, v9 1516; CGP-NEXT: v_add_i32_e32 v10, vcc, v12, v10 1517; CGP-NEXT: v_mul_hi_u32 v12, v7, v9 1518; CGP-NEXT: v_mul_hi_u32 v9, v8, v9 1519; CGP-NEXT: v_add_i32_e32 v11, vcc, v13, v11 1520; CGP-NEXT: v_cndmask_b32_e64 v13, 0, 1, vcc 1521; CGP-NEXT: v_add_i32_e32 v11, vcc, v11, v12 1522; CGP-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc 1523; CGP-NEXT: v_add_i32_e32 v12, vcc, v13, v12 1524; CGP-NEXT: v_add_i32_e32 v10, vcc, v11, v10 1525; CGP-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc 1526; CGP-NEXT: v_add_i32_e32 v11, vcc, v12, v11 1527; CGP-NEXT: v_add_i32_e32 v9, vcc, v9, v11 1528; CGP-NEXT: v_add_i32_e32 v7, vcc, v7, v10 1529; CGP-NEXT: v_addc_u32_e64 v10, s[4:5], v8, v9, vcc 1530; CGP-NEXT: v_mul_lo_u32 v11, -1, v7 1531; CGP-NEXT: v_mul_lo_u32 v12, s6, v10 1532; CGP-NEXT: v_mul_hi_u32 v14, s6, v7 1533; CGP-NEXT: v_mul_lo_u32 v13, s6, v7 1534; CGP-NEXT: v_add_i32_e64 v8, s[4:5], v8, v9 1535; CGP-NEXT: v_add_i32_e64 v11, s[4:5], v11, v12 1536; CGP-NEXT: v_add_i32_e64 v11, s[4:5], v11, v14 1537; CGP-NEXT: v_mul_lo_u32 v12, v10, v13 1538; CGP-NEXT: v_mul_lo_u32 v14, v7, v11 1539; CGP-NEXT: v_mul_hi_u32 v9, v7, v13 1540; CGP-NEXT: v_mul_hi_u32 v13, v10, v13 1541; CGP-NEXT: v_mul_f32_e32 v4, 0x5f7ffffc, v4 1542; CGP-NEXT: v_add_i32_e64 v12, s[4:5], v12, v14 1543; CGP-NEXT: v_cndmask_b32_e64 v14, 0, 1, s[4:5] 1544; CGP-NEXT: v_add_i32_e64 v9, s[4:5], v12, v9 1545; CGP-NEXT: v_cndmask_b32_e64 v9, 0, 1, s[4:5] 1546; CGP-NEXT: v_mul_lo_u32 v12, v10, v11 1547; CGP-NEXT: v_add_i32_e64 v9, s[4:5], v14, v9 1548; CGP-NEXT: v_mul_hi_u32 v14, v7, v11 1549; CGP-NEXT: v_mul_hi_u32 v10, v10, v11 1550; CGP-NEXT: v_add_i32_e64 v12, s[4:5], v12, v13 1551; CGP-NEXT: v_cndmask_b32_e64 v13, 0, 1, s[4:5] 1552; CGP-NEXT: v_add_i32_e64 v12, s[4:5], v12, v14 1553; CGP-NEXT: v_cndmask_b32_e64 v14, 0, 1, s[4:5] 1554; CGP-NEXT: v_add_i32_e64 v13, s[4:5], v13, v14 1555; CGP-NEXT: v_add_i32_e64 v9, s[4:5], v12, v9 1556; CGP-NEXT: v_cndmask_b32_e64 v12, 0, 1, s[4:5] 1557; CGP-NEXT: v_add_i32_e64 v11, s[4:5], v13, v12 1558; CGP-NEXT: v_add_i32_e64 v10, s[4:5], v10, v11 1559; CGP-NEXT: v_addc_u32_e32 v8, vcc, v8, v10, vcc 1560; CGP-NEXT: v_add_i32_e32 v7, vcc, v7, v9 1561; CGP-NEXT: v_addc_u32_e32 v8, vcc, 0, v8, vcc 1562; CGP-NEXT: v_mul_lo_u32 v9, v1, v7 1563; CGP-NEXT: v_mul_lo_u32 v10, v0, v8 1564; CGP-NEXT: v_mul_hi_u32 v11, v0, v7 1565; CGP-NEXT: v_mul_hi_u32 v7, v1, v7 1566; CGP-NEXT: v_ashrrev_i32_e32 v6, 31, v3 1567; CGP-NEXT: v_add_i32_e32 v9, vcc, v9, v10 1568; CGP-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 1569; CGP-NEXT: v_add_i32_e32 v9, vcc, v9, v11 1570; CGP-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc 1571; CGP-NEXT: v_mul_lo_u32 v11, v1, v8 1572; CGP-NEXT: v_add_i32_e32 v9, vcc, v10, v9 1573; CGP-NEXT: v_mul_hi_u32 v10, v0, v8 1574; CGP-NEXT: v_mul_hi_u32 v8, v1, v8 1575; CGP-NEXT: v_add_i32_e32 v7, vcc, v11, v7 1576; CGP-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc 1577; CGP-NEXT: v_add_i32_e32 v7, vcc, v7, v10 1578; CGP-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 1579; CGP-NEXT: v_add_i32_e32 v10, vcc, v11, v10 1580; CGP-NEXT: v_add_i32_e32 v7, vcc, v7, v9 1581; CGP-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc 1582; CGP-NEXT: v_add_i32_e32 v9, vcc, v10, v9 1583; CGP-NEXT: v_add_i32_e32 v8, vcc, v8, v9 1584; CGP-NEXT: v_mul_lo_u32 v9, 0, v7 1585; CGP-NEXT: v_mul_lo_u32 v8, s7, v8 1586; CGP-NEXT: v_mul_lo_u32 v10, s7, v7 1587; CGP-NEXT: v_mul_hi_u32 v7, s7, v7 1588; CGP-NEXT: v_add_i32_e32 v8, vcc, v9, v8 1589; CGP-NEXT: v_add_i32_e32 v7, vcc, v8, v7 1590; CGP-NEXT: v_sub_i32_e32 v0, vcc, v0, v10 1591; CGP-NEXT: v_subb_u32_e64 v8, s[4:5], v1, v7, vcc 1592; CGP-NEXT: v_sub_i32_e64 v1, s[4:5], v1, v7 1593; CGP-NEXT: v_cmp_le_u32_e64 s[4:5], 0, v8 1594; CGP-NEXT: v_cndmask_b32_e64 v7, 0, -1, s[4:5] 1595; CGP-NEXT: v_cmp_le_u32_e64 s[4:5], s7, v0 1596; CGP-NEXT: v_cndmask_b32_e64 v9, 0, -1, s[4:5] 1597; CGP-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v8 1598; CGP-NEXT: v_subbrev_u32_e32 v1, vcc, 0, v1, vcc 1599; CGP-NEXT: v_cndmask_b32_e64 v7, v7, v9, s[4:5] 1600; CGP-NEXT: v_subrev_i32_e32 v9, vcc, s7, v0 1601; CGP-NEXT: v_subbrev_u32_e32 v1, vcc, 0, v1, vcc 1602; CGP-NEXT: v_cmp_le_u32_e32 vcc, 0, v1 1603; CGP-NEXT: v_cndmask_b32_e64 v10, 0, -1, vcc 1604; CGP-NEXT: v_cmp_le_u32_e32 vcc, s7, v9 1605; CGP-NEXT: v_cndmask_b32_e64 v11, 0, -1, vcc 1606; CGP-NEXT: v_cmp_eq_u32_e32 vcc, 0, v1 1607; CGP-NEXT: v_cndmask_b32_e32 v10, v10, v11, vcc 1608; CGP-NEXT: v_subrev_i32_e32 v11, vcc, s7, v9 1609; CGP-NEXT: v_subbrev_u32_e32 v12, vcc, 0, v1, vcc 1610; CGP-NEXT: v_cmp_ne_u32_e32 vcc, 0, v10 1611; CGP-NEXT: v_cndmask_b32_e32 v9, v9, v11, vcc 1612; CGP-NEXT: v_cndmask_b32_e32 v1, v1, v12, vcc 1613; CGP-NEXT: v_cmp_ne_u32_e32 vcc, 0, v7 1614; CGP-NEXT: v_mul_f32_e32 v7, 0x2f800000, v4 1615; CGP-NEXT: v_trunc_f32_e32 v7, v7 1616; CGP-NEXT: v_mac_f32_e32 v4, 0xcf800000, v7 1617; CGP-NEXT: v_cvt_u32_f32_e32 v4, v4 1618; CGP-NEXT: v_cvt_u32_f32_e32 v7, v7 1619; CGP-NEXT: v_cndmask_b32_e32 v0, v0, v9, vcc 1620; CGP-NEXT: v_cndmask_b32_e32 v1, v8, v1, vcc 1621; CGP-NEXT: v_mul_lo_u32 v8, -1, v4 1622; CGP-NEXT: v_mul_lo_u32 v9, s6, v7 1623; CGP-NEXT: v_mul_hi_u32 v11, s6, v4 1624; CGP-NEXT: v_mul_lo_u32 v10, s6, v4 1625; CGP-NEXT: v_add_i32_e32 v2, vcc, v2, v6 1626; CGP-NEXT: v_addc_u32_e32 v3, vcc, v3, v6, vcc 1627; CGP-NEXT: v_add_i32_e32 v8, vcc, v8, v9 1628; CGP-NEXT: v_add_i32_e32 v8, vcc, v8, v11 1629; CGP-NEXT: v_mul_lo_u32 v9, v7, v10 1630; CGP-NEXT: v_mul_lo_u32 v11, v4, v8 1631; CGP-NEXT: v_mul_hi_u32 v12, v4, v10 1632; CGP-NEXT: v_mul_hi_u32 v10, v7, v10 1633; CGP-NEXT: v_xor_b32_e32 v0, v0, v5 1634; CGP-NEXT: v_add_i32_e32 v9, vcc, v9, v11 1635; CGP-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc 1636; CGP-NEXT: v_add_i32_e32 v9, vcc, v9, v12 1637; CGP-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc 1638; CGP-NEXT: v_mul_lo_u32 v12, v7, v8 1639; CGP-NEXT: v_add_i32_e32 v9, vcc, v11, v9 1640; CGP-NEXT: v_mul_hi_u32 v11, v4, v8 1641; CGP-NEXT: v_mul_hi_u32 v8, v7, v8 1642; CGP-NEXT: v_add_i32_e32 v10, vcc, v12, v10 1643; CGP-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc 1644; CGP-NEXT: v_add_i32_e32 v10, vcc, v10, v11 1645; CGP-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc 1646; CGP-NEXT: v_add_i32_e32 v11, vcc, v12, v11 1647; CGP-NEXT: v_add_i32_e32 v9, vcc, v10, v9 1648; CGP-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 1649; CGP-NEXT: v_add_i32_e32 v10, vcc, v11, v10 1650; CGP-NEXT: v_add_i32_e32 v8, vcc, v8, v10 1651; CGP-NEXT: v_add_i32_e32 v4, vcc, v4, v9 1652; CGP-NEXT: v_addc_u32_e64 v9, s[4:5], v7, v8, vcc 1653; CGP-NEXT: v_mul_lo_u32 v10, -1, v4 1654; CGP-NEXT: v_mul_lo_u32 v11, s6, v9 1655; CGP-NEXT: v_mul_hi_u32 v13, s6, v4 1656; CGP-NEXT: v_mul_lo_u32 v12, s6, v4 1657; CGP-NEXT: v_add_i32_e64 v7, s[4:5], v7, v8 1658; CGP-NEXT: v_add_i32_e64 v10, s[4:5], v10, v11 1659; CGP-NEXT: v_add_i32_e64 v10, s[4:5], v10, v13 1660; CGP-NEXT: v_mul_lo_u32 v11, v9, v12 1661; CGP-NEXT: v_mul_lo_u32 v13, v4, v10 1662; CGP-NEXT: v_mul_hi_u32 v8, v4, v12 1663; CGP-NEXT: v_mul_hi_u32 v12, v9, v12 1664; CGP-NEXT: v_xor_b32_e32 v2, v2, v6 1665; CGP-NEXT: v_add_i32_e64 v11, s[4:5], v11, v13 1666; CGP-NEXT: v_cndmask_b32_e64 v13, 0, 1, s[4:5] 1667; CGP-NEXT: v_add_i32_e64 v8, s[4:5], v11, v8 1668; CGP-NEXT: v_cndmask_b32_e64 v8, 0, 1, s[4:5] 1669; CGP-NEXT: v_mul_lo_u32 v11, v9, v10 1670; CGP-NEXT: v_add_i32_e64 v8, s[4:5], v13, v8 1671; CGP-NEXT: v_mul_hi_u32 v13, v4, v10 1672; CGP-NEXT: v_mul_hi_u32 v9, v9, v10 1673; CGP-NEXT: v_add_i32_e64 v11, s[4:5], v11, v12 1674; CGP-NEXT: v_cndmask_b32_e64 v12, 0, 1, s[4:5] 1675; CGP-NEXT: v_add_i32_e64 v11, s[4:5], v11, v13 1676; CGP-NEXT: v_cndmask_b32_e64 v13, 0, 1, s[4:5] 1677; CGP-NEXT: v_add_i32_e64 v12, s[4:5], v12, v13 1678; CGP-NEXT: v_add_i32_e64 v8, s[4:5], v11, v8 1679; CGP-NEXT: v_cndmask_b32_e64 v11, 0, 1, s[4:5] 1680; CGP-NEXT: v_add_i32_e64 v10, s[4:5], v12, v11 1681; CGP-NEXT: v_add_i32_e64 v9, s[4:5], v9, v10 1682; CGP-NEXT: v_addc_u32_e32 v7, vcc, v7, v9, vcc 1683; CGP-NEXT: v_add_i32_e32 v4, vcc, v4, v8 1684; CGP-NEXT: v_addc_u32_e32 v7, vcc, 0, v7, vcc 1685; CGP-NEXT: v_xor_b32_e32 v3, v3, v6 1686; CGP-NEXT: v_xor_b32_e32 v1, v1, v5 1687; CGP-NEXT: v_sub_i32_e32 v0, vcc, v0, v5 1688; CGP-NEXT: v_mul_lo_u32 v8, v3, v4 1689; CGP-NEXT: v_mul_lo_u32 v9, v2, v7 1690; CGP-NEXT: v_subb_u32_e32 v1, vcc, v1, v5, vcc 1691; CGP-NEXT: v_mul_hi_u32 v5, v2, v4 1692; CGP-NEXT: v_mul_hi_u32 v4, v3, v4 1693; CGP-NEXT: v_add_i32_e32 v8, vcc, v8, v9 1694; CGP-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc 1695; CGP-NEXT: v_add_i32_e32 v5, vcc, v8, v5 1696; CGP-NEXT: v_cndmask_b32_e64 v5, 0, 1, vcc 1697; CGP-NEXT: v_mul_lo_u32 v8, v3, v7 1698; CGP-NEXT: v_add_i32_e32 v5, vcc, v9, v5 1699; CGP-NEXT: v_mul_hi_u32 v9, v2, v7 1700; CGP-NEXT: v_mul_hi_u32 v7, v3, v7 1701; CGP-NEXT: v_add_i32_e32 v4, vcc, v8, v4 1702; CGP-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc 1703; CGP-NEXT: v_add_i32_e32 v4, vcc, v4, v9 1704; CGP-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc 1705; CGP-NEXT: v_add_i32_e32 v8, vcc, v8, v9 1706; CGP-NEXT: v_add_i32_e32 v4, vcc, v4, v5 1707; CGP-NEXT: v_cndmask_b32_e64 v5, 0, 1, vcc 1708; CGP-NEXT: v_add_i32_e32 v5, vcc, v8, v5 1709; CGP-NEXT: v_add_i32_e32 v5, vcc, v7, v5 1710; CGP-NEXT: v_mul_lo_u32 v7, 0, v4 1711; CGP-NEXT: v_mul_lo_u32 v5, s7, v5 1712; CGP-NEXT: v_mul_lo_u32 v8, s7, v4 1713; CGP-NEXT: v_mul_hi_u32 v4, s7, v4 1714; CGP-NEXT: v_add_i32_e32 v5, vcc, v7, v5 1715; CGP-NEXT: v_add_i32_e32 v4, vcc, v5, v4 1716; CGP-NEXT: v_sub_i32_e32 v2, vcc, v2, v8 1717; CGP-NEXT: v_subb_u32_e64 v5, s[4:5], v3, v4, vcc 1718; CGP-NEXT: v_sub_i32_e64 v3, s[4:5], v3, v4 1719; CGP-NEXT: v_cmp_le_u32_e64 s[4:5], 0, v5 1720; CGP-NEXT: v_cndmask_b32_e64 v4, 0, -1, s[4:5] 1721; CGP-NEXT: v_cmp_le_u32_e64 s[4:5], s7, v2 1722; CGP-NEXT: v_cndmask_b32_e64 v7, 0, -1, s[4:5] 1723; CGP-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v5 1724; CGP-NEXT: v_subbrev_u32_e32 v3, vcc, 0, v3, vcc 1725; CGP-NEXT: v_cndmask_b32_e64 v4, v4, v7, s[4:5] 1726; CGP-NEXT: v_subrev_i32_e32 v7, vcc, s7, v2 1727; CGP-NEXT: v_subbrev_u32_e32 v3, vcc, 0, v3, vcc 1728; CGP-NEXT: v_cmp_le_u32_e32 vcc, 0, v3 1729; CGP-NEXT: v_cndmask_b32_e64 v8, 0, -1, vcc 1730; CGP-NEXT: v_cmp_le_u32_e32 vcc, s7, v7 1731; CGP-NEXT: v_cndmask_b32_e64 v9, 0, -1, vcc 1732; CGP-NEXT: v_cmp_eq_u32_e32 vcc, 0, v3 1733; CGP-NEXT: v_cndmask_b32_e32 v8, v8, v9, vcc 1734; CGP-NEXT: v_subrev_i32_e32 v9, vcc, s7, v7 1735; CGP-NEXT: v_subbrev_u32_e32 v10, vcc, 0, v3, vcc 1736; CGP-NEXT: v_cmp_ne_u32_e32 vcc, 0, v8 1737; CGP-NEXT: v_cndmask_b32_e32 v7, v7, v9, vcc 1738; CGP-NEXT: v_cndmask_b32_e32 v3, v3, v10, vcc 1739; CGP-NEXT: v_cmp_ne_u32_e32 vcc, 0, v4 1740; CGP-NEXT: v_cndmask_b32_e32 v2, v2, v7, vcc 1741; CGP-NEXT: v_cndmask_b32_e32 v3, v5, v3, vcc 1742; CGP-NEXT: v_xor_b32_e32 v2, v2, v6 1743; CGP-NEXT: v_xor_b32_e32 v3, v3, v6 1744; CGP-NEXT: v_sub_i32_e32 v2, vcc, v2, v6 1745; CGP-NEXT: v_subb_u32_e32 v3, vcc, v3, v6, vcc 1746; CGP-NEXT: s_setpc_b64 s[30:31] 1747 %result = srem <2 x i64> %num, <i64 4096, i64 4096> 1748 ret <2 x i64> %result 1749} 1750 1751define i64 @v_srem_i64_oddk_denom(i64 %num) { 1752; CHECK-LABEL: v_srem_i64_oddk_denom: 1753; CHECK: ; %bb.0: 1754; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1755; CHECK-NEXT: v_cvt_f32_u32_e32 v2, 0x12d8fb 1756; CHECK-NEXT: v_cvt_f32_ubyte0_e32 v4, 0 1757; CHECK-NEXT: s_mov_b32 s6, 0xffed2705 1758; CHECK-NEXT: v_ashrrev_i32_e32 v3, 31, v1 1759; CHECK-NEXT: v_mac_f32_e32 v2, 0x4f800000, v4 1760; CHECK-NEXT: v_rcp_iflag_f32_e32 v2, v2 1761; CHECK-NEXT: v_add_i32_e32 v0, vcc, v0, v3 1762; CHECK-NEXT: v_addc_u32_e32 v1, vcc, v1, v3, vcc 1763; CHECK-NEXT: v_xor_b32_e32 v0, v0, v3 1764; CHECK-NEXT: v_mul_f32_e32 v2, 0x5f7ffffc, v2 1765; CHECK-NEXT: v_mul_f32_e32 v4, 0x2f800000, v2 1766; CHECK-NEXT: v_trunc_f32_e32 v4, v4 1767; CHECK-NEXT: v_mac_f32_e32 v2, 0xcf800000, v4 1768; CHECK-NEXT: v_cvt_u32_f32_e32 v2, v2 1769; CHECK-NEXT: v_cvt_u32_f32_e32 v4, v4 1770; CHECK-NEXT: v_xor_b32_e32 v1, v1, v3 1771; CHECK-NEXT: v_mul_lo_u32 v5, -1, v2 1772; CHECK-NEXT: v_mul_lo_u32 v6, s6, v4 1773; CHECK-NEXT: v_mul_hi_u32 v8, s6, v2 1774; CHECK-NEXT: v_mul_lo_u32 v7, s6, v2 1775; CHECK-NEXT: v_add_i32_e32 v5, vcc, v5, v6 1776; CHECK-NEXT: v_add_i32_e32 v5, vcc, v5, v8 1777; CHECK-NEXT: v_mul_lo_u32 v6, v4, v7 1778; CHECK-NEXT: v_mul_lo_u32 v8, v2, v5 1779; CHECK-NEXT: v_mul_hi_u32 v9, v2, v7 1780; CHECK-NEXT: v_mul_hi_u32 v7, v4, v7 1781; CHECK-NEXT: v_add_i32_e32 v6, vcc, v6, v8 1782; CHECK-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc 1783; CHECK-NEXT: v_add_i32_e32 v6, vcc, v6, v9 1784; CHECK-NEXT: v_cndmask_b32_e64 v6, 0, 1, vcc 1785; CHECK-NEXT: v_mul_lo_u32 v9, v4, v5 1786; CHECK-NEXT: v_add_i32_e32 v6, vcc, v8, v6 1787; CHECK-NEXT: v_mul_hi_u32 v8, v2, v5 1788; CHECK-NEXT: v_mul_hi_u32 v5, v4, v5 1789; CHECK-NEXT: v_add_i32_e32 v7, vcc, v9, v7 1790; CHECK-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc 1791; CHECK-NEXT: v_add_i32_e32 v7, vcc, v7, v8 1792; CHECK-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc 1793; CHECK-NEXT: v_add_i32_e32 v8, vcc, v9, v8 1794; CHECK-NEXT: v_add_i32_e32 v6, vcc, v7, v6 1795; CHECK-NEXT: v_cndmask_b32_e64 v7, 0, 1, vcc 1796; CHECK-NEXT: v_add_i32_e32 v7, vcc, v8, v7 1797; CHECK-NEXT: v_add_i32_e32 v5, vcc, v5, v7 1798; CHECK-NEXT: v_add_i32_e32 v2, vcc, v2, v6 1799; CHECK-NEXT: v_addc_u32_e64 v6, s[4:5], v4, v5, vcc 1800; CHECK-NEXT: v_mul_lo_u32 v7, -1, v2 1801; CHECK-NEXT: v_mul_lo_u32 v8, s6, v6 1802; CHECK-NEXT: v_mul_hi_u32 v10, s6, v2 1803; CHECK-NEXT: v_mul_lo_u32 v9, s6, v2 1804; CHECK-NEXT: v_add_i32_e64 v4, s[4:5], v4, v5 1805; CHECK-NEXT: v_add_i32_e64 v7, s[4:5], v7, v8 1806; CHECK-NEXT: v_add_i32_e64 v7, s[4:5], v7, v10 1807; CHECK-NEXT: v_mul_lo_u32 v8, v6, v9 1808; CHECK-NEXT: v_mul_lo_u32 v10, v2, v7 1809; CHECK-NEXT: v_mul_hi_u32 v5, v2, v9 1810; CHECK-NEXT: v_mul_hi_u32 v9, v6, v9 1811; CHECK-NEXT: s_mov_b32 s6, 0x12d8fb 1812; CHECK-NEXT: v_add_i32_e64 v8, s[4:5], v8, v10 1813; CHECK-NEXT: v_cndmask_b32_e64 v10, 0, 1, s[4:5] 1814; CHECK-NEXT: v_add_i32_e64 v5, s[4:5], v8, v5 1815; CHECK-NEXT: v_cndmask_b32_e64 v5, 0, 1, s[4:5] 1816; CHECK-NEXT: v_mul_lo_u32 v8, v6, v7 1817; CHECK-NEXT: v_add_i32_e64 v5, s[4:5], v10, v5 1818; CHECK-NEXT: v_mul_hi_u32 v10, v2, v7 1819; CHECK-NEXT: v_mul_hi_u32 v6, v6, v7 1820; CHECK-NEXT: v_add_i32_e64 v8, s[4:5], v8, v9 1821; CHECK-NEXT: v_cndmask_b32_e64 v9, 0, 1, s[4:5] 1822; CHECK-NEXT: v_add_i32_e64 v8, s[4:5], v8, v10 1823; CHECK-NEXT: v_cndmask_b32_e64 v10, 0, 1, s[4:5] 1824; CHECK-NEXT: v_add_i32_e64 v9, s[4:5], v9, v10 1825; CHECK-NEXT: v_add_i32_e64 v5, s[4:5], v8, v5 1826; CHECK-NEXT: v_cndmask_b32_e64 v8, 0, 1, s[4:5] 1827; CHECK-NEXT: v_add_i32_e64 v7, s[4:5], v9, v8 1828; CHECK-NEXT: v_add_i32_e64 v6, s[4:5], v6, v7 1829; CHECK-NEXT: v_addc_u32_e32 v4, vcc, v4, v6, vcc 1830; CHECK-NEXT: v_add_i32_e32 v2, vcc, v2, v5 1831; CHECK-NEXT: v_addc_u32_e32 v4, vcc, 0, v4, vcc 1832; CHECK-NEXT: v_mul_lo_u32 v5, v1, v2 1833; CHECK-NEXT: v_mul_lo_u32 v6, v0, v4 1834; CHECK-NEXT: v_mul_hi_u32 v7, v0, v2 1835; CHECK-NEXT: v_mul_hi_u32 v2, v1, v2 1836; CHECK-NEXT: v_add_i32_e32 v5, vcc, v5, v6 1837; CHECK-NEXT: v_cndmask_b32_e64 v6, 0, 1, vcc 1838; CHECK-NEXT: v_add_i32_e32 v5, vcc, v5, v7 1839; CHECK-NEXT: v_cndmask_b32_e64 v5, 0, 1, vcc 1840; CHECK-NEXT: v_mul_lo_u32 v7, v1, v4 1841; CHECK-NEXT: v_add_i32_e32 v5, vcc, v6, v5 1842; CHECK-NEXT: v_mul_hi_u32 v6, v0, v4 1843; CHECK-NEXT: v_mul_hi_u32 v4, v1, v4 1844; CHECK-NEXT: v_add_i32_e32 v2, vcc, v7, v2 1845; CHECK-NEXT: v_cndmask_b32_e64 v7, 0, 1, vcc 1846; CHECK-NEXT: v_add_i32_e32 v2, vcc, v2, v6 1847; CHECK-NEXT: v_cndmask_b32_e64 v6, 0, 1, vcc 1848; CHECK-NEXT: v_add_i32_e32 v6, vcc, v7, v6 1849; CHECK-NEXT: v_add_i32_e32 v2, vcc, v2, v5 1850; CHECK-NEXT: v_cndmask_b32_e64 v5, 0, 1, vcc 1851; CHECK-NEXT: v_add_i32_e32 v5, vcc, v6, v5 1852; CHECK-NEXT: v_add_i32_e32 v4, vcc, v4, v5 1853; CHECK-NEXT: v_mul_lo_u32 v5, 0, v2 1854; CHECK-NEXT: v_mul_lo_u32 v4, s6, v4 1855; CHECK-NEXT: v_mul_lo_u32 v6, s6, v2 1856; CHECK-NEXT: v_mul_hi_u32 v2, s6, v2 1857; CHECK-NEXT: v_add_i32_e32 v4, vcc, v5, v4 1858; CHECK-NEXT: v_add_i32_e32 v2, vcc, v4, v2 1859; CHECK-NEXT: v_sub_i32_e32 v0, vcc, v0, v6 1860; CHECK-NEXT: v_subb_u32_e64 v4, s[4:5], v1, v2, vcc 1861; CHECK-NEXT: v_sub_i32_e64 v1, s[4:5], v1, v2 1862; CHECK-NEXT: v_cmp_le_u32_e64 s[4:5], 0, v4 1863; CHECK-NEXT: v_cndmask_b32_e64 v2, 0, -1, s[4:5] 1864; CHECK-NEXT: v_cmp_le_u32_e64 s[4:5], s6, v0 1865; CHECK-NEXT: v_cndmask_b32_e64 v5, 0, -1, s[4:5] 1866; CHECK-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v4 1867; CHECK-NEXT: v_subbrev_u32_e32 v1, vcc, 0, v1, vcc 1868; CHECK-NEXT: v_cndmask_b32_e64 v2, v2, v5, s[4:5] 1869; CHECK-NEXT: v_subrev_i32_e32 v5, vcc, s6, v0 1870; CHECK-NEXT: v_subbrev_u32_e32 v1, vcc, 0, v1, vcc 1871; CHECK-NEXT: v_cmp_le_u32_e32 vcc, 0, v1 1872; CHECK-NEXT: v_cndmask_b32_e64 v6, 0, -1, vcc 1873; CHECK-NEXT: v_cmp_le_u32_e32 vcc, s6, v5 1874; CHECK-NEXT: v_cndmask_b32_e64 v7, 0, -1, vcc 1875; CHECK-NEXT: v_cmp_eq_u32_e32 vcc, 0, v1 1876; CHECK-NEXT: v_cndmask_b32_e32 v6, v6, v7, vcc 1877; CHECK-NEXT: v_subrev_i32_e32 v7, vcc, s6, v5 1878; CHECK-NEXT: v_subbrev_u32_e32 v8, vcc, 0, v1, vcc 1879; CHECK-NEXT: v_cmp_ne_u32_e32 vcc, 0, v6 1880; CHECK-NEXT: v_cndmask_b32_e32 v5, v5, v7, vcc 1881; CHECK-NEXT: v_cndmask_b32_e32 v1, v1, v8, vcc 1882; CHECK-NEXT: v_cmp_ne_u32_e32 vcc, 0, v2 1883; CHECK-NEXT: v_cndmask_b32_e32 v0, v0, v5, vcc 1884; CHECK-NEXT: v_cndmask_b32_e32 v1, v4, v1, vcc 1885; CHECK-NEXT: v_xor_b32_e32 v0, v0, v3 1886; CHECK-NEXT: v_xor_b32_e32 v1, v1, v3 1887; CHECK-NEXT: v_sub_i32_e32 v0, vcc, v0, v3 1888; CHECK-NEXT: v_subb_u32_e32 v1, vcc, v1, v3, vcc 1889; CHECK-NEXT: s_setpc_b64 s[30:31] 1890 %result = srem i64 %num, 1235195 1891 ret i64 %result 1892} 1893 1894define <2 x i64> @v_srem_v2i64_oddk_denom(<2 x i64> %num) { 1895; GISEL-LABEL: v_srem_v2i64_oddk_denom: 1896; GISEL: ; %bb.0: 1897; GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1898; GISEL-NEXT: s_mov_b32 s10, 0x12d8fb 1899; GISEL-NEXT: s_add_u32 s4, s10, 0 1900; GISEL-NEXT: s_cselect_b32 s5, 1, 0 1901; GISEL-NEXT: s_and_b32 s5, s5, 1 1902; GISEL-NEXT: s_cmp_lg_u32 s5, 0 1903; GISEL-NEXT: s_mov_b32 s6, 0 1904; GISEL-NEXT: s_mov_b32 s7, s6 1905; GISEL-NEXT: s_addc_u32 s5, 0, 0 1906; GISEL-NEXT: s_xor_b64 s[8:9], s[4:5], s[6:7] 1907; GISEL-NEXT: v_cvt_f32_u32_e32 v4, s8 1908; GISEL-NEXT: v_cvt_f32_u32_e32 v5, s9 1909; GISEL-NEXT: s_sub_u32 s11, 0, s8 1910; GISEL-NEXT: s_cselect_b32 s4, 1, 0 1911; GISEL-NEXT: s_and_b32 s4, s4, 1 1912; GISEL-NEXT: v_mac_f32_e32 v4, 0x4f800000, v5 1913; GISEL-NEXT: v_rcp_iflag_f32_e32 v4, v4 1914; GISEL-NEXT: s_cmp_lg_u32 s4, 0 1915; GISEL-NEXT: s_subb_u32 s12, 0, s9 1916; GISEL-NEXT: v_ashrrev_i32_e32 v6, 31, v1 1917; GISEL-NEXT: v_mul_f32_e32 v4, 0x5f7ffffc, v4 1918; GISEL-NEXT: v_mul_f32_e32 v5, 0x2f800000, v4 1919; GISEL-NEXT: v_trunc_f32_e32 v5, v5 1920; GISEL-NEXT: v_mac_f32_e32 v4, 0xcf800000, v5 1921; GISEL-NEXT: v_cvt_u32_f32_e32 v4, v4 1922; GISEL-NEXT: v_cvt_u32_f32_e32 v5, v5 1923; GISEL-NEXT: v_add_i32_e32 v0, vcc, v0, v6 1924; GISEL-NEXT: v_addc_u32_e32 v1, vcc, v1, v6, vcc 1925; GISEL-NEXT: v_mul_lo_u32 v7, s12, v4 1926; GISEL-NEXT: v_mul_lo_u32 v8, s11, v5 1927; GISEL-NEXT: v_mul_hi_u32 v10, s11, v4 1928; GISEL-NEXT: v_mul_lo_u32 v9, s11, v4 1929; GISEL-NEXT: v_xor_b32_e32 v0, v0, v6 1930; GISEL-NEXT: v_add_i32_e32 v7, vcc, v7, v8 1931; GISEL-NEXT: v_add_i32_e32 v7, vcc, v7, v10 1932; GISEL-NEXT: v_mul_lo_u32 v8, v5, v9 1933; GISEL-NEXT: v_mul_lo_u32 v10, v4, v7 1934; GISEL-NEXT: v_mul_hi_u32 v11, v4, v9 1935; GISEL-NEXT: v_mul_hi_u32 v9, v5, v9 1936; GISEL-NEXT: v_xor_b32_e32 v1, v1, v6 1937; GISEL-NEXT: v_add_i32_e32 v8, vcc, v8, v10 1938; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 1939; GISEL-NEXT: v_add_i32_e32 v8, vcc, v8, v11 1940; GISEL-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc 1941; GISEL-NEXT: v_mul_lo_u32 v11, v5, v7 1942; GISEL-NEXT: v_add_i32_e32 v8, vcc, v10, v8 1943; GISEL-NEXT: v_mul_hi_u32 v10, v4, v7 1944; GISEL-NEXT: v_mul_hi_u32 v7, v5, v7 1945; GISEL-NEXT: v_add_i32_e32 v9, vcc, v11, v9 1946; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc 1947; GISEL-NEXT: v_add_i32_e32 v9, vcc, v9, v10 1948; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 1949; GISEL-NEXT: v_add_i32_e32 v10, vcc, v11, v10 1950; GISEL-NEXT: v_add_i32_e32 v8, vcc, v9, v8 1951; GISEL-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc 1952; GISEL-NEXT: v_add_i32_e32 v9, vcc, v10, v9 1953; GISEL-NEXT: v_add_i32_e32 v7, vcc, v7, v9 1954; GISEL-NEXT: v_add_i32_e32 v4, vcc, v4, v8 1955; GISEL-NEXT: v_addc_u32_e64 v8, s[4:5], v5, v7, vcc 1956; GISEL-NEXT: v_mul_lo_u32 v9, s12, v4 1957; GISEL-NEXT: v_mul_lo_u32 v10, s11, v8 1958; GISEL-NEXT: v_mul_hi_u32 v12, s11, v4 1959; GISEL-NEXT: v_mul_lo_u32 v11, s11, v4 1960; GISEL-NEXT: v_add_i32_e64 v5, s[4:5], v5, v7 1961; GISEL-NEXT: v_add_i32_e64 v9, s[4:5], v9, v10 1962; GISEL-NEXT: v_add_i32_e64 v9, s[4:5], v9, v12 1963; GISEL-NEXT: v_mul_lo_u32 v10, v8, v11 1964; GISEL-NEXT: v_mul_lo_u32 v12, v4, v9 1965; GISEL-NEXT: v_mul_hi_u32 v7, v4, v11 1966; GISEL-NEXT: v_mul_hi_u32 v11, v8, v11 1967; GISEL-NEXT: v_add_i32_e64 v10, s[4:5], v10, v12 1968; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, s[4:5] 1969; GISEL-NEXT: v_add_i32_e64 v7, s[4:5], v10, v7 1970; GISEL-NEXT: v_cndmask_b32_e64 v7, 0, 1, s[4:5] 1971; GISEL-NEXT: v_mul_lo_u32 v10, v8, v9 1972; GISEL-NEXT: v_add_i32_e64 v7, s[4:5], v12, v7 1973; GISEL-NEXT: v_mul_hi_u32 v12, v4, v9 1974; GISEL-NEXT: v_mul_hi_u32 v8, v8, v9 1975; GISEL-NEXT: v_add_i32_e64 v10, s[4:5], v10, v11 1976; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, 1, s[4:5] 1977; GISEL-NEXT: v_add_i32_e64 v10, s[4:5], v10, v12 1978; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, s[4:5] 1979; GISEL-NEXT: v_add_i32_e64 v11, s[4:5], v11, v12 1980; GISEL-NEXT: v_add_i32_e64 v7, s[4:5], v10, v7 1981; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, 1, s[4:5] 1982; GISEL-NEXT: v_add_i32_e64 v9, s[4:5], v11, v10 1983; GISEL-NEXT: v_add_i32_e64 v8, s[4:5], v8, v9 1984; GISEL-NEXT: v_addc_u32_e32 v5, vcc, v5, v8, vcc 1985; GISEL-NEXT: v_add_i32_e32 v4, vcc, v4, v7 1986; GISEL-NEXT: v_addc_u32_e32 v5, vcc, 0, v5, vcc 1987; GISEL-NEXT: v_mul_lo_u32 v7, v1, v4 1988; GISEL-NEXT: v_mul_lo_u32 v8, v0, v5 1989; GISEL-NEXT: v_mul_hi_u32 v10, v0, v4 1990; GISEL-NEXT: v_mul_hi_u32 v4, v1, v4 1991; GISEL-NEXT: v_mov_b32_e32 v9, s9 1992; GISEL-NEXT: v_add_i32_e32 v7, vcc, v7, v8 1993; GISEL-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc 1994; GISEL-NEXT: v_add_i32_e32 v7, vcc, v7, v10 1995; GISEL-NEXT: v_cndmask_b32_e64 v7, 0, 1, vcc 1996; GISEL-NEXT: v_mul_lo_u32 v10, v1, v5 1997; GISEL-NEXT: v_add_i32_e32 v7, vcc, v8, v7 1998; GISEL-NEXT: v_mul_hi_u32 v8, v0, v5 1999; GISEL-NEXT: v_mul_hi_u32 v5, v1, v5 2000; GISEL-NEXT: v_add_i32_e32 v4, vcc, v10, v4 2001; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 2002; GISEL-NEXT: v_add_i32_e32 v4, vcc, v4, v8 2003; GISEL-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc 2004; GISEL-NEXT: v_add_i32_e32 v8, vcc, v10, v8 2005; GISEL-NEXT: v_add_i32_e32 v4, vcc, v4, v7 2006; GISEL-NEXT: v_cndmask_b32_e64 v7, 0, 1, vcc 2007; GISEL-NEXT: v_add_i32_e32 v7, vcc, v8, v7 2008; GISEL-NEXT: v_add_i32_e32 v5, vcc, v5, v7 2009; GISEL-NEXT: v_mul_lo_u32 v7, s9, v4 2010; GISEL-NEXT: v_mul_lo_u32 v5, s8, v5 2011; GISEL-NEXT: v_mul_lo_u32 v8, s8, v4 2012; GISEL-NEXT: v_mul_hi_u32 v4, s8, v4 2013; GISEL-NEXT: v_add_i32_e32 v5, vcc, v7, v5 2014; GISEL-NEXT: v_add_i32_e32 v4, vcc, v5, v4 2015; GISEL-NEXT: v_sub_i32_e32 v0, vcc, v0, v8 2016; GISEL-NEXT: v_subb_u32_e64 v5, s[4:5], v1, v4, vcc 2017; GISEL-NEXT: v_sub_i32_e64 v1, s[4:5], v1, v4 2018; GISEL-NEXT: v_cmp_le_u32_e64 s[4:5], s9, v5 2019; GISEL-NEXT: v_cndmask_b32_e64 v4, 0, -1, s[4:5] 2020; GISEL-NEXT: v_cmp_le_u32_e64 s[4:5], s8, v0 2021; GISEL-NEXT: v_cndmask_b32_e64 v7, 0, -1, s[4:5] 2022; GISEL-NEXT: v_cmp_eq_u32_e64 s[4:5], s9, v5 2023; GISEL-NEXT: v_subb_u32_e32 v1, vcc, v1, v9, vcc 2024; GISEL-NEXT: v_cndmask_b32_e64 v4, v4, v7, s[4:5] 2025; GISEL-NEXT: v_subrev_i32_e32 v7, vcc, s8, v0 2026; GISEL-NEXT: v_subbrev_u32_e64 v8, s[4:5], 0, v1, vcc 2027; GISEL-NEXT: v_cmp_le_u32_e64 s[4:5], s9, v8 2028; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, -1, s[4:5] 2029; GISEL-NEXT: v_cmp_le_u32_e64 s[4:5], s8, v7 2030; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, -1, s[4:5] 2031; GISEL-NEXT: v_cmp_eq_u32_e64 s[4:5], s9, v8 2032; GISEL-NEXT: v_cndmask_b32_e64 v10, v10, v11, s[4:5] 2033; GISEL-NEXT: s_add_u32 s4, s10, 0 2034; GISEL-NEXT: v_subb_u32_e32 v1, vcc, v1, v9, vcc 2035; GISEL-NEXT: s_cselect_b32 s5, 1, 0 2036; GISEL-NEXT: v_subrev_i32_e32 v9, vcc, s8, v7 2037; GISEL-NEXT: s_and_b32 s5, s5, 1 2038; GISEL-NEXT: s_cmp_lg_u32 s5, 0 2039; GISEL-NEXT: v_subbrev_u32_e32 v1, vcc, 0, v1, vcc 2040; GISEL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v10 2041; GISEL-NEXT: s_addc_u32 s5, 0, 0 2042; GISEL-NEXT: s_xor_b64 s[6:7], s[4:5], s[6:7] 2043; GISEL-NEXT: v_cndmask_b32_e32 v7, v7, v9, vcc 2044; GISEL-NEXT: v_cndmask_b32_e32 v1, v8, v1, vcc 2045; GISEL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v4 2046; GISEL-NEXT: v_cndmask_b32_e32 v1, v5, v1, vcc 2047; GISEL-NEXT: v_cvt_f32_u32_e32 v4, s6 2048; GISEL-NEXT: v_cvt_f32_u32_e32 v5, s7 2049; GISEL-NEXT: s_sub_u32 s8, 0, s6 2050; GISEL-NEXT: s_cselect_b32 s4, 1, 0 2051; GISEL-NEXT: s_and_b32 s4, s4, 1 2052; GISEL-NEXT: v_mac_f32_e32 v4, 0x4f800000, v5 2053; GISEL-NEXT: v_rcp_iflag_f32_e32 v4, v4 2054; GISEL-NEXT: s_cmp_lg_u32 s4, 0 2055; GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v7, vcc 2056; GISEL-NEXT: s_subb_u32 s9, 0, s7 2057; GISEL-NEXT: v_mul_f32_e32 v4, 0x5f7ffffc, v4 2058; GISEL-NEXT: v_mul_f32_e32 v5, 0x2f800000, v4 2059; GISEL-NEXT: v_trunc_f32_e32 v5, v5 2060; GISEL-NEXT: v_mac_f32_e32 v4, 0xcf800000, v5 2061; GISEL-NEXT: v_cvt_u32_f32_e32 v4, v4 2062; GISEL-NEXT: v_cvt_u32_f32_e32 v5, v5 2063; GISEL-NEXT: v_xor_b32_e32 v0, v0, v6 2064; GISEL-NEXT: v_xor_b32_e32 v1, v1, v6 2065; GISEL-NEXT: v_mul_lo_u32 v7, s9, v4 2066; GISEL-NEXT: v_mul_lo_u32 v8, s8, v5 2067; GISEL-NEXT: v_sub_i32_e32 v0, vcc, v0, v6 2068; GISEL-NEXT: v_mul_hi_u32 v10, s8, v4 2069; GISEL-NEXT: v_subb_u32_e32 v1, vcc, v1, v6, vcc 2070; GISEL-NEXT: v_ashrrev_i32_e32 v6, 31, v3 2071; GISEL-NEXT: v_mul_lo_u32 v9, s8, v4 2072; GISEL-NEXT: v_add_i32_e32 v2, vcc, v2, v6 2073; GISEL-NEXT: v_addc_u32_e32 v3, vcc, v3, v6, vcc 2074; GISEL-NEXT: v_add_i32_e32 v7, vcc, v7, v8 2075; GISEL-NEXT: v_add_i32_e32 v7, vcc, v7, v10 2076; GISEL-NEXT: v_mul_lo_u32 v8, v5, v9 2077; GISEL-NEXT: v_mul_lo_u32 v10, v4, v7 2078; GISEL-NEXT: v_mul_hi_u32 v11, v4, v9 2079; GISEL-NEXT: v_mul_hi_u32 v9, v5, v9 2080; GISEL-NEXT: v_xor_b32_e32 v2, v2, v6 2081; GISEL-NEXT: v_add_i32_e32 v8, vcc, v8, v10 2082; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 2083; GISEL-NEXT: v_add_i32_e32 v8, vcc, v8, v11 2084; GISEL-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc 2085; GISEL-NEXT: v_mul_lo_u32 v11, v5, v7 2086; GISEL-NEXT: v_add_i32_e32 v8, vcc, v10, v8 2087; GISEL-NEXT: v_mul_hi_u32 v10, v4, v7 2088; GISEL-NEXT: v_mul_hi_u32 v7, v5, v7 2089; GISEL-NEXT: v_add_i32_e32 v9, vcc, v11, v9 2090; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc 2091; GISEL-NEXT: v_add_i32_e32 v9, vcc, v9, v10 2092; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 2093; GISEL-NEXT: v_add_i32_e32 v10, vcc, v11, v10 2094; GISEL-NEXT: v_add_i32_e32 v8, vcc, v9, v8 2095; GISEL-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc 2096; GISEL-NEXT: v_add_i32_e32 v9, vcc, v10, v9 2097; GISEL-NEXT: v_add_i32_e32 v7, vcc, v7, v9 2098; GISEL-NEXT: v_add_i32_e32 v4, vcc, v4, v8 2099; GISEL-NEXT: v_addc_u32_e64 v8, s[4:5], v5, v7, vcc 2100; GISEL-NEXT: v_mul_lo_u32 v9, s9, v4 2101; GISEL-NEXT: v_mul_lo_u32 v10, s8, v8 2102; GISEL-NEXT: v_mul_hi_u32 v12, s8, v4 2103; GISEL-NEXT: v_mul_lo_u32 v11, s8, v4 2104; GISEL-NEXT: v_add_i32_e64 v5, s[4:5], v5, v7 2105; GISEL-NEXT: v_add_i32_e64 v9, s[4:5], v9, v10 2106; GISEL-NEXT: v_add_i32_e64 v9, s[4:5], v9, v12 2107; GISEL-NEXT: v_mul_lo_u32 v10, v8, v11 2108; GISEL-NEXT: v_mul_lo_u32 v12, v4, v9 2109; GISEL-NEXT: v_mul_hi_u32 v7, v4, v11 2110; GISEL-NEXT: v_mul_hi_u32 v11, v8, v11 2111; GISEL-NEXT: v_xor_b32_e32 v3, v3, v6 2112; GISEL-NEXT: v_add_i32_e64 v10, s[4:5], v10, v12 2113; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, s[4:5] 2114; GISEL-NEXT: v_add_i32_e64 v7, s[4:5], v10, v7 2115; GISEL-NEXT: v_cndmask_b32_e64 v7, 0, 1, s[4:5] 2116; GISEL-NEXT: v_mul_lo_u32 v10, v8, v9 2117; GISEL-NEXT: v_add_i32_e64 v7, s[4:5], v12, v7 2118; GISEL-NEXT: v_mul_hi_u32 v12, v4, v9 2119; GISEL-NEXT: v_mul_hi_u32 v8, v8, v9 2120; GISEL-NEXT: v_add_i32_e64 v10, s[4:5], v10, v11 2121; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, 1, s[4:5] 2122; GISEL-NEXT: v_add_i32_e64 v10, s[4:5], v10, v12 2123; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, s[4:5] 2124; GISEL-NEXT: v_add_i32_e64 v11, s[4:5], v11, v12 2125; GISEL-NEXT: v_add_i32_e64 v7, s[4:5], v10, v7 2126; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, 1, s[4:5] 2127; GISEL-NEXT: v_add_i32_e64 v9, s[4:5], v11, v10 2128; GISEL-NEXT: v_add_i32_e64 v8, s[4:5], v8, v9 2129; GISEL-NEXT: v_addc_u32_e32 v5, vcc, v5, v8, vcc 2130; GISEL-NEXT: v_add_i32_e32 v4, vcc, v4, v7 2131; GISEL-NEXT: v_addc_u32_e32 v5, vcc, 0, v5, vcc 2132; GISEL-NEXT: v_mul_lo_u32 v7, v3, v4 2133; GISEL-NEXT: v_mul_lo_u32 v8, v2, v5 2134; GISEL-NEXT: v_mul_hi_u32 v10, v2, v4 2135; GISEL-NEXT: v_mul_hi_u32 v4, v3, v4 2136; GISEL-NEXT: v_mov_b32_e32 v9, s7 2137; GISEL-NEXT: v_add_i32_e32 v7, vcc, v7, v8 2138; GISEL-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc 2139; GISEL-NEXT: v_add_i32_e32 v7, vcc, v7, v10 2140; GISEL-NEXT: v_cndmask_b32_e64 v7, 0, 1, vcc 2141; GISEL-NEXT: v_mul_lo_u32 v10, v3, v5 2142; GISEL-NEXT: v_add_i32_e32 v7, vcc, v8, v7 2143; GISEL-NEXT: v_mul_hi_u32 v8, v2, v5 2144; GISEL-NEXT: v_mul_hi_u32 v5, v3, v5 2145; GISEL-NEXT: v_add_i32_e32 v4, vcc, v10, v4 2146; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 2147; GISEL-NEXT: v_add_i32_e32 v4, vcc, v4, v8 2148; GISEL-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc 2149; GISEL-NEXT: v_add_i32_e32 v8, vcc, v10, v8 2150; GISEL-NEXT: v_add_i32_e32 v4, vcc, v4, v7 2151; GISEL-NEXT: v_cndmask_b32_e64 v7, 0, 1, vcc 2152; GISEL-NEXT: v_add_i32_e32 v7, vcc, v8, v7 2153; GISEL-NEXT: v_add_i32_e32 v5, vcc, v5, v7 2154; GISEL-NEXT: v_mul_lo_u32 v7, s7, v4 2155; GISEL-NEXT: v_mul_lo_u32 v5, s6, v5 2156; GISEL-NEXT: v_mul_lo_u32 v8, s6, v4 2157; GISEL-NEXT: v_mul_hi_u32 v4, s6, v4 2158; GISEL-NEXT: v_add_i32_e32 v5, vcc, v7, v5 2159; GISEL-NEXT: v_add_i32_e32 v4, vcc, v5, v4 2160; GISEL-NEXT: v_sub_i32_e32 v2, vcc, v2, v8 2161; GISEL-NEXT: v_subb_u32_e64 v5, s[4:5], v3, v4, vcc 2162; GISEL-NEXT: v_sub_i32_e64 v3, s[4:5], v3, v4 2163; GISEL-NEXT: v_cmp_le_u32_e64 s[4:5], s7, v5 2164; GISEL-NEXT: v_cndmask_b32_e64 v4, 0, -1, s[4:5] 2165; GISEL-NEXT: v_cmp_le_u32_e64 s[4:5], s6, v2 2166; GISEL-NEXT: v_cndmask_b32_e64 v7, 0, -1, s[4:5] 2167; GISEL-NEXT: v_cmp_eq_u32_e64 s[4:5], s7, v5 2168; GISEL-NEXT: v_subb_u32_e32 v3, vcc, v3, v9, vcc 2169; GISEL-NEXT: v_cndmask_b32_e64 v4, v4, v7, s[4:5] 2170; GISEL-NEXT: v_subrev_i32_e32 v7, vcc, s6, v2 2171; GISEL-NEXT: v_subbrev_u32_e64 v8, s[4:5], 0, v3, vcc 2172; GISEL-NEXT: v_cmp_le_u32_e64 s[4:5], s7, v8 2173; GISEL-NEXT: v_subb_u32_e32 v3, vcc, v3, v9, vcc 2174; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, -1, s[4:5] 2175; GISEL-NEXT: v_cmp_le_u32_e64 s[4:5], s6, v7 2176; GISEL-NEXT: v_subrev_i32_e32 v9, vcc, s6, v7 2177; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, -1, s[4:5] 2178; GISEL-NEXT: v_cmp_eq_u32_e64 s[4:5], s7, v8 2179; GISEL-NEXT: v_cndmask_b32_e64 v10, v10, v11, s[4:5] 2180; GISEL-NEXT: v_subbrev_u32_e32 v3, vcc, 0, v3, vcc 2181; GISEL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v10 2182; GISEL-NEXT: v_cndmask_b32_e32 v7, v7, v9, vcc 2183; GISEL-NEXT: v_cndmask_b32_e32 v3, v8, v3, vcc 2184; GISEL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v4 2185; GISEL-NEXT: v_cndmask_b32_e32 v2, v2, v7, vcc 2186; GISEL-NEXT: v_cndmask_b32_e32 v3, v5, v3, vcc 2187; GISEL-NEXT: v_xor_b32_e32 v2, v2, v6 2188; GISEL-NEXT: v_xor_b32_e32 v3, v3, v6 2189; GISEL-NEXT: v_sub_i32_e32 v2, vcc, v2, v6 2190; GISEL-NEXT: v_subb_u32_e32 v3, vcc, v3, v6, vcc 2191; GISEL-NEXT: s_setpc_b64 s[30:31] 2192; 2193; CGP-LABEL: v_srem_v2i64_oddk_denom: 2194; CGP: ; %bb.0: 2195; CGP-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2196; CGP-NEXT: v_cvt_f32_u32_e32 v4, 0x12d8fb 2197; CGP-NEXT: v_cvt_f32_ubyte0_e32 v6, 0 2198; CGP-NEXT: s_mov_b32 s6, 0xffed2705 2199; CGP-NEXT: v_ashrrev_i32_e32 v5, 31, v1 2200; CGP-NEXT: v_mov_b32_e32 v7, v4 2201; CGP-NEXT: v_mac_f32_e32 v7, 0x4f800000, v6 2202; CGP-NEXT: v_rcp_iflag_f32_e32 v7, v7 2203; CGP-NEXT: v_add_i32_e32 v0, vcc, v0, v5 2204; CGP-NEXT: v_addc_u32_e32 v1, vcc, v1, v5, vcc 2205; CGP-NEXT: v_xor_b32_e32 v0, v0, v5 2206; CGP-NEXT: v_mul_f32_e32 v7, 0x5f7ffffc, v7 2207; CGP-NEXT: v_mul_f32_e32 v8, 0x2f800000, v7 2208; CGP-NEXT: v_trunc_f32_e32 v8, v8 2209; CGP-NEXT: v_mac_f32_e32 v7, 0xcf800000, v8 2210; CGP-NEXT: v_cvt_u32_f32_e32 v7, v7 2211; CGP-NEXT: v_cvt_u32_f32_e32 v8, v8 2212; CGP-NEXT: v_xor_b32_e32 v1, v1, v5 2213; CGP-NEXT: s_mov_b32 s7, 0x12d8fb 2214; CGP-NEXT: v_mul_lo_u32 v9, -1, v7 2215; CGP-NEXT: v_mul_lo_u32 v10, s6, v8 2216; CGP-NEXT: v_mul_hi_u32 v12, s6, v7 2217; CGP-NEXT: v_mul_lo_u32 v11, s6, v7 2218; CGP-NEXT: v_mac_f32_e32 v4, 0x4f800000, v6 2219; CGP-NEXT: v_add_i32_e32 v9, vcc, v9, v10 2220; CGP-NEXT: v_add_i32_e32 v9, vcc, v9, v12 2221; CGP-NEXT: v_mul_lo_u32 v10, v8, v11 2222; CGP-NEXT: v_mul_lo_u32 v12, v7, v9 2223; CGP-NEXT: v_mul_hi_u32 v13, v7, v11 2224; CGP-NEXT: v_mul_hi_u32 v11, v8, v11 2225; CGP-NEXT: v_rcp_iflag_f32_e32 v4, v4 2226; CGP-NEXT: v_add_i32_e32 v10, vcc, v10, v12 2227; CGP-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc 2228; CGP-NEXT: v_add_i32_e32 v10, vcc, v10, v13 2229; CGP-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 2230; CGP-NEXT: v_mul_lo_u32 v13, v8, v9 2231; CGP-NEXT: v_add_i32_e32 v10, vcc, v12, v10 2232; CGP-NEXT: v_mul_hi_u32 v12, v7, v9 2233; CGP-NEXT: v_mul_hi_u32 v9, v8, v9 2234; CGP-NEXT: v_add_i32_e32 v11, vcc, v13, v11 2235; CGP-NEXT: v_cndmask_b32_e64 v13, 0, 1, vcc 2236; CGP-NEXT: v_add_i32_e32 v11, vcc, v11, v12 2237; CGP-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc 2238; CGP-NEXT: v_add_i32_e32 v12, vcc, v13, v12 2239; CGP-NEXT: v_add_i32_e32 v10, vcc, v11, v10 2240; CGP-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc 2241; CGP-NEXT: v_add_i32_e32 v11, vcc, v12, v11 2242; CGP-NEXT: v_add_i32_e32 v9, vcc, v9, v11 2243; CGP-NEXT: v_add_i32_e32 v7, vcc, v7, v10 2244; CGP-NEXT: v_addc_u32_e64 v10, s[4:5], v8, v9, vcc 2245; CGP-NEXT: v_mul_lo_u32 v11, -1, v7 2246; CGP-NEXT: v_mul_lo_u32 v12, s6, v10 2247; CGP-NEXT: v_mul_hi_u32 v14, s6, v7 2248; CGP-NEXT: v_mul_lo_u32 v13, s6, v7 2249; CGP-NEXT: v_add_i32_e64 v8, s[4:5], v8, v9 2250; CGP-NEXT: v_add_i32_e64 v11, s[4:5], v11, v12 2251; CGP-NEXT: v_add_i32_e64 v11, s[4:5], v11, v14 2252; CGP-NEXT: v_mul_lo_u32 v12, v10, v13 2253; CGP-NEXT: v_mul_lo_u32 v14, v7, v11 2254; CGP-NEXT: v_mul_hi_u32 v9, v7, v13 2255; CGP-NEXT: v_mul_hi_u32 v13, v10, v13 2256; CGP-NEXT: v_mul_f32_e32 v4, 0x5f7ffffc, v4 2257; CGP-NEXT: v_add_i32_e64 v12, s[4:5], v12, v14 2258; CGP-NEXT: v_cndmask_b32_e64 v14, 0, 1, s[4:5] 2259; CGP-NEXT: v_add_i32_e64 v9, s[4:5], v12, v9 2260; CGP-NEXT: v_cndmask_b32_e64 v9, 0, 1, s[4:5] 2261; CGP-NEXT: v_mul_lo_u32 v12, v10, v11 2262; CGP-NEXT: v_add_i32_e64 v9, s[4:5], v14, v9 2263; CGP-NEXT: v_mul_hi_u32 v14, v7, v11 2264; CGP-NEXT: v_mul_hi_u32 v10, v10, v11 2265; CGP-NEXT: v_add_i32_e64 v12, s[4:5], v12, v13 2266; CGP-NEXT: v_cndmask_b32_e64 v13, 0, 1, s[4:5] 2267; CGP-NEXT: v_add_i32_e64 v12, s[4:5], v12, v14 2268; CGP-NEXT: v_cndmask_b32_e64 v14, 0, 1, s[4:5] 2269; CGP-NEXT: v_add_i32_e64 v13, s[4:5], v13, v14 2270; CGP-NEXT: v_add_i32_e64 v9, s[4:5], v12, v9 2271; CGP-NEXT: v_cndmask_b32_e64 v12, 0, 1, s[4:5] 2272; CGP-NEXT: v_add_i32_e64 v11, s[4:5], v13, v12 2273; CGP-NEXT: v_add_i32_e64 v10, s[4:5], v10, v11 2274; CGP-NEXT: v_addc_u32_e32 v8, vcc, v8, v10, vcc 2275; CGP-NEXT: v_add_i32_e32 v7, vcc, v7, v9 2276; CGP-NEXT: v_addc_u32_e32 v8, vcc, 0, v8, vcc 2277; CGP-NEXT: v_mul_lo_u32 v9, v1, v7 2278; CGP-NEXT: v_mul_lo_u32 v10, v0, v8 2279; CGP-NEXT: v_mul_hi_u32 v11, v0, v7 2280; CGP-NEXT: v_mul_hi_u32 v7, v1, v7 2281; CGP-NEXT: v_ashrrev_i32_e32 v6, 31, v3 2282; CGP-NEXT: v_add_i32_e32 v9, vcc, v9, v10 2283; CGP-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 2284; CGP-NEXT: v_add_i32_e32 v9, vcc, v9, v11 2285; CGP-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc 2286; CGP-NEXT: v_mul_lo_u32 v11, v1, v8 2287; CGP-NEXT: v_add_i32_e32 v9, vcc, v10, v9 2288; CGP-NEXT: v_mul_hi_u32 v10, v0, v8 2289; CGP-NEXT: v_mul_hi_u32 v8, v1, v8 2290; CGP-NEXT: v_add_i32_e32 v7, vcc, v11, v7 2291; CGP-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc 2292; CGP-NEXT: v_add_i32_e32 v7, vcc, v7, v10 2293; CGP-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 2294; CGP-NEXT: v_add_i32_e32 v10, vcc, v11, v10 2295; CGP-NEXT: v_add_i32_e32 v7, vcc, v7, v9 2296; CGP-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc 2297; CGP-NEXT: v_add_i32_e32 v9, vcc, v10, v9 2298; CGP-NEXT: v_add_i32_e32 v8, vcc, v8, v9 2299; CGP-NEXT: v_mul_lo_u32 v9, 0, v7 2300; CGP-NEXT: v_mul_lo_u32 v8, s7, v8 2301; CGP-NEXT: v_mul_lo_u32 v10, s7, v7 2302; CGP-NEXT: v_mul_hi_u32 v7, s7, v7 2303; CGP-NEXT: v_add_i32_e32 v8, vcc, v9, v8 2304; CGP-NEXT: v_add_i32_e32 v7, vcc, v8, v7 2305; CGP-NEXT: v_sub_i32_e32 v0, vcc, v0, v10 2306; CGP-NEXT: v_subb_u32_e64 v8, s[4:5], v1, v7, vcc 2307; CGP-NEXT: v_sub_i32_e64 v1, s[4:5], v1, v7 2308; CGP-NEXT: v_cmp_le_u32_e64 s[4:5], 0, v8 2309; CGP-NEXT: v_cndmask_b32_e64 v7, 0, -1, s[4:5] 2310; CGP-NEXT: v_cmp_le_u32_e64 s[4:5], s7, v0 2311; CGP-NEXT: v_cndmask_b32_e64 v9, 0, -1, s[4:5] 2312; CGP-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v8 2313; CGP-NEXT: v_subbrev_u32_e32 v1, vcc, 0, v1, vcc 2314; CGP-NEXT: v_cndmask_b32_e64 v7, v7, v9, s[4:5] 2315; CGP-NEXT: v_subrev_i32_e32 v9, vcc, s7, v0 2316; CGP-NEXT: v_subbrev_u32_e32 v1, vcc, 0, v1, vcc 2317; CGP-NEXT: v_cmp_le_u32_e32 vcc, 0, v1 2318; CGP-NEXT: v_cndmask_b32_e64 v10, 0, -1, vcc 2319; CGP-NEXT: v_cmp_le_u32_e32 vcc, s7, v9 2320; CGP-NEXT: v_cndmask_b32_e64 v11, 0, -1, vcc 2321; CGP-NEXT: v_cmp_eq_u32_e32 vcc, 0, v1 2322; CGP-NEXT: v_cndmask_b32_e32 v10, v10, v11, vcc 2323; CGP-NEXT: v_subrev_i32_e32 v11, vcc, s7, v9 2324; CGP-NEXT: v_subbrev_u32_e32 v12, vcc, 0, v1, vcc 2325; CGP-NEXT: v_cmp_ne_u32_e32 vcc, 0, v10 2326; CGP-NEXT: v_cndmask_b32_e32 v9, v9, v11, vcc 2327; CGP-NEXT: v_cndmask_b32_e32 v1, v1, v12, vcc 2328; CGP-NEXT: v_cmp_ne_u32_e32 vcc, 0, v7 2329; CGP-NEXT: v_mul_f32_e32 v7, 0x2f800000, v4 2330; CGP-NEXT: v_trunc_f32_e32 v7, v7 2331; CGP-NEXT: v_mac_f32_e32 v4, 0xcf800000, v7 2332; CGP-NEXT: v_cvt_u32_f32_e32 v4, v4 2333; CGP-NEXT: v_cvt_u32_f32_e32 v7, v7 2334; CGP-NEXT: v_cndmask_b32_e32 v0, v0, v9, vcc 2335; CGP-NEXT: v_cndmask_b32_e32 v1, v8, v1, vcc 2336; CGP-NEXT: v_mul_lo_u32 v8, -1, v4 2337; CGP-NEXT: v_mul_lo_u32 v9, s6, v7 2338; CGP-NEXT: v_mul_hi_u32 v11, s6, v4 2339; CGP-NEXT: v_mul_lo_u32 v10, s6, v4 2340; CGP-NEXT: v_add_i32_e32 v2, vcc, v2, v6 2341; CGP-NEXT: v_addc_u32_e32 v3, vcc, v3, v6, vcc 2342; CGP-NEXT: v_add_i32_e32 v8, vcc, v8, v9 2343; CGP-NEXT: v_add_i32_e32 v8, vcc, v8, v11 2344; CGP-NEXT: v_mul_lo_u32 v9, v7, v10 2345; CGP-NEXT: v_mul_lo_u32 v11, v4, v8 2346; CGP-NEXT: v_mul_hi_u32 v12, v4, v10 2347; CGP-NEXT: v_mul_hi_u32 v10, v7, v10 2348; CGP-NEXT: v_xor_b32_e32 v0, v0, v5 2349; CGP-NEXT: v_add_i32_e32 v9, vcc, v9, v11 2350; CGP-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc 2351; CGP-NEXT: v_add_i32_e32 v9, vcc, v9, v12 2352; CGP-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc 2353; CGP-NEXT: v_mul_lo_u32 v12, v7, v8 2354; CGP-NEXT: v_add_i32_e32 v9, vcc, v11, v9 2355; CGP-NEXT: v_mul_hi_u32 v11, v4, v8 2356; CGP-NEXT: v_mul_hi_u32 v8, v7, v8 2357; CGP-NEXT: v_add_i32_e32 v10, vcc, v12, v10 2358; CGP-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc 2359; CGP-NEXT: v_add_i32_e32 v10, vcc, v10, v11 2360; CGP-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc 2361; CGP-NEXT: v_add_i32_e32 v11, vcc, v12, v11 2362; CGP-NEXT: v_add_i32_e32 v9, vcc, v10, v9 2363; CGP-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 2364; CGP-NEXT: v_add_i32_e32 v10, vcc, v11, v10 2365; CGP-NEXT: v_add_i32_e32 v8, vcc, v8, v10 2366; CGP-NEXT: v_add_i32_e32 v4, vcc, v4, v9 2367; CGP-NEXT: v_addc_u32_e64 v9, s[4:5], v7, v8, vcc 2368; CGP-NEXT: v_mul_lo_u32 v10, -1, v4 2369; CGP-NEXT: v_mul_lo_u32 v11, s6, v9 2370; CGP-NEXT: v_mul_hi_u32 v13, s6, v4 2371; CGP-NEXT: v_mul_lo_u32 v12, s6, v4 2372; CGP-NEXT: v_add_i32_e64 v7, s[4:5], v7, v8 2373; CGP-NEXT: v_add_i32_e64 v10, s[4:5], v10, v11 2374; CGP-NEXT: v_add_i32_e64 v10, s[4:5], v10, v13 2375; CGP-NEXT: v_mul_lo_u32 v11, v9, v12 2376; CGP-NEXT: v_mul_lo_u32 v13, v4, v10 2377; CGP-NEXT: v_mul_hi_u32 v8, v4, v12 2378; CGP-NEXT: v_mul_hi_u32 v12, v9, v12 2379; CGP-NEXT: v_xor_b32_e32 v2, v2, v6 2380; CGP-NEXT: v_add_i32_e64 v11, s[4:5], v11, v13 2381; CGP-NEXT: v_cndmask_b32_e64 v13, 0, 1, s[4:5] 2382; CGP-NEXT: v_add_i32_e64 v8, s[4:5], v11, v8 2383; CGP-NEXT: v_cndmask_b32_e64 v8, 0, 1, s[4:5] 2384; CGP-NEXT: v_mul_lo_u32 v11, v9, v10 2385; CGP-NEXT: v_add_i32_e64 v8, s[4:5], v13, v8 2386; CGP-NEXT: v_mul_hi_u32 v13, v4, v10 2387; CGP-NEXT: v_mul_hi_u32 v9, v9, v10 2388; CGP-NEXT: v_add_i32_e64 v11, s[4:5], v11, v12 2389; CGP-NEXT: v_cndmask_b32_e64 v12, 0, 1, s[4:5] 2390; CGP-NEXT: v_add_i32_e64 v11, s[4:5], v11, v13 2391; CGP-NEXT: v_cndmask_b32_e64 v13, 0, 1, s[4:5] 2392; CGP-NEXT: v_add_i32_e64 v12, s[4:5], v12, v13 2393; CGP-NEXT: v_add_i32_e64 v8, s[4:5], v11, v8 2394; CGP-NEXT: v_cndmask_b32_e64 v11, 0, 1, s[4:5] 2395; CGP-NEXT: v_add_i32_e64 v10, s[4:5], v12, v11 2396; CGP-NEXT: v_add_i32_e64 v9, s[4:5], v9, v10 2397; CGP-NEXT: v_addc_u32_e32 v7, vcc, v7, v9, vcc 2398; CGP-NEXT: v_add_i32_e32 v4, vcc, v4, v8 2399; CGP-NEXT: v_addc_u32_e32 v7, vcc, 0, v7, vcc 2400; CGP-NEXT: v_xor_b32_e32 v3, v3, v6 2401; CGP-NEXT: v_xor_b32_e32 v1, v1, v5 2402; CGP-NEXT: v_sub_i32_e32 v0, vcc, v0, v5 2403; CGP-NEXT: v_mul_lo_u32 v8, v3, v4 2404; CGP-NEXT: v_mul_lo_u32 v9, v2, v7 2405; CGP-NEXT: v_subb_u32_e32 v1, vcc, v1, v5, vcc 2406; CGP-NEXT: v_mul_hi_u32 v5, v2, v4 2407; CGP-NEXT: v_mul_hi_u32 v4, v3, v4 2408; CGP-NEXT: v_add_i32_e32 v8, vcc, v8, v9 2409; CGP-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc 2410; CGP-NEXT: v_add_i32_e32 v5, vcc, v8, v5 2411; CGP-NEXT: v_cndmask_b32_e64 v5, 0, 1, vcc 2412; CGP-NEXT: v_mul_lo_u32 v8, v3, v7 2413; CGP-NEXT: v_add_i32_e32 v5, vcc, v9, v5 2414; CGP-NEXT: v_mul_hi_u32 v9, v2, v7 2415; CGP-NEXT: v_mul_hi_u32 v7, v3, v7 2416; CGP-NEXT: v_add_i32_e32 v4, vcc, v8, v4 2417; CGP-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc 2418; CGP-NEXT: v_add_i32_e32 v4, vcc, v4, v9 2419; CGP-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc 2420; CGP-NEXT: v_add_i32_e32 v8, vcc, v8, v9 2421; CGP-NEXT: v_add_i32_e32 v4, vcc, v4, v5 2422; CGP-NEXT: v_cndmask_b32_e64 v5, 0, 1, vcc 2423; CGP-NEXT: v_add_i32_e32 v5, vcc, v8, v5 2424; CGP-NEXT: v_add_i32_e32 v5, vcc, v7, v5 2425; CGP-NEXT: v_mul_lo_u32 v7, 0, v4 2426; CGP-NEXT: v_mul_lo_u32 v5, s7, v5 2427; CGP-NEXT: v_mul_lo_u32 v8, s7, v4 2428; CGP-NEXT: v_mul_hi_u32 v4, s7, v4 2429; CGP-NEXT: v_add_i32_e32 v5, vcc, v7, v5 2430; CGP-NEXT: v_add_i32_e32 v4, vcc, v5, v4 2431; CGP-NEXT: v_sub_i32_e32 v2, vcc, v2, v8 2432; CGP-NEXT: v_subb_u32_e64 v5, s[4:5], v3, v4, vcc 2433; CGP-NEXT: v_sub_i32_e64 v3, s[4:5], v3, v4 2434; CGP-NEXT: v_cmp_le_u32_e64 s[4:5], 0, v5 2435; CGP-NEXT: v_cndmask_b32_e64 v4, 0, -1, s[4:5] 2436; CGP-NEXT: v_cmp_le_u32_e64 s[4:5], s7, v2 2437; CGP-NEXT: v_cndmask_b32_e64 v7, 0, -1, s[4:5] 2438; CGP-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v5 2439; CGP-NEXT: v_subbrev_u32_e32 v3, vcc, 0, v3, vcc 2440; CGP-NEXT: v_cndmask_b32_e64 v4, v4, v7, s[4:5] 2441; CGP-NEXT: v_subrev_i32_e32 v7, vcc, s7, v2 2442; CGP-NEXT: v_subbrev_u32_e32 v3, vcc, 0, v3, vcc 2443; CGP-NEXT: v_cmp_le_u32_e32 vcc, 0, v3 2444; CGP-NEXT: v_cndmask_b32_e64 v8, 0, -1, vcc 2445; CGP-NEXT: v_cmp_le_u32_e32 vcc, s7, v7 2446; CGP-NEXT: v_cndmask_b32_e64 v9, 0, -1, vcc 2447; CGP-NEXT: v_cmp_eq_u32_e32 vcc, 0, v3 2448; CGP-NEXT: v_cndmask_b32_e32 v8, v8, v9, vcc 2449; CGP-NEXT: v_subrev_i32_e32 v9, vcc, s7, v7 2450; CGP-NEXT: v_subbrev_u32_e32 v10, vcc, 0, v3, vcc 2451; CGP-NEXT: v_cmp_ne_u32_e32 vcc, 0, v8 2452; CGP-NEXT: v_cndmask_b32_e32 v7, v7, v9, vcc 2453; CGP-NEXT: v_cndmask_b32_e32 v3, v3, v10, vcc 2454; CGP-NEXT: v_cmp_ne_u32_e32 vcc, 0, v4 2455; CGP-NEXT: v_cndmask_b32_e32 v2, v2, v7, vcc 2456; CGP-NEXT: v_cndmask_b32_e32 v3, v5, v3, vcc 2457; CGP-NEXT: v_xor_b32_e32 v2, v2, v6 2458; CGP-NEXT: v_xor_b32_e32 v3, v3, v6 2459; CGP-NEXT: v_sub_i32_e32 v2, vcc, v2, v6 2460; CGP-NEXT: v_subb_u32_e32 v3, vcc, v3, v6, vcc 2461; CGP-NEXT: s_setpc_b64 s[30:31] 2462 %result = srem <2 x i64> %num, <i64 1235195, i64 1235195> 2463 ret <2 x i64> %result 2464} 2465 2466define i64 @v_srem_i64_pow2_shl_denom(i64 %x, i64 %y) { 2467; CHECK-LABEL: v_srem_i64_pow2_shl_denom: 2468; CHECK: ; %bb.0: 2469; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2470; CHECK-NEXT: s_movk_i32 s4, 0x1000 2471; CHECK-NEXT: s_mov_b32 s5, 0 2472; CHECK-NEXT: v_lshl_b64 v[4:5], s[4:5], v2 2473; CHECK-NEXT: v_mov_b32_e32 v2, 0 2474; CHECK-NEXT: v_or_b32_e32 v3, v1, v5 2475; CHECK-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[2:3] 2476; CHECK-NEXT: ; implicit-def: $vgpr2_vgpr3 2477; CHECK-NEXT: s_and_saveexec_b64 s[4:5], vcc 2478; CHECK-NEXT: s_xor_b64 s[6:7], exec, s[4:5] 2479; CHECK-NEXT: s_cbranch_execz BB7_2 2480; CHECK-NEXT: ; %bb.1: 2481; CHECK-NEXT: v_ashrrev_i32_e32 v2, 31, v5 2482; CHECK-NEXT: v_add_i32_e32 v3, vcc, v4, v2 2483; CHECK-NEXT: v_addc_u32_e32 v5, vcc, v5, v2, vcc 2484; CHECK-NEXT: v_xor_b32_e32 v3, v3, v2 2485; CHECK-NEXT: v_xor_b32_e32 v2, v5, v2 2486; CHECK-NEXT: v_cvt_f32_u32_e32 v5, v3 2487; CHECK-NEXT: v_cvt_f32_u32_e32 v6, v2 2488; CHECK-NEXT: v_ashrrev_i32_e32 v7, 31, v1 2489; CHECK-NEXT: v_mac_f32_e32 v5, 0x4f800000, v6 2490; CHECK-NEXT: v_rcp_iflag_f32_e32 v5, v5 2491; CHECK-NEXT: v_add_i32_e32 v6, vcc, v0, v7 2492; CHECK-NEXT: v_addc_u32_e32 v1, vcc, v1, v7, vcc 2493; CHECK-NEXT: v_sub_i32_e32 v9, vcc, 0, v3 2494; CHECK-NEXT: v_mul_f32_e32 v5, 0x5f7ffffc, v5 2495; CHECK-NEXT: v_mul_f32_e32 v8, 0x2f800000, v5 2496; CHECK-NEXT: v_trunc_f32_e32 v8, v8 2497; CHECK-NEXT: v_mac_f32_e32 v5, 0xcf800000, v8 2498; CHECK-NEXT: v_cvt_u32_f32_e32 v5, v5 2499; CHECK-NEXT: v_cvt_u32_f32_e32 v8, v8 2500; CHECK-NEXT: v_subb_u32_e32 v10, vcc, 0, v2, vcc 2501; CHECK-NEXT: v_xor_b32_e32 v6, v6, v7 2502; CHECK-NEXT: v_mul_lo_u32 v11, v10, v5 2503; CHECK-NEXT: v_mul_lo_u32 v12, v9, v8 2504; CHECK-NEXT: v_mul_hi_u32 v14, v9, v5 2505; CHECK-NEXT: v_mul_lo_u32 v13, v9, v5 2506; CHECK-NEXT: v_xor_b32_e32 v1, v1, v7 2507; CHECK-NEXT: v_add_i32_e32 v11, vcc, v11, v12 2508; CHECK-NEXT: v_add_i32_e32 v11, vcc, v11, v14 2509; CHECK-NEXT: v_mul_lo_u32 v12, v8, v13 2510; CHECK-NEXT: v_mul_lo_u32 v14, v5, v11 2511; CHECK-NEXT: v_mul_hi_u32 v15, v5, v13 2512; CHECK-NEXT: v_mul_hi_u32 v13, v8, v13 2513; CHECK-NEXT: v_add_i32_e32 v12, vcc, v12, v14 2514; CHECK-NEXT: v_cndmask_b32_e64 v14, 0, 1, vcc 2515; CHECK-NEXT: v_add_i32_e32 v12, vcc, v12, v15 2516; CHECK-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc 2517; CHECK-NEXT: v_mul_lo_u32 v15, v8, v11 2518; CHECK-NEXT: v_add_i32_e32 v12, vcc, v14, v12 2519; CHECK-NEXT: v_mul_hi_u32 v14, v5, v11 2520; CHECK-NEXT: v_mul_hi_u32 v11, v8, v11 2521; CHECK-NEXT: v_add_i32_e32 v13, vcc, v15, v13 2522; CHECK-NEXT: v_cndmask_b32_e64 v15, 0, 1, vcc 2523; CHECK-NEXT: v_add_i32_e32 v13, vcc, v13, v14 2524; CHECK-NEXT: v_cndmask_b32_e64 v14, 0, 1, vcc 2525; CHECK-NEXT: v_add_i32_e32 v14, vcc, v15, v14 2526; CHECK-NEXT: v_add_i32_e32 v12, vcc, v13, v12 2527; CHECK-NEXT: v_cndmask_b32_e64 v13, 0, 1, vcc 2528; CHECK-NEXT: v_add_i32_e32 v13, vcc, v14, v13 2529; CHECK-NEXT: v_add_i32_e32 v11, vcc, v11, v13 2530; CHECK-NEXT: v_add_i32_e32 v5, vcc, v5, v12 2531; CHECK-NEXT: v_addc_u32_e64 v12, s[4:5], v8, v11, vcc 2532; CHECK-NEXT: v_mul_lo_u32 v10, v10, v5 2533; CHECK-NEXT: v_mul_lo_u32 v13, v9, v12 2534; CHECK-NEXT: v_mul_lo_u32 v14, v9, v5 2535; CHECK-NEXT: v_mul_hi_u32 v9, v9, v5 2536; CHECK-NEXT: v_add_i32_e64 v8, s[4:5], v8, v11 2537; CHECK-NEXT: v_add_i32_e64 v10, s[4:5], v10, v13 2538; CHECK-NEXT: v_mul_hi_u32 v11, v5, v14 2539; CHECK-NEXT: v_add_i32_e64 v9, s[4:5], v10, v9 2540; CHECK-NEXT: v_mul_lo_u32 v10, v12, v14 2541; CHECK-NEXT: v_mul_lo_u32 v13, v5, v9 2542; CHECK-NEXT: v_mul_hi_u32 v14, v12, v14 2543; CHECK-NEXT: v_add_i32_e64 v10, s[4:5], v10, v13 2544; CHECK-NEXT: v_cndmask_b32_e64 v13, 0, 1, s[4:5] 2545; CHECK-NEXT: v_add_i32_e64 v10, s[4:5], v10, v11 2546; CHECK-NEXT: v_cndmask_b32_e64 v10, 0, 1, s[4:5] 2547; CHECK-NEXT: v_mul_lo_u32 v11, v12, v9 2548; CHECK-NEXT: v_add_i32_e64 v10, s[4:5], v13, v10 2549; CHECK-NEXT: v_mul_hi_u32 v13, v5, v9 2550; CHECK-NEXT: v_mul_hi_u32 v9, v12, v9 2551; CHECK-NEXT: v_add_i32_e64 v11, s[4:5], v11, v14 2552; CHECK-NEXT: v_cndmask_b32_e64 v14, 0, 1, s[4:5] 2553; CHECK-NEXT: v_add_i32_e64 v11, s[4:5], v11, v13 2554; CHECK-NEXT: v_cndmask_b32_e64 v13, 0, 1, s[4:5] 2555; CHECK-NEXT: v_add_i32_e64 v13, s[4:5], v14, v13 2556; CHECK-NEXT: v_add_i32_e64 v10, s[4:5], v11, v10 2557; CHECK-NEXT: v_cndmask_b32_e64 v11, 0, 1, s[4:5] 2558; CHECK-NEXT: v_add_i32_e64 v11, s[4:5], v13, v11 2559; CHECK-NEXT: v_add_i32_e64 v9, s[4:5], v9, v11 2560; CHECK-NEXT: v_addc_u32_e32 v8, vcc, v8, v9, vcc 2561; CHECK-NEXT: v_add_i32_e32 v5, vcc, v5, v10 2562; CHECK-NEXT: v_addc_u32_e32 v8, vcc, 0, v8, vcc 2563; CHECK-NEXT: v_mul_lo_u32 v9, v1, v5 2564; CHECK-NEXT: v_mul_lo_u32 v10, v6, v8 2565; CHECK-NEXT: v_mul_hi_u32 v11, v6, v5 2566; CHECK-NEXT: v_mul_hi_u32 v5, v1, v5 2567; CHECK-NEXT: v_add_i32_e32 v9, vcc, v9, v10 2568; CHECK-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 2569; CHECK-NEXT: v_add_i32_e32 v9, vcc, v9, v11 2570; CHECK-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc 2571; CHECK-NEXT: v_mul_lo_u32 v11, v1, v8 2572; CHECK-NEXT: v_add_i32_e32 v9, vcc, v10, v9 2573; CHECK-NEXT: v_mul_hi_u32 v10, v6, v8 2574; CHECK-NEXT: v_mul_hi_u32 v8, v1, v8 2575; CHECK-NEXT: v_add_i32_e32 v5, vcc, v11, v5 2576; CHECK-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc 2577; CHECK-NEXT: v_add_i32_e32 v5, vcc, v5, v10 2578; CHECK-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 2579; CHECK-NEXT: v_add_i32_e32 v10, vcc, v11, v10 2580; CHECK-NEXT: v_add_i32_e32 v5, vcc, v5, v9 2581; CHECK-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc 2582; CHECK-NEXT: v_add_i32_e32 v9, vcc, v10, v9 2583; CHECK-NEXT: v_add_i32_e32 v8, vcc, v8, v9 2584; CHECK-NEXT: v_mul_lo_u32 v9, v2, v5 2585; CHECK-NEXT: v_mul_lo_u32 v8, v3, v8 2586; CHECK-NEXT: v_mul_lo_u32 v10, v3, v5 2587; CHECK-NEXT: v_mul_hi_u32 v5, v3, v5 2588; CHECK-NEXT: v_add_i32_e32 v8, vcc, v9, v8 2589; CHECK-NEXT: v_add_i32_e32 v5, vcc, v8, v5 2590; CHECK-NEXT: v_sub_i32_e32 v6, vcc, v6, v10 2591; CHECK-NEXT: v_subb_u32_e64 v8, s[4:5], v1, v5, vcc 2592; CHECK-NEXT: v_sub_i32_e64 v1, s[4:5], v1, v5 2593; CHECK-NEXT: v_cmp_ge_u32_e64 s[4:5], v8, v2 2594; CHECK-NEXT: v_cndmask_b32_e64 v5, 0, -1, s[4:5] 2595; CHECK-NEXT: v_cmp_ge_u32_e64 s[4:5], v6, v3 2596; CHECK-NEXT: v_cndmask_b32_e64 v9, 0, -1, s[4:5] 2597; CHECK-NEXT: v_cmp_eq_u32_e64 s[4:5], v8, v2 2598; CHECK-NEXT: v_subb_u32_e32 v1, vcc, v1, v2, vcc 2599; CHECK-NEXT: v_cndmask_b32_e64 v5, v5, v9, s[4:5] 2600; CHECK-NEXT: v_sub_i32_e32 v9, vcc, v6, v3 2601; CHECK-NEXT: v_subbrev_u32_e64 v10, s[4:5], 0, v1, vcc 2602; CHECK-NEXT: v_cmp_ge_u32_e64 s[4:5], v10, v2 2603; CHECK-NEXT: v_cndmask_b32_e64 v11, 0, -1, s[4:5] 2604; CHECK-NEXT: v_cmp_ge_u32_e64 s[4:5], v9, v3 2605; CHECK-NEXT: v_subb_u32_e32 v1, vcc, v1, v2, vcc 2606; CHECK-NEXT: v_cndmask_b32_e64 v12, 0, -1, s[4:5] 2607; CHECK-NEXT: v_cmp_eq_u32_e64 s[4:5], v10, v2 2608; CHECK-NEXT: v_sub_i32_e32 v2, vcc, v9, v3 2609; CHECK-NEXT: v_cndmask_b32_e64 v11, v11, v12, s[4:5] 2610; CHECK-NEXT: v_subbrev_u32_e32 v1, vcc, 0, v1, vcc 2611; CHECK-NEXT: v_cmp_ne_u32_e32 vcc, 0, v11 2612; CHECK-NEXT: v_cndmask_b32_e32 v2, v9, v2, vcc 2613; CHECK-NEXT: v_cndmask_b32_e32 v1, v10, v1, vcc 2614; CHECK-NEXT: v_cmp_ne_u32_e32 vcc, 0, v5 2615; CHECK-NEXT: v_cndmask_b32_e32 v2, v6, v2, vcc 2616; CHECK-NEXT: v_cndmask_b32_e32 v1, v8, v1, vcc 2617; CHECK-NEXT: v_xor_b32_e32 v2, v2, v7 2618; CHECK-NEXT: v_xor_b32_e32 v1, v1, v7 2619; CHECK-NEXT: v_sub_i32_e32 v2, vcc, v2, v7 2620; CHECK-NEXT: v_subb_u32_e32 v3, vcc, v1, v7, vcc 2621; CHECK-NEXT: BB7_2: ; %Flow 2622; CHECK-NEXT: s_or_saveexec_b64 s[4:5], s[6:7] 2623; CHECK-NEXT: s_xor_b64 exec, exec, s[4:5] 2624; CHECK-NEXT: s_cbranch_execz BB7_4 2625; CHECK-NEXT: ; %bb.3: 2626; CHECK-NEXT: v_cvt_f32_u32_e32 v1, v4 2627; CHECK-NEXT: v_sub_i32_e32 v2, vcc, 0, v4 2628; CHECK-NEXT: v_mov_b32_e32 v3, 0 2629; CHECK-NEXT: v_rcp_iflag_f32_e32 v1, v1 2630; CHECK-NEXT: v_mul_f32_e32 v1, 0x4f7ffffe, v1 2631; CHECK-NEXT: v_cvt_u32_f32_e32 v1, v1 2632; CHECK-NEXT: v_mul_lo_u32 v2, v2, v1 2633; CHECK-NEXT: v_mul_hi_u32 v2, v1, v2 2634; CHECK-NEXT: v_add_i32_e32 v1, vcc, v1, v2 2635; CHECK-NEXT: v_mul_hi_u32 v1, v0, v1 2636; CHECK-NEXT: v_mul_lo_u32 v1, v1, v4 2637; CHECK-NEXT: v_sub_i32_e32 v0, vcc, v0, v1 2638; CHECK-NEXT: v_sub_i32_e32 v1, vcc, v0, v4 2639; CHECK-NEXT: v_cmp_ge_u32_e32 vcc, v0, v4 2640; CHECK-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc 2641; CHECK-NEXT: v_sub_i32_e32 v1, vcc, v0, v4 2642; CHECK-NEXT: v_cmp_ge_u32_e32 vcc, v0, v4 2643; CHECK-NEXT: v_cndmask_b32_e32 v2, v0, v1, vcc 2644; CHECK-NEXT: BB7_4: 2645; CHECK-NEXT: s_or_b64 exec, exec, s[4:5] 2646; CHECK-NEXT: v_mov_b32_e32 v0, v2 2647; CHECK-NEXT: v_mov_b32_e32 v1, v3 2648; CHECK-NEXT: s_setpc_b64 s[30:31] 2649 %shl.y = shl i64 4096, %y 2650 %r = srem i64 %x, %shl.y 2651 ret i64 %r 2652} 2653 2654define <2 x i64> @v_srem_v2i64_pow2_shl_denom(<2 x i64> %x, <2 x i64> %y) { 2655; GISEL-LABEL: v_srem_v2i64_pow2_shl_denom: 2656; GISEL: ; %bb.0: 2657; GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2658; GISEL-NEXT: s_movk_i32 s6, 0x1000 2659; GISEL-NEXT: s_mov_b32 s7, 0 2660; GISEL-NEXT: v_lshl_b64 v[4:5], s[6:7], v4 2661; GISEL-NEXT: v_ashrrev_i32_e32 v9, 31, v1 2662; GISEL-NEXT: v_ashrrev_i32_e32 v7, 31, v5 2663; GISEL-NEXT: v_add_i32_e32 v4, vcc, v4, v7 2664; GISEL-NEXT: v_addc_u32_e32 v5, vcc, v5, v7, vcc 2665; GISEL-NEXT: v_xor_b32_e32 v5, v5, v7 2666; GISEL-NEXT: v_xor_b32_e32 v4, v4, v7 2667; GISEL-NEXT: v_cvt_f32_u32_e32 v7, v4 2668; GISEL-NEXT: v_cvt_f32_u32_e32 v8, v5 2669; GISEL-NEXT: v_add_i32_e32 v0, vcc, v0, v9 2670; GISEL-NEXT: v_addc_u32_e32 v1, vcc, v1, v9, vcc 2671; GISEL-NEXT: v_sub_i32_e32 v10, vcc, 0, v4 2672; GISEL-NEXT: v_mac_f32_e32 v7, 0x4f800000, v8 2673; GISEL-NEXT: v_rcp_iflag_f32_e32 v7, v7 2674; GISEL-NEXT: v_xor_b32_e32 v8, v0, v9 2675; GISEL-NEXT: v_subb_u32_e32 v11, vcc, 0, v5, vcc 2676; GISEL-NEXT: v_xor_b32_e32 v16, v1, v9 2677; GISEL-NEXT: v_mul_f32_e32 v0, 0x5f7ffffc, v7 2678; GISEL-NEXT: v_mul_f32_e32 v7, 0x2f800000, v0 2679; GISEL-NEXT: v_trunc_f32_e32 v7, v7 2680; GISEL-NEXT: v_mac_f32_e32 v0, 0xcf800000, v7 2681; GISEL-NEXT: v_cvt_u32_f32_e32 v0, v0 2682; GISEL-NEXT: v_cvt_u32_f32_e32 v7, v7 2683; GISEL-NEXT: v_mul_lo_u32 v12, v11, v0 2684; GISEL-NEXT: v_mul_lo_u32 v13, v10, v7 2685; GISEL-NEXT: v_mul_hi_u32 v15, v10, v0 2686; GISEL-NEXT: v_mul_lo_u32 v14, v10, v0 2687; GISEL-NEXT: v_add_i32_e32 v12, vcc, v12, v13 2688; GISEL-NEXT: v_add_i32_e32 v12, vcc, v12, v15 2689; GISEL-NEXT: v_mul_lo_u32 v13, v7, v14 2690; GISEL-NEXT: v_mul_lo_u32 v15, v0, v12 2691; GISEL-NEXT: v_mul_hi_u32 v1, v0, v14 2692; GISEL-NEXT: v_mul_hi_u32 v14, v7, v14 2693; GISEL-NEXT: v_add_i32_e32 v13, vcc, v13, v15 2694; GISEL-NEXT: v_cndmask_b32_e64 v15, 0, 1, vcc 2695; GISEL-NEXT: v_add_i32_e32 v1, vcc, v13, v1 2696; GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc 2697; GISEL-NEXT: v_mul_lo_u32 v13, v7, v12 2698; GISEL-NEXT: v_add_i32_e32 v1, vcc, v15, v1 2699; GISEL-NEXT: v_mul_hi_u32 v15, v0, v12 2700; GISEL-NEXT: v_mul_hi_u32 v12, v7, v12 2701; GISEL-NEXT: v_add_i32_e32 v13, vcc, v13, v14 2702; GISEL-NEXT: v_cndmask_b32_e64 v14, 0, 1, vcc 2703; GISEL-NEXT: v_add_i32_e32 v13, vcc, v13, v15 2704; GISEL-NEXT: v_cndmask_b32_e64 v15, 0, 1, vcc 2705; GISEL-NEXT: v_add_i32_e32 v14, vcc, v14, v15 2706; GISEL-NEXT: v_add_i32_e32 v1, vcc, v13, v1 2707; GISEL-NEXT: v_cndmask_b32_e64 v13, 0, 1, vcc 2708; GISEL-NEXT: v_add_i32_e32 v13, vcc, v14, v13 2709; GISEL-NEXT: v_add_i32_e32 v12, vcc, v12, v13 2710; GISEL-NEXT: v_add_i32_e32 v0, vcc, v0, v1 2711; GISEL-NEXT: v_addc_u32_e64 v1, s[4:5], v7, v12, vcc 2712; GISEL-NEXT: v_mul_lo_u32 v11, v11, v0 2713; GISEL-NEXT: v_mul_lo_u32 v13, v10, v1 2714; GISEL-NEXT: v_mul_lo_u32 v14, v10, v0 2715; GISEL-NEXT: v_mul_hi_u32 v10, v10, v0 2716; GISEL-NEXT: v_add_i32_e64 v7, s[4:5], v7, v12 2717; GISEL-NEXT: v_add_i32_e64 v11, s[4:5], v11, v13 2718; GISEL-NEXT: v_mul_hi_u32 v12, v0, v14 2719; GISEL-NEXT: v_add_i32_e64 v10, s[4:5], v11, v10 2720; GISEL-NEXT: v_mul_lo_u32 v11, v1, v14 2721; GISEL-NEXT: v_mul_lo_u32 v13, v0, v10 2722; GISEL-NEXT: v_mul_hi_u32 v14, v1, v14 2723; GISEL-NEXT: v_add_i32_e64 v11, s[4:5], v11, v13 2724; GISEL-NEXT: v_cndmask_b32_e64 v13, 0, 1, s[4:5] 2725; GISEL-NEXT: v_add_i32_e64 v11, s[4:5], v11, v12 2726; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, 1, s[4:5] 2727; GISEL-NEXT: v_mul_lo_u32 v12, v1, v10 2728; GISEL-NEXT: v_add_i32_e64 v11, s[4:5], v13, v11 2729; GISEL-NEXT: v_mul_hi_u32 v13, v0, v10 2730; GISEL-NEXT: v_mul_hi_u32 v1, v1, v10 2731; GISEL-NEXT: v_add_i32_e64 v12, s[4:5], v12, v14 2732; GISEL-NEXT: v_cndmask_b32_e64 v14, 0, 1, s[4:5] 2733; GISEL-NEXT: v_add_i32_e64 v12, s[4:5], v12, v13 2734; GISEL-NEXT: v_cndmask_b32_e64 v13, 0, 1, s[4:5] 2735; GISEL-NEXT: v_add_i32_e64 v13, s[4:5], v14, v13 2736; GISEL-NEXT: v_add_i32_e64 v11, s[4:5], v12, v11 2737; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, s[4:5] 2738; GISEL-NEXT: v_add_i32_e64 v10, s[4:5], v13, v12 2739; GISEL-NEXT: v_add_i32_e64 v1, s[4:5], v1, v10 2740; GISEL-NEXT: v_addc_u32_e32 v1, vcc, v7, v1, vcc 2741; GISEL-NEXT: v_add_i32_e32 v7, vcc, v0, v11 2742; GISEL-NEXT: v_addc_u32_e32 v10, vcc, 0, v1, vcc 2743; GISEL-NEXT: v_mul_lo_u32 v11, v16, v7 2744; GISEL-NEXT: v_mul_lo_u32 v12, v8, v10 2745; GISEL-NEXT: v_lshl_b64 v[0:1], s[6:7], v6 2746; GISEL-NEXT: v_mul_hi_u32 v6, v8, v7 2747; GISEL-NEXT: v_mul_hi_u32 v7, v16, v7 2748; GISEL-NEXT: v_add_i32_e32 v11, vcc, v11, v12 2749; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc 2750; GISEL-NEXT: v_add_i32_e32 v6, vcc, v11, v6 2751; GISEL-NEXT: v_cndmask_b32_e64 v6, 0, 1, vcc 2752; GISEL-NEXT: v_mul_lo_u32 v11, v16, v10 2753; GISEL-NEXT: v_add_i32_e32 v6, vcc, v12, v6 2754; GISEL-NEXT: v_mul_hi_u32 v12, v8, v10 2755; GISEL-NEXT: v_mul_hi_u32 v10, v16, v10 2756; GISEL-NEXT: v_add_i32_e32 v7, vcc, v11, v7 2757; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc 2758; GISEL-NEXT: v_add_i32_e32 v7, vcc, v7, v12 2759; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc 2760; GISEL-NEXT: v_add_i32_e32 v11, vcc, v11, v12 2761; GISEL-NEXT: v_add_i32_e32 v6, vcc, v7, v6 2762; GISEL-NEXT: v_cndmask_b32_e64 v7, 0, 1, vcc 2763; GISEL-NEXT: v_add_i32_e32 v7, vcc, v11, v7 2764; GISEL-NEXT: v_add_i32_e32 v7, vcc, v10, v7 2765; GISEL-NEXT: v_mul_lo_u32 v10, v5, v6 2766; GISEL-NEXT: v_mul_lo_u32 v7, v4, v7 2767; GISEL-NEXT: v_mul_lo_u32 v11, v4, v6 2768; GISEL-NEXT: v_mul_hi_u32 v6, v4, v6 2769; GISEL-NEXT: v_add_i32_e32 v7, vcc, v10, v7 2770; GISEL-NEXT: v_add_i32_e32 v6, vcc, v7, v6 2771; GISEL-NEXT: v_sub_i32_e32 v7, vcc, v8, v11 2772; GISEL-NEXT: v_subb_u32_e64 v8, s[4:5], v16, v6, vcc 2773; GISEL-NEXT: v_sub_i32_e64 v6, s[4:5], v16, v6 2774; GISEL-NEXT: v_cmp_ge_u32_e64 s[4:5], v8, v5 2775; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, -1, s[4:5] 2776; GISEL-NEXT: v_cmp_ge_u32_e64 s[4:5], v7, v4 2777; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, -1, s[4:5] 2778; GISEL-NEXT: v_cmp_eq_u32_e64 s[4:5], v8, v5 2779; GISEL-NEXT: v_subb_u32_e32 v6, vcc, v6, v5, vcc 2780; GISEL-NEXT: v_cndmask_b32_e64 v10, v10, v11, s[4:5] 2781; GISEL-NEXT: v_sub_i32_e32 v11, vcc, v7, v4 2782; GISEL-NEXT: v_subbrev_u32_e64 v12, s[4:5], 0, v6, vcc 2783; GISEL-NEXT: v_cmp_ge_u32_e64 s[4:5], v12, v5 2784; GISEL-NEXT: v_cndmask_b32_e64 v13, 0, -1, s[4:5] 2785; GISEL-NEXT: v_cmp_ge_u32_e64 s[4:5], v11, v4 2786; GISEL-NEXT: v_cndmask_b32_e64 v14, 0, -1, s[4:5] 2787; GISEL-NEXT: v_cmp_eq_u32_e64 s[4:5], v12, v5 2788; GISEL-NEXT: v_subb_u32_e32 v5, vcc, v6, v5, vcc 2789; GISEL-NEXT: v_sub_i32_e32 v4, vcc, v11, v4 2790; GISEL-NEXT: v_cndmask_b32_e64 v13, v13, v14, s[4:5] 2791; GISEL-NEXT: v_subbrev_u32_e32 v5, vcc, 0, v5, vcc 2792; GISEL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v13 2793; GISEL-NEXT: v_cndmask_b32_e32 v4, v11, v4, vcc 2794; GISEL-NEXT: v_cndmask_b32_e32 v5, v12, v5, vcc 2795; GISEL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v10 2796; GISEL-NEXT: v_ashrrev_i32_e32 v6, 31, v1 2797; GISEL-NEXT: v_cndmask_b32_e32 v5, v8, v5, vcc 2798; GISEL-NEXT: v_cndmask_b32_e32 v4, v7, v4, vcc 2799; GISEL-NEXT: v_add_i32_e32 v0, vcc, v0, v6 2800; GISEL-NEXT: v_addc_u32_e32 v1, vcc, v1, v6, vcc 2801; GISEL-NEXT: v_xor_b32_e32 v7, v0, v6 2802; GISEL-NEXT: v_xor_b32_e32 v6, v1, v6 2803; GISEL-NEXT: v_cvt_f32_u32_e32 v0, v7 2804; GISEL-NEXT: v_cvt_f32_u32_e32 v1, v6 2805; GISEL-NEXT: v_ashrrev_i32_e32 v8, 31, v3 2806; GISEL-NEXT: v_xor_b32_e32 v4, v4, v9 2807; GISEL-NEXT: v_xor_b32_e32 v5, v5, v9 2808; GISEL-NEXT: v_mac_f32_e32 v0, 0x4f800000, v1 2809; GISEL-NEXT: v_rcp_iflag_f32_e32 v0, v0 2810; GISEL-NEXT: v_add_i32_e32 v1, vcc, v2, v8 2811; GISEL-NEXT: v_addc_u32_e32 v2, vcc, v3, v8, vcc 2812; GISEL-NEXT: v_xor_b32_e32 v3, v1, v8 2813; GISEL-NEXT: v_mul_f32_e32 v0, 0x5f7ffffc, v0 2814; GISEL-NEXT: v_mul_f32_e32 v1, 0x2f800000, v0 2815; GISEL-NEXT: v_trunc_f32_e32 v1, v1 2816; GISEL-NEXT: v_mac_f32_e32 v0, 0xcf800000, v1 2817; GISEL-NEXT: v_cvt_u32_f32_e32 v0, v0 2818; GISEL-NEXT: v_cvt_u32_f32_e32 v1, v1 2819; GISEL-NEXT: v_sub_i32_e32 v10, vcc, 0, v7 2820; GISEL-NEXT: v_subb_u32_e32 v11, vcc, 0, v6, vcc 2821; GISEL-NEXT: v_mul_lo_u32 v12, v11, v0 2822; GISEL-NEXT: v_mul_lo_u32 v13, v10, v1 2823; GISEL-NEXT: v_mul_hi_u32 v15, v10, v0 2824; GISEL-NEXT: v_mul_lo_u32 v14, v10, v0 2825; GISEL-NEXT: v_xor_b32_e32 v2, v2, v8 2826; GISEL-NEXT: v_add_i32_e32 v12, vcc, v12, v13 2827; GISEL-NEXT: v_add_i32_e32 v12, vcc, v12, v15 2828; GISEL-NEXT: v_mul_lo_u32 v13, v1, v14 2829; GISEL-NEXT: v_mul_lo_u32 v15, v0, v12 2830; GISEL-NEXT: v_mul_hi_u32 v16, v0, v14 2831; GISEL-NEXT: v_mul_hi_u32 v14, v1, v14 2832; GISEL-NEXT: v_add_i32_e32 v13, vcc, v13, v15 2833; GISEL-NEXT: v_cndmask_b32_e64 v15, 0, 1, vcc 2834; GISEL-NEXT: v_add_i32_e32 v13, vcc, v13, v16 2835; GISEL-NEXT: v_cndmask_b32_e64 v13, 0, 1, vcc 2836; GISEL-NEXT: v_mul_lo_u32 v16, v1, v12 2837; GISEL-NEXT: v_add_i32_e32 v13, vcc, v15, v13 2838; GISEL-NEXT: v_mul_hi_u32 v15, v0, v12 2839; GISEL-NEXT: v_mul_hi_u32 v12, v1, v12 2840; GISEL-NEXT: v_add_i32_e32 v14, vcc, v16, v14 2841; GISEL-NEXT: v_cndmask_b32_e64 v16, 0, 1, vcc 2842; GISEL-NEXT: v_add_i32_e32 v14, vcc, v14, v15 2843; GISEL-NEXT: v_cndmask_b32_e64 v15, 0, 1, vcc 2844; GISEL-NEXT: v_add_i32_e32 v15, vcc, v16, v15 2845; GISEL-NEXT: v_add_i32_e32 v13, vcc, v14, v13 2846; GISEL-NEXT: v_cndmask_b32_e64 v14, 0, 1, vcc 2847; GISEL-NEXT: v_add_i32_e32 v14, vcc, v15, v14 2848; GISEL-NEXT: v_add_i32_e32 v12, vcc, v12, v14 2849; GISEL-NEXT: v_add_i32_e32 v0, vcc, v0, v13 2850; GISEL-NEXT: v_addc_u32_e64 v13, s[4:5], v1, v12, vcc 2851; GISEL-NEXT: v_mul_lo_u32 v11, v11, v0 2852; GISEL-NEXT: v_mul_lo_u32 v14, v10, v13 2853; GISEL-NEXT: v_mul_lo_u32 v15, v10, v0 2854; GISEL-NEXT: v_mul_hi_u32 v10, v10, v0 2855; GISEL-NEXT: v_add_i32_e64 v1, s[4:5], v1, v12 2856; GISEL-NEXT: v_add_i32_e64 v11, s[4:5], v11, v14 2857; GISEL-NEXT: v_mul_hi_u32 v12, v0, v15 2858; GISEL-NEXT: v_add_i32_e64 v10, s[4:5], v11, v10 2859; GISEL-NEXT: v_mul_lo_u32 v11, v13, v15 2860; GISEL-NEXT: v_mul_lo_u32 v14, v0, v10 2861; GISEL-NEXT: v_mul_hi_u32 v15, v13, v15 2862; GISEL-NEXT: v_add_i32_e64 v11, s[4:5], v11, v14 2863; GISEL-NEXT: v_cndmask_b32_e64 v14, 0, 1, s[4:5] 2864; GISEL-NEXT: v_add_i32_e64 v11, s[4:5], v11, v12 2865; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, 1, s[4:5] 2866; GISEL-NEXT: v_mul_lo_u32 v12, v13, v10 2867; GISEL-NEXT: v_add_i32_e64 v11, s[4:5], v14, v11 2868; GISEL-NEXT: v_mul_hi_u32 v14, v0, v10 2869; GISEL-NEXT: v_mul_hi_u32 v10, v13, v10 2870; GISEL-NEXT: v_add_i32_e64 v12, s[4:5], v12, v15 2871; GISEL-NEXT: v_cndmask_b32_e64 v15, 0, 1, s[4:5] 2872; GISEL-NEXT: v_add_i32_e64 v12, s[4:5], v12, v14 2873; GISEL-NEXT: v_cndmask_b32_e64 v14, 0, 1, s[4:5] 2874; GISEL-NEXT: v_add_i32_e64 v14, s[4:5], v15, v14 2875; GISEL-NEXT: v_add_i32_e64 v11, s[4:5], v12, v11 2876; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, s[4:5] 2877; GISEL-NEXT: v_add_i32_e64 v12, s[4:5], v14, v12 2878; GISEL-NEXT: v_add_i32_e64 v10, s[4:5], v10, v12 2879; GISEL-NEXT: v_addc_u32_e32 v1, vcc, v1, v10, vcc 2880; GISEL-NEXT: v_add_i32_e32 v10, vcc, v0, v11 2881; GISEL-NEXT: v_addc_u32_e32 v11, vcc, 0, v1, vcc 2882; GISEL-NEXT: v_mul_lo_u32 v12, v2, v10 2883; GISEL-NEXT: v_mul_lo_u32 v13, v3, v11 2884; GISEL-NEXT: v_sub_i32_e32 v0, vcc, v4, v9 2885; GISEL-NEXT: v_mul_hi_u32 v4, v3, v10 2886; GISEL-NEXT: v_subb_u32_e32 v1, vcc, v5, v9, vcc 2887; GISEL-NEXT: v_add_i32_e32 v5, vcc, v12, v13 2888; GISEL-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc 2889; GISEL-NEXT: v_add_i32_e32 v4, vcc, v5, v4 2890; GISEL-NEXT: v_cndmask_b32_e64 v4, 0, 1, vcc 2891; GISEL-NEXT: v_mul_lo_u32 v5, v2, v11 2892; GISEL-NEXT: v_mul_hi_u32 v10, v2, v10 2893; GISEL-NEXT: v_add_i32_e32 v4, vcc, v9, v4 2894; GISEL-NEXT: v_mul_hi_u32 v9, v3, v11 2895; GISEL-NEXT: v_add_i32_e32 v5, vcc, v5, v10 2896; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 2897; GISEL-NEXT: v_add_i32_e32 v5, vcc, v5, v9 2898; GISEL-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc 2899; GISEL-NEXT: v_add_i32_e32 v9, vcc, v10, v9 2900; GISEL-NEXT: v_mul_hi_u32 v10, v2, v11 2901; GISEL-NEXT: v_add_i32_e32 v4, vcc, v5, v4 2902; GISEL-NEXT: v_cndmask_b32_e64 v5, 0, 1, vcc 2903; GISEL-NEXT: v_add_i32_e32 v5, vcc, v9, v5 2904; GISEL-NEXT: v_add_i32_e32 v5, vcc, v10, v5 2905; GISEL-NEXT: v_mul_lo_u32 v9, v6, v4 2906; GISEL-NEXT: v_mul_lo_u32 v5, v7, v5 2907; GISEL-NEXT: v_mul_lo_u32 v10, v7, v4 2908; GISEL-NEXT: v_mul_hi_u32 v4, v7, v4 2909; GISEL-NEXT: v_add_i32_e32 v5, vcc, v9, v5 2910; GISEL-NEXT: v_add_i32_e32 v4, vcc, v5, v4 2911; GISEL-NEXT: v_sub_i32_e32 v3, vcc, v3, v10 2912; GISEL-NEXT: v_subb_u32_e64 v5, s[4:5], v2, v4, vcc 2913; GISEL-NEXT: v_sub_i32_e64 v2, s[4:5], v2, v4 2914; GISEL-NEXT: v_cmp_ge_u32_e64 s[4:5], v5, v6 2915; GISEL-NEXT: v_cndmask_b32_e64 v4, 0, -1, s[4:5] 2916; GISEL-NEXT: v_cmp_ge_u32_e64 s[4:5], v3, v7 2917; GISEL-NEXT: v_cndmask_b32_e64 v9, 0, -1, s[4:5] 2918; GISEL-NEXT: v_cmp_eq_u32_e64 s[4:5], v5, v6 2919; GISEL-NEXT: v_subb_u32_e32 v2, vcc, v2, v6, vcc 2920; GISEL-NEXT: v_cndmask_b32_e64 v4, v4, v9, s[4:5] 2921; GISEL-NEXT: v_sub_i32_e32 v9, vcc, v3, v7 2922; GISEL-NEXT: v_subbrev_u32_e64 v10, s[4:5], 0, v2, vcc 2923; GISEL-NEXT: v_cmp_ge_u32_e64 s[4:5], v10, v6 2924; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, -1, s[4:5] 2925; GISEL-NEXT: v_cmp_ge_u32_e64 s[4:5], v9, v7 2926; GISEL-NEXT: v_subb_u32_e32 v2, vcc, v2, v6, vcc 2927; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, -1, s[4:5] 2928; GISEL-NEXT: v_cmp_eq_u32_e64 s[4:5], v10, v6 2929; GISEL-NEXT: v_sub_i32_e32 v6, vcc, v9, v7 2930; GISEL-NEXT: v_cndmask_b32_e64 v11, v11, v12, s[4:5] 2931; GISEL-NEXT: v_subbrev_u32_e32 v2, vcc, 0, v2, vcc 2932; GISEL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v11 2933; GISEL-NEXT: v_cndmask_b32_e32 v6, v9, v6, vcc 2934; GISEL-NEXT: v_cndmask_b32_e32 v2, v10, v2, vcc 2935; GISEL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v4 2936; GISEL-NEXT: v_cndmask_b32_e32 v3, v3, v6, vcc 2937; GISEL-NEXT: v_cndmask_b32_e32 v2, v5, v2, vcc 2938; GISEL-NEXT: v_xor_b32_e32 v3, v3, v8 2939; GISEL-NEXT: v_xor_b32_e32 v4, v2, v8 2940; GISEL-NEXT: v_sub_i32_e32 v2, vcc, v3, v8 2941; GISEL-NEXT: v_subb_u32_e32 v3, vcc, v4, v8, vcc 2942; GISEL-NEXT: s_setpc_b64 s[30:31] 2943; 2944; CGP-LABEL: v_srem_v2i64_pow2_shl_denom: 2945; CGP: ; %bb.0: 2946; CGP-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2947; CGP-NEXT: s_movk_i32 s4, 0x1000 2948; CGP-NEXT: s_mov_b32 s5, 0 2949; CGP-NEXT: v_lshl_b64 v[10:11], s[4:5], v4 2950; CGP-NEXT: v_mov_b32_e32 v7, v1 2951; CGP-NEXT: v_mov_b32_e32 v5, v0 2952; CGP-NEXT: v_or_b32_e32 v1, v7, v11 2953; CGP-NEXT: v_mov_b32_e32 v0, 0 2954; CGP-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[0:1] 2955; CGP-NEXT: v_lshl_b64 v[8:9], s[4:5], v6 2956; CGP-NEXT: ; implicit-def: $vgpr0_vgpr1 2957; CGP-NEXT: s_and_saveexec_b64 s[4:5], vcc 2958; CGP-NEXT: s_xor_b64 s[6:7], exec, s[4:5] 2959; CGP-NEXT: s_cbranch_execz BB8_2 2960; CGP-NEXT: ; %bb.1: 2961; CGP-NEXT: v_ashrrev_i32_e32 v0, 31, v11 2962; CGP-NEXT: v_add_i32_e32 v1, vcc, v10, v0 2963; CGP-NEXT: v_addc_u32_e32 v4, vcc, v11, v0, vcc 2964; CGP-NEXT: v_xor_b32_e32 v1, v1, v0 2965; CGP-NEXT: v_xor_b32_e32 v0, v4, v0 2966; CGP-NEXT: v_cvt_f32_u32_e32 v4, v1 2967; CGP-NEXT: v_cvt_f32_u32_e32 v6, v0 2968; CGP-NEXT: v_ashrrev_i32_e32 v11, 31, v7 2969; CGP-NEXT: v_mac_f32_e32 v4, 0x4f800000, v6 2970; CGP-NEXT: v_rcp_iflag_f32_e32 v4, v4 2971; CGP-NEXT: v_add_i32_e32 v6, vcc, v5, v11 2972; CGP-NEXT: v_addc_u32_e32 v7, vcc, v7, v11, vcc 2973; CGP-NEXT: v_sub_i32_e32 v13, vcc, 0, v1 2974; CGP-NEXT: v_mul_f32_e32 v4, 0x5f7ffffc, v4 2975; CGP-NEXT: v_mul_f32_e32 v12, 0x2f800000, v4 2976; CGP-NEXT: v_trunc_f32_e32 v12, v12 2977; CGP-NEXT: v_mac_f32_e32 v4, 0xcf800000, v12 2978; CGP-NEXT: v_cvt_u32_f32_e32 v4, v4 2979; CGP-NEXT: v_cvt_u32_f32_e32 v12, v12 2980; CGP-NEXT: v_subb_u32_e32 v14, vcc, 0, v0, vcc 2981; CGP-NEXT: v_xor_b32_e32 v6, v6, v11 2982; CGP-NEXT: v_mul_lo_u32 v15, v14, v4 2983; CGP-NEXT: v_mul_lo_u32 v16, v13, v12 2984; CGP-NEXT: v_mul_hi_u32 v18, v13, v4 2985; CGP-NEXT: v_mul_lo_u32 v17, v13, v4 2986; CGP-NEXT: v_xor_b32_e32 v7, v7, v11 2987; CGP-NEXT: v_add_i32_e32 v15, vcc, v15, v16 2988; CGP-NEXT: v_add_i32_e32 v15, vcc, v15, v18 2989; CGP-NEXT: v_mul_lo_u32 v16, v12, v17 2990; CGP-NEXT: v_mul_lo_u32 v18, v4, v15 2991; CGP-NEXT: v_mul_hi_u32 v19, v4, v17 2992; CGP-NEXT: v_mul_hi_u32 v17, v12, v17 2993; CGP-NEXT: v_add_i32_e32 v16, vcc, v16, v18 2994; CGP-NEXT: v_cndmask_b32_e64 v18, 0, 1, vcc 2995; CGP-NEXT: v_add_i32_e32 v16, vcc, v16, v19 2996; CGP-NEXT: v_cndmask_b32_e64 v16, 0, 1, vcc 2997; CGP-NEXT: v_mul_lo_u32 v19, v12, v15 2998; CGP-NEXT: v_add_i32_e32 v16, vcc, v18, v16 2999; CGP-NEXT: v_mul_hi_u32 v18, v4, v15 3000; CGP-NEXT: v_mul_hi_u32 v15, v12, v15 3001; CGP-NEXT: v_add_i32_e32 v17, vcc, v19, v17 3002; CGP-NEXT: v_cndmask_b32_e64 v19, 0, 1, vcc 3003; CGP-NEXT: v_add_i32_e32 v17, vcc, v17, v18 3004; CGP-NEXT: v_cndmask_b32_e64 v18, 0, 1, vcc 3005; CGP-NEXT: v_add_i32_e32 v18, vcc, v19, v18 3006; CGP-NEXT: v_add_i32_e32 v16, vcc, v17, v16 3007; CGP-NEXT: v_cndmask_b32_e64 v17, 0, 1, vcc 3008; CGP-NEXT: v_add_i32_e32 v17, vcc, v18, v17 3009; CGP-NEXT: v_add_i32_e32 v15, vcc, v15, v17 3010; CGP-NEXT: v_add_i32_e32 v4, vcc, v4, v16 3011; CGP-NEXT: v_addc_u32_e64 v16, s[4:5], v12, v15, vcc 3012; CGP-NEXT: v_mul_lo_u32 v14, v14, v4 3013; CGP-NEXT: v_mul_lo_u32 v17, v13, v16 3014; CGP-NEXT: v_mul_lo_u32 v18, v13, v4 3015; CGP-NEXT: v_mul_hi_u32 v13, v13, v4 3016; CGP-NEXT: v_add_i32_e64 v12, s[4:5], v12, v15 3017; CGP-NEXT: v_add_i32_e64 v14, s[4:5], v14, v17 3018; CGP-NEXT: v_mul_hi_u32 v15, v4, v18 3019; CGP-NEXT: v_add_i32_e64 v13, s[4:5], v14, v13 3020; CGP-NEXT: v_mul_lo_u32 v14, v16, v18 3021; CGP-NEXT: v_mul_lo_u32 v17, v4, v13 3022; CGP-NEXT: v_mul_hi_u32 v18, v16, v18 3023; CGP-NEXT: v_add_i32_e64 v14, s[4:5], v14, v17 3024; CGP-NEXT: v_cndmask_b32_e64 v17, 0, 1, s[4:5] 3025; CGP-NEXT: v_add_i32_e64 v14, s[4:5], v14, v15 3026; CGP-NEXT: v_cndmask_b32_e64 v14, 0, 1, s[4:5] 3027; CGP-NEXT: v_mul_lo_u32 v15, v16, v13 3028; CGP-NEXT: v_add_i32_e64 v14, s[4:5], v17, v14 3029; CGP-NEXT: v_mul_hi_u32 v17, v4, v13 3030; CGP-NEXT: v_mul_hi_u32 v13, v16, v13 3031; CGP-NEXT: v_add_i32_e64 v15, s[4:5], v15, v18 3032; CGP-NEXT: v_cndmask_b32_e64 v18, 0, 1, s[4:5] 3033; CGP-NEXT: v_add_i32_e64 v15, s[4:5], v15, v17 3034; CGP-NEXT: v_cndmask_b32_e64 v17, 0, 1, s[4:5] 3035; CGP-NEXT: v_add_i32_e64 v17, s[4:5], v18, v17 3036; CGP-NEXT: v_add_i32_e64 v14, s[4:5], v15, v14 3037; CGP-NEXT: v_cndmask_b32_e64 v15, 0, 1, s[4:5] 3038; CGP-NEXT: v_add_i32_e64 v15, s[4:5], v17, v15 3039; CGP-NEXT: v_add_i32_e64 v13, s[4:5], v13, v15 3040; CGP-NEXT: v_addc_u32_e32 v12, vcc, v12, v13, vcc 3041; CGP-NEXT: v_add_i32_e32 v4, vcc, v4, v14 3042; CGP-NEXT: v_addc_u32_e32 v12, vcc, 0, v12, vcc 3043; CGP-NEXT: v_mul_lo_u32 v13, v7, v4 3044; CGP-NEXT: v_mul_lo_u32 v14, v6, v12 3045; CGP-NEXT: v_mul_hi_u32 v15, v6, v4 3046; CGP-NEXT: v_mul_hi_u32 v4, v7, v4 3047; CGP-NEXT: v_add_i32_e32 v13, vcc, v13, v14 3048; CGP-NEXT: v_cndmask_b32_e64 v14, 0, 1, vcc 3049; CGP-NEXT: v_add_i32_e32 v13, vcc, v13, v15 3050; CGP-NEXT: v_cndmask_b32_e64 v13, 0, 1, vcc 3051; CGP-NEXT: v_mul_lo_u32 v15, v7, v12 3052; CGP-NEXT: v_add_i32_e32 v13, vcc, v14, v13 3053; CGP-NEXT: v_mul_hi_u32 v14, v6, v12 3054; CGP-NEXT: v_mul_hi_u32 v12, v7, v12 3055; CGP-NEXT: v_add_i32_e32 v4, vcc, v15, v4 3056; CGP-NEXT: v_cndmask_b32_e64 v15, 0, 1, vcc 3057; CGP-NEXT: v_add_i32_e32 v4, vcc, v4, v14 3058; CGP-NEXT: v_cndmask_b32_e64 v14, 0, 1, vcc 3059; CGP-NEXT: v_add_i32_e32 v14, vcc, v15, v14 3060; CGP-NEXT: v_add_i32_e32 v4, vcc, v4, v13 3061; CGP-NEXT: v_cndmask_b32_e64 v13, 0, 1, vcc 3062; CGP-NEXT: v_add_i32_e32 v13, vcc, v14, v13 3063; CGP-NEXT: v_add_i32_e32 v12, vcc, v12, v13 3064; CGP-NEXT: v_mul_lo_u32 v13, v0, v4 3065; CGP-NEXT: v_mul_lo_u32 v12, v1, v12 3066; CGP-NEXT: v_mul_lo_u32 v14, v1, v4 3067; CGP-NEXT: v_mul_hi_u32 v4, v1, v4 3068; CGP-NEXT: v_add_i32_e32 v12, vcc, v13, v12 3069; CGP-NEXT: v_add_i32_e32 v4, vcc, v12, v4 3070; CGP-NEXT: v_sub_i32_e32 v6, vcc, v6, v14 3071; CGP-NEXT: v_subb_u32_e64 v12, s[4:5], v7, v4, vcc 3072; CGP-NEXT: v_sub_i32_e64 v4, s[4:5], v7, v4 3073; CGP-NEXT: v_cmp_ge_u32_e64 s[4:5], v12, v0 3074; CGP-NEXT: v_cndmask_b32_e64 v7, 0, -1, s[4:5] 3075; CGP-NEXT: v_cmp_ge_u32_e64 s[4:5], v6, v1 3076; CGP-NEXT: v_cndmask_b32_e64 v13, 0, -1, s[4:5] 3077; CGP-NEXT: v_cmp_eq_u32_e64 s[4:5], v12, v0 3078; CGP-NEXT: v_subb_u32_e32 v4, vcc, v4, v0, vcc 3079; CGP-NEXT: v_cndmask_b32_e64 v7, v7, v13, s[4:5] 3080; CGP-NEXT: v_sub_i32_e32 v13, vcc, v6, v1 3081; CGP-NEXT: v_subbrev_u32_e64 v14, s[4:5], 0, v4, vcc 3082; CGP-NEXT: v_cmp_ge_u32_e64 s[4:5], v14, v0 3083; CGP-NEXT: v_cndmask_b32_e64 v15, 0, -1, s[4:5] 3084; CGP-NEXT: v_cmp_ge_u32_e64 s[4:5], v13, v1 3085; CGP-NEXT: v_cndmask_b32_e64 v16, 0, -1, s[4:5] 3086; CGP-NEXT: v_cmp_eq_u32_e64 s[4:5], v14, v0 3087; CGP-NEXT: v_subb_u32_e32 v0, vcc, v4, v0, vcc 3088; CGP-NEXT: v_sub_i32_e32 v1, vcc, v13, v1 3089; CGP-NEXT: v_cndmask_b32_e64 v15, v15, v16, s[4:5] 3090; CGP-NEXT: v_subbrev_u32_e32 v0, vcc, 0, v0, vcc 3091; CGP-NEXT: v_cmp_ne_u32_e32 vcc, 0, v15 3092; CGP-NEXT: v_cndmask_b32_e32 v1, v13, v1, vcc 3093; CGP-NEXT: v_cndmask_b32_e32 v0, v14, v0, vcc 3094; CGP-NEXT: v_cmp_ne_u32_e32 vcc, 0, v7 3095; CGP-NEXT: v_cndmask_b32_e32 v1, v6, v1, vcc 3096; CGP-NEXT: v_cndmask_b32_e32 v0, v12, v0, vcc 3097; CGP-NEXT: v_xor_b32_e32 v1, v1, v11 3098; CGP-NEXT: v_xor_b32_e32 v4, v0, v11 3099; CGP-NEXT: v_sub_i32_e32 v0, vcc, v1, v11 3100; CGP-NEXT: v_subb_u32_e32 v1, vcc, v4, v11, vcc 3101; CGP-NEXT: BB8_2: ; %Flow2 3102; CGP-NEXT: s_or_saveexec_b64 s[4:5], s[6:7] 3103; CGP-NEXT: s_xor_b64 exec, exec, s[4:5] 3104; CGP-NEXT: s_cbranch_execz BB8_4 3105; CGP-NEXT: ; %bb.3: 3106; CGP-NEXT: v_cvt_f32_u32_e32 v0, v10 3107; CGP-NEXT: v_sub_i32_e32 v1, vcc, 0, v10 3108; CGP-NEXT: v_rcp_iflag_f32_e32 v0, v0 3109; CGP-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v0 3110; CGP-NEXT: v_cvt_u32_f32_e32 v0, v0 3111; CGP-NEXT: v_mul_lo_u32 v1, v1, v0 3112; CGP-NEXT: v_mul_hi_u32 v1, v0, v1 3113; CGP-NEXT: v_add_i32_e32 v0, vcc, v0, v1 3114; CGP-NEXT: v_mul_hi_u32 v0, v5, v0 3115; CGP-NEXT: v_mul_lo_u32 v0, v0, v10 3116; CGP-NEXT: v_sub_i32_e32 v0, vcc, v5, v0 3117; CGP-NEXT: v_sub_i32_e32 v1, vcc, v0, v10 3118; CGP-NEXT: v_cmp_ge_u32_e32 vcc, v0, v10 3119; CGP-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc 3120; CGP-NEXT: v_sub_i32_e32 v1, vcc, v0, v10 3121; CGP-NEXT: v_cmp_ge_u32_e32 vcc, v0, v10 3122; CGP-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc 3123; CGP-NEXT: v_mov_b32_e32 v1, 0 3124; CGP-NEXT: BB8_4: 3125; CGP-NEXT: s_or_b64 exec, exec, s[4:5] 3126; CGP-NEXT: v_or_b32_e32 v5, v3, v9 3127; CGP-NEXT: v_mov_b32_e32 v4, 0 3128; CGP-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[4:5] 3129; CGP-NEXT: ; implicit-def: $vgpr4_vgpr5 3130; CGP-NEXT: s_and_saveexec_b64 s[4:5], vcc 3131; CGP-NEXT: s_xor_b64 s[6:7], exec, s[4:5] 3132; CGP-NEXT: s_cbranch_execz BB8_6 3133; CGP-NEXT: ; %bb.5: 3134; CGP-NEXT: v_ashrrev_i32_e32 v4, 31, v9 3135; CGP-NEXT: v_add_i32_e32 v5, vcc, v8, v4 3136; CGP-NEXT: v_addc_u32_e32 v6, vcc, v9, v4, vcc 3137; CGP-NEXT: v_xor_b32_e32 v5, v5, v4 3138; CGP-NEXT: v_xor_b32_e32 v4, v6, v4 3139; CGP-NEXT: v_cvt_f32_u32_e32 v6, v5 3140; CGP-NEXT: v_cvt_f32_u32_e32 v7, v4 3141; CGP-NEXT: v_ashrrev_i32_e32 v9, 31, v3 3142; CGP-NEXT: v_mac_f32_e32 v6, 0x4f800000, v7 3143; CGP-NEXT: v_rcp_iflag_f32_e32 v6, v6 3144; CGP-NEXT: v_add_i32_e32 v7, vcc, v2, v9 3145; CGP-NEXT: v_addc_u32_e32 v3, vcc, v3, v9, vcc 3146; CGP-NEXT: v_sub_i32_e32 v11, vcc, 0, v5 3147; CGP-NEXT: v_mul_f32_e32 v6, 0x5f7ffffc, v6 3148; CGP-NEXT: v_mul_f32_e32 v10, 0x2f800000, v6 3149; CGP-NEXT: v_trunc_f32_e32 v10, v10 3150; CGP-NEXT: v_mac_f32_e32 v6, 0xcf800000, v10 3151; CGP-NEXT: v_cvt_u32_f32_e32 v6, v6 3152; CGP-NEXT: v_cvt_u32_f32_e32 v10, v10 3153; CGP-NEXT: v_subb_u32_e32 v12, vcc, 0, v4, vcc 3154; CGP-NEXT: v_xor_b32_e32 v7, v7, v9 3155; CGP-NEXT: v_mul_lo_u32 v13, v12, v6 3156; CGP-NEXT: v_mul_lo_u32 v14, v11, v10 3157; CGP-NEXT: v_mul_hi_u32 v16, v11, v6 3158; CGP-NEXT: v_mul_lo_u32 v15, v11, v6 3159; CGP-NEXT: v_xor_b32_e32 v3, v3, v9 3160; CGP-NEXT: v_add_i32_e32 v13, vcc, v13, v14 3161; CGP-NEXT: v_add_i32_e32 v13, vcc, v13, v16 3162; CGP-NEXT: v_mul_lo_u32 v14, v10, v15 3163; CGP-NEXT: v_mul_lo_u32 v16, v6, v13 3164; CGP-NEXT: v_mul_hi_u32 v17, v6, v15 3165; CGP-NEXT: v_mul_hi_u32 v15, v10, v15 3166; CGP-NEXT: v_add_i32_e32 v14, vcc, v14, v16 3167; CGP-NEXT: v_cndmask_b32_e64 v16, 0, 1, vcc 3168; CGP-NEXT: v_add_i32_e32 v14, vcc, v14, v17 3169; CGP-NEXT: v_cndmask_b32_e64 v14, 0, 1, vcc 3170; CGP-NEXT: v_mul_lo_u32 v17, v10, v13 3171; CGP-NEXT: v_add_i32_e32 v14, vcc, v16, v14 3172; CGP-NEXT: v_mul_hi_u32 v16, v6, v13 3173; CGP-NEXT: v_mul_hi_u32 v13, v10, v13 3174; CGP-NEXT: v_add_i32_e32 v15, vcc, v17, v15 3175; CGP-NEXT: v_cndmask_b32_e64 v17, 0, 1, vcc 3176; CGP-NEXT: v_add_i32_e32 v15, vcc, v15, v16 3177; CGP-NEXT: v_cndmask_b32_e64 v16, 0, 1, vcc 3178; CGP-NEXT: v_add_i32_e32 v16, vcc, v17, v16 3179; CGP-NEXT: v_add_i32_e32 v14, vcc, v15, v14 3180; CGP-NEXT: v_cndmask_b32_e64 v15, 0, 1, vcc 3181; CGP-NEXT: v_add_i32_e32 v15, vcc, v16, v15 3182; CGP-NEXT: v_add_i32_e32 v13, vcc, v13, v15 3183; CGP-NEXT: v_add_i32_e32 v6, vcc, v6, v14 3184; CGP-NEXT: v_addc_u32_e64 v14, s[4:5], v10, v13, vcc 3185; CGP-NEXT: v_mul_lo_u32 v12, v12, v6 3186; CGP-NEXT: v_mul_lo_u32 v15, v11, v14 3187; CGP-NEXT: v_mul_lo_u32 v16, v11, v6 3188; CGP-NEXT: v_mul_hi_u32 v11, v11, v6 3189; CGP-NEXT: v_add_i32_e64 v10, s[4:5], v10, v13 3190; CGP-NEXT: v_add_i32_e64 v12, s[4:5], v12, v15 3191; CGP-NEXT: v_mul_hi_u32 v13, v6, v16 3192; CGP-NEXT: v_add_i32_e64 v11, s[4:5], v12, v11 3193; CGP-NEXT: v_mul_lo_u32 v12, v14, v16 3194; CGP-NEXT: v_mul_lo_u32 v15, v6, v11 3195; CGP-NEXT: v_mul_hi_u32 v16, v14, v16 3196; CGP-NEXT: v_add_i32_e64 v12, s[4:5], v12, v15 3197; CGP-NEXT: v_cndmask_b32_e64 v15, 0, 1, s[4:5] 3198; CGP-NEXT: v_add_i32_e64 v12, s[4:5], v12, v13 3199; CGP-NEXT: v_cndmask_b32_e64 v12, 0, 1, s[4:5] 3200; CGP-NEXT: v_mul_lo_u32 v13, v14, v11 3201; CGP-NEXT: v_add_i32_e64 v12, s[4:5], v15, v12 3202; CGP-NEXT: v_mul_hi_u32 v15, v6, v11 3203; CGP-NEXT: v_mul_hi_u32 v11, v14, v11 3204; CGP-NEXT: v_add_i32_e64 v13, s[4:5], v13, v16 3205; CGP-NEXT: v_cndmask_b32_e64 v16, 0, 1, s[4:5] 3206; CGP-NEXT: v_add_i32_e64 v13, s[4:5], v13, v15 3207; CGP-NEXT: v_cndmask_b32_e64 v15, 0, 1, s[4:5] 3208; CGP-NEXT: v_add_i32_e64 v15, s[4:5], v16, v15 3209; CGP-NEXT: v_add_i32_e64 v12, s[4:5], v13, v12 3210; CGP-NEXT: v_cndmask_b32_e64 v13, 0, 1, s[4:5] 3211; CGP-NEXT: v_add_i32_e64 v13, s[4:5], v15, v13 3212; CGP-NEXT: v_add_i32_e64 v11, s[4:5], v11, v13 3213; CGP-NEXT: v_addc_u32_e32 v10, vcc, v10, v11, vcc 3214; CGP-NEXT: v_add_i32_e32 v6, vcc, v6, v12 3215; CGP-NEXT: v_addc_u32_e32 v10, vcc, 0, v10, vcc 3216; CGP-NEXT: v_mul_lo_u32 v11, v3, v6 3217; CGP-NEXT: v_mul_lo_u32 v12, v7, v10 3218; CGP-NEXT: v_mul_hi_u32 v13, v7, v6 3219; CGP-NEXT: v_mul_hi_u32 v6, v3, v6 3220; CGP-NEXT: v_add_i32_e32 v11, vcc, v11, v12 3221; CGP-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc 3222; CGP-NEXT: v_add_i32_e32 v11, vcc, v11, v13 3223; CGP-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc 3224; CGP-NEXT: v_mul_lo_u32 v13, v3, v10 3225; CGP-NEXT: v_add_i32_e32 v11, vcc, v12, v11 3226; CGP-NEXT: v_mul_hi_u32 v12, v7, v10 3227; CGP-NEXT: v_mul_hi_u32 v10, v3, v10 3228; CGP-NEXT: v_add_i32_e32 v6, vcc, v13, v6 3229; CGP-NEXT: v_cndmask_b32_e64 v13, 0, 1, vcc 3230; CGP-NEXT: v_add_i32_e32 v6, vcc, v6, v12 3231; CGP-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc 3232; CGP-NEXT: v_add_i32_e32 v12, vcc, v13, v12 3233; CGP-NEXT: v_add_i32_e32 v6, vcc, v6, v11 3234; CGP-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc 3235; CGP-NEXT: v_add_i32_e32 v11, vcc, v12, v11 3236; CGP-NEXT: v_add_i32_e32 v10, vcc, v10, v11 3237; CGP-NEXT: v_mul_lo_u32 v11, v4, v6 3238; CGP-NEXT: v_mul_lo_u32 v10, v5, v10 3239; CGP-NEXT: v_mul_lo_u32 v12, v5, v6 3240; CGP-NEXT: v_mul_hi_u32 v6, v5, v6 3241; CGP-NEXT: v_add_i32_e32 v10, vcc, v11, v10 3242; CGP-NEXT: v_add_i32_e32 v6, vcc, v10, v6 3243; CGP-NEXT: v_sub_i32_e32 v7, vcc, v7, v12 3244; CGP-NEXT: v_subb_u32_e64 v10, s[4:5], v3, v6, vcc 3245; CGP-NEXT: v_sub_i32_e64 v3, s[4:5], v3, v6 3246; CGP-NEXT: v_cmp_ge_u32_e64 s[4:5], v10, v4 3247; CGP-NEXT: v_cndmask_b32_e64 v6, 0, -1, s[4:5] 3248; CGP-NEXT: v_cmp_ge_u32_e64 s[4:5], v7, v5 3249; CGP-NEXT: v_cndmask_b32_e64 v11, 0, -1, s[4:5] 3250; CGP-NEXT: v_cmp_eq_u32_e64 s[4:5], v10, v4 3251; CGP-NEXT: v_subb_u32_e32 v3, vcc, v3, v4, vcc 3252; CGP-NEXT: v_cndmask_b32_e64 v6, v6, v11, s[4:5] 3253; CGP-NEXT: v_sub_i32_e32 v11, vcc, v7, v5 3254; CGP-NEXT: v_subbrev_u32_e64 v12, s[4:5], 0, v3, vcc 3255; CGP-NEXT: v_cmp_ge_u32_e64 s[4:5], v12, v4 3256; CGP-NEXT: v_cndmask_b32_e64 v13, 0, -1, s[4:5] 3257; CGP-NEXT: v_cmp_ge_u32_e64 s[4:5], v11, v5 3258; CGP-NEXT: v_subb_u32_e32 v3, vcc, v3, v4, vcc 3259; CGP-NEXT: v_cndmask_b32_e64 v14, 0, -1, s[4:5] 3260; CGP-NEXT: v_cmp_eq_u32_e64 s[4:5], v12, v4 3261; CGP-NEXT: v_sub_i32_e32 v4, vcc, v11, v5 3262; CGP-NEXT: v_cndmask_b32_e64 v13, v13, v14, s[4:5] 3263; CGP-NEXT: v_subbrev_u32_e32 v3, vcc, 0, v3, vcc 3264; CGP-NEXT: v_cmp_ne_u32_e32 vcc, 0, v13 3265; CGP-NEXT: v_cndmask_b32_e32 v4, v11, v4, vcc 3266; CGP-NEXT: v_cndmask_b32_e32 v3, v12, v3, vcc 3267; CGP-NEXT: v_cmp_ne_u32_e32 vcc, 0, v6 3268; CGP-NEXT: v_cndmask_b32_e32 v4, v7, v4, vcc 3269; CGP-NEXT: v_cndmask_b32_e32 v3, v10, v3, vcc 3270; CGP-NEXT: v_xor_b32_e32 v4, v4, v9 3271; CGP-NEXT: v_xor_b32_e32 v3, v3, v9 3272; CGP-NEXT: v_sub_i32_e32 v4, vcc, v4, v9 3273; CGP-NEXT: v_subb_u32_e32 v5, vcc, v3, v9, vcc 3274; CGP-NEXT: BB8_6: ; %Flow 3275; CGP-NEXT: s_or_saveexec_b64 s[4:5], s[6:7] 3276; CGP-NEXT: s_xor_b64 exec, exec, s[4:5] 3277; CGP-NEXT: s_cbranch_execz BB8_8 3278; CGP-NEXT: ; %bb.7: 3279; CGP-NEXT: v_cvt_f32_u32_e32 v3, v8 3280; CGP-NEXT: v_sub_i32_e32 v4, vcc, 0, v8 3281; CGP-NEXT: v_mov_b32_e32 v5, 0 3282; CGP-NEXT: v_rcp_iflag_f32_e32 v3, v3 3283; CGP-NEXT: v_mul_f32_e32 v3, 0x4f7ffffe, v3 3284; CGP-NEXT: v_cvt_u32_f32_e32 v3, v3 3285; CGP-NEXT: v_mul_lo_u32 v4, v4, v3 3286; CGP-NEXT: v_mul_hi_u32 v4, v3, v4 3287; CGP-NEXT: v_add_i32_e32 v3, vcc, v3, v4 3288; CGP-NEXT: v_mul_hi_u32 v3, v2, v3 3289; CGP-NEXT: v_mul_lo_u32 v3, v3, v8 3290; CGP-NEXT: v_sub_i32_e32 v2, vcc, v2, v3 3291; CGP-NEXT: v_sub_i32_e32 v3, vcc, v2, v8 3292; CGP-NEXT: v_cmp_ge_u32_e32 vcc, v2, v8 3293; CGP-NEXT: v_cndmask_b32_e32 v2, v2, v3, vcc 3294; CGP-NEXT: v_sub_i32_e32 v3, vcc, v2, v8 3295; CGP-NEXT: v_cmp_ge_u32_e32 vcc, v2, v8 3296; CGP-NEXT: v_cndmask_b32_e32 v4, v2, v3, vcc 3297; CGP-NEXT: BB8_8: 3298; CGP-NEXT: s_or_b64 exec, exec, s[4:5] 3299; CGP-NEXT: v_mov_b32_e32 v2, v4 3300; CGP-NEXT: v_mov_b32_e32 v3, v5 3301; CGP-NEXT: s_setpc_b64 s[30:31] 3302 %shl.y = shl <2 x i64> <i64 4096, i64 4096>, %y 3303 %r = srem <2 x i64> %x, %shl.y 3304 ret <2 x i64> %r 3305} 3306 3307define i64 @v_srem_i64_24bit(i64 %num, i64 %den) { 3308; GISEL-LABEL: v_srem_i64_24bit: 3309; GISEL: ; %bb.0: 3310; GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 3311; GISEL-NEXT: s_mov_b32 s4, 0xffffff 3312; GISEL-NEXT: v_and_b32_e32 v1, s4, v2 3313; GISEL-NEXT: v_cvt_f32_u32_e32 v2, v1 3314; GISEL-NEXT: v_sub_i32_e32 v3, vcc, 0, v1 3315; GISEL-NEXT: v_and_b32_e32 v0, s4, v0 3316; GISEL-NEXT: v_rcp_iflag_f32_e32 v2, v2 3317; GISEL-NEXT: v_mul_f32_e32 v2, 0x4f7ffffe, v2 3318; GISEL-NEXT: v_cvt_u32_f32_e32 v2, v2 3319; GISEL-NEXT: v_mul_lo_u32 v3, v3, v2 3320; GISEL-NEXT: v_mul_hi_u32 v3, v2, v3 3321; GISEL-NEXT: v_add_i32_e32 v2, vcc, v2, v3 3322; GISEL-NEXT: v_mul_hi_u32 v2, v0, v2 3323; GISEL-NEXT: v_mul_lo_u32 v2, v2, v1 3324; GISEL-NEXT: v_sub_i32_e32 v0, vcc, v0, v2 3325; GISEL-NEXT: v_sub_i32_e32 v2, vcc, v0, v1 3326; GISEL-NEXT: v_cmp_ge_u32_e32 vcc, v0, v1 3327; GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc 3328; GISEL-NEXT: v_sub_i32_e32 v2, vcc, v0, v1 3329; GISEL-NEXT: v_cmp_ge_u32_e32 vcc, v0, v1 3330; GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc 3331; GISEL-NEXT: v_mov_b32_e32 v1, 0 3332; GISEL-NEXT: s_setpc_b64 s[30:31] 3333; 3334; CGP-LABEL: v_srem_i64_24bit: 3335; CGP: ; %bb.0: 3336; CGP-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 3337; CGP-NEXT: s_mov_b32 s4, 0xffffff 3338; CGP-NEXT: v_and_b32_e32 v1, s4, v2 3339; CGP-NEXT: v_cvt_f32_i32_e32 v2, v1 3340; CGP-NEXT: v_and_b32_e32 v0, s4, v0 3341; CGP-NEXT: v_cvt_f32_i32_e32 v3, v0 3342; CGP-NEXT: v_rcp_f32_e32 v4, v2 3343; CGP-NEXT: v_mul_f32_e32 v4, v3, v4 3344; CGP-NEXT: v_trunc_f32_e32 v4, v4 3345; CGP-NEXT: v_mad_f32 v3, -v4, v2, v3 3346; CGP-NEXT: v_cvt_i32_f32_e32 v4, v4 3347; CGP-NEXT: v_cmp_ge_f32_e64 s[4:5], |v3|, |v2| 3348; CGP-NEXT: v_cndmask_b32_e64 v2, 0, 1, s[4:5] 3349; CGP-NEXT: v_add_i32_e32 v2, vcc, v4, v2 3350; CGP-NEXT: v_mul_lo_u32 v1, v2, v1 3351; CGP-NEXT: v_sub_i32_e32 v0, vcc, v0, v1 3352; CGP-NEXT: v_bfe_i32 v0, v0, 0, 25 3353; CGP-NEXT: v_ashrrev_i32_e32 v1, 31, v0 3354; CGP-NEXT: s_setpc_b64 s[30:31] 3355 %num.mask = and i64 %num, 16777215 3356 %den.mask = and i64 %den, 16777215 3357 %result = srem i64 %num.mask, %den.mask 3358 ret i64 %result 3359} 3360 3361define <2 x i64> @v_srem_v2i64_24bit(<2 x i64> %num, <2 x i64> %den) { 3362; GISEL-LABEL: v_srem_v2i64_24bit: 3363; GISEL: ; %bb.0: 3364; GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 3365; GISEL-NEXT: s_mov_b32 s6, 0xffffff 3366; GISEL-NEXT: v_and_b32_e32 v1, s6, v4 3367; GISEL-NEXT: v_add_i32_e32 v1, vcc, 0, v1 3368; GISEL-NEXT: v_addc_u32_e64 v3, s[4:5], 0, 0, vcc 3369; GISEL-NEXT: v_cvt_f32_u32_e32 v4, v1 3370; GISEL-NEXT: v_cvt_f32_u32_e32 v5, v3 3371; GISEL-NEXT: v_sub_i32_e32 v7, vcc, 0, v1 3372; GISEL-NEXT: v_subb_u32_e32 v8, vcc, 0, v3, vcc 3373; GISEL-NEXT: v_and_b32_e32 v0, s6, v0 3374; GISEL-NEXT: v_mac_f32_e32 v4, 0x4f800000, v5 3375; GISEL-NEXT: v_rcp_iflag_f32_e32 v4, v4 3376; GISEL-NEXT: v_and_b32_e32 v6, s6, v6 3377; GISEL-NEXT: v_and_b32_e32 v2, s6, v2 3378; GISEL-NEXT: v_mul_f32_e32 v4, 0x5f7ffffc, v4 3379; GISEL-NEXT: v_mul_f32_e32 v5, 0x2f800000, v4 3380; GISEL-NEXT: v_trunc_f32_e32 v5, v5 3381; GISEL-NEXT: v_mac_f32_e32 v4, 0xcf800000, v5 3382; GISEL-NEXT: v_cvt_u32_f32_e32 v4, v4 3383; GISEL-NEXT: v_cvt_u32_f32_e32 v5, v5 3384; GISEL-NEXT: v_mul_lo_u32 v9, v8, v4 3385; GISEL-NEXT: v_mul_lo_u32 v10, v7, v5 3386; GISEL-NEXT: v_mul_hi_u32 v12, v7, v4 3387; GISEL-NEXT: v_mul_lo_u32 v11, v7, v4 3388; GISEL-NEXT: v_add_i32_e32 v9, vcc, v9, v10 3389; GISEL-NEXT: v_add_i32_e32 v9, vcc, v9, v12 3390; GISEL-NEXT: v_mul_lo_u32 v10, v5, v11 3391; GISEL-NEXT: v_mul_lo_u32 v12, v4, v9 3392; GISEL-NEXT: v_mul_hi_u32 v14, v4, v11 3393; GISEL-NEXT: v_add_i32_e32 v0, vcc, 0, v0 3394; GISEL-NEXT: v_addc_u32_e64 v13, s[4:5], 0, 0, vcc 3395; GISEL-NEXT: v_add_i32_e32 v10, vcc, v10, v12 3396; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc 3397; GISEL-NEXT: v_add_i32_e32 v10, vcc, v10, v14 3398; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 3399; GISEL-NEXT: v_mul_lo_u32 v14, v5, v9 3400; GISEL-NEXT: v_mul_hi_u32 v11, v5, v11 3401; GISEL-NEXT: v_add_i32_e32 v10, vcc, v12, v10 3402; GISEL-NEXT: v_mul_hi_u32 v12, v4, v9 3403; GISEL-NEXT: v_mul_hi_u32 v9, v5, v9 3404; GISEL-NEXT: v_add_i32_e32 v11, vcc, v14, v11 3405; GISEL-NEXT: v_cndmask_b32_e64 v14, 0, 1, vcc 3406; GISEL-NEXT: v_add_i32_e32 v11, vcc, v11, v12 3407; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc 3408; GISEL-NEXT: v_add_i32_e32 v12, vcc, v14, v12 3409; GISEL-NEXT: v_add_i32_e32 v10, vcc, v11, v10 3410; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc 3411; GISEL-NEXT: v_add_i32_e32 v11, vcc, v12, v11 3412; GISEL-NEXT: v_add_i32_e32 v9, vcc, v9, v11 3413; GISEL-NEXT: v_add_i32_e32 v4, vcc, v4, v10 3414; GISEL-NEXT: v_addc_u32_e64 v10, s[4:5], v5, v9, vcc 3415; GISEL-NEXT: v_mul_lo_u32 v8, v8, v4 3416; GISEL-NEXT: v_mul_lo_u32 v11, v7, v10 3417; GISEL-NEXT: v_mul_lo_u32 v12, v7, v4 3418; GISEL-NEXT: v_mul_hi_u32 v7, v7, v4 3419; GISEL-NEXT: v_add_i32_e64 v5, s[4:5], v5, v9 3420; GISEL-NEXT: v_add_i32_e64 v8, s[4:5], v8, v11 3421; GISEL-NEXT: v_mul_hi_u32 v9, v4, v12 3422; GISEL-NEXT: v_add_i32_e64 v7, s[4:5], v8, v7 3423; GISEL-NEXT: v_mul_lo_u32 v8, v10, v12 3424; GISEL-NEXT: v_mul_lo_u32 v11, v4, v7 3425; GISEL-NEXT: v_mul_hi_u32 v12, v10, v12 3426; GISEL-NEXT: v_add_i32_e64 v8, s[4:5], v8, v11 3427; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, 1, s[4:5] 3428; GISEL-NEXT: v_add_i32_e64 v8, s[4:5], v8, v9 3429; GISEL-NEXT: v_cndmask_b32_e64 v8, 0, 1, s[4:5] 3430; GISEL-NEXT: v_mul_lo_u32 v9, v10, v7 3431; GISEL-NEXT: v_add_i32_e64 v8, s[4:5], v11, v8 3432; GISEL-NEXT: v_mul_hi_u32 v11, v4, v7 3433; GISEL-NEXT: v_mul_hi_u32 v7, v10, v7 3434; GISEL-NEXT: v_add_i32_e64 v9, s[4:5], v9, v12 3435; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, s[4:5] 3436; GISEL-NEXT: v_add_i32_e64 v9, s[4:5], v9, v11 3437; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, 1, s[4:5] 3438; GISEL-NEXT: v_add_i32_e64 v11, s[4:5], v12, v11 3439; GISEL-NEXT: v_add_i32_e64 v8, s[4:5], v9, v8 3440; GISEL-NEXT: v_cndmask_b32_e64 v9, 0, 1, s[4:5] 3441; GISEL-NEXT: v_add_i32_e64 v9, s[4:5], v11, v9 3442; GISEL-NEXT: v_add_i32_e64 v7, s[4:5], v7, v9 3443; GISEL-NEXT: v_addc_u32_e32 v5, vcc, v5, v7, vcc 3444; GISEL-NEXT: v_add_i32_e32 v4, vcc, v4, v8 3445; GISEL-NEXT: v_addc_u32_e32 v5, vcc, 0, v5, vcc 3446; GISEL-NEXT: v_mul_lo_u32 v7, v13, v4 3447; GISEL-NEXT: v_mul_lo_u32 v8, v0, v5 3448; GISEL-NEXT: v_mul_hi_u32 v9, v0, v4 3449; GISEL-NEXT: v_mul_hi_u32 v4, v13, v4 3450; GISEL-NEXT: v_add_i32_e32 v7, vcc, v7, v8 3451; GISEL-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc 3452; GISEL-NEXT: v_add_i32_e32 v7, vcc, v7, v9 3453; GISEL-NEXT: v_cndmask_b32_e64 v7, 0, 1, vcc 3454; GISEL-NEXT: v_mul_lo_u32 v9, v13, v5 3455; GISEL-NEXT: v_add_i32_e32 v7, vcc, v8, v7 3456; GISEL-NEXT: v_mul_hi_u32 v8, v0, v5 3457; GISEL-NEXT: v_mul_hi_u32 v5, v13, v5 3458; GISEL-NEXT: v_add_i32_e32 v4, vcc, v9, v4 3459; GISEL-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc 3460; GISEL-NEXT: v_add_i32_e32 v4, vcc, v4, v8 3461; GISEL-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc 3462; GISEL-NEXT: v_add_i32_e32 v8, vcc, v9, v8 3463; GISEL-NEXT: v_add_i32_e32 v4, vcc, v4, v7 3464; GISEL-NEXT: v_cndmask_b32_e64 v7, 0, 1, vcc 3465; GISEL-NEXT: v_add_i32_e32 v7, vcc, v8, v7 3466; GISEL-NEXT: v_add_i32_e32 v5, vcc, v5, v7 3467; GISEL-NEXT: v_mul_lo_u32 v7, v3, v4 3468; GISEL-NEXT: v_mul_lo_u32 v5, v1, v5 3469; GISEL-NEXT: v_mul_lo_u32 v8, v1, v4 3470; GISEL-NEXT: v_mul_hi_u32 v4, v1, v4 3471; GISEL-NEXT: v_add_i32_e32 v5, vcc, v7, v5 3472; GISEL-NEXT: v_add_i32_e32 v4, vcc, v5, v4 3473; GISEL-NEXT: v_sub_i32_e32 v0, vcc, v0, v8 3474; GISEL-NEXT: v_subb_u32_e64 v5, s[4:5], v13, v4, vcc 3475; GISEL-NEXT: v_sub_i32_e64 v4, s[4:5], v13, v4 3476; GISEL-NEXT: v_cmp_ge_u32_e64 s[4:5], v5, v3 3477; GISEL-NEXT: v_cndmask_b32_e64 v7, 0, -1, s[4:5] 3478; GISEL-NEXT: v_cmp_ge_u32_e64 s[4:5], v0, v1 3479; GISEL-NEXT: v_cndmask_b32_e64 v8, 0, -1, s[4:5] 3480; GISEL-NEXT: v_cmp_eq_u32_e64 s[4:5], v5, v3 3481; GISEL-NEXT: v_subb_u32_e32 v4, vcc, v4, v3, vcc 3482; GISEL-NEXT: v_cndmask_b32_e64 v7, v7, v8, s[4:5] 3483; GISEL-NEXT: v_sub_i32_e32 v8, vcc, v0, v1 3484; GISEL-NEXT: v_subbrev_u32_e64 v9, s[4:5], 0, v4, vcc 3485; GISEL-NEXT: v_cmp_ge_u32_e64 s[4:5], v9, v3 3486; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, -1, s[4:5] 3487; GISEL-NEXT: v_cmp_ge_u32_e64 s[4:5], v8, v1 3488; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, -1, s[4:5] 3489; GISEL-NEXT: v_cmp_eq_u32_e64 s[4:5], v9, v3 3490; GISEL-NEXT: v_subb_u32_e32 v3, vcc, v4, v3, vcc 3491; GISEL-NEXT: v_sub_i32_e32 v1, vcc, v8, v1 3492; GISEL-NEXT: v_subbrev_u32_e32 v3, vcc, 0, v3, vcc 3493; GISEL-NEXT: v_add_i32_e32 v4, vcc, 0, v6 3494; GISEL-NEXT: v_cndmask_b32_e64 v10, v10, v11, s[4:5] 3495; GISEL-NEXT: v_addc_u32_e64 v6, s[4:5], 0, 0, vcc 3496; GISEL-NEXT: v_cvt_f32_u32_e32 v11, v4 3497; GISEL-NEXT: v_cvt_f32_u32_e32 v12, v6 3498; GISEL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v10 3499; GISEL-NEXT: v_cndmask_b32_e32 v1, v8, v1, vcc 3500; GISEL-NEXT: v_cndmask_b32_e32 v3, v9, v3, vcc 3501; GISEL-NEXT: v_mac_f32_e32 v11, 0x4f800000, v12 3502; GISEL-NEXT: v_rcp_iflag_f32_e32 v8, v11 3503; GISEL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v7 3504; GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc 3505; GISEL-NEXT: v_cndmask_b32_e32 v1, v5, v3, vcc 3506; GISEL-NEXT: v_mul_f32_e32 v3, 0x5f7ffffc, v8 3507; GISEL-NEXT: v_mul_f32_e32 v5, 0x2f800000, v3 3508; GISEL-NEXT: v_trunc_f32_e32 v5, v5 3509; GISEL-NEXT: v_mac_f32_e32 v3, 0xcf800000, v5 3510; GISEL-NEXT: v_cvt_u32_f32_e32 v3, v3 3511; GISEL-NEXT: v_cvt_u32_f32_e32 v5, v5 3512; GISEL-NEXT: v_sub_i32_e32 v7, vcc, 0, v4 3513; GISEL-NEXT: v_subb_u32_e32 v8, vcc, 0, v6, vcc 3514; GISEL-NEXT: v_mul_lo_u32 v9, v8, v3 3515; GISEL-NEXT: v_mul_lo_u32 v10, v7, v5 3516; GISEL-NEXT: v_mul_hi_u32 v12, v7, v3 3517; GISEL-NEXT: v_mul_lo_u32 v11, v7, v3 3518; GISEL-NEXT: v_add_i32_e32 v9, vcc, v9, v10 3519; GISEL-NEXT: v_add_i32_e32 v9, vcc, v9, v12 3520; GISEL-NEXT: v_mul_lo_u32 v10, v5, v11 3521; GISEL-NEXT: v_mul_lo_u32 v12, v3, v9 3522; GISEL-NEXT: v_mul_hi_u32 v14, v3, v11 3523; GISEL-NEXT: v_add_i32_e32 v2, vcc, 0, v2 3524; GISEL-NEXT: v_addc_u32_e64 v13, s[4:5], 0, 0, vcc 3525; GISEL-NEXT: v_add_i32_e32 v10, vcc, v10, v12 3526; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc 3527; GISEL-NEXT: v_add_i32_e32 v10, vcc, v10, v14 3528; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 3529; GISEL-NEXT: v_mul_lo_u32 v14, v5, v9 3530; GISEL-NEXT: v_mul_hi_u32 v11, v5, v11 3531; GISEL-NEXT: v_add_i32_e32 v10, vcc, v12, v10 3532; GISEL-NEXT: v_mul_hi_u32 v12, v3, v9 3533; GISEL-NEXT: v_mul_hi_u32 v9, v5, v9 3534; GISEL-NEXT: v_add_i32_e32 v11, vcc, v14, v11 3535; GISEL-NEXT: v_cndmask_b32_e64 v14, 0, 1, vcc 3536; GISEL-NEXT: v_add_i32_e32 v11, vcc, v11, v12 3537; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc 3538; GISEL-NEXT: v_add_i32_e32 v12, vcc, v14, v12 3539; GISEL-NEXT: v_add_i32_e32 v10, vcc, v11, v10 3540; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc 3541; GISEL-NEXT: v_add_i32_e32 v11, vcc, v12, v11 3542; GISEL-NEXT: v_add_i32_e32 v9, vcc, v9, v11 3543; GISEL-NEXT: v_add_i32_e32 v3, vcc, v3, v10 3544; GISEL-NEXT: v_addc_u32_e64 v10, s[4:5], v5, v9, vcc 3545; GISEL-NEXT: v_mul_lo_u32 v8, v8, v3 3546; GISEL-NEXT: v_mul_lo_u32 v11, v7, v10 3547; GISEL-NEXT: v_mul_lo_u32 v12, v7, v3 3548; GISEL-NEXT: v_mul_hi_u32 v7, v7, v3 3549; GISEL-NEXT: v_add_i32_e64 v5, s[4:5], v5, v9 3550; GISEL-NEXT: v_add_i32_e64 v8, s[4:5], v8, v11 3551; GISEL-NEXT: v_mul_hi_u32 v9, v3, v12 3552; GISEL-NEXT: v_add_i32_e64 v7, s[4:5], v8, v7 3553; GISEL-NEXT: v_mul_lo_u32 v8, v10, v12 3554; GISEL-NEXT: v_mul_lo_u32 v11, v3, v7 3555; GISEL-NEXT: v_mul_hi_u32 v12, v10, v12 3556; GISEL-NEXT: v_add_i32_e64 v8, s[4:5], v8, v11 3557; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, 1, s[4:5] 3558; GISEL-NEXT: v_add_i32_e64 v8, s[4:5], v8, v9 3559; GISEL-NEXT: v_cndmask_b32_e64 v8, 0, 1, s[4:5] 3560; GISEL-NEXT: v_mul_lo_u32 v9, v10, v7 3561; GISEL-NEXT: v_add_i32_e64 v8, s[4:5], v11, v8 3562; GISEL-NEXT: v_mul_hi_u32 v11, v3, v7 3563; GISEL-NEXT: v_mul_hi_u32 v7, v10, v7 3564; GISEL-NEXT: v_add_i32_e64 v9, s[4:5], v9, v12 3565; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, s[4:5] 3566; GISEL-NEXT: v_add_i32_e64 v9, s[4:5], v9, v11 3567; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, 1, s[4:5] 3568; GISEL-NEXT: v_add_i32_e64 v11, s[4:5], v12, v11 3569; GISEL-NEXT: v_add_i32_e64 v8, s[4:5], v9, v8 3570; GISEL-NEXT: v_cndmask_b32_e64 v9, 0, 1, s[4:5] 3571; GISEL-NEXT: v_add_i32_e64 v9, s[4:5], v11, v9 3572; GISEL-NEXT: v_add_i32_e64 v7, s[4:5], v7, v9 3573; GISEL-NEXT: v_addc_u32_e32 v5, vcc, v5, v7, vcc 3574; GISEL-NEXT: v_add_i32_e32 v3, vcc, v3, v8 3575; GISEL-NEXT: v_addc_u32_e32 v5, vcc, 0, v5, vcc 3576; GISEL-NEXT: v_mul_lo_u32 v7, v13, v3 3577; GISEL-NEXT: v_mul_lo_u32 v8, v2, v5 3578; GISEL-NEXT: v_mul_hi_u32 v9, v2, v3 3579; GISEL-NEXT: v_subrev_i32_e32 v0, vcc, 0, v0 3580; GISEL-NEXT: v_subbrev_u32_e32 v1, vcc, 0, v1, vcc 3581; GISEL-NEXT: v_add_i32_e32 v7, vcc, v7, v8 3582; GISEL-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc 3583; GISEL-NEXT: v_add_i32_e32 v7, vcc, v7, v9 3584; GISEL-NEXT: v_cndmask_b32_e64 v7, 0, 1, vcc 3585; GISEL-NEXT: v_mul_lo_u32 v9, v13, v5 3586; GISEL-NEXT: v_mul_hi_u32 v3, v13, v3 3587; GISEL-NEXT: v_add_i32_e32 v7, vcc, v8, v7 3588; GISEL-NEXT: v_mul_hi_u32 v8, v2, v5 3589; GISEL-NEXT: v_mul_hi_u32 v5, v13, v5 3590; GISEL-NEXT: v_add_i32_e32 v3, vcc, v9, v3 3591; GISEL-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc 3592; GISEL-NEXT: v_add_i32_e32 v3, vcc, v3, v8 3593; GISEL-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc 3594; GISEL-NEXT: v_add_i32_e32 v8, vcc, v9, v8 3595; GISEL-NEXT: v_add_i32_e32 v3, vcc, v3, v7 3596; GISEL-NEXT: v_cndmask_b32_e64 v7, 0, 1, vcc 3597; GISEL-NEXT: v_add_i32_e32 v7, vcc, v8, v7 3598; GISEL-NEXT: v_add_i32_e32 v5, vcc, v5, v7 3599; GISEL-NEXT: v_mul_lo_u32 v7, v6, v3 3600; GISEL-NEXT: v_mul_lo_u32 v5, v4, v5 3601; GISEL-NEXT: v_mul_lo_u32 v8, v4, v3 3602; GISEL-NEXT: v_mul_hi_u32 v3, v4, v3 3603; GISEL-NEXT: v_add_i32_e32 v5, vcc, v7, v5 3604; GISEL-NEXT: v_add_i32_e32 v3, vcc, v5, v3 3605; GISEL-NEXT: v_sub_i32_e32 v2, vcc, v2, v8 3606; GISEL-NEXT: v_subb_u32_e64 v5, s[4:5], v13, v3, vcc 3607; GISEL-NEXT: v_sub_i32_e64 v3, s[4:5], v13, v3 3608; GISEL-NEXT: v_cmp_ge_u32_e64 s[4:5], v5, v6 3609; GISEL-NEXT: v_cndmask_b32_e64 v7, 0, -1, s[4:5] 3610; GISEL-NEXT: v_cmp_ge_u32_e64 s[4:5], v2, v4 3611; GISEL-NEXT: v_cndmask_b32_e64 v8, 0, -1, s[4:5] 3612; GISEL-NEXT: v_cmp_eq_u32_e64 s[4:5], v5, v6 3613; GISEL-NEXT: v_subb_u32_e32 v3, vcc, v3, v6, vcc 3614; GISEL-NEXT: v_cndmask_b32_e64 v7, v7, v8, s[4:5] 3615; GISEL-NEXT: v_sub_i32_e32 v8, vcc, v2, v4 3616; GISEL-NEXT: v_subbrev_u32_e64 v9, s[4:5], 0, v3, vcc 3617; GISEL-NEXT: v_cmp_ge_u32_e64 s[4:5], v9, v6 3618; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, -1, s[4:5] 3619; GISEL-NEXT: v_cmp_ge_u32_e64 s[4:5], v8, v4 3620; GISEL-NEXT: v_subb_u32_e32 v3, vcc, v3, v6, vcc 3621; GISEL-NEXT: v_sub_i32_e32 v4, vcc, v8, v4 3622; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, -1, s[4:5] 3623; GISEL-NEXT: v_cmp_eq_u32_e64 s[4:5], v9, v6 3624; GISEL-NEXT: v_cndmask_b32_e64 v10, v10, v11, s[4:5] 3625; GISEL-NEXT: v_subbrev_u32_e32 v3, vcc, 0, v3, vcc 3626; GISEL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v10 3627; GISEL-NEXT: v_cndmask_b32_e32 v4, v8, v4, vcc 3628; GISEL-NEXT: v_cndmask_b32_e32 v3, v9, v3, vcc 3629; GISEL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v7 3630; GISEL-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc 3631; GISEL-NEXT: v_cndmask_b32_e32 v3, v5, v3, vcc 3632; GISEL-NEXT: v_subrev_i32_e32 v2, vcc, 0, v2 3633; GISEL-NEXT: v_subbrev_u32_e32 v3, vcc, 0, v3, vcc 3634; GISEL-NEXT: s_setpc_b64 s[30:31] 3635; 3636; CGP-LABEL: v_srem_v2i64_24bit: 3637; CGP: ; %bb.0: 3638; CGP-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 3639; CGP-NEXT: s_mov_b32 s4, 0xffffff 3640; CGP-NEXT: v_and_b32_e32 v1, s4, v4 3641; CGP-NEXT: v_cvt_f32_i32_e32 v3, v1 3642; CGP-NEXT: v_and_b32_e32 v0, s4, v0 3643; CGP-NEXT: v_cvt_f32_i32_e32 v4, v0 3644; CGP-NEXT: v_and_b32_e32 v6, s4, v6 3645; CGP-NEXT: v_rcp_f32_e32 v5, v3 3646; CGP-NEXT: v_and_b32_e32 v2, s4, v2 3647; CGP-NEXT: v_mul_f32_e32 v5, v4, v5 3648; CGP-NEXT: v_trunc_f32_e32 v5, v5 3649; CGP-NEXT: v_mad_f32 v4, -v5, v3, v4 3650; CGP-NEXT: v_cvt_i32_f32_e32 v5, v5 3651; CGP-NEXT: v_cmp_ge_f32_e64 s[4:5], |v4|, |v3| 3652; CGP-NEXT: v_cvt_f32_i32_e32 v4, v6 3653; CGP-NEXT: v_cndmask_b32_e64 v3, 0, 1, s[4:5] 3654; CGP-NEXT: v_add_i32_e32 v3, vcc, v5, v3 3655; CGP-NEXT: v_mul_lo_u32 v1, v3, v1 3656; CGP-NEXT: v_cvt_f32_i32_e32 v3, v2 3657; CGP-NEXT: v_rcp_f32_e32 v5, v4 3658; CGP-NEXT: v_sub_i32_e32 v0, vcc, v0, v1 3659; CGP-NEXT: v_bfe_i32 v0, v0, 0, 25 3660; CGP-NEXT: v_mul_f32_e32 v1, v3, v5 3661; CGP-NEXT: v_trunc_f32_e32 v1, v1 3662; CGP-NEXT: v_mad_f32 v3, -v1, v4, v3 3663; CGP-NEXT: v_cvt_i32_f32_e32 v1, v1 3664; CGP-NEXT: v_cmp_ge_f32_e64 s[4:5], |v3|, |v4| 3665; CGP-NEXT: v_cndmask_b32_e64 v3, 0, 1, s[4:5] 3666; CGP-NEXT: v_add_i32_e32 v1, vcc, v1, v3 3667; CGP-NEXT: v_mul_lo_u32 v3, v1, v6 3668; CGP-NEXT: v_ashrrev_i32_e32 v1, 31, v0 3669; CGP-NEXT: v_sub_i32_e32 v2, vcc, v2, v3 3670; CGP-NEXT: v_bfe_i32 v2, v2, 0, 25 3671; CGP-NEXT: v_ashrrev_i32_e32 v3, 31, v2 3672; CGP-NEXT: s_setpc_b64 s[30:31] 3673 %num.mask = and <2 x i64> %num, <i64 16777215, i64 16777215> 3674 %den.mask = and <2 x i64> %den, <i64 16777215, i64 16777215> 3675 %result = srem <2 x i64> %num.mask, %den.mask 3676 ret <2 x i64> %result 3677} 3678