1; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
2
3; GCN-LABEL: {{^}}kernel_ieee_mode_default:
4; GCN: {{buffer|global|flat}}_load_dword [[VAL0:v[0-9]+]]
5; GCN-NEXT: {{buffer|global|flat}}_load_dword [[VAL1:v[0-9]+]]
6; GCN-DAG: v_mul_f32_e32 [[QUIET0:v[0-9]+]], 1.0, [[VAL0]]
7; GCN-DAG: v_mul_f32_e32 [[QUIET1:v[0-9]+]], 1.0, [[VAL1]]
8; GCN: v_min_f32_e32 [[MIN:v[0-9]+]], [[QUIET0]], [[QUIET1]]
9; GCN-NOT: v_mul_f32
10define amdgpu_kernel void @kernel_ieee_mode_default() #0 {
11  %val0 = load volatile float, float addrspace(1)* undef
12  %val1 = load volatile float, float addrspace(1)* undef
13  %min = call float @llvm.minnum.f32(float %val0, float %val1)
14  store volatile float %min, float addrspace(1)* undef
15  ret void
16}
17
18; GCN-LABEL: {{^}}kernel_ieee_mode_on:
19; GCN: {{buffer|global|flat}}_load_dword [[VAL0:v[0-9]+]]
20; GCN-NEXT: {{buffer|global|flat}}_load_dword [[VAL1:v[0-9]+]]
21; GCN-DAG: v_mul_f32_e32 [[QUIET0:v[0-9]+]], 1.0, [[VAL0]]
22; GCN-DAG: v_mul_f32_e32 [[QUIET1:v[0-9]+]], 1.0, [[VAL1]]
23; GCN: v_min_f32_e32 [[MIN:v[0-9]+]], [[QUIET0]], [[QUIET1]]
24; GCN-NOT: v_mul_f32
25define amdgpu_kernel void @kernel_ieee_mode_on() #1 {
26  %val0 = load volatile float, float addrspace(1)* undef
27  %val1 = load volatile float, float addrspace(1)* undef
28  %min = call float @llvm.minnum.f32(float %val0, float %val1)
29  store volatile float %min, float addrspace(1)* undef
30  ret void
31}
32
33; GCN-LABEL: {{^}}kernel_ieee_mode_off:
34; GCN: {{buffer|global|flat}}_load_dword [[VAL0:v[0-9]+]]
35; GCN-NEXT: {{buffer|global|flat}}_load_dword [[VAL1:v[0-9]+]]
36; GCN-NOT: [[VAL0]]
37; GCN-NOT: [[VAL1]]
38; GCN: v_min_f32_e32 [[MIN:v[0-9]+]], [[VAL0]], [[VAL1]]
39; GCN-NOT: v_mul_f32
40define amdgpu_kernel void @kernel_ieee_mode_off() #2 {
41  %val0 = load volatile float, float addrspace(1)* undef
42  %val1 = load volatile float, float addrspace(1)* undef
43  %min = call float @llvm.minnum.f32(float %val0, float %val1)
44  store volatile float %min, float addrspace(1)* undef
45  ret void
46}
47
48; GCN-LABEL: {{^}}func_ieee_mode_default:
49; GCN: {{buffer|global|flat}}_load_dword [[VAL0:v[0-9]+]]
50; GCN-NEXT: {{buffer|global|flat}}_load_dword [[VAL1:v[0-9]+]]
51; GCN-DAG: v_mul_f32_e32 [[QUIET0:v[0-9]+]], 1.0, [[VAL0]]
52; GCN-DAG: v_mul_f32_e32 [[QUIET1:v[0-9]+]], 1.0, [[VAL1]]
53; GCN: v_min_f32_e32 [[MIN:v[0-9]+]], [[QUIET0]], [[QUIET1]]
54; GCN-NOT: v_mul_f32
55define void @func_ieee_mode_default() #0 {
56  %val0 = load volatile float, float addrspace(1)* undef
57  %val1 = load volatile float, float addrspace(1)* undef
58  %min = call float @llvm.minnum.f32(float %val0, float %val1)
59  store volatile float %min, float addrspace(1)* undef
60  ret void
61}
62
63; GCN-LABEL: {{^}}func_ieee_mode_on:
64; GCN: {{buffer|global|flat}}_load_dword [[VAL0:v[0-9]+]]
65; GCN-NEXT: {{buffer|global|flat}}_load_dword [[VAL1:v[0-9]+]]
66; GCN-DAG: v_mul_f32_e32 [[QUIET0:v[0-9]+]], 1.0, [[VAL0]]
67; GCN-DAG: v_mul_f32_e32 [[QUIET1:v[0-9]+]], 1.0, [[VAL1]]
68; GCN: v_min_f32_e32 [[MIN:v[0-9]+]], [[QUIET0]], [[QUIET1]]
69; GCN-NOT: v_mul_f32
70define void @func_ieee_mode_on() #1 {
71  %val0 = load volatile float, float addrspace(1)* undef
72  %val1 = load volatile float, float addrspace(1)* undef
73  %min = call float @llvm.minnum.f32(float %val0, float %val1)
74  store volatile float %min, float addrspace(1)* undef
75  ret void
76}
77
78; GCN-LABEL: {{^}}func_ieee_mode_off:
79; GCN: {{buffer|global|flat}}_load_dword [[VAL0:v[0-9]+]]
80; GCN-NEXT: {{buffer|global|flat}}_load_dword [[VAL1:v[0-9]+]]
81; GCN-NOT: [[VAL0]]
82; GCN-NOT: [[VAL1]]
83; GCN: v_min_f32_e32 [[MIN:v[0-9]+]], [[VAL0]], [[VAL1]]
84; GCN-NOT: v_mul_f32
85define void @func_ieee_mode_off() #2 {
86  %val0 = load volatile float, float addrspace(1)* undef
87  %val1 = load volatile float, float addrspace(1)* undef
88  %min = call float @llvm.minnum.f32(float %val0, float %val1)
89  store volatile float %min, float addrspace(1)* undef
90  ret void
91}
92
93; GCN-LABEL: {{^}}cs_ieee_mode_default:
94; GCN: {{buffer|global|flat}}_load_dword [[VAL0:v[0-9]+]]
95; GCN-NEXT: {{buffer|global|flat}}_load_dword [[VAL1:v[0-9]+]]
96; GCN-NOT: [[VAL0]]
97; GCN-NOT: [[VAL1]]
98; GCN: v_min_f32_e32 [[MIN:v[0-9]+]], [[QUIET0]], [[QUIET1]]
99; GCN-NOT: v_mul_f32
100define amdgpu_cs void @cs_ieee_mode_default() #0 {
101  %val0 = load volatile float, float addrspace(1)* undef
102  %val1 = load volatile float, float addrspace(1)* undef
103  %min = call float @llvm.minnum.f32(float %val0, float %val1)
104  store volatile float %min, float addrspace(1)* undef
105  ret void
106}
107
108; GCN-LABEL: {{^}}cs_ieee_mode_on:
109; GCN: {{buffer|global|flat}}_load_dword [[VAL0:v[0-9]+]]
110; GCN-NEXT: {{buffer|global|flat}}_load_dword [[VAL1:v[0-9]+]]
111; GCN-DAG: v_mul_f32_e32 [[QUIET0:v[0-9]+]], 1.0, [[VAL0]]
112; GCN-DAG: v_mul_f32_e32 [[QUIET1:v[0-9]+]], 1.0, [[VAL1]]
113; GCN: v_min_f32_e32 [[MIN:v[0-9]+]], [[QUIET0]], [[QUIET1]]
114; GCN-NOT: v_mul_f32
115define amdgpu_cs void @cs_ieee_mode_on() #1 {
116  %val0 = load volatile float, float addrspace(1)* undef
117  %val1 = load volatile float, float addrspace(1)* undef
118  %min = call float @llvm.minnum.f32(float %val0, float %val1)
119  store volatile float %min, float addrspace(1)* undef
120  ret void
121}
122
123; GCN-LABEL: {{^}}cs_ieee_mode_off:
124; GCN: {{buffer|global|flat}}_load_dword [[VAL0:v[0-9]+]]
125; GCN-NEXT: {{buffer|global|flat}}_load_dword [[VAL1:v[0-9]+]]
126; GCN-NOT: [[VAL0]]
127; GCN-NOT: [[VAL1]]
128; GCN: v_min_f32_e32 [[MIN:v[0-9]+]], [[VAL0]], [[VAL1]]
129; GCN-NOT: v_mul_f32
130define amdgpu_cs void @cs_ieee_mode_off() #2 {
131  %val0 = load volatile float, float addrspace(1)* undef
132  %val1 = load volatile float, float addrspace(1)* undef
133  %min = call float @llvm.minnum.f32(float %val0, float %val1)
134  store volatile float %min, float addrspace(1)* undef
135  ret void
136}
137
138; GCN-LABEL: {{^}}ps_ieee_mode_default:
139; GCN: {{buffer|global|flat}}_load_dword [[VAL0:v[0-9]+]]
140; GCN-NEXT: {{buffer|global|flat}}_load_dword [[VAL1:v[0-9]+]]
141; GCN-NOT: [[VAL0]]
142; GCN-NOT: [[VAL1]]
143; GCN: v_min_f32_e32 [[MIN:v[0-9]+]], [[VAL0]], [[VAL1]]
144; GCN-NOT: v_mul_f32
145define amdgpu_ps void @ps_ieee_mode_default() #0 {
146  %val0 = load volatile float, float addrspace(1)* undef
147  %val1 = load volatile float, float addrspace(1)* undef
148  %min = call float @llvm.minnum.f32(float %val0, float %val1)
149  store volatile float %min, float addrspace(1)* undef
150  ret void
151}
152
153; GCN-LABEL: {{^}}ps_ieee_mode_on:
154; GCN: {{buffer|global|flat}}_load_dword [[VAL0:v[0-9]+]]
155; GCN-NEXT: {{buffer|global|flat}}_load_dword [[VAL1:v[0-9]+]]
156; GCN-DAG: v_mul_f32_e32 [[QUIET0:v[0-9]+]], 1.0, [[VAL0]]
157; GCN-DAG: v_mul_f32_e32 [[QUIET1:v[0-9]+]], 1.0, [[VAL1]]
158; GCN: v_min_f32_e32 [[MIN:v[0-9]+]], [[QUIET0]], [[QUIET1]]
159; GCN-NOT: v_mul_f32
160define amdgpu_ps void @ps_ieee_mode_on() #1 {
161  %val0 = load volatile float, float addrspace(1)* undef
162  %val1 = load volatile float, float addrspace(1)* undef
163  %min = call float @llvm.minnum.f32(float %val0, float %val1)
164  store volatile float %min, float addrspace(1)* undef
165  ret void
166}
167
168; GCN-LABEL: {{^}}ps_ieee_mode_off:
169; GCN: {{buffer|global|flat}}_load_dword [[VAL0:v[0-9]+]]
170; GCN-NEXT: {{buffer|global|flat}}_load_dword [[VAL1:v[0-9]+]]
171; GCN-NOT: [[VAL0]]
172; GCN-NOT: [[VAL1]]
173; GCN: v_min_f32_e32 [[MIN:v[0-9]+]], [[VAL0]], [[VAL1]]
174; GCN-NOT: v_mul_f32
175define amdgpu_ps void @ps_ieee_mode_off() #2 {
176  %val0 = load volatile float, float addrspace(1)* undef
177  %val1 = load volatile float, float addrspace(1)* undef
178  %min = call float @llvm.minnum.f32(float %val0, float %val1)
179  store volatile float %min, float addrspace(1)* undef
180  ret void
181}
182
183declare float @llvm.minnum.f32(float, float) #3
184
185attributes #0 = { nounwind }
186attributes #1 = { nounwind "amdgpu-ieee"="true" }
187attributes #2 = { nounwind "amdgpu-ieee"="false" }
188attributes #3 = { nounwind readnone speculatable }
189