1; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s
2; RUN: llc < %s -march=nvptx64 -mcpu=sm_20 | FileCheck %s
3
4define i16 @cvt_u16_f32(float %x) {
5; CHECK: cvt.rzi.u16.f32 %rs{{[0-9]+}}, %f{{[0-9]+}};
6; CHECK: ret;
7  %a = fptoui float %x to i16
8  ret i16 %a
9}
10define i16 @cvt_u16_f64(double %x) {
11; CHECK: cvt.rzi.u16.f64 %rs{{[0-9]+}}, %fd{{[0-9]+}};
12; CHECK: ret;
13  %a = fptoui double %x to i16
14  ret i16 %a
15}
16define i32 @cvt_u32_f32(float %x) {
17; CHECK: cvt.rzi.u32.f32 %r{{[0-9]+}}, %f{{[0-9]+}};
18; CHECK: ret;
19  %a = fptoui float %x to i32
20  ret i32 %a
21}
22define i32 @cvt_u32_f64(double %x) {
23; CHECK: cvt.rzi.u32.f64 %r{{[0-9]+}}, %fd{{[0-9]+}};
24; CHECK: ret;
25  %a = fptoui double %x to i32
26  ret i32 %a
27}
28define i64 @cvt_u64_f32(float %x) {
29; CHECK: cvt.rzi.u64.f32 %rd{{[0-9]+}}, %f{{[0-9]+}};
30; CHECK: ret;
31  %a = fptoui float %x to i64
32  ret i64 %a
33}
34define i64 @cvt_u64_f64(double %x) {
35; CHECK: cvt.rzi.u64.f64 %rd{{[0-9]+}}, %fd{{[0-9]+}};
36; CHECK: ret;
37  %a = fptoui double %x to i64
38  ret i64 %a
39}
40
41define float @cvt_f32_i16(i16 %x) {
42; CHECK: cvt.rn.f32.u16 %f{{[0-9]+}}, %rs{{[0-9]+}};
43; CHECK: ret;
44  %a = uitofp i16 %x to float
45  ret float %a
46}
47define float @cvt_f32_i32(i32 %x) {
48; CHECK: cvt.rn.f32.u32 %f{{[0-9]+}}, %r{{[0-9]+}};
49; CHECK: ret;
50  %a = uitofp i32 %x to float
51  ret float %a
52}
53define float @cvt_f32_i64(i64 %x) {
54; CHECK: cvt.rn.f32.u64 %f{{[0-9]+}}, %rd{{[0-9]+}};
55; CHECK: ret;
56  %a = uitofp i64 %x to float
57  ret float %a
58}
59define double @cvt_f64_i16(i16 %x) {
60; CHECK: cvt.rn.f64.u16 %fd{{[0-9]+}}, %rs{{[0-9]+}};
61; CHECK: ret;
62  %a = uitofp i16 %x to double
63  ret double %a
64}
65define double @cvt_f64_i32(i32 %x) {
66; CHECK: cvt.rn.f64.u32 %fd{{[0-9]+}}, %r{{[0-9]+}};
67; CHECK: ret;
68  %a = uitofp i32 %x to double
69  ret double %a
70}
71define double @cvt_f64_i64(i64 %x) {
72; CHECK: cvt.rn.f64.u64 %fd{{[0-9]+}}, %rd{{[0-9]+}};
73; CHECK: ret;
74  %a = uitofp i64 %x to double
75  ret double %a
76}
77
78define float @cvt_f32_f64(double %x) {
79; CHECK: cvt.rn.f32.f64 %f{{[0-9]+}}, %fd{{[0-9]+}};
80; CHECK: ret;
81  %a = fptrunc double %x to float
82  ret float %a
83}
84define double @cvt_f64_f32(float %x) {
85; CHECK: cvt.f64.f32 %fd{{[0-9]+}}, %f{{[0-9]+}};
86; CHECK: ret;
87  %a = fpext float %x to double
88  ret double %a
89}
90
91define float @cvt_f32_s16(i16 %x) {
92; CHECK: cvt.rn.f32.s16 %f{{[0-9]+}}, %rs{{[0-9]+}}
93; CHECK: ret
94  %a = sitofp i16 %x to float
95  ret float %a
96}
97define float @cvt_f32_s32(i32 %x) {
98; CHECK: cvt.rn.f32.s32 %f{{[0-9]+}}, %r{{[0-9]+}}
99; CHECK: ret
100  %a = sitofp i32 %x to float
101  ret float %a
102}
103define float @cvt_f32_s64(i64 %x) {
104; CHECK: cvt.rn.f32.s64 %f{{[0-9]+}}, %rd{{[0-9]+}}
105; CHECK: ret
106  %a = sitofp i64 %x to float
107  ret float %a
108}
109define double @cvt_f64_s16(i16 %x) {
110; CHECK: cvt.rn.f64.s16 %fd{{[0-9]+}}, %rs{{[0-9]+}}
111; CHECK: ret
112  %a = sitofp i16 %x to double
113  ret double %a
114}
115define double @cvt_f64_s32(i32 %x) {
116; CHECK: cvt.rn.f64.s32 %fd{{[0-9]+}}, %r{{[0-9]+}}
117; CHECK: ret
118  %a = sitofp i32 %x to double
119  ret double %a
120}
121define double @cvt_f64_s64(i64 %x) {
122; CHECK: cvt.rn.f64.s64 %fd{{[0-9]+}}, %rd{{[0-9]+}}
123; CHECK: ret
124  %a = sitofp i64 %x to double
125  ret double %a
126}
127
128define i16 @cvt_s16_f32(float %x) {
129; CHECK: cvt.rzi.s16.f32 %rs{{[0-9]+}}, %f{{[0-9]+}};
130; CHECK: ret;
131  %a = fptosi float %x to i16
132  ret i16 %a
133}
134define i16 @cvt_s16_f64(double %x) {
135; CHECK: cvt.rzi.s16.f64 %rs{{[0-9]+}}, %fd{{[0-9]+}};
136; CHECK: ret;
137  %a = fptosi double %x to i16
138  ret i16 %a
139}
140define i32 @cvt_s32_f32(float %x) {
141; CHECK: cvt.rzi.s32.f32 %r{{[0-9]+}}, %f{{[0-9]+}};
142; CHECK: ret;
143  %a = fptosi float %x to i32
144  ret i32 %a
145}
146define i32 @cvt_s32_f64(double %x) {
147; CHECK: cvt.rzi.s32.f64 %r{{[0-9]+}}, %fd{{[0-9]+}};
148; CHECK: ret;
149  %a = fptosi double %x to i32
150  ret i32 %a
151}
152define i64 @cvt_s64_f32(float %x) {
153; CHECK: cvt.rzi.s64.f32 %rd{{[0-9]+}}, %f{{[0-9]+}};
154; CHECK: ret;
155  %a = fptosi float %x to i64
156  ret i64 %a
157}
158define i64 @cvt_s64_f64(double %x) {
159; CHECK: cvt.rzi.s64.f64 %rd{{[0-9]+}}, %fd{{[0-9]+}};
160; CHECK: ret;
161  %a = fptosi double %x to i64
162  ret i64 %a
163}
164