1// RUN: not llvm-mc -triple arm -mattr=+dotprod -show-encoding < %s 2> %t
2// RUN: FileCheck --check-prefix=CHECK-ERROR < %t %s
3// RUN: not llvm-mc -triple thumb -mattr=+dotprod -show-encoding < %s 2> %t
4// RUN: FileCheck --check-prefix=CHECK-ERROR < %t %s
5
6// Only indices 0 an 1 should be accepted:
7
8vudot.u8 d0, d1, d2[2]
9vsdot.s8 d0, d1, d2[2]
10vudot.u8 q0, q1, d4[2]
11vsdot.s8 q0, q1, d4[2]
12
13// CHECK-ERROR: error: invalid operand for instruction
14// CHECK-ERROR: vudot.u8 d0, d1, d2[2]
15// CHECK-ERROR:                    ^
16// CHECK-ERROR: error: invalid operand for instruction
17// CHECK-ERROR: vsdot.s8 d0, d1, d2[2]
18// CHECK-ERROR:                    ^
19// CHECK-ERROR: error: invalid operand for instruction
20// CHECK-ERROR: vudot.u8 q0, q1, d4[2]
21// CHECK-ERROR:                    ^
22// CHECK-ERROR: error: invalid operand for instruction
23// CHECK-ERROR: vsdot.s8 q0, q1, d4[2]
24// CHECK-ERROR:                    ^
25
26// Only the lower 16 D-registers should be accepted:
27
28vudot.u8 q0, q1, d16[0]
29vsdot.s8 q0, q1, d16[0]
30
31// CHECK-ERROR: error: operand must be a register in range [d0, d15]
32// CHECK-ERROR: vudot.u8 q0, q1, d16[0]
33// CHECK-ERROR:                     ^
34// CHECK-ERROR: error: operand must be a register in range [d0, d15]
35// CHECK-ERROR: vsdot.s8 q0, q1, d16[0]
36// CHECK-ERROR:                     ^
37