1/*
2 * Copyright © 2006 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 *    Wang Zhenyu <zhenyu.z.wang@intel.com>
25 *    Keith Packard <keithp@keithp.com>
26 */
27
28include(`exa_wm.g4i')
29
30/*
31 * Prepare data in m2-m5 for subspan(1,0), m6-m9 for subspan(3,2),
32 */
33
34mov (16) m130<1>F	src_sample_r_01<8,8,1>F { align1 compr };
35mov (16) m131<1>F	src_sample_g_01<8,8,1>F { align1 compr };
36mov (16) m132<1>F	src_sample_b_01<8,8,1>F { align1 compr };
37mov (16) m133<1>F	src_sample_a_01<8,8,1>F { align1 compr };
38
39/* m0, m1 are all direct passed by PS thread payload */
40mov (8) data_port_msg_1<1>F	g1<8,8,1>F		{ mask_disable align1 };
41
42/* write */
43send (16)
44	data_port_msg_0_ind
45	acc0<1>UW
46	g0<8,8,1>UW
47	write (
48	       0,  /* binding_table */
49	       8,  /* pixel scordboard clear, msg type simd16 single source */
50	       4,  /* render target write */
51	       0   /* no write commit message */
52	)
53	mlen 10
54	rlen 0
55	{ align1 EOT };
56