1 /*
2 * Copyright 2004-2005 The Unichrome Project [unichrome.sf.net]
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sub license,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the
12 * next paragraph) shall be included in all copies or substantial portions
13 * of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 */
23
24 /*
25 * Wrappers around xf86 vgaHW functions.
26 * And some generic IO calls lacking in the current vgaHW implementation.
27 */
28
29 #ifdef HAVE_CONFIG_H
30 #include "config.h"
31 #endif
32
33 #include "compiler.h"
34 #include "xf86.h"
35 #include "via_driver.h" /* for HAVE_DEBUG */
36
37 #if GET_ABI_MAJOR(ABI_VIDEODRV_VERSION) < 12
38 #define PIOOFFSET hwp->PIOOffset
39 #else
40 #define PIOOFFSET 0
41 #endif
42
43 CARD8
ViaVgahwIn(vgaHWPtr hwp,int address)44 ViaVgahwIn(vgaHWPtr hwp, int address)
45 {
46 if (hwp->MMIOBase)
47 return MMIO_IN8(hwp->MMIOBase, hwp->MMIOOffset + address);
48 else
49 return inb(PIOOFFSET + address);
50 }
51
52 static void
ViaVgahwOut(vgaHWPtr hwp,int address,CARD8 value)53 ViaVgahwOut(vgaHWPtr hwp, int address, CARD8 value)
54 {
55 if (hwp->MMIOBase)
56 MMIO_OUT8(hwp->MMIOBase, hwp->MMIOOffset + address, value);
57 else
58 outb(PIOOFFSET + address, value);
59 }
60
61 /*
62 * An indexed read.
63 */
64 static CARD8
ViaVgahwRead(vgaHWPtr hwp,int indexaddress,CARD8 index,int valueaddress)65 ViaVgahwRead(vgaHWPtr hwp, int indexaddress, CARD8 index, int valueaddress)
66 {
67 ViaVgahwOut(hwp, indexaddress, index);
68 return ViaVgahwIn(hwp, valueaddress);
69 }
70
71 /*
72 * An indexed write.
73 */
74 void
ViaVgahwWrite(vgaHWPtr hwp,int indexaddress,CARD8 index,int valueaddress,CARD8 value)75 ViaVgahwWrite(vgaHWPtr hwp, int indexaddress, CARD8 index,
76 int valueaddress, CARD8 value)
77 {
78 ViaVgahwOut(hwp, indexaddress, index);
79 ViaVgahwOut(hwp, valueaddress, value);
80 }
81
82
83 void
ViaVgahwMask(vgaHWPtr hwp,int indexaddress,CARD8 index,int valueaddress,CARD8 value,CARD8 mask)84 ViaVgahwMask(vgaHWPtr hwp, int indexaddress, CARD8 index,
85 int valueaddress, CARD8 value, CARD8 mask)
86 {
87 CARD8 tmp;
88
89 tmp = ViaVgahwRead(hwp, indexaddress, index, valueaddress);
90 tmp &= ~mask;
91 tmp |= (value & mask);
92
93 ViaVgahwWrite(hwp, indexaddress, index, valueaddress, tmp);
94 }
95
96 void
ViaCrtcMask(vgaHWPtr hwp,CARD8 index,CARD8 value,CARD8 mask)97 ViaCrtcMask(vgaHWPtr hwp, CARD8 index, CARD8 value, CARD8 mask)
98 {
99 CARD8 tmp;
100
101 tmp = hwp->readCrtc(hwp, index);
102 tmp &= ~mask;
103 tmp |= (value & mask);
104
105 hwp->writeCrtc(hwp, index, tmp);
106 }
107
108 void
ViaSeqMask(vgaHWPtr hwp,CARD8 index,CARD8 value,CARD8 mask)109 ViaSeqMask(vgaHWPtr hwp, CARD8 index, CARD8 value, CARD8 mask)
110 {
111 CARD8 tmp;
112
113 tmp = hwp->readSeq(hwp, index);
114 tmp &= ~mask;
115 tmp |= (value & mask);
116
117 hwp->writeSeq(hwp, index, tmp);
118 }
119
120 void
ViaGrMask(vgaHWPtr hwp,CARD8 index,CARD8 value,CARD8 mask)121 ViaGrMask(vgaHWPtr hwp, CARD8 index, CARD8 value, CARD8 mask)
122 {
123 CARD8 tmp;
124
125 tmp = hwp->readGr(hwp, index);
126 tmp &= ~mask;
127 tmp |= (value & mask);
128
129 hwp->writeGr(hwp, index, tmp);
130 }
131
132 #ifdef HAVE_DEBUG
133 void
ViaVgahwPrint(vgaHWPtr hwp)134 ViaVgahwPrint(vgaHWPtr hwp)
135 {
136 int i;
137
138 if (!hwp)
139 return;
140
141 xf86DrvMsg(hwp->pScrn->scrnIndex, X_INFO, "VGA Sequence registers:\n");
142 for (i = 0x00; i < 0x80; i++)
143 xf86DrvMsg(hwp->pScrn->scrnIndex, X_INFO,
144 "SR%02X: 0x%02X\n", i, hwp->readSeq(hwp, i));
145
146 xf86DrvMsg(hwp->pScrn->scrnIndex, X_INFO, "VGA CRTM/C registers:\n");
147 for (i = 0x00; i < 0x19; i++)
148 xf86DrvMsg(hwp->pScrn->scrnIndex, X_INFO,
149 "CR%02X: 0x%02X\n", i, hwp->readCrtc(hwp, i));
150 for (i = 0x33; i < 0xA3; i++)
151 xf86DrvMsg(hwp->pScrn->scrnIndex, X_INFO,
152 "CR%02X: 0x%02X\n", i, hwp->readCrtc(hwp, i));
153
154 xf86DrvMsg(hwp->pScrn->scrnIndex, X_INFO, "VGA Graphics registers:\n");
155 for (i = 0x00; i < 0x08; i++)
156 xf86DrvMsg(hwp->pScrn->scrnIndex, X_INFO,
157 "GR%02X: 0x%02X\n", i, hwp->readGr(hwp, i));
158
159 xf86DrvMsg(hwp->pScrn->scrnIndex, X_INFO, "VGA Attribute registers:\n");
160 for (i = 0x00; i < 0x14; i++)
161 xf86DrvMsg(hwp->pScrn->scrnIndex, X_INFO,
162 "AR%02X: 0x%02X\n", i, hwp->readAttr(hwp, i));
163
164 xf86DrvMsg(hwp->pScrn->scrnIndex, X_INFO, "VGA Miscellaneous register:\n");
165 xf86DrvMsg(hwp->pScrn->scrnIndex, X_INFO,
166 "Misc: 0x%02X\n", hwp->readMiscOut(hwp));
167
168 xf86DrvMsg(hwp->pScrn->scrnIndex, X_INFO, "End of VGA registers.\n");
169 }
170 #endif /* HAVE_DEBUG */
171