1 2 #include <xf86RamDac.h> 3 4 extern _X_EXPORT unsigned long TIramdacCalculateMNPForClock(unsigned long 5 RefClock, 6 unsigned long 7 ReqClock, 8 char IsPixClock, 9 unsigned long 10 MinClock, 11 unsigned long 12 MaxClock, 13 unsigned long *rM, 14 unsigned long *rN, 15 unsigned long *rP); 16 extern _X_EXPORT RamDacHelperRecPtr TIramdacProbe(ScrnInfoPtr pScrn, 17 RamDacSupportedInfoRecPtr 18 ramdacs); 19 extern _X_EXPORT void TIramdacSave(ScrnInfoPtr pScrn, RamDacRecPtr RamDacRec, 20 RamDacRegRecPtr RamDacRegRec); 21 extern _X_EXPORT void TIramdacRestore(ScrnInfoPtr pScrn, RamDacRecPtr RamDacRec, 22 RamDacRegRecPtr RamDacRegRec); 23 extern _X_EXPORT void TIramdac3026SetBpp(ScrnInfoPtr pScrn, 24 RamDacRegRecPtr RamDacRegRec); 25 extern _X_EXPORT void TIramdac3030SetBpp(ScrnInfoPtr pScrn, 26 RamDacRegRecPtr RamDacRegRec); 27 extern _X_EXPORT void TIramdacHWCursorInit(xf86CursorInfoPtr infoPtr); 28 extern _X_EXPORT void TIramdacLoadPalette(ScrnInfoPtr pScrn, int numColors, 29 int *indices, LOCO * colors, 30 VisualPtr pVisual); 31 32 typedef void TIramdacLoadPaletteProc(ScrnInfoPtr, int, int *, LOCO *, 33 VisualPtr); 34 extern _X_EXPORT TIramdacLoadPaletteProc *TIramdacLoadPaletteWeak(void); 35 36 #define TI3030_RAMDAC (VENDOR_TI << 16) | 0x00 37 #define TI3026_RAMDAC (VENDOR_TI << 16) | 0x01 38 39 /* 40 * TI Ramdac registers 41 */ 42 43 #define TIDAC_rev 0x01 44 #define TIDAC_ind_curs_ctrl 0x06 45 #define TIDAC_byte_router_ctrl 0x07 46 #define TIDAC_latch_ctrl 0x0f 47 #define TIDAC_true_color_ctrl 0x18 48 #define TIDAC_multiplex_ctrl 0x19 49 #define TIDAC_clock_select 0x1a 50 #define TIDAC_palette_page 0x1c 51 #define TIDAC_general_ctrl 0x1d 52 #define TIDAC_misc_ctrl 0x1e 53 #define TIDAC_pll_addr 0x2c 54 #define TIDAC_pll_pixel_data 0x2d 55 #define TIDAC_pll_memory_data 0x2e 56 #define TIDAC_pll_loop_data 0x2f 57 #define TIDAC_key_over_low 0x30 58 #define TIDAC_key_over_high 0x31 59 #define TIDAC_key_red_low 0x32 60 #define TIDAC_key_red_high 0x33 61 #define TIDAC_key_green_low 0x34 62 #define TIDAC_key_green_high 0x35 63 #define TIDAC_key_blue_low 0x36 64 #define TIDAC_key_blue_high 0x37 65 #define TIDAC_key_ctrl 0x38 66 #define TIDAC_clock_ctrl 0x39 67 #define TIDAC_sense_test 0x3a 68 #define TIDAC_test_mode_data 0x3b 69 #define TIDAC_crc_remain_lsb 0x3c 70 #define TIDAC_crc_remain_msb 0x3d 71 #define TIDAC_crc_bit_select 0x3e 72 #define TIDAC_id 0x3f 73 74 /* These are pll values that are accessed via TIDAC_pll_pixel_data */ 75 #define TIDAC_PIXEL_N 0x80 76 #define TIDAC_PIXEL_M 0x81 77 #define TIDAC_PIXEL_P 0x82 78 #define TIDAC_PIXEL_VALID 0x83 79 80 /* These are pll values that are accessed via TIDAC_pll_loop_data */ 81 #define TIDAC_LOOP_N 0x90 82 #define TIDAC_LOOP_M 0x91 83 #define TIDAC_LOOP_P 0x92 84 #define TIDAC_LOOP_VALID 0x93 85 86 /* Direct mapping addresses */ 87 #define TIDAC_INDEX 0xa0 88 #define TIDAC_PALETTE_DATA 0xa1 89 #define TIDAC_READ_MASK 0xa2 90 #define TIDAC_READ_ADDR 0xa3 91 #define TIDAC_CURS_WRITE_ADDR 0xa4 92 #define TIDAC_CURS_COLOR 0xa5 93 #define TIDAC_CURS_READ_ADDR 0xa7 94 #define TIDAC_CURS_CTL 0xa9 95 #define TIDAC_INDEXED_DATA 0xaa 96 #define TIDAC_CURS_RAM_DATA 0xab 97 #define TIDAC_CURS_XLOW 0xac 98 #define TIDAC_CURS_XHIGH 0xad 99 #define TIDAC_CURS_YLOW 0xae 100 #define TIDAC_CURS_YHIGH 0xaf 101 102 #define TIDAC_sw_reset 0xff 103 104 /* Constants */ 105 #define TIDAC_TVP_3026_ID 0x26 106 #define TIDAC_TVP_3030_ID 0x30 107