1*a9fa9459Szrj /* BFD library support routines for architectures.
2*a9fa9459Szrj Copyright (C) 1990-2016 Free Software Foundation, Inc.
3*a9fa9459Szrj Hacked by John Gilmore and Steve Chamberlain of Cygnus Support.
4*a9fa9459Szrj
5*a9fa9459Szrj This file is part of BFD, the Binary File Descriptor library.
6*a9fa9459Szrj
7*a9fa9459Szrj This program is free software; you can redistribute it and/or modify
8*a9fa9459Szrj it under the terms of the GNU General Public License as published by
9*a9fa9459Szrj the Free Software Foundation; either version 3 of the License, or
10*a9fa9459Szrj (at your option) any later version.
11*a9fa9459Szrj
12*a9fa9459Szrj This program is distributed in the hope that it will be useful,
13*a9fa9459Szrj but WITHOUT ANY WARRANTY; without even the implied warranty of
14*a9fa9459Szrj MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15*a9fa9459Szrj GNU General Public License for more details.
16*a9fa9459Szrj
17*a9fa9459Szrj You should have received a copy of the GNU General Public License
18*a9fa9459Szrj along with this program; if not, write to the Free Software
19*a9fa9459Szrj Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20*a9fa9459Szrj MA 02110-1301, USA. */
21*a9fa9459Szrj
22*a9fa9459Szrj #include "sysdep.h"
23*a9fa9459Szrj #include "bfd.h"
24*a9fa9459Szrj #include "libbfd.h"
25*a9fa9459Szrj #include "safe-ctype.h"
26*a9fa9459Szrj
27*a9fa9459Szrj /*
28*a9fa9459Szrj
29*a9fa9459Szrj SECTION
30*a9fa9459Szrj Architectures
31*a9fa9459Szrj
32*a9fa9459Szrj BFD keeps one atom in a BFD describing the
33*a9fa9459Szrj architecture of the data attached to the BFD: a pointer to a
34*a9fa9459Szrj <<bfd_arch_info_type>>.
35*a9fa9459Szrj
36*a9fa9459Szrj Pointers to structures can be requested independently of a BFD
37*a9fa9459Szrj so that an architecture's information can be interrogated
38*a9fa9459Szrj without access to an open BFD.
39*a9fa9459Szrj
40*a9fa9459Szrj The architecture information is provided by each architecture package.
41*a9fa9459Szrj The set of default architectures is selected by the macro
42*a9fa9459Szrj <<SELECT_ARCHITECTURES>>. This is normally set up in the
43*a9fa9459Szrj @file{config/@var{target}.mt} file of your choice. If the name is not
44*a9fa9459Szrj defined, then all the architectures supported are included.
45*a9fa9459Szrj
46*a9fa9459Szrj When BFD starts up, all the architectures are called with an
47*a9fa9459Szrj initialize method. It is up to the architecture back end to
48*a9fa9459Szrj insert as many items into the list of architectures as it wants to;
49*a9fa9459Szrj generally this would be one for each machine and one for the
50*a9fa9459Szrj default case (an item with a machine field of 0).
51*a9fa9459Szrj
52*a9fa9459Szrj BFD's idea of an architecture is implemented in @file{archures.c}.
53*a9fa9459Szrj */
54*a9fa9459Szrj
55*a9fa9459Szrj /*
56*a9fa9459Szrj
57*a9fa9459Szrj SUBSECTION
58*a9fa9459Szrj bfd_architecture
59*a9fa9459Szrj
60*a9fa9459Szrj DESCRIPTION
61*a9fa9459Szrj This enum gives the object file's CPU architecture, in a
62*a9fa9459Szrj global sense---i.e., what processor family does it belong to?
63*a9fa9459Szrj Another field indicates which processor within
64*a9fa9459Szrj the family is in use. The machine gives a number which
65*a9fa9459Szrj distinguishes different versions of the architecture,
66*a9fa9459Szrj containing, for example, 2 and 3 for Intel i960 KA and i960 KB,
67*a9fa9459Szrj and 68020 and 68030 for Motorola 68020 and 68030.
68*a9fa9459Szrj
69*a9fa9459Szrj .enum bfd_architecture
70*a9fa9459Szrj .{
71*a9fa9459Szrj . bfd_arch_unknown, {* File arch not known. *}
72*a9fa9459Szrj . bfd_arch_obscure, {* Arch known, not one of these. *}
73*a9fa9459Szrj . bfd_arch_m68k, {* Motorola 68xxx *}
74*a9fa9459Szrj .#define bfd_mach_m68000 1
75*a9fa9459Szrj .#define bfd_mach_m68008 2
76*a9fa9459Szrj .#define bfd_mach_m68010 3
77*a9fa9459Szrj .#define bfd_mach_m68020 4
78*a9fa9459Szrj .#define bfd_mach_m68030 5
79*a9fa9459Szrj .#define bfd_mach_m68040 6
80*a9fa9459Szrj .#define bfd_mach_m68060 7
81*a9fa9459Szrj .#define bfd_mach_cpu32 8
82*a9fa9459Szrj .#define bfd_mach_fido 9
83*a9fa9459Szrj .#define bfd_mach_mcf_isa_a_nodiv 10
84*a9fa9459Szrj .#define bfd_mach_mcf_isa_a 11
85*a9fa9459Szrj .#define bfd_mach_mcf_isa_a_mac 12
86*a9fa9459Szrj .#define bfd_mach_mcf_isa_a_emac 13
87*a9fa9459Szrj .#define bfd_mach_mcf_isa_aplus 14
88*a9fa9459Szrj .#define bfd_mach_mcf_isa_aplus_mac 15
89*a9fa9459Szrj .#define bfd_mach_mcf_isa_aplus_emac 16
90*a9fa9459Szrj .#define bfd_mach_mcf_isa_b_nousp 17
91*a9fa9459Szrj .#define bfd_mach_mcf_isa_b_nousp_mac 18
92*a9fa9459Szrj .#define bfd_mach_mcf_isa_b_nousp_emac 19
93*a9fa9459Szrj .#define bfd_mach_mcf_isa_b 20
94*a9fa9459Szrj .#define bfd_mach_mcf_isa_b_mac 21
95*a9fa9459Szrj .#define bfd_mach_mcf_isa_b_emac 22
96*a9fa9459Szrj .#define bfd_mach_mcf_isa_b_float 23
97*a9fa9459Szrj .#define bfd_mach_mcf_isa_b_float_mac 24
98*a9fa9459Szrj .#define bfd_mach_mcf_isa_b_float_emac 25
99*a9fa9459Szrj .#define bfd_mach_mcf_isa_c 26
100*a9fa9459Szrj .#define bfd_mach_mcf_isa_c_mac 27
101*a9fa9459Szrj .#define bfd_mach_mcf_isa_c_emac 28
102*a9fa9459Szrj .#define bfd_mach_mcf_isa_c_nodiv 29
103*a9fa9459Szrj .#define bfd_mach_mcf_isa_c_nodiv_mac 30
104*a9fa9459Szrj .#define bfd_mach_mcf_isa_c_nodiv_emac 31
105*a9fa9459Szrj . bfd_arch_vax, {* DEC Vax *}
106*a9fa9459Szrj . bfd_arch_i960, {* Intel 960 *}
107*a9fa9459Szrj . {* The order of the following is important.
108*a9fa9459Szrj . lower number indicates a machine type that
109*a9fa9459Szrj . only accepts a subset of the instructions
110*a9fa9459Szrj . available to machines with higher numbers.
111*a9fa9459Szrj . The exception is the "ca", which is
112*a9fa9459Szrj . incompatible with all other machines except
113*a9fa9459Szrj . "core". *}
114*a9fa9459Szrj .
115*a9fa9459Szrj .#define bfd_mach_i960_core 1
116*a9fa9459Szrj .#define bfd_mach_i960_ka_sa 2
117*a9fa9459Szrj .#define bfd_mach_i960_kb_sb 3
118*a9fa9459Szrj .#define bfd_mach_i960_mc 4
119*a9fa9459Szrj .#define bfd_mach_i960_xa 5
120*a9fa9459Szrj .#define bfd_mach_i960_ca 6
121*a9fa9459Szrj .#define bfd_mach_i960_jx 7
122*a9fa9459Szrj .#define bfd_mach_i960_hx 8
123*a9fa9459Szrj .
124*a9fa9459Szrj . bfd_arch_or1k, {* OpenRISC 1000 *}
125*a9fa9459Szrj .#define bfd_mach_or1k 1
126*a9fa9459Szrj .#define bfd_mach_or1knd 2
127*a9fa9459Szrj .
128*a9fa9459Szrj . bfd_arch_sparc, {* SPARC *}
129*a9fa9459Szrj .#define bfd_mach_sparc 1
130*a9fa9459Szrj .{* The difference between v8plus and v9 is that v9 is a true 64 bit env. *}
131*a9fa9459Szrj .#define bfd_mach_sparc_sparclet 2
132*a9fa9459Szrj .#define bfd_mach_sparc_sparclite 3
133*a9fa9459Szrj .#define bfd_mach_sparc_v8plus 4
134*a9fa9459Szrj .#define bfd_mach_sparc_v8plusa 5 {* with ultrasparc add'ns. *}
135*a9fa9459Szrj .#define bfd_mach_sparc_sparclite_le 6
136*a9fa9459Szrj .#define bfd_mach_sparc_v9 7
137*a9fa9459Szrj .#define bfd_mach_sparc_v9a 8 {* with ultrasparc add'ns. *}
138*a9fa9459Szrj .#define bfd_mach_sparc_v8plusb 9 {* with cheetah add'ns. *}
139*a9fa9459Szrj .#define bfd_mach_sparc_v9b 10 {* with cheetah add'ns. *}
140*a9fa9459Szrj .#define bfd_mach_sparc_v8plusc 11 {* with UA2005 and T1 add'ns. *}
141*a9fa9459Szrj .#define bfd_mach_sparc_v9c 12 {* with UA2005 and T1 add'ns. *}
142*a9fa9459Szrj .#define bfd_mach_sparc_v8plusd 13 {* with UA2007 and T3 add'ns. *}
143*a9fa9459Szrj .#define bfd_mach_sparc_v9d 14 {* with UA2007 and T3 add'ns. *}
144*a9fa9459Szrj .#define bfd_mach_sparc_v8pluse 15 {* with OSA2001 and T4 add'ns (no IMA). *}
145*a9fa9459Szrj .#define bfd_mach_sparc_v9e 16 {* with OSA2001 and T4 add'ns (no IMA). *}
146*a9fa9459Szrj .#define bfd_mach_sparc_v8plusv 17 {* with OSA2011 and T4 and IMA and FJMAU add'ns. *}
147*a9fa9459Szrj .#define bfd_mach_sparc_v9v 18 {* with OSA2011 and T4 and IMA and FJMAU add'ns. *}
148*a9fa9459Szrj .#define bfd_mach_sparc_v8plusm 19 {* with OSA2015 and M7 add'ns. *}
149*a9fa9459Szrj .#define bfd_mach_sparc_v9m 20 {* with OSA2015 and M7 add'ns. *}
150*a9fa9459Szrj .{* Nonzero if MACH has the v9 instruction set. *}
151*a9fa9459Szrj .#define bfd_mach_sparc_v9_p(mach) \
152*a9fa9459Szrj . ((mach) >= bfd_mach_sparc_v8plus && (mach) <= bfd_mach_sparc_v9m \
153*a9fa9459Szrj . && (mach) != bfd_mach_sparc_sparclite_le)
154*a9fa9459Szrj .{* Nonzero if MACH is a 64 bit sparc architecture. *}
155*a9fa9459Szrj .#define bfd_mach_sparc_64bit_p(mach) \
156*a9fa9459Szrj . ((mach) >= bfd_mach_sparc_v9 \
157*a9fa9459Szrj . && (mach) != bfd_mach_sparc_v8plusb \
158*a9fa9459Szrj . && (mach) != bfd_mach_sparc_v8plusc \
159*a9fa9459Szrj . && (mach) != bfd_mach_sparc_v8plusd \
160*a9fa9459Szrj . && (mach) != bfd_mach_sparc_v8pluse \
161*a9fa9459Szrj . && (mach) != bfd_mach_sparc_v8plusv \
162*a9fa9459Szrj . && (mach) != bfd_mach_sparc_v8plusm)
163*a9fa9459Szrj . bfd_arch_spu, {* PowerPC SPU *}
164*a9fa9459Szrj .#define bfd_mach_spu 256
165*a9fa9459Szrj . bfd_arch_mips, {* MIPS Rxxxx *}
166*a9fa9459Szrj .#define bfd_mach_mips3000 3000
167*a9fa9459Szrj .#define bfd_mach_mips3900 3900
168*a9fa9459Szrj .#define bfd_mach_mips4000 4000
169*a9fa9459Szrj .#define bfd_mach_mips4010 4010
170*a9fa9459Szrj .#define bfd_mach_mips4100 4100
171*a9fa9459Szrj .#define bfd_mach_mips4111 4111
172*a9fa9459Szrj .#define bfd_mach_mips4120 4120
173*a9fa9459Szrj .#define bfd_mach_mips4300 4300
174*a9fa9459Szrj .#define bfd_mach_mips4400 4400
175*a9fa9459Szrj .#define bfd_mach_mips4600 4600
176*a9fa9459Szrj .#define bfd_mach_mips4650 4650
177*a9fa9459Szrj .#define bfd_mach_mips5000 5000
178*a9fa9459Szrj .#define bfd_mach_mips5400 5400
179*a9fa9459Szrj .#define bfd_mach_mips5500 5500
180*a9fa9459Szrj .#define bfd_mach_mips5900 5900
181*a9fa9459Szrj .#define bfd_mach_mips6000 6000
182*a9fa9459Szrj .#define bfd_mach_mips7000 7000
183*a9fa9459Szrj .#define bfd_mach_mips8000 8000
184*a9fa9459Szrj .#define bfd_mach_mips9000 9000
185*a9fa9459Szrj .#define bfd_mach_mips10000 10000
186*a9fa9459Szrj .#define bfd_mach_mips12000 12000
187*a9fa9459Szrj .#define bfd_mach_mips14000 14000
188*a9fa9459Szrj .#define bfd_mach_mips16000 16000
189*a9fa9459Szrj .#define bfd_mach_mips16 16
190*a9fa9459Szrj .#define bfd_mach_mips5 5
191*a9fa9459Szrj .#define bfd_mach_mips_loongson_2e 3001
192*a9fa9459Szrj .#define bfd_mach_mips_loongson_2f 3002
193*a9fa9459Szrj .#define bfd_mach_mips_loongson_3a 3003
194*a9fa9459Szrj .#define bfd_mach_mips_sb1 12310201 {* octal 'SB', 01 *}
195*a9fa9459Szrj .#define bfd_mach_mips_octeon 6501
196*a9fa9459Szrj .#define bfd_mach_mips_octeonp 6601
197*a9fa9459Szrj .#define bfd_mach_mips_octeon2 6502
198*a9fa9459Szrj .#define bfd_mach_mips_octeon3 6503
199*a9fa9459Szrj .#define bfd_mach_mips_xlr 887682 {* decimal 'XLR' *}
200*a9fa9459Szrj .#define bfd_mach_mipsisa32 32
201*a9fa9459Szrj .#define bfd_mach_mipsisa32r2 33
202*a9fa9459Szrj .#define bfd_mach_mipsisa32r3 34
203*a9fa9459Szrj .#define bfd_mach_mipsisa32r5 36
204*a9fa9459Szrj .#define bfd_mach_mipsisa32r6 37
205*a9fa9459Szrj .#define bfd_mach_mipsisa64 64
206*a9fa9459Szrj .#define bfd_mach_mipsisa64r2 65
207*a9fa9459Szrj .#define bfd_mach_mipsisa64r3 66
208*a9fa9459Szrj .#define bfd_mach_mipsisa64r5 68
209*a9fa9459Szrj .#define bfd_mach_mipsisa64r6 69
210*a9fa9459Szrj .#define bfd_mach_mips_micromips 96
211*a9fa9459Szrj . bfd_arch_i386, {* Intel 386 *}
212*a9fa9459Szrj .#define bfd_mach_i386_intel_syntax (1 << 0)
213*a9fa9459Szrj .#define bfd_mach_i386_i8086 (1 << 1)
214*a9fa9459Szrj .#define bfd_mach_i386_i386 (1 << 2)
215*a9fa9459Szrj .#define bfd_mach_x86_64 (1 << 3)
216*a9fa9459Szrj .#define bfd_mach_x64_32 (1 << 4)
217*a9fa9459Szrj .#define bfd_mach_i386_i386_intel_syntax (bfd_mach_i386_i386 | bfd_mach_i386_intel_syntax)
218*a9fa9459Szrj .#define bfd_mach_x86_64_intel_syntax (bfd_mach_x86_64 | bfd_mach_i386_intel_syntax)
219*a9fa9459Szrj .#define bfd_mach_x64_32_intel_syntax (bfd_mach_x64_32 | bfd_mach_i386_intel_syntax)
220*a9fa9459Szrj . bfd_arch_l1om, {* Intel L1OM *}
221*a9fa9459Szrj .#define bfd_mach_l1om (1 << 5)
222*a9fa9459Szrj .#define bfd_mach_l1om_intel_syntax (bfd_mach_l1om | bfd_mach_i386_intel_syntax)
223*a9fa9459Szrj . bfd_arch_k1om, {* Intel K1OM *}
224*a9fa9459Szrj .#define bfd_mach_k1om (1 << 6)
225*a9fa9459Szrj .#define bfd_mach_k1om_intel_syntax (bfd_mach_k1om | bfd_mach_i386_intel_syntax)
226*a9fa9459Szrj .#define bfd_mach_i386_nacl (1 << 7)
227*a9fa9459Szrj .#define bfd_mach_i386_i386_nacl (bfd_mach_i386_i386 | bfd_mach_i386_nacl)
228*a9fa9459Szrj .#define bfd_mach_x86_64_nacl (bfd_mach_x86_64 | bfd_mach_i386_nacl)
229*a9fa9459Szrj .#define bfd_mach_x64_32_nacl (bfd_mach_x64_32 | bfd_mach_i386_nacl)
230*a9fa9459Szrj . bfd_arch_iamcu, {* Intel MCU *}
231*a9fa9459Szrj .#define bfd_mach_iamcu (1 << 8)
232*a9fa9459Szrj .#define bfd_mach_i386_iamcu (bfd_mach_i386_i386 | bfd_mach_iamcu)
233*a9fa9459Szrj .#define bfd_mach_i386_iamcu_intel_syntax (bfd_mach_i386_iamcu | bfd_mach_i386_intel_syntax)
234*a9fa9459Szrj . bfd_arch_we32k, {* AT&T WE32xxx *}
235*a9fa9459Szrj . bfd_arch_tahoe, {* CCI/Harris Tahoe *}
236*a9fa9459Szrj . bfd_arch_i860, {* Intel 860 *}
237*a9fa9459Szrj . bfd_arch_i370, {* IBM 360/370 Mainframes *}
238*a9fa9459Szrj . bfd_arch_romp, {* IBM ROMP PC/RT *}
239*a9fa9459Szrj . bfd_arch_convex, {* Convex *}
240*a9fa9459Szrj . bfd_arch_m88k, {* Motorola 88xxx *}
241*a9fa9459Szrj . bfd_arch_m98k, {* Motorola 98xxx *}
242*a9fa9459Szrj . bfd_arch_pyramid, {* Pyramid Technology *}
243*a9fa9459Szrj . bfd_arch_h8300, {* Renesas H8/300 (formerly Hitachi H8/300) *}
244*a9fa9459Szrj .#define bfd_mach_h8300 1
245*a9fa9459Szrj .#define bfd_mach_h8300h 2
246*a9fa9459Szrj .#define bfd_mach_h8300s 3
247*a9fa9459Szrj .#define bfd_mach_h8300hn 4
248*a9fa9459Szrj .#define bfd_mach_h8300sn 5
249*a9fa9459Szrj .#define bfd_mach_h8300sx 6
250*a9fa9459Szrj .#define bfd_mach_h8300sxn 7
251*a9fa9459Szrj . bfd_arch_pdp11, {* DEC PDP-11 *}
252*a9fa9459Szrj . bfd_arch_plugin,
253*a9fa9459Szrj . bfd_arch_powerpc, {* PowerPC *}
254*a9fa9459Szrj .#define bfd_mach_ppc 32
255*a9fa9459Szrj .#define bfd_mach_ppc64 64
256*a9fa9459Szrj .#define bfd_mach_ppc_403 403
257*a9fa9459Szrj .#define bfd_mach_ppc_403gc 4030
258*a9fa9459Szrj .#define bfd_mach_ppc_405 405
259*a9fa9459Szrj .#define bfd_mach_ppc_505 505
260*a9fa9459Szrj .#define bfd_mach_ppc_601 601
261*a9fa9459Szrj .#define bfd_mach_ppc_602 602
262*a9fa9459Szrj .#define bfd_mach_ppc_603 603
263*a9fa9459Szrj .#define bfd_mach_ppc_ec603e 6031
264*a9fa9459Szrj .#define bfd_mach_ppc_604 604
265*a9fa9459Szrj .#define bfd_mach_ppc_620 620
266*a9fa9459Szrj .#define bfd_mach_ppc_630 630
267*a9fa9459Szrj .#define bfd_mach_ppc_750 750
268*a9fa9459Szrj .#define bfd_mach_ppc_860 860
269*a9fa9459Szrj .#define bfd_mach_ppc_a35 35
270*a9fa9459Szrj .#define bfd_mach_ppc_rs64ii 642
271*a9fa9459Szrj .#define bfd_mach_ppc_rs64iii 643
272*a9fa9459Szrj .#define bfd_mach_ppc_7400 7400
273*a9fa9459Szrj .#define bfd_mach_ppc_e500 500
274*a9fa9459Szrj .#define bfd_mach_ppc_e500mc 5001
275*a9fa9459Szrj .#define bfd_mach_ppc_e500mc64 5005
276*a9fa9459Szrj .#define bfd_mach_ppc_e5500 5006
277*a9fa9459Szrj .#define bfd_mach_ppc_e6500 5007
278*a9fa9459Szrj .#define bfd_mach_ppc_titan 83
279*a9fa9459Szrj .#define bfd_mach_ppc_vle 84
280*a9fa9459Szrj . bfd_arch_rs6000, {* IBM RS/6000 *}
281*a9fa9459Szrj .#define bfd_mach_rs6k 6000
282*a9fa9459Szrj .#define bfd_mach_rs6k_rs1 6001
283*a9fa9459Szrj .#define bfd_mach_rs6k_rsc 6003
284*a9fa9459Szrj .#define bfd_mach_rs6k_rs2 6002
285*a9fa9459Szrj . bfd_arch_hppa, {* HP PA RISC *}
286*a9fa9459Szrj .#define bfd_mach_hppa10 10
287*a9fa9459Szrj .#define bfd_mach_hppa11 11
288*a9fa9459Szrj .#define bfd_mach_hppa20 20
289*a9fa9459Szrj .#define bfd_mach_hppa20w 25
290*a9fa9459Szrj . bfd_arch_d10v, {* Mitsubishi D10V *}
291*a9fa9459Szrj .#define bfd_mach_d10v 1
292*a9fa9459Szrj .#define bfd_mach_d10v_ts2 2
293*a9fa9459Szrj .#define bfd_mach_d10v_ts3 3
294*a9fa9459Szrj . bfd_arch_d30v, {* Mitsubishi D30V *}
295*a9fa9459Szrj . bfd_arch_dlx, {* DLX *}
296*a9fa9459Szrj . bfd_arch_m68hc11, {* Motorola 68HC11 *}
297*a9fa9459Szrj . bfd_arch_m68hc12, {* Motorola 68HC12 *}
298*a9fa9459Szrj .#define bfd_mach_m6812_default 0
299*a9fa9459Szrj .#define bfd_mach_m6812 1
300*a9fa9459Szrj .#define bfd_mach_m6812s 2
301*a9fa9459Szrj . bfd_arch_m9s12x, {* Freescale S12X *}
302*a9fa9459Szrj . bfd_arch_m9s12xg, {* Freescale XGATE *}
303*a9fa9459Szrj . bfd_arch_z8k, {* Zilog Z8000 *}
304*a9fa9459Szrj .#define bfd_mach_z8001 1
305*a9fa9459Szrj .#define bfd_mach_z8002 2
306*a9fa9459Szrj . bfd_arch_h8500, {* Renesas H8/500 (formerly Hitachi H8/500) *}
307*a9fa9459Szrj . bfd_arch_sh, {* Renesas / SuperH SH (formerly Hitachi SH) *}
308*a9fa9459Szrj .#define bfd_mach_sh 1
309*a9fa9459Szrj .#define bfd_mach_sh2 0x20
310*a9fa9459Szrj .#define bfd_mach_sh_dsp 0x2d
311*a9fa9459Szrj .#define bfd_mach_sh2a 0x2a
312*a9fa9459Szrj .#define bfd_mach_sh2a_nofpu 0x2b
313*a9fa9459Szrj .#define bfd_mach_sh2a_nofpu_or_sh4_nommu_nofpu 0x2a1
314*a9fa9459Szrj .#define bfd_mach_sh2a_nofpu_or_sh3_nommu 0x2a2
315*a9fa9459Szrj .#define bfd_mach_sh2a_or_sh4 0x2a3
316*a9fa9459Szrj .#define bfd_mach_sh2a_or_sh3e 0x2a4
317*a9fa9459Szrj .#define bfd_mach_sh2e 0x2e
318*a9fa9459Szrj .#define bfd_mach_sh3 0x30
319*a9fa9459Szrj .#define bfd_mach_sh3_nommu 0x31
320*a9fa9459Szrj .#define bfd_mach_sh3_dsp 0x3d
321*a9fa9459Szrj .#define bfd_mach_sh3e 0x3e
322*a9fa9459Szrj .#define bfd_mach_sh4 0x40
323*a9fa9459Szrj .#define bfd_mach_sh4_nofpu 0x41
324*a9fa9459Szrj .#define bfd_mach_sh4_nommu_nofpu 0x42
325*a9fa9459Szrj .#define bfd_mach_sh4a 0x4a
326*a9fa9459Szrj .#define bfd_mach_sh4a_nofpu 0x4b
327*a9fa9459Szrj .#define bfd_mach_sh4al_dsp 0x4d
328*a9fa9459Szrj .#define bfd_mach_sh5 0x50
329*a9fa9459Szrj . bfd_arch_alpha, {* Dec Alpha *}
330*a9fa9459Szrj .#define bfd_mach_alpha_ev4 0x10
331*a9fa9459Szrj .#define bfd_mach_alpha_ev5 0x20
332*a9fa9459Szrj .#define bfd_mach_alpha_ev6 0x30
333*a9fa9459Szrj . bfd_arch_arm, {* Advanced Risc Machines ARM. *}
334*a9fa9459Szrj .#define bfd_mach_arm_unknown 0
335*a9fa9459Szrj .#define bfd_mach_arm_2 1
336*a9fa9459Szrj .#define bfd_mach_arm_2a 2
337*a9fa9459Szrj .#define bfd_mach_arm_3 3
338*a9fa9459Szrj .#define bfd_mach_arm_3M 4
339*a9fa9459Szrj .#define bfd_mach_arm_4 5
340*a9fa9459Szrj .#define bfd_mach_arm_4T 6
341*a9fa9459Szrj .#define bfd_mach_arm_5 7
342*a9fa9459Szrj .#define bfd_mach_arm_5T 8
343*a9fa9459Szrj .#define bfd_mach_arm_5TE 9
344*a9fa9459Szrj .#define bfd_mach_arm_XScale 10
345*a9fa9459Szrj .#define bfd_mach_arm_ep9312 11
346*a9fa9459Szrj .#define bfd_mach_arm_iWMMXt 12
347*a9fa9459Szrj .#define bfd_mach_arm_iWMMXt2 13
348*a9fa9459Szrj . bfd_arch_nds32, {* Andes NDS32 *}
349*a9fa9459Szrj .#define bfd_mach_n1 1
350*a9fa9459Szrj .#define bfd_mach_n1h 2
351*a9fa9459Szrj .#define bfd_mach_n1h_v2 3
352*a9fa9459Szrj .#define bfd_mach_n1h_v3 4
353*a9fa9459Szrj .#define bfd_mach_n1h_v3m 5
354*a9fa9459Szrj . bfd_arch_ns32k, {* National Semiconductors ns32000 *}
355*a9fa9459Szrj . bfd_arch_w65, {* WDC 65816 *}
356*a9fa9459Szrj . bfd_arch_tic30, {* Texas Instruments TMS320C30 *}
357*a9fa9459Szrj . bfd_arch_tic4x, {* Texas Instruments TMS320C3X/4X *}
358*a9fa9459Szrj .#define bfd_mach_tic3x 30
359*a9fa9459Szrj .#define bfd_mach_tic4x 40
360*a9fa9459Szrj . bfd_arch_tic54x, {* Texas Instruments TMS320C54X *}
361*a9fa9459Szrj . bfd_arch_tic6x, {* Texas Instruments TMS320C6X *}
362*a9fa9459Szrj . bfd_arch_tic80, {* TI TMS320c80 (MVP) *}
363*a9fa9459Szrj . bfd_arch_v850, {* NEC V850 *}
364*a9fa9459Szrj . bfd_arch_v850_rh850,{* NEC V850 (using RH850 ABI) *}
365*a9fa9459Szrj .#define bfd_mach_v850 1
366*a9fa9459Szrj .#define bfd_mach_v850e 'E'
367*a9fa9459Szrj .#define bfd_mach_v850e1 '1'
368*a9fa9459Szrj .#define bfd_mach_v850e2 0x4532
369*a9fa9459Szrj .#define bfd_mach_v850e2v3 0x45325633
370*a9fa9459Szrj .#define bfd_mach_v850e3v5 0x45335635 {* ('E'|'3'|'V'|'5') *}
371*a9fa9459Szrj . bfd_arch_arc, {* ARC Cores *}
372*a9fa9459Szrj .#define bfd_mach_arc_a4 0
373*a9fa9459Szrj .#define bfd_mach_arc_a5 1
374*a9fa9459Szrj .#define bfd_mach_arc_arc600 2
375*a9fa9459Szrj .#define bfd_mach_arc_arc601 4
376*a9fa9459Szrj .#define bfd_mach_arc_arc700 3
377*a9fa9459Szrj .#define bfd_mach_arc_arcv2 5
378*a9fa9459Szrj . bfd_arch_m32c, {* Renesas M16C/M32C. *}
379*a9fa9459Szrj .#define bfd_mach_m16c 0x75
380*a9fa9459Szrj .#define bfd_mach_m32c 0x78
381*a9fa9459Szrj . bfd_arch_m32r, {* Renesas M32R (formerly Mitsubishi M32R/D) *}
382*a9fa9459Szrj .#define bfd_mach_m32r 1 {* For backwards compatibility. *}
383*a9fa9459Szrj .#define bfd_mach_m32rx 'x'
384*a9fa9459Szrj .#define bfd_mach_m32r2 '2'
385*a9fa9459Szrj . bfd_arch_mn10200, {* Matsushita MN10200 *}
386*a9fa9459Szrj . bfd_arch_mn10300, {* Matsushita MN10300 *}
387*a9fa9459Szrj .#define bfd_mach_mn10300 300
388*a9fa9459Szrj .#define bfd_mach_am33 330
389*a9fa9459Szrj .#define bfd_mach_am33_2 332
390*a9fa9459Szrj . bfd_arch_fr30,
391*a9fa9459Szrj .#define bfd_mach_fr30 0x46523330
392*a9fa9459Szrj . bfd_arch_frv,
393*a9fa9459Szrj .#define bfd_mach_frv 1
394*a9fa9459Szrj .#define bfd_mach_frvsimple 2
395*a9fa9459Szrj .#define bfd_mach_fr300 300
396*a9fa9459Szrj .#define bfd_mach_fr400 400
397*a9fa9459Szrj .#define bfd_mach_fr450 450
398*a9fa9459Szrj .#define bfd_mach_frvtomcat 499 {* fr500 prototype *}
399*a9fa9459Szrj .#define bfd_mach_fr500 500
400*a9fa9459Szrj .#define bfd_mach_fr550 550
401*a9fa9459Szrj . bfd_arch_moxie, {* The moxie processor *}
402*a9fa9459Szrj .#define bfd_mach_moxie 1
403*a9fa9459Szrj . bfd_arch_ft32, {* The ft32 processor *}
404*a9fa9459Szrj .#define bfd_mach_ft32 1
405*a9fa9459Szrj . bfd_arch_mcore,
406*a9fa9459Szrj . bfd_arch_mep,
407*a9fa9459Szrj .#define bfd_mach_mep 1
408*a9fa9459Szrj .#define bfd_mach_mep_h1 0x6831
409*a9fa9459Szrj .#define bfd_mach_mep_c5 0x6335
410*a9fa9459Szrj . bfd_arch_metag,
411*a9fa9459Szrj .#define bfd_mach_metag 1
412*a9fa9459Szrj . bfd_arch_ia64, {* HP/Intel ia64 *}
413*a9fa9459Szrj .#define bfd_mach_ia64_elf64 64
414*a9fa9459Szrj .#define bfd_mach_ia64_elf32 32
415*a9fa9459Szrj . bfd_arch_ip2k, {* Ubicom IP2K microcontrollers. *}
416*a9fa9459Szrj .#define bfd_mach_ip2022 1
417*a9fa9459Szrj .#define bfd_mach_ip2022ext 2
418*a9fa9459Szrj . bfd_arch_iq2000, {* Vitesse IQ2000. *}
419*a9fa9459Szrj .#define bfd_mach_iq2000 1
420*a9fa9459Szrj .#define bfd_mach_iq10 2
421*a9fa9459Szrj . bfd_arch_epiphany, {* Adapteva EPIPHANY *}
422*a9fa9459Szrj .#define bfd_mach_epiphany16 1
423*a9fa9459Szrj .#define bfd_mach_epiphany32 2
424*a9fa9459Szrj . bfd_arch_mt,
425*a9fa9459Szrj .#define bfd_mach_ms1 1
426*a9fa9459Szrj .#define bfd_mach_mrisc2 2
427*a9fa9459Szrj .#define bfd_mach_ms2 3
428*a9fa9459Szrj . bfd_arch_pj,
429*a9fa9459Szrj . bfd_arch_avr, {* Atmel AVR microcontrollers. *}
430*a9fa9459Szrj .#define bfd_mach_avr1 1
431*a9fa9459Szrj .#define bfd_mach_avr2 2
432*a9fa9459Szrj .#define bfd_mach_avr25 25
433*a9fa9459Szrj .#define bfd_mach_avr3 3
434*a9fa9459Szrj .#define bfd_mach_avr31 31
435*a9fa9459Szrj .#define bfd_mach_avr35 35
436*a9fa9459Szrj .#define bfd_mach_avr4 4
437*a9fa9459Szrj .#define bfd_mach_avr5 5
438*a9fa9459Szrj .#define bfd_mach_avr51 51
439*a9fa9459Szrj .#define bfd_mach_avr6 6
440*a9fa9459Szrj .#define bfd_mach_avrtiny 100
441*a9fa9459Szrj .#define bfd_mach_avrxmega1 101
442*a9fa9459Szrj .#define bfd_mach_avrxmega2 102
443*a9fa9459Szrj .#define bfd_mach_avrxmega3 103
444*a9fa9459Szrj .#define bfd_mach_avrxmega4 104
445*a9fa9459Szrj .#define bfd_mach_avrxmega5 105
446*a9fa9459Szrj .#define bfd_mach_avrxmega6 106
447*a9fa9459Szrj .#define bfd_mach_avrxmega7 107
448*a9fa9459Szrj . bfd_arch_bfin, {* ADI Blackfin *}
449*a9fa9459Szrj .#define bfd_mach_bfin 1
450*a9fa9459Szrj . bfd_arch_cr16, {* National Semiconductor CompactRISC (ie CR16). *}
451*a9fa9459Szrj .#define bfd_mach_cr16 1
452*a9fa9459Szrj . bfd_arch_cr16c, {* National Semiconductor CompactRISC. *}
453*a9fa9459Szrj .#define bfd_mach_cr16c 1
454*a9fa9459Szrj . bfd_arch_crx, {* National Semiconductor CRX. *}
455*a9fa9459Szrj .#define bfd_mach_crx 1
456*a9fa9459Szrj . bfd_arch_cris, {* Axis CRIS *}
457*a9fa9459Szrj .#define bfd_mach_cris_v0_v10 255
458*a9fa9459Szrj .#define bfd_mach_cris_v32 32
459*a9fa9459Szrj .#define bfd_mach_cris_v10_v32 1032
460*a9fa9459Szrj . bfd_arch_rl78,
461*a9fa9459Szrj .#define bfd_mach_rl78 0x75
462*a9fa9459Szrj . bfd_arch_rx, {* Renesas RX. *}
463*a9fa9459Szrj .#define bfd_mach_rx 0x75
464*a9fa9459Szrj . bfd_arch_s390, {* IBM s390 *}
465*a9fa9459Szrj .#define bfd_mach_s390_31 31
466*a9fa9459Szrj .#define bfd_mach_s390_64 64
467*a9fa9459Szrj . bfd_arch_score, {* Sunplus score *}
468*a9fa9459Szrj .#define bfd_mach_score3 3
469*a9fa9459Szrj .#define bfd_mach_score7 7
470*a9fa9459Szrj . bfd_arch_mmix, {* Donald Knuth's educational processor. *}
471*a9fa9459Szrj . bfd_arch_xstormy16,
472*a9fa9459Szrj .#define bfd_mach_xstormy16 1
473*a9fa9459Szrj . bfd_arch_msp430, {* Texas Instruments MSP430 architecture. *}
474*a9fa9459Szrj .#define bfd_mach_msp11 11
475*a9fa9459Szrj .#define bfd_mach_msp110 110
476*a9fa9459Szrj .#define bfd_mach_msp12 12
477*a9fa9459Szrj .#define bfd_mach_msp13 13
478*a9fa9459Szrj .#define bfd_mach_msp14 14
479*a9fa9459Szrj .#define bfd_mach_msp15 15
480*a9fa9459Szrj .#define bfd_mach_msp16 16
481*a9fa9459Szrj .#define bfd_mach_msp20 20
482*a9fa9459Szrj .#define bfd_mach_msp21 21
483*a9fa9459Szrj .#define bfd_mach_msp22 22
484*a9fa9459Szrj .#define bfd_mach_msp23 23
485*a9fa9459Szrj .#define bfd_mach_msp24 24
486*a9fa9459Szrj .#define bfd_mach_msp26 26
487*a9fa9459Szrj .#define bfd_mach_msp31 31
488*a9fa9459Szrj .#define bfd_mach_msp32 32
489*a9fa9459Szrj .#define bfd_mach_msp33 33
490*a9fa9459Szrj .#define bfd_mach_msp41 41
491*a9fa9459Szrj .#define bfd_mach_msp42 42
492*a9fa9459Szrj .#define bfd_mach_msp43 43
493*a9fa9459Szrj .#define bfd_mach_msp44 44
494*a9fa9459Szrj .#define bfd_mach_msp430x 45
495*a9fa9459Szrj .#define bfd_mach_msp46 46
496*a9fa9459Szrj .#define bfd_mach_msp47 47
497*a9fa9459Szrj .#define bfd_mach_msp54 54
498*a9fa9459Szrj . bfd_arch_xc16x, {* Infineon's XC16X Series. *}
499*a9fa9459Szrj .#define bfd_mach_xc16x 1
500*a9fa9459Szrj .#define bfd_mach_xc16xl 2
501*a9fa9459Szrj .#define bfd_mach_xc16xs 3
502*a9fa9459Szrj . bfd_arch_xgate, {* Freescale XGATE *}
503*a9fa9459Szrj .#define bfd_mach_xgate 1
504*a9fa9459Szrj . bfd_arch_xtensa, {* Tensilica's Xtensa cores. *}
505*a9fa9459Szrj .#define bfd_mach_xtensa 1
506*a9fa9459Szrj . bfd_arch_z80,
507*a9fa9459Szrj .#define bfd_mach_z80strict 1 {* No undocumented opcodes. *}
508*a9fa9459Szrj .#define bfd_mach_z80 3 {* With ixl, ixh, iyl, and iyh. *}
509*a9fa9459Szrj .#define bfd_mach_z80full 7 {* All undocumented instructions. *}
510*a9fa9459Szrj .#define bfd_mach_r800 11 {* R800: successor with multiplication. *}
511*a9fa9459Szrj . bfd_arch_lm32, {* Lattice Mico32 *}
512*a9fa9459Szrj .#define bfd_mach_lm32 1
513*a9fa9459Szrj . bfd_arch_microblaze,{* Xilinx MicroBlaze. *}
514*a9fa9459Szrj . bfd_arch_tilepro, {* Tilera TILEPro *}
515*a9fa9459Szrj . bfd_arch_tilegx, {* Tilera TILE-Gx *}
516*a9fa9459Szrj .#define bfd_mach_tilepro 1
517*a9fa9459Szrj .#define bfd_mach_tilegx 1
518*a9fa9459Szrj .#define bfd_mach_tilegx32 2
519*a9fa9459Szrj . bfd_arch_aarch64, {* AArch64 *}
520*a9fa9459Szrj .#define bfd_mach_aarch64 0
521*a9fa9459Szrj .#define bfd_mach_aarch64_ilp32 32
522*a9fa9459Szrj . bfd_arch_nios2, {* Nios II *}
523*a9fa9459Szrj .#define bfd_mach_nios2 0
524*a9fa9459Szrj .#define bfd_mach_nios2r1 1
525*a9fa9459Szrj .#define bfd_mach_nios2r2 2
526*a9fa9459Szrj . bfd_arch_visium, {* Visium *}
527*a9fa9459Szrj .#define bfd_mach_visium 1
528*a9fa9459Szrj . bfd_arch_last
529*a9fa9459Szrj . };
530*a9fa9459Szrj */
531*a9fa9459Szrj
532*a9fa9459Szrj /*
533*a9fa9459Szrj SUBSECTION
534*a9fa9459Szrj bfd_arch_info
535*a9fa9459Szrj
536*a9fa9459Szrj DESCRIPTION
537*a9fa9459Szrj This structure contains information on architectures for use
538*a9fa9459Szrj within BFD.
539*a9fa9459Szrj
540*a9fa9459Szrj .
541*a9fa9459Szrj .typedef struct bfd_arch_info
542*a9fa9459Szrj .{
543*a9fa9459Szrj . int bits_per_word;
544*a9fa9459Szrj . int bits_per_address;
545*a9fa9459Szrj . int bits_per_byte;
546*a9fa9459Szrj . enum bfd_architecture arch;
547*a9fa9459Szrj . unsigned long mach;
548*a9fa9459Szrj . const char *arch_name;
549*a9fa9459Szrj . const char *printable_name;
550*a9fa9459Szrj . unsigned int section_align_power;
551*a9fa9459Szrj . {* TRUE if this is the default machine for the architecture.
552*a9fa9459Szrj . The default arch should be the first entry for an arch so that
553*a9fa9459Szrj . all the entries for that arch can be accessed via <<next>>. *}
554*a9fa9459Szrj . bfd_boolean the_default;
555*a9fa9459Szrj . const struct bfd_arch_info * (*compatible)
556*a9fa9459Szrj . (const struct bfd_arch_info *a, const struct bfd_arch_info *b);
557*a9fa9459Szrj .
558*a9fa9459Szrj . bfd_boolean (*scan) (const struct bfd_arch_info *, const char *);
559*a9fa9459Szrj .
560*a9fa9459Szrj . {* Allocate via bfd_malloc and return a fill buffer of size COUNT. If
561*a9fa9459Szrj . IS_BIGENDIAN is TRUE, the order of bytes is big endian. If CODE is
562*a9fa9459Szrj . TRUE, the buffer contains code. *}
563*a9fa9459Szrj . void *(*fill) (bfd_size_type count, bfd_boolean is_bigendian,
564*a9fa9459Szrj . bfd_boolean code);
565*a9fa9459Szrj .
566*a9fa9459Szrj . const struct bfd_arch_info *next;
567*a9fa9459Szrj .}
568*a9fa9459Szrj .bfd_arch_info_type;
569*a9fa9459Szrj .
570*a9fa9459Szrj */
571*a9fa9459Szrj
572*a9fa9459Szrj extern const bfd_arch_info_type bfd_aarch64_arch;
573*a9fa9459Szrj extern const bfd_arch_info_type bfd_alpha_arch;
574*a9fa9459Szrj extern const bfd_arch_info_type bfd_arc_arch;
575*a9fa9459Szrj extern const bfd_arch_info_type bfd_arm_arch;
576*a9fa9459Szrj extern const bfd_arch_info_type bfd_avr_arch;
577*a9fa9459Szrj extern const bfd_arch_info_type bfd_bfin_arch;
578*a9fa9459Szrj extern const bfd_arch_info_type bfd_cr16_arch;
579*a9fa9459Szrj extern const bfd_arch_info_type bfd_cr16c_arch;
580*a9fa9459Szrj extern const bfd_arch_info_type bfd_cris_arch;
581*a9fa9459Szrj extern const bfd_arch_info_type bfd_crx_arch;
582*a9fa9459Szrj extern const bfd_arch_info_type bfd_d10v_arch;
583*a9fa9459Szrj extern const bfd_arch_info_type bfd_d30v_arch;
584*a9fa9459Szrj extern const bfd_arch_info_type bfd_dlx_arch;
585*a9fa9459Szrj extern const bfd_arch_info_type bfd_epiphany_arch;
586*a9fa9459Szrj extern const bfd_arch_info_type bfd_fr30_arch;
587*a9fa9459Szrj extern const bfd_arch_info_type bfd_frv_arch;
588*a9fa9459Szrj extern const bfd_arch_info_type bfd_h8300_arch;
589*a9fa9459Szrj extern const bfd_arch_info_type bfd_h8500_arch;
590*a9fa9459Szrj extern const bfd_arch_info_type bfd_hppa_arch;
591*a9fa9459Szrj extern const bfd_arch_info_type bfd_i370_arch;
592*a9fa9459Szrj extern const bfd_arch_info_type bfd_i386_arch;
593*a9fa9459Szrj extern const bfd_arch_info_type bfd_iamcu_arch;
594*a9fa9459Szrj extern const bfd_arch_info_type bfd_i860_arch;
595*a9fa9459Szrj extern const bfd_arch_info_type bfd_i960_arch;
596*a9fa9459Szrj extern const bfd_arch_info_type bfd_ia64_arch;
597*a9fa9459Szrj extern const bfd_arch_info_type bfd_ip2k_arch;
598*a9fa9459Szrj extern const bfd_arch_info_type bfd_iq2000_arch;
599*a9fa9459Szrj extern const bfd_arch_info_type bfd_k1om_arch;
600*a9fa9459Szrj extern const bfd_arch_info_type bfd_l1om_arch;
601*a9fa9459Szrj extern const bfd_arch_info_type bfd_lm32_arch;
602*a9fa9459Szrj extern const bfd_arch_info_type bfd_m32c_arch;
603*a9fa9459Szrj extern const bfd_arch_info_type bfd_m32r_arch;
604*a9fa9459Szrj extern const bfd_arch_info_type bfd_m68hc11_arch;
605*a9fa9459Szrj extern const bfd_arch_info_type bfd_m68hc12_arch;
606*a9fa9459Szrj extern const bfd_arch_info_type bfd_m9s12x_arch;
607*a9fa9459Szrj extern const bfd_arch_info_type bfd_m9s12xg_arch;
608*a9fa9459Szrj extern const bfd_arch_info_type bfd_m68k_arch;
609*a9fa9459Szrj extern const bfd_arch_info_type bfd_m88k_arch;
610*a9fa9459Szrj extern const bfd_arch_info_type bfd_mcore_arch;
611*a9fa9459Szrj extern const bfd_arch_info_type bfd_mep_arch;
612*a9fa9459Szrj extern const bfd_arch_info_type bfd_metag_arch;
613*a9fa9459Szrj extern const bfd_arch_info_type bfd_mips_arch;
614*a9fa9459Szrj extern const bfd_arch_info_type bfd_microblaze_arch;
615*a9fa9459Szrj extern const bfd_arch_info_type bfd_mmix_arch;
616*a9fa9459Szrj extern const bfd_arch_info_type bfd_mn10200_arch;
617*a9fa9459Szrj extern const bfd_arch_info_type bfd_mn10300_arch;
618*a9fa9459Szrj extern const bfd_arch_info_type bfd_moxie_arch;
619*a9fa9459Szrj extern const bfd_arch_info_type bfd_ft32_arch;
620*a9fa9459Szrj extern const bfd_arch_info_type bfd_msp430_arch;
621*a9fa9459Szrj extern const bfd_arch_info_type bfd_mt_arch;
622*a9fa9459Szrj extern const bfd_arch_info_type bfd_nds32_arch;
623*a9fa9459Szrj extern const bfd_arch_info_type bfd_nios2_arch;
624*a9fa9459Szrj extern const bfd_arch_info_type bfd_ns32k_arch;
625*a9fa9459Szrj extern const bfd_arch_info_type bfd_or1k_arch;
626*a9fa9459Szrj extern const bfd_arch_info_type bfd_pdp11_arch;
627*a9fa9459Szrj extern const bfd_arch_info_type bfd_pj_arch;
628*a9fa9459Szrj extern const bfd_arch_info_type bfd_plugin_arch;
629*a9fa9459Szrj extern const bfd_arch_info_type bfd_powerpc_archs[];
630*a9fa9459Szrj #define bfd_powerpc_arch bfd_powerpc_archs[0]
631*a9fa9459Szrj extern const bfd_arch_info_type bfd_rs6000_arch;
632*a9fa9459Szrj extern const bfd_arch_info_type bfd_rl78_arch;
633*a9fa9459Szrj extern const bfd_arch_info_type bfd_rx_arch;
634*a9fa9459Szrj extern const bfd_arch_info_type bfd_s390_arch;
635*a9fa9459Szrj extern const bfd_arch_info_type bfd_score_arch;
636*a9fa9459Szrj extern const bfd_arch_info_type bfd_sh_arch;
637*a9fa9459Szrj extern const bfd_arch_info_type bfd_sparc_arch;
638*a9fa9459Szrj extern const bfd_arch_info_type bfd_spu_arch;
639*a9fa9459Szrj extern const bfd_arch_info_type bfd_tic30_arch;
640*a9fa9459Szrj extern const bfd_arch_info_type bfd_tic4x_arch;
641*a9fa9459Szrj extern const bfd_arch_info_type bfd_tic54x_arch;
642*a9fa9459Szrj extern const bfd_arch_info_type bfd_tic6x_arch;
643*a9fa9459Szrj extern const bfd_arch_info_type bfd_tic80_arch;
644*a9fa9459Szrj extern const bfd_arch_info_type bfd_tilegx_arch;
645*a9fa9459Szrj extern const bfd_arch_info_type bfd_tilepro_arch;
646*a9fa9459Szrj extern const bfd_arch_info_type bfd_v850_arch;
647*a9fa9459Szrj extern const bfd_arch_info_type bfd_v850_rh850_arch;
648*a9fa9459Szrj extern const bfd_arch_info_type bfd_vax_arch;
649*a9fa9459Szrj extern const bfd_arch_info_type bfd_visium_arch;
650*a9fa9459Szrj extern const bfd_arch_info_type bfd_w65_arch;
651*a9fa9459Szrj extern const bfd_arch_info_type bfd_we32k_arch;
652*a9fa9459Szrj extern const bfd_arch_info_type bfd_xstormy16_arch;
653*a9fa9459Szrj extern const bfd_arch_info_type bfd_xtensa_arch;
654*a9fa9459Szrj extern const bfd_arch_info_type bfd_xc16x_arch;
655*a9fa9459Szrj extern const bfd_arch_info_type bfd_xgate_arch;
656*a9fa9459Szrj extern const bfd_arch_info_type bfd_z80_arch;
657*a9fa9459Szrj extern const bfd_arch_info_type bfd_z8k_arch;
658*a9fa9459Szrj
659*a9fa9459Szrj static const bfd_arch_info_type * const bfd_archures_list[] =
660*a9fa9459Szrj {
661*a9fa9459Szrj #ifdef SELECT_ARCHITECTURES
662*a9fa9459Szrj SELECT_ARCHITECTURES,
663*a9fa9459Szrj #else
664*a9fa9459Szrj &bfd_aarch64_arch,
665*a9fa9459Szrj &bfd_alpha_arch,
666*a9fa9459Szrj &bfd_arc_arch,
667*a9fa9459Szrj &bfd_arm_arch,
668*a9fa9459Szrj &bfd_avr_arch,
669*a9fa9459Szrj &bfd_bfin_arch,
670*a9fa9459Szrj &bfd_cr16_arch,
671*a9fa9459Szrj &bfd_cr16c_arch,
672*a9fa9459Szrj &bfd_cris_arch,
673*a9fa9459Szrj &bfd_crx_arch,
674*a9fa9459Szrj &bfd_d10v_arch,
675*a9fa9459Szrj &bfd_d30v_arch,
676*a9fa9459Szrj &bfd_dlx_arch,
677*a9fa9459Szrj &bfd_epiphany_arch,
678*a9fa9459Szrj &bfd_fr30_arch,
679*a9fa9459Szrj &bfd_frv_arch,
680*a9fa9459Szrj &bfd_h8300_arch,
681*a9fa9459Szrj &bfd_h8500_arch,
682*a9fa9459Szrj &bfd_hppa_arch,
683*a9fa9459Szrj &bfd_i370_arch,
684*a9fa9459Szrj &bfd_i386_arch,
685*a9fa9459Szrj &bfd_iamcu_arch,
686*a9fa9459Szrj &bfd_i860_arch,
687*a9fa9459Szrj &bfd_i960_arch,
688*a9fa9459Szrj &bfd_ia64_arch,
689*a9fa9459Szrj &bfd_ip2k_arch,
690*a9fa9459Szrj &bfd_iq2000_arch,
691*a9fa9459Szrj &bfd_k1om_arch,
692*a9fa9459Szrj &bfd_l1om_arch,
693*a9fa9459Szrj &bfd_lm32_arch,
694*a9fa9459Szrj &bfd_m32c_arch,
695*a9fa9459Szrj &bfd_m32r_arch,
696*a9fa9459Szrj &bfd_m68hc11_arch,
697*a9fa9459Szrj &bfd_m68hc12_arch,
698*a9fa9459Szrj &bfd_m9s12x_arch,
699*a9fa9459Szrj &bfd_m9s12xg_arch,
700*a9fa9459Szrj &bfd_m68k_arch,
701*a9fa9459Szrj &bfd_m88k_arch,
702*a9fa9459Szrj &bfd_mcore_arch,
703*a9fa9459Szrj &bfd_mep_arch,
704*a9fa9459Szrj &bfd_metag_arch,
705*a9fa9459Szrj &bfd_microblaze_arch,
706*a9fa9459Szrj &bfd_mips_arch,
707*a9fa9459Szrj &bfd_mmix_arch,
708*a9fa9459Szrj &bfd_mn10200_arch,
709*a9fa9459Szrj &bfd_mn10300_arch,
710*a9fa9459Szrj &bfd_moxie_arch,
711*a9fa9459Szrj &bfd_ft32_arch,
712*a9fa9459Szrj &bfd_msp430_arch,
713*a9fa9459Szrj &bfd_mt_arch,
714*a9fa9459Szrj &bfd_nds32_arch,
715*a9fa9459Szrj &bfd_nios2_arch,
716*a9fa9459Szrj &bfd_ns32k_arch,
717*a9fa9459Szrj &bfd_or1k_arch,
718*a9fa9459Szrj &bfd_pdp11_arch,
719*a9fa9459Szrj &bfd_powerpc_arch,
720*a9fa9459Szrj &bfd_rs6000_arch,
721*a9fa9459Szrj &bfd_rl78_arch,
722*a9fa9459Szrj &bfd_rx_arch,
723*a9fa9459Szrj &bfd_s390_arch,
724*a9fa9459Szrj &bfd_score_arch,
725*a9fa9459Szrj &bfd_sh_arch,
726*a9fa9459Szrj &bfd_sparc_arch,
727*a9fa9459Szrj &bfd_spu_arch,
728*a9fa9459Szrj &bfd_tic30_arch,
729*a9fa9459Szrj &bfd_tic4x_arch,
730*a9fa9459Szrj &bfd_tic54x_arch,
731*a9fa9459Szrj &bfd_tic6x_arch,
732*a9fa9459Szrj &bfd_tic80_arch,
733*a9fa9459Szrj &bfd_tilegx_arch,
734*a9fa9459Szrj &bfd_tilepro_arch,
735*a9fa9459Szrj &bfd_v850_arch,
736*a9fa9459Szrj &bfd_v850_rh850_arch,
737*a9fa9459Szrj &bfd_vax_arch,
738*a9fa9459Szrj &bfd_visium_arch,
739*a9fa9459Szrj &bfd_w65_arch,
740*a9fa9459Szrj &bfd_we32k_arch,
741*a9fa9459Szrj &bfd_xstormy16_arch,
742*a9fa9459Szrj &bfd_xtensa_arch,
743*a9fa9459Szrj &bfd_xc16x_arch,
744*a9fa9459Szrj &bfd_xgate_arch,
745*a9fa9459Szrj &bfd_z80_arch,
746*a9fa9459Szrj &bfd_z8k_arch,
747*a9fa9459Szrj #endif
748*a9fa9459Szrj 0
749*a9fa9459Szrj };
750*a9fa9459Szrj
751*a9fa9459Szrj /*
752*a9fa9459Szrj FUNCTION
753*a9fa9459Szrj bfd_printable_name
754*a9fa9459Szrj
755*a9fa9459Szrj SYNOPSIS
756*a9fa9459Szrj const char *bfd_printable_name (bfd *abfd);
757*a9fa9459Szrj
758*a9fa9459Szrj DESCRIPTION
759*a9fa9459Szrj Return a printable string representing the architecture and machine
760*a9fa9459Szrj from the pointer to the architecture info structure.
761*a9fa9459Szrj
762*a9fa9459Szrj */
763*a9fa9459Szrj
764*a9fa9459Szrj const char *
bfd_printable_name(bfd * abfd)765*a9fa9459Szrj bfd_printable_name (bfd *abfd)
766*a9fa9459Szrj {
767*a9fa9459Szrj return abfd->arch_info->printable_name;
768*a9fa9459Szrj }
769*a9fa9459Szrj
770*a9fa9459Szrj /*
771*a9fa9459Szrj FUNCTION
772*a9fa9459Szrj bfd_scan_arch
773*a9fa9459Szrj
774*a9fa9459Szrj SYNOPSIS
775*a9fa9459Szrj const bfd_arch_info_type *bfd_scan_arch (const char *string);
776*a9fa9459Szrj
777*a9fa9459Szrj DESCRIPTION
778*a9fa9459Szrj Figure out if BFD supports any cpu which could be described with
779*a9fa9459Szrj the name @var{string}. Return a pointer to an <<arch_info>>
780*a9fa9459Szrj structure if a machine is found, otherwise NULL.
781*a9fa9459Szrj */
782*a9fa9459Szrj
783*a9fa9459Szrj const bfd_arch_info_type *
bfd_scan_arch(const char * string)784*a9fa9459Szrj bfd_scan_arch (const char *string)
785*a9fa9459Szrj {
786*a9fa9459Szrj const bfd_arch_info_type * const *app, *ap;
787*a9fa9459Szrj
788*a9fa9459Szrj /* Look through all the installed architectures. */
789*a9fa9459Szrj for (app = bfd_archures_list; *app != NULL; app++)
790*a9fa9459Szrj {
791*a9fa9459Szrj for (ap = *app; ap != NULL; ap = ap->next)
792*a9fa9459Szrj {
793*a9fa9459Szrj if (ap->scan (ap, string))
794*a9fa9459Szrj return ap;
795*a9fa9459Szrj }
796*a9fa9459Szrj }
797*a9fa9459Szrj
798*a9fa9459Szrj return NULL;
799*a9fa9459Szrj }
800*a9fa9459Szrj
801*a9fa9459Szrj /*
802*a9fa9459Szrj FUNCTION
803*a9fa9459Szrj bfd_arch_list
804*a9fa9459Szrj
805*a9fa9459Szrj SYNOPSIS
806*a9fa9459Szrj const char **bfd_arch_list (void);
807*a9fa9459Szrj
808*a9fa9459Szrj DESCRIPTION
809*a9fa9459Szrj Return a freshly malloced NULL-terminated vector of the names
810*a9fa9459Szrj of all the valid BFD architectures. Do not modify the names.
811*a9fa9459Szrj */
812*a9fa9459Szrj
813*a9fa9459Szrj const char **
bfd_arch_list(void)814*a9fa9459Szrj bfd_arch_list (void)
815*a9fa9459Szrj {
816*a9fa9459Szrj int vec_length = 0;
817*a9fa9459Szrj const char **name_ptr;
818*a9fa9459Szrj const char **name_list;
819*a9fa9459Szrj const bfd_arch_info_type * const *app;
820*a9fa9459Szrj bfd_size_type amt;
821*a9fa9459Szrj
822*a9fa9459Szrj /* Determine the number of architectures. */
823*a9fa9459Szrj vec_length = 0;
824*a9fa9459Szrj for (app = bfd_archures_list; *app != NULL; app++)
825*a9fa9459Szrj {
826*a9fa9459Szrj const bfd_arch_info_type *ap;
827*a9fa9459Szrj for (ap = *app; ap != NULL; ap = ap->next)
828*a9fa9459Szrj {
829*a9fa9459Szrj vec_length++;
830*a9fa9459Szrj }
831*a9fa9459Szrj }
832*a9fa9459Szrj
833*a9fa9459Szrj amt = (vec_length + 1) * sizeof (char **);
834*a9fa9459Szrj name_list = (const char **) bfd_malloc (amt);
835*a9fa9459Szrj if (name_list == NULL)
836*a9fa9459Szrj return NULL;
837*a9fa9459Szrj
838*a9fa9459Szrj /* Point the list at each of the names. */
839*a9fa9459Szrj name_ptr = name_list;
840*a9fa9459Szrj for (app = bfd_archures_list; *app != NULL; app++)
841*a9fa9459Szrj {
842*a9fa9459Szrj const bfd_arch_info_type *ap;
843*a9fa9459Szrj for (ap = *app; ap != NULL; ap = ap->next)
844*a9fa9459Szrj {
845*a9fa9459Szrj *name_ptr = ap->printable_name;
846*a9fa9459Szrj name_ptr++;
847*a9fa9459Szrj }
848*a9fa9459Szrj }
849*a9fa9459Szrj *name_ptr = NULL;
850*a9fa9459Szrj
851*a9fa9459Szrj return name_list;
852*a9fa9459Szrj }
853*a9fa9459Szrj
854*a9fa9459Szrj /*
855*a9fa9459Szrj FUNCTION
856*a9fa9459Szrj bfd_arch_get_compatible
857*a9fa9459Szrj
858*a9fa9459Szrj SYNOPSIS
859*a9fa9459Szrj const bfd_arch_info_type *bfd_arch_get_compatible
860*a9fa9459Szrj (const bfd *abfd, const bfd *bbfd, bfd_boolean accept_unknowns);
861*a9fa9459Szrj
862*a9fa9459Szrj DESCRIPTION
863*a9fa9459Szrj Determine whether two BFDs' architectures and machine types
864*a9fa9459Szrj are compatible. Calculates the lowest common denominator
865*a9fa9459Szrj between the two architectures and machine types implied by
866*a9fa9459Szrj the BFDs and returns a pointer to an <<arch_info>> structure
867*a9fa9459Szrj describing the compatible machine.
868*a9fa9459Szrj */
869*a9fa9459Szrj
870*a9fa9459Szrj const bfd_arch_info_type *
bfd_arch_get_compatible(const bfd * abfd,const bfd * bbfd,bfd_boolean accept_unknowns)871*a9fa9459Szrj bfd_arch_get_compatible (const bfd *abfd,
872*a9fa9459Szrj const bfd *bbfd,
873*a9fa9459Szrj bfd_boolean accept_unknowns)
874*a9fa9459Szrj {
875*a9fa9459Szrj const bfd *ubfd, *kbfd;
876*a9fa9459Szrj
877*a9fa9459Szrj /* Look for an unknown architecture. */
878*a9fa9459Szrj if (abfd->arch_info->arch == bfd_arch_unknown)
879*a9fa9459Szrj ubfd = abfd, kbfd = bbfd;
880*a9fa9459Szrj else if (bbfd->arch_info->arch == bfd_arch_unknown)
881*a9fa9459Szrj ubfd = bbfd, kbfd = abfd;
882*a9fa9459Szrj else
883*a9fa9459Szrj /* Otherwise architecture-specific code has to decide. */
884*a9fa9459Szrj return abfd->arch_info->compatible (abfd->arch_info, bbfd->arch_info);
885*a9fa9459Szrj
886*a9fa9459Szrj /* We can allow an unknown architecture if accept_unknowns
887*a9fa9459Szrj is true, or if the target is the "binary" format, which
888*a9fa9459Szrj has an unknown architecture. Since the binary format can
889*a9fa9459Szrj only be set by explicit request from the user, it is safe
890*a9fa9459Szrj to assume that they know what they are doing. */
891*a9fa9459Szrj if (accept_unknowns
892*a9fa9459Szrj || strcmp (bfd_get_target (ubfd), "binary") == 0)
893*a9fa9459Szrj return kbfd->arch_info;
894*a9fa9459Szrj return NULL;
895*a9fa9459Szrj }
896*a9fa9459Szrj
897*a9fa9459Szrj /*
898*a9fa9459Szrj INTERNAL_DEFINITION
899*a9fa9459Szrj bfd_default_arch_struct
900*a9fa9459Szrj
901*a9fa9459Szrj DESCRIPTION
902*a9fa9459Szrj The <<bfd_default_arch_struct>> is an item of
903*a9fa9459Szrj <<bfd_arch_info_type>> which has been initialized to a fairly
904*a9fa9459Szrj generic state. A BFD starts life by pointing to this
905*a9fa9459Szrj structure, until the correct back end has determined the real
906*a9fa9459Szrj architecture of the file.
907*a9fa9459Szrj
908*a9fa9459Szrj .extern const bfd_arch_info_type bfd_default_arch_struct;
909*a9fa9459Szrj */
910*a9fa9459Szrj
911*a9fa9459Szrj const bfd_arch_info_type bfd_default_arch_struct = {
912*a9fa9459Szrj 32, 32, 8, bfd_arch_unknown, 0, "unknown", "unknown", 2, TRUE,
913*a9fa9459Szrj bfd_default_compatible,
914*a9fa9459Szrj bfd_default_scan,
915*a9fa9459Szrj bfd_arch_default_fill,
916*a9fa9459Szrj 0,
917*a9fa9459Szrj };
918*a9fa9459Szrj
919*a9fa9459Szrj /*
920*a9fa9459Szrj FUNCTION
921*a9fa9459Szrj bfd_set_arch_info
922*a9fa9459Szrj
923*a9fa9459Szrj SYNOPSIS
924*a9fa9459Szrj void bfd_set_arch_info (bfd *abfd, const bfd_arch_info_type *arg);
925*a9fa9459Szrj
926*a9fa9459Szrj DESCRIPTION
927*a9fa9459Szrj Set the architecture info of @var{abfd} to @var{arg}.
928*a9fa9459Szrj */
929*a9fa9459Szrj
930*a9fa9459Szrj void
bfd_set_arch_info(bfd * abfd,const bfd_arch_info_type * arg)931*a9fa9459Szrj bfd_set_arch_info (bfd *abfd, const bfd_arch_info_type *arg)
932*a9fa9459Szrj {
933*a9fa9459Szrj abfd->arch_info = arg;
934*a9fa9459Szrj }
935*a9fa9459Szrj
936*a9fa9459Szrj /*
937*a9fa9459Szrj INTERNAL_FUNCTION
938*a9fa9459Szrj bfd_default_set_arch_mach
939*a9fa9459Szrj
940*a9fa9459Szrj SYNOPSIS
941*a9fa9459Szrj bfd_boolean bfd_default_set_arch_mach
942*a9fa9459Szrj (bfd *abfd, enum bfd_architecture arch, unsigned long mach);
943*a9fa9459Szrj
944*a9fa9459Szrj DESCRIPTION
945*a9fa9459Szrj Set the architecture and machine type in BFD @var{abfd}
946*a9fa9459Szrj to @var{arch} and @var{mach}. Find the correct
947*a9fa9459Szrj pointer to a structure and insert it into the <<arch_info>>
948*a9fa9459Szrj pointer.
949*a9fa9459Szrj */
950*a9fa9459Szrj
951*a9fa9459Szrj bfd_boolean
bfd_default_set_arch_mach(bfd * abfd,enum bfd_architecture arch,unsigned long mach)952*a9fa9459Szrj bfd_default_set_arch_mach (bfd *abfd,
953*a9fa9459Szrj enum bfd_architecture arch,
954*a9fa9459Szrj unsigned long mach)
955*a9fa9459Szrj {
956*a9fa9459Szrj abfd->arch_info = bfd_lookup_arch (arch, mach);
957*a9fa9459Szrj if (abfd->arch_info != NULL)
958*a9fa9459Szrj return TRUE;
959*a9fa9459Szrj
960*a9fa9459Szrj abfd->arch_info = &bfd_default_arch_struct;
961*a9fa9459Szrj bfd_set_error (bfd_error_bad_value);
962*a9fa9459Szrj return FALSE;
963*a9fa9459Szrj }
964*a9fa9459Szrj
965*a9fa9459Szrj /*
966*a9fa9459Szrj FUNCTION
967*a9fa9459Szrj bfd_get_arch
968*a9fa9459Szrj
969*a9fa9459Szrj SYNOPSIS
970*a9fa9459Szrj enum bfd_architecture bfd_get_arch (bfd *abfd);
971*a9fa9459Szrj
972*a9fa9459Szrj DESCRIPTION
973*a9fa9459Szrj Return the enumerated type which describes the BFD @var{abfd}'s
974*a9fa9459Szrj architecture.
975*a9fa9459Szrj */
976*a9fa9459Szrj
977*a9fa9459Szrj enum bfd_architecture
bfd_get_arch(bfd * abfd)978*a9fa9459Szrj bfd_get_arch (bfd *abfd)
979*a9fa9459Szrj {
980*a9fa9459Szrj return abfd->arch_info->arch;
981*a9fa9459Szrj }
982*a9fa9459Szrj
983*a9fa9459Szrj /*
984*a9fa9459Szrj FUNCTION
985*a9fa9459Szrj bfd_get_mach
986*a9fa9459Szrj
987*a9fa9459Szrj SYNOPSIS
988*a9fa9459Szrj unsigned long bfd_get_mach (bfd *abfd);
989*a9fa9459Szrj
990*a9fa9459Szrj DESCRIPTION
991*a9fa9459Szrj Return the long type which describes the BFD @var{abfd}'s
992*a9fa9459Szrj machine.
993*a9fa9459Szrj */
994*a9fa9459Szrj
995*a9fa9459Szrj unsigned long
bfd_get_mach(bfd * abfd)996*a9fa9459Szrj bfd_get_mach (bfd *abfd)
997*a9fa9459Szrj {
998*a9fa9459Szrj return abfd->arch_info->mach;
999*a9fa9459Szrj }
1000*a9fa9459Szrj
1001*a9fa9459Szrj /*
1002*a9fa9459Szrj FUNCTION
1003*a9fa9459Szrj bfd_arch_bits_per_byte
1004*a9fa9459Szrj
1005*a9fa9459Szrj SYNOPSIS
1006*a9fa9459Szrj unsigned int bfd_arch_bits_per_byte (bfd *abfd);
1007*a9fa9459Szrj
1008*a9fa9459Szrj DESCRIPTION
1009*a9fa9459Szrj Return the number of bits in one of the BFD @var{abfd}'s
1010*a9fa9459Szrj architecture's bytes.
1011*a9fa9459Szrj */
1012*a9fa9459Szrj
1013*a9fa9459Szrj unsigned int
bfd_arch_bits_per_byte(bfd * abfd)1014*a9fa9459Szrj bfd_arch_bits_per_byte (bfd *abfd)
1015*a9fa9459Szrj {
1016*a9fa9459Szrj return abfd->arch_info->bits_per_byte;
1017*a9fa9459Szrj }
1018*a9fa9459Szrj
1019*a9fa9459Szrj /*
1020*a9fa9459Szrj FUNCTION
1021*a9fa9459Szrj bfd_arch_bits_per_address
1022*a9fa9459Szrj
1023*a9fa9459Szrj SYNOPSIS
1024*a9fa9459Szrj unsigned int bfd_arch_bits_per_address (bfd *abfd);
1025*a9fa9459Szrj
1026*a9fa9459Szrj DESCRIPTION
1027*a9fa9459Szrj Return the number of bits in one of the BFD @var{abfd}'s
1028*a9fa9459Szrj architecture's addresses.
1029*a9fa9459Szrj */
1030*a9fa9459Szrj
1031*a9fa9459Szrj unsigned int
bfd_arch_bits_per_address(bfd * abfd)1032*a9fa9459Szrj bfd_arch_bits_per_address (bfd *abfd)
1033*a9fa9459Szrj {
1034*a9fa9459Szrj return abfd->arch_info->bits_per_address;
1035*a9fa9459Szrj }
1036*a9fa9459Szrj
1037*a9fa9459Szrj /*
1038*a9fa9459Szrj INTERNAL_FUNCTION
1039*a9fa9459Szrj bfd_default_compatible
1040*a9fa9459Szrj
1041*a9fa9459Szrj SYNOPSIS
1042*a9fa9459Szrj const bfd_arch_info_type *bfd_default_compatible
1043*a9fa9459Szrj (const bfd_arch_info_type *a, const bfd_arch_info_type *b);
1044*a9fa9459Szrj
1045*a9fa9459Szrj DESCRIPTION
1046*a9fa9459Szrj The default function for testing for compatibility.
1047*a9fa9459Szrj */
1048*a9fa9459Szrj
1049*a9fa9459Szrj const bfd_arch_info_type *
bfd_default_compatible(const bfd_arch_info_type * a,const bfd_arch_info_type * b)1050*a9fa9459Szrj bfd_default_compatible (const bfd_arch_info_type *a,
1051*a9fa9459Szrj const bfd_arch_info_type *b)
1052*a9fa9459Szrj {
1053*a9fa9459Szrj if (a->arch != b->arch)
1054*a9fa9459Szrj return NULL;
1055*a9fa9459Szrj
1056*a9fa9459Szrj if (a->bits_per_word != b->bits_per_word)
1057*a9fa9459Szrj return NULL;
1058*a9fa9459Szrj
1059*a9fa9459Szrj if (a->mach > b->mach)
1060*a9fa9459Szrj return a;
1061*a9fa9459Szrj
1062*a9fa9459Szrj if (b->mach > a->mach)
1063*a9fa9459Szrj return b;
1064*a9fa9459Szrj
1065*a9fa9459Szrj return a;
1066*a9fa9459Szrj }
1067*a9fa9459Szrj
1068*a9fa9459Szrj /*
1069*a9fa9459Szrj INTERNAL_FUNCTION
1070*a9fa9459Szrj bfd_default_scan
1071*a9fa9459Szrj
1072*a9fa9459Szrj SYNOPSIS
1073*a9fa9459Szrj bfd_boolean bfd_default_scan
1074*a9fa9459Szrj (const struct bfd_arch_info *info, const char *string);
1075*a9fa9459Szrj
1076*a9fa9459Szrj DESCRIPTION
1077*a9fa9459Szrj The default function for working out whether this is an
1078*a9fa9459Szrj architecture hit and a machine hit.
1079*a9fa9459Szrj */
1080*a9fa9459Szrj
1081*a9fa9459Szrj bfd_boolean
bfd_default_scan(const bfd_arch_info_type * info,const char * string)1082*a9fa9459Szrj bfd_default_scan (const bfd_arch_info_type *info, const char *string)
1083*a9fa9459Szrj {
1084*a9fa9459Szrj const char *ptr_src;
1085*a9fa9459Szrj const char *ptr_tst;
1086*a9fa9459Szrj unsigned long number;
1087*a9fa9459Szrj enum bfd_architecture arch;
1088*a9fa9459Szrj const char *printable_name_colon;
1089*a9fa9459Szrj
1090*a9fa9459Szrj /* Exact match of the architecture name (ARCH_NAME) and also the
1091*a9fa9459Szrj default architecture? */
1092*a9fa9459Szrj if (strcasecmp (string, info->arch_name) == 0
1093*a9fa9459Szrj && info->the_default)
1094*a9fa9459Szrj return TRUE;
1095*a9fa9459Szrj
1096*a9fa9459Szrj /* Exact match of the machine name (PRINTABLE_NAME)? */
1097*a9fa9459Szrj if (strcasecmp (string, info->printable_name) == 0)
1098*a9fa9459Szrj return TRUE;
1099*a9fa9459Szrj
1100*a9fa9459Szrj /* Given that printable_name contains no colon, attempt to match:
1101*a9fa9459Szrj ARCH_NAME [ ":" ] PRINTABLE_NAME? */
1102*a9fa9459Szrj printable_name_colon = strchr (info->printable_name, ':');
1103*a9fa9459Szrj if (printable_name_colon == NULL)
1104*a9fa9459Szrj {
1105*a9fa9459Szrj size_t strlen_arch_name = strlen (info->arch_name);
1106*a9fa9459Szrj if (strncasecmp (string, info->arch_name, strlen_arch_name) == 0)
1107*a9fa9459Szrj {
1108*a9fa9459Szrj if (string[strlen_arch_name] == ':')
1109*a9fa9459Szrj {
1110*a9fa9459Szrj if (strcasecmp (string + strlen_arch_name + 1,
1111*a9fa9459Szrj info->printable_name) == 0)
1112*a9fa9459Szrj return TRUE;
1113*a9fa9459Szrj }
1114*a9fa9459Szrj else
1115*a9fa9459Szrj {
1116*a9fa9459Szrj if (strcasecmp (string + strlen_arch_name,
1117*a9fa9459Szrj info->printable_name) == 0)
1118*a9fa9459Szrj return TRUE;
1119*a9fa9459Szrj }
1120*a9fa9459Szrj }
1121*a9fa9459Szrj }
1122*a9fa9459Szrj
1123*a9fa9459Szrj /* Given that PRINTABLE_NAME has the form: <arch> ":" <mach>;
1124*a9fa9459Szrj Attempt to match: <arch> <mach>? */
1125*a9fa9459Szrj if (printable_name_colon != NULL)
1126*a9fa9459Szrj {
1127*a9fa9459Szrj size_t colon_index = printable_name_colon - info->printable_name;
1128*a9fa9459Szrj if (strncasecmp (string, info->printable_name, colon_index) == 0
1129*a9fa9459Szrj && strcasecmp (string + colon_index,
1130*a9fa9459Szrj info->printable_name + colon_index + 1) == 0)
1131*a9fa9459Szrj return TRUE;
1132*a9fa9459Szrj }
1133*a9fa9459Szrj
1134*a9fa9459Szrj /* Given that PRINTABLE_NAME has the form: <arch> ":" <mach>; Do not
1135*a9fa9459Szrj attempt to match just <mach>, it could be ambiguous. This test
1136*a9fa9459Szrj is left until later. */
1137*a9fa9459Szrj
1138*a9fa9459Szrj /* NOTE: The below is retained for compatibility only. Please do
1139*a9fa9459Szrj not add to this code. */
1140*a9fa9459Szrj
1141*a9fa9459Szrj /* See how much of the supplied string matches with the
1142*a9fa9459Szrj architecture, eg the string m68k:68020 would match the 68k entry
1143*a9fa9459Szrj up to the :, then we get left with the machine number. */
1144*a9fa9459Szrj
1145*a9fa9459Szrj for (ptr_src = string, ptr_tst = info->arch_name;
1146*a9fa9459Szrj *ptr_src && *ptr_tst;
1147*a9fa9459Szrj ptr_src++, ptr_tst++)
1148*a9fa9459Szrj {
1149*a9fa9459Szrj if (*ptr_src != *ptr_tst)
1150*a9fa9459Szrj break;
1151*a9fa9459Szrj }
1152*a9fa9459Szrj
1153*a9fa9459Szrj /* Chewed up as much of the architecture as will match, skip any
1154*a9fa9459Szrj colons. */
1155*a9fa9459Szrj if (*ptr_src == ':')
1156*a9fa9459Szrj ptr_src++;
1157*a9fa9459Szrj
1158*a9fa9459Szrj if (*ptr_src == 0)
1159*a9fa9459Szrj {
1160*a9fa9459Szrj /* Nothing more, then only keep this one if it is the default
1161*a9fa9459Szrj machine for this architecture. */
1162*a9fa9459Szrj return info->the_default;
1163*a9fa9459Szrj }
1164*a9fa9459Szrj
1165*a9fa9459Szrj number = 0;
1166*a9fa9459Szrj while (ISDIGIT (*ptr_src))
1167*a9fa9459Szrj {
1168*a9fa9459Szrj number = number * 10 + *ptr_src - '0';
1169*a9fa9459Szrj ptr_src++;
1170*a9fa9459Szrj }
1171*a9fa9459Szrj
1172*a9fa9459Szrj /* NOTE: The below is retained for compatibility only.
1173*a9fa9459Szrj PLEASE DO NOT ADD TO THIS CODE. */
1174*a9fa9459Szrj
1175*a9fa9459Szrj switch (number)
1176*a9fa9459Szrj {
1177*a9fa9459Szrj /* FIXME: These are needed to parse IEEE objects. */
1178*a9fa9459Szrj /* The following seven case's are here only for compatibility with
1179*a9fa9459Szrj older binutils (at least IEEE objects from binutils 2.9.1 require
1180*a9fa9459Szrj them). */
1181*a9fa9459Szrj case bfd_mach_m68000:
1182*a9fa9459Szrj case bfd_mach_m68010:
1183*a9fa9459Szrj case bfd_mach_m68020:
1184*a9fa9459Szrj case bfd_mach_m68030:
1185*a9fa9459Szrj case bfd_mach_m68040:
1186*a9fa9459Szrj case bfd_mach_m68060:
1187*a9fa9459Szrj case bfd_mach_cpu32:
1188*a9fa9459Szrj arch = bfd_arch_m68k;
1189*a9fa9459Szrj break;
1190*a9fa9459Szrj case 68000:
1191*a9fa9459Szrj arch = bfd_arch_m68k;
1192*a9fa9459Szrj number = bfd_mach_m68000;
1193*a9fa9459Szrj break;
1194*a9fa9459Szrj case 68010:
1195*a9fa9459Szrj arch = bfd_arch_m68k;
1196*a9fa9459Szrj number = bfd_mach_m68010;
1197*a9fa9459Szrj break;
1198*a9fa9459Szrj case 68020:
1199*a9fa9459Szrj arch = bfd_arch_m68k;
1200*a9fa9459Szrj number = bfd_mach_m68020;
1201*a9fa9459Szrj break;
1202*a9fa9459Szrj case 68030:
1203*a9fa9459Szrj arch = bfd_arch_m68k;
1204*a9fa9459Szrj number = bfd_mach_m68030;
1205*a9fa9459Szrj break;
1206*a9fa9459Szrj case 68040:
1207*a9fa9459Szrj arch = bfd_arch_m68k;
1208*a9fa9459Szrj number = bfd_mach_m68040;
1209*a9fa9459Szrj break;
1210*a9fa9459Szrj case 68060:
1211*a9fa9459Szrj arch = bfd_arch_m68k;
1212*a9fa9459Szrj number = bfd_mach_m68060;
1213*a9fa9459Szrj break;
1214*a9fa9459Szrj case 68332:
1215*a9fa9459Szrj arch = bfd_arch_m68k;
1216*a9fa9459Szrj number = bfd_mach_cpu32;
1217*a9fa9459Szrj break;
1218*a9fa9459Szrj case 5200:
1219*a9fa9459Szrj arch = bfd_arch_m68k;
1220*a9fa9459Szrj number = bfd_mach_mcf_isa_a_nodiv;
1221*a9fa9459Szrj break;
1222*a9fa9459Szrj case 5206:
1223*a9fa9459Szrj arch = bfd_arch_m68k;
1224*a9fa9459Szrj number = bfd_mach_mcf_isa_a_mac;
1225*a9fa9459Szrj break;
1226*a9fa9459Szrj case 5307:
1227*a9fa9459Szrj arch = bfd_arch_m68k;
1228*a9fa9459Szrj number = bfd_mach_mcf_isa_a_mac;
1229*a9fa9459Szrj break;
1230*a9fa9459Szrj case 5407:
1231*a9fa9459Szrj arch = bfd_arch_m68k;
1232*a9fa9459Szrj number = bfd_mach_mcf_isa_b_nousp_mac;
1233*a9fa9459Szrj break;
1234*a9fa9459Szrj case 5282:
1235*a9fa9459Szrj arch = bfd_arch_m68k;
1236*a9fa9459Szrj number = bfd_mach_mcf_isa_aplus_emac;
1237*a9fa9459Szrj break;
1238*a9fa9459Szrj
1239*a9fa9459Szrj case 32000:
1240*a9fa9459Szrj arch = bfd_arch_we32k;
1241*a9fa9459Szrj break;
1242*a9fa9459Szrj
1243*a9fa9459Szrj case 3000:
1244*a9fa9459Szrj arch = bfd_arch_mips;
1245*a9fa9459Szrj number = bfd_mach_mips3000;
1246*a9fa9459Szrj break;
1247*a9fa9459Szrj
1248*a9fa9459Szrj case 4000:
1249*a9fa9459Szrj arch = bfd_arch_mips;
1250*a9fa9459Szrj number = bfd_mach_mips4000;
1251*a9fa9459Szrj break;
1252*a9fa9459Szrj
1253*a9fa9459Szrj case 6000:
1254*a9fa9459Szrj arch = bfd_arch_rs6000;
1255*a9fa9459Szrj break;
1256*a9fa9459Szrj
1257*a9fa9459Szrj case 7410:
1258*a9fa9459Szrj arch = bfd_arch_sh;
1259*a9fa9459Szrj number = bfd_mach_sh_dsp;
1260*a9fa9459Szrj break;
1261*a9fa9459Szrj
1262*a9fa9459Szrj case 7708:
1263*a9fa9459Szrj arch = bfd_arch_sh;
1264*a9fa9459Szrj number = bfd_mach_sh3;
1265*a9fa9459Szrj break;
1266*a9fa9459Szrj
1267*a9fa9459Szrj case 7729:
1268*a9fa9459Szrj arch = bfd_arch_sh;
1269*a9fa9459Szrj number = bfd_mach_sh3_dsp;
1270*a9fa9459Szrj break;
1271*a9fa9459Szrj
1272*a9fa9459Szrj case 7750:
1273*a9fa9459Szrj arch = bfd_arch_sh;
1274*a9fa9459Szrj number = bfd_mach_sh4;
1275*a9fa9459Szrj break;
1276*a9fa9459Szrj
1277*a9fa9459Szrj default:
1278*a9fa9459Szrj return FALSE;
1279*a9fa9459Szrj }
1280*a9fa9459Szrj
1281*a9fa9459Szrj if (arch != info->arch)
1282*a9fa9459Szrj return FALSE;
1283*a9fa9459Szrj
1284*a9fa9459Szrj if (number != info->mach)
1285*a9fa9459Szrj return FALSE;
1286*a9fa9459Szrj
1287*a9fa9459Szrj return TRUE;
1288*a9fa9459Szrj }
1289*a9fa9459Szrj
1290*a9fa9459Szrj /*
1291*a9fa9459Szrj FUNCTION
1292*a9fa9459Szrj bfd_get_arch_info
1293*a9fa9459Szrj
1294*a9fa9459Szrj SYNOPSIS
1295*a9fa9459Szrj const bfd_arch_info_type *bfd_get_arch_info (bfd *abfd);
1296*a9fa9459Szrj
1297*a9fa9459Szrj DESCRIPTION
1298*a9fa9459Szrj Return the architecture info struct in @var{abfd}.
1299*a9fa9459Szrj */
1300*a9fa9459Szrj
1301*a9fa9459Szrj const bfd_arch_info_type *
bfd_get_arch_info(bfd * abfd)1302*a9fa9459Szrj bfd_get_arch_info (bfd *abfd)
1303*a9fa9459Szrj {
1304*a9fa9459Szrj return abfd->arch_info;
1305*a9fa9459Szrj }
1306*a9fa9459Szrj
1307*a9fa9459Szrj /*
1308*a9fa9459Szrj FUNCTION
1309*a9fa9459Szrj bfd_lookup_arch
1310*a9fa9459Szrj
1311*a9fa9459Szrj SYNOPSIS
1312*a9fa9459Szrj const bfd_arch_info_type *bfd_lookup_arch
1313*a9fa9459Szrj (enum bfd_architecture arch, unsigned long machine);
1314*a9fa9459Szrj
1315*a9fa9459Szrj DESCRIPTION
1316*a9fa9459Szrj Look for the architecture info structure which matches the
1317*a9fa9459Szrj arguments @var{arch} and @var{machine}. A machine of 0 matches the
1318*a9fa9459Szrj machine/architecture structure which marks itself as the
1319*a9fa9459Szrj default.
1320*a9fa9459Szrj */
1321*a9fa9459Szrj
1322*a9fa9459Szrj const bfd_arch_info_type *
bfd_lookup_arch(enum bfd_architecture arch,unsigned long machine)1323*a9fa9459Szrj bfd_lookup_arch (enum bfd_architecture arch, unsigned long machine)
1324*a9fa9459Szrj {
1325*a9fa9459Szrj const bfd_arch_info_type * const *app, *ap;
1326*a9fa9459Szrj
1327*a9fa9459Szrj for (app = bfd_archures_list; *app != NULL; app++)
1328*a9fa9459Szrj {
1329*a9fa9459Szrj for (ap = *app; ap != NULL; ap = ap->next)
1330*a9fa9459Szrj {
1331*a9fa9459Szrj if (ap->arch == arch
1332*a9fa9459Szrj && (ap->mach == machine
1333*a9fa9459Szrj || (machine == 0 && ap->the_default)))
1334*a9fa9459Szrj return ap;
1335*a9fa9459Szrj }
1336*a9fa9459Szrj }
1337*a9fa9459Szrj
1338*a9fa9459Szrj return NULL;
1339*a9fa9459Szrj }
1340*a9fa9459Szrj
1341*a9fa9459Szrj /*
1342*a9fa9459Szrj FUNCTION
1343*a9fa9459Szrj bfd_printable_arch_mach
1344*a9fa9459Szrj
1345*a9fa9459Szrj SYNOPSIS
1346*a9fa9459Szrj const char *bfd_printable_arch_mach
1347*a9fa9459Szrj (enum bfd_architecture arch, unsigned long machine);
1348*a9fa9459Szrj
1349*a9fa9459Szrj DESCRIPTION
1350*a9fa9459Szrj Return a printable string representing the architecture and
1351*a9fa9459Szrj machine type.
1352*a9fa9459Szrj
1353*a9fa9459Szrj This routine is depreciated.
1354*a9fa9459Szrj */
1355*a9fa9459Szrj
1356*a9fa9459Szrj const char *
bfd_printable_arch_mach(enum bfd_architecture arch,unsigned long machine)1357*a9fa9459Szrj bfd_printable_arch_mach (enum bfd_architecture arch, unsigned long machine)
1358*a9fa9459Szrj {
1359*a9fa9459Szrj const bfd_arch_info_type *ap = bfd_lookup_arch (arch, machine);
1360*a9fa9459Szrj
1361*a9fa9459Szrj if (ap)
1362*a9fa9459Szrj return ap->printable_name;
1363*a9fa9459Szrj return "UNKNOWN!";
1364*a9fa9459Szrj }
1365*a9fa9459Szrj
1366*a9fa9459Szrj /*
1367*a9fa9459Szrj FUNCTION
1368*a9fa9459Szrj bfd_octets_per_byte
1369*a9fa9459Szrj
1370*a9fa9459Szrj SYNOPSIS
1371*a9fa9459Szrj unsigned int bfd_octets_per_byte (bfd *abfd);
1372*a9fa9459Szrj
1373*a9fa9459Szrj DESCRIPTION
1374*a9fa9459Szrj Return the number of octets (8-bit quantities) per target byte
1375*a9fa9459Szrj (minimum addressable unit). In most cases, this will be one, but some
1376*a9fa9459Szrj DSP targets have 16, 32, or even 48 bits per byte.
1377*a9fa9459Szrj */
1378*a9fa9459Szrj
1379*a9fa9459Szrj unsigned int
bfd_octets_per_byte(bfd * abfd)1380*a9fa9459Szrj bfd_octets_per_byte (bfd *abfd)
1381*a9fa9459Szrj {
1382*a9fa9459Szrj return bfd_arch_mach_octets_per_byte (bfd_get_arch (abfd),
1383*a9fa9459Szrj bfd_get_mach (abfd));
1384*a9fa9459Szrj }
1385*a9fa9459Szrj
1386*a9fa9459Szrj /*
1387*a9fa9459Szrj FUNCTION
1388*a9fa9459Szrj bfd_arch_mach_octets_per_byte
1389*a9fa9459Szrj
1390*a9fa9459Szrj SYNOPSIS
1391*a9fa9459Szrj unsigned int bfd_arch_mach_octets_per_byte
1392*a9fa9459Szrj (enum bfd_architecture arch, unsigned long machine);
1393*a9fa9459Szrj
1394*a9fa9459Szrj DESCRIPTION
1395*a9fa9459Szrj See bfd_octets_per_byte.
1396*a9fa9459Szrj
1397*a9fa9459Szrj This routine is provided for those cases where a bfd * is not
1398*a9fa9459Szrj available
1399*a9fa9459Szrj */
1400*a9fa9459Szrj
1401*a9fa9459Szrj unsigned int
bfd_arch_mach_octets_per_byte(enum bfd_architecture arch,unsigned long mach)1402*a9fa9459Szrj bfd_arch_mach_octets_per_byte (enum bfd_architecture arch,
1403*a9fa9459Szrj unsigned long mach)
1404*a9fa9459Szrj {
1405*a9fa9459Szrj const bfd_arch_info_type *ap = bfd_lookup_arch (arch, mach);
1406*a9fa9459Szrj
1407*a9fa9459Szrj if (ap)
1408*a9fa9459Szrj return ap->bits_per_byte / 8;
1409*a9fa9459Szrj return 1;
1410*a9fa9459Szrj }
1411*a9fa9459Szrj
1412*a9fa9459Szrj /*
1413*a9fa9459Szrj INTERNAL_FUNCTION
1414*a9fa9459Szrj bfd_arch_default_fill
1415*a9fa9459Szrj
1416*a9fa9459Szrj SYNOPSIS
1417*a9fa9459Szrj void *bfd_arch_default_fill (bfd_size_type count,
1418*a9fa9459Szrj bfd_boolean is_bigendian,
1419*a9fa9459Szrj bfd_boolean code);
1420*a9fa9459Szrj
1421*a9fa9459Szrj DESCRIPTION
1422*a9fa9459Szrj Allocate via bfd_malloc and return a fill buffer of size COUNT.
1423*a9fa9459Szrj If IS_BIGENDIAN is TRUE, the order of bytes is big endian. If
1424*a9fa9459Szrj CODE is TRUE, the buffer contains code.
1425*a9fa9459Szrj */
1426*a9fa9459Szrj
1427*a9fa9459Szrj void *
bfd_arch_default_fill(bfd_size_type count,bfd_boolean is_bigendian ATTRIBUTE_UNUSED,bfd_boolean code ATTRIBUTE_UNUSED)1428*a9fa9459Szrj bfd_arch_default_fill (bfd_size_type count,
1429*a9fa9459Szrj bfd_boolean is_bigendian ATTRIBUTE_UNUSED,
1430*a9fa9459Szrj bfd_boolean code ATTRIBUTE_UNUSED)
1431*a9fa9459Szrj {
1432*a9fa9459Szrj void *fill = bfd_malloc (count);
1433*a9fa9459Szrj if (fill != NULL)
1434*a9fa9459Szrj memset (fill, 0, count);
1435*a9fa9459Szrj return fill;
1436*a9fa9459Szrj }
1437