1*a9fa9459Szrj@c Copyright (C) 2005-2016 Free Software Foundation, Inc.
2*a9fa9459Szrj@c This is part of the GAS manual.
3*a9fa9459Szrj@c For copying conditions, see the file as.texinfo.
4*a9fa9459Szrj@ifset GENERIC
5*a9fa9459Szrj@page
6*a9fa9459Szrj@node M32C-Dependent
7*a9fa9459Szrj@chapter M32C Dependent Features
8*a9fa9459Szrj@end ifset
9*a9fa9459Szrj@ifclear GENERIC
10*a9fa9459Szrj@node Machine Dependencies
11*a9fa9459Szrj@chapter M32C Dependent Features
12*a9fa9459Szrj@end ifclear
13*a9fa9459Szrj
14*a9fa9459Szrj@cindex M32C support
15*a9fa9459Szrj
16*a9fa9459Szrj@code{@value{AS}} can assemble code for several different members of
17*a9fa9459Szrjthe Renesas M32C family.  Normally the default is to assemble code for
18*a9fa9459Szrjthe M16C microprocessor.  The @code{-m32c} option may be used to
19*a9fa9459Szrjchange the default to the M32C microprocessor.
20*a9fa9459Szrj
21*a9fa9459Szrj@menu
22*a9fa9459Szrj* M32C-Opts::                   M32C Options
23*a9fa9459Szrj* M32C-Syntax::                 M32C Syntax
24*a9fa9459Szrj@end menu
25*a9fa9459Szrj
26*a9fa9459Szrj@node M32C-Opts
27*a9fa9459Szrj@section M32C Options
28*a9fa9459Szrj
29*a9fa9459Szrj@cindex options, M32C
30*a9fa9459Szrj@cindex M32C options
31*a9fa9459Szrj
32*a9fa9459SzrjThe Renesas M32C version of @code{@value{AS}} has these
33*a9fa9459Szrjmachine-dependent options:
34*a9fa9459Szrj
35*a9fa9459Szrj@table @code
36*a9fa9459Szrj@item -m32c
37*a9fa9459Szrj@cindex @samp{-m32c} option, M32C
38*a9fa9459Szrj@cindex architecture options, M32C
39*a9fa9459Szrj@cindex M32C architecture option
40*a9fa9459SzrjAssemble M32C instructions.
41*a9fa9459Szrj
42*a9fa9459Szrj@item -m16c
43*a9fa9459Szrj@cindex @samp{-m16c} option, M16C
44*a9fa9459Szrj@cindex architecture options, M16C
45*a9fa9459Szrj@cindex M16C architecture option
46*a9fa9459SzrjAssemble M16C instructions (default).
47*a9fa9459Szrj
48*a9fa9459Szrj@item -relax
49*a9fa9459SzrjEnable support for link-time relaxations.
50*a9fa9459Szrj
51*a9fa9459Szrj@item -h-tick-hex
52*a9fa9459SzrjSupport H'00 style hex constants in addition to 0x00 style.
53*a9fa9459Szrj
54*a9fa9459Szrj
55*a9fa9459Szrj@end table
56*a9fa9459Szrj
57*a9fa9459Szrj@node M32C-Syntax
58*a9fa9459Szrj@section M32C Syntax
59*a9fa9459Szrj@menu
60*a9fa9459Szrj* M32C-Modifiers::              Symbolic Operand Modifiers
61*a9fa9459Szrj* M32C-Chars::                  Special Characters
62*a9fa9459Szrj@end menu
63*a9fa9459Szrj
64*a9fa9459Szrj@node M32C-Modifiers
65*a9fa9459Szrj@subsection Symbolic Operand Modifiers
66*a9fa9459Szrj
67*a9fa9459Szrj@cindex M32C modifiers
68*a9fa9459Szrj@cindex modifiers, M32C
69*a9fa9459Szrj
70*a9fa9459SzrjThe assembler supports several modifiers when using symbol addresses
71*a9fa9459Szrjin M32C instruction operands.  The general syntax is the following:
72*a9fa9459Szrj
73*a9fa9459Szrj@smallexample
74*a9fa9459Szrj%modifier(symbol)
75*a9fa9459Szrj@end smallexample
76*a9fa9459Szrj
77*a9fa9459Szrj@table @code
78*a9fa9459Szrj@cindex symbol modifiers
79*a9fa9459Szrj
80*a9fa9459Szrj@item %dsp8
81*a9fa9459Szrj@itemx %dsp16
82*a9fa9459Szrj
83*a9fa9459SzrjThese modifiers override the assembler's assumptions about how big a
84*a9fa9459Szrjsymbol's address is.  Normally, when it sees an operand like
85*a9fa9459Szrj@samp{sym[a0]} it assumes @samp{sym} may require the widest
86*a9fa9459Szrjdisplacement field (16 bits for @samp{-m16c}, 24 bits for
87*a9fa9459Szrj@samp{-m32c}).  These modifiers tell it to assume the address will fit
88*a9fa9459Szrjin an 8 or 16 bit (respectively) unsigned displacement.  Note that, of
89*a9fa9459Szrjcourse, if it doesn't actually fit you will get linker errors.  Example:
90*a9fa9459Szrj
91*a9fa9459Szrj@smallexample
92*a9fa9459Szrjmov.w %dsp8(sym)[a0],r1
93*a9fa9459Szrjmov.b #0,%dsp8(sym)[a0]
94*a9fa9459Szrj@end smallexample
95*a9fa9459Szrj
96*a9fa9459Szrj@item %hi8
97*a9fa9459Szrj
98*a9fa9459SzrjThis modifier allows you to load bits 16 through 23 of a 24 bit
99*a9fa9459Szrjaddress into an 8 bit register.  This is useful with, for example, the
100*a9fa9459SzrjM16C @samp{smovf} instruction, which expects a 20 bit address in
101*a9fa9459Szrj@samp{r1h} and @samp{a0}.  Example:
102*a9fa9459Szrj
103*a9fa9459Szrj@smallexample
104*a9fa9459Szrjmov.b #%hi8(sym),r1h
105*a9fa9459Szrjmov.w #%lo16(sym),a0
106*a9fa9459Szrjsmovf.b
107*a9fa9459Szrj@end smallexample
108*a9fa9459Szrj
109*a9fa9459Szrj@item %lo16
110*a9fa9459Szrj
111*a9fa9459SzrjLikewise, this modifier allows you to load bits 0 through 15 of a 24
112*a9fa9459Szrjbit address into a 16 bit register.
113*a9fa9459Szrj
114*a9fa9459Szrj@item %hi16
115*a9fa9459Szrj
116*a9fa9459SzrjThis modifier allows you to load bits 16 through 31 of a 32 bit
117*a9fa9459Szrjaddress into a 16 bit register.  While the M32C family only has 24
118*a9fa9459Szrjbits of address space, it does support addresses in pairs of 16 bit
119*a9fa9459Szrjregisters (like @samp{a1a0} for the @samp{lde} instruction).  This
120*a9fa9459Szrjmodifier is for loading the upper half in such cases.  Example:
121*a9fa9459Szrj
122*a9fa9459Szrj@smallexample
123*a9fa9459Szrjmov.w #%hi16(sym),a1
124*a9fa9459Szrjmov.w #%lo16(sym),a0
125*a9fa9459Szrj@dots{}
126*a9fa9459Szrjlde.w [a1a0],r1
127*a9fa9459Szrj@end smallexample
128*a9fa9459Szrj
129*a9fa9459Szrj@end table
130*a9fa9459Szrj
131*a9fa9459Szrj@node M32C-Chars
132*a9fa9459Szrj@subsection Special Characters
133*a9fa9459Szrj
134*a9fa9459Szrj@cindex line comment character, M32C
135*a9fa9459Szrj@cindex M32C line comment character
136*a9fa9459SzrjThe presence of a @samp{;} character on a line indicates the start of
137*a9fa9459Szrja comment that extends to the end of that line.
138*a9fa9459Szrj
139*a9fa9459SzrjIf a @samp{#} appears as the first character of a line, the whole line
140*a9fa9459Szrjis treated as a comment, but in this case the line can also be a
141*a9fa9459Szrjlogical line number directive (@pxref{Comments}) or a
142*a9fa9459Szrjpreprocessor control command (@pxref{Preprocessing}).
143*a9fa9459Szrj
144*a9fa9459Szrj@cindex line separator, M32C
145*a9fa9459Szrj@cindex statement separator, M32C
146*a9fa9459Szrj@cindex M32C line separator
147*a9fa9459SzrjThe @samp{|} character can be used to separate statements on the same
148*a9fa9459Szrjline.
149