1*fae548d3Szrj /* BFD library support routines for architectures.
2*fae548d3Szrj Copyright (C) 1990-2020 Free Software Foundation, Inc.
3*fae548d3Szrj Hacked by John Gilmore and Steve Chamberlain of Cygnus Support.
4*fae548d3Szrj
5*fae548d3Szrj This file is part of BFD, the Binary File Descriptor library.
6*fae548d3Szrj
7*fae548d3Szrj This program is free software; you can redistribute it and/or modify
8*fae548d3Szrj it under the terms of the GNU General Public License as published by
9*fae548d3Szrj the Free Software Foundation; either version 3 of the License, or
10*fae548d3Szrj (at your option) any later version.
11*fae548d3Szrj
12*fae548d3Szrj This program is distributed in the hope that it will be useful,
13*fae548d3Szrj but WITHOUT ANY WARRANTY; without even the implied warranty of
14*fae548d3Szrj MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15*fae548d3Szrj GNU General Public License for more details.
16*fae548d3Szrj
17*fae548d3Szrj You should have received a copy of the GNU General Public License
18*fae548d3Szrj along with this program; if not, write to the Free Software
19*fae548d3Szrj Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20*fae548d3Szrj MA 02110-1301, USA. */
21*fae548d3Szrj
22*fae548d3Szrj #include "sysdep.h"
23*fae548d3Szrj #include "bfd.h"
24*fae548d3Szrj #include "libbfd.h"
25*fae548d3Szrj #include "safe-ctype.h"
26*fae548d3Szrj
27*fae548d3Szrj /*
28*fae548d3Szrj
29*fae548d3Szrj SECTION
30*fae548d3Szrj Architectures
31*fae548d3Szrj
32*fae548d3Szrj BFD keeps one atom in a BFD describing the
33*fae548d3Szrj architecture of the data attached to the BFD: a pointer to a
34*fae548d3Szrj <<bfd_arch_info_type>>.
35*fae548d3Szrj
36*fae548d3Szrj Pointers to structures can be requested independently of a BFD
37*fae548d3Szrj so that an architecture's information can be interrogated
38*fae548d3Szrj without access to an open BFD.
39*fae548d3Szrj
40*fae548d3Szrj The architecture information is provided by each architecture package.
41*fae548d3Szrj The set of default architectures is selected by the macro
42*fae548d3Szrj <<SELECT_ARCHITECTURES>>. This is normally set up in the
43*fae548d3Szrj @file{config/@var{target}.mt} file of your choice. If the name is not
44*fae548d3Szrj defined, then all the architectures supported are included.
45*fae548d3Szrj
46*fae548d3Szrj When BFD starts up, all the architectures are called with an
47*fae548d3Szrj initialize method. It is up to the architecture back end to
48*fae548d3Szrj insert as many items into the list of architectures as it wants to;
49*fae548d3Szrj generally this would be one for each machine and one for the
50*fae548d3Szrj default case (an item with a machine field of 0).
51*fae548d3Szrj
52*fae548d3Szrj BFD's idea of an architecture is implemented in @file{archures.c}.
53*fae548d3Szrj */
54*fae548d3Szrj
55*fae548d3Szrj /*
56*fae548d3Szrj
57*fae548d3Szrj SUBSECTION
58*fae548d3Szrj bfd_architecture
59*fae548d3Szrj
60*fae548d3Szrj DESCRIPTION
61*fae548d3Szrj This enum gives the object file's CPU architecture, in a
62*fae548d3Szrj global sense---i.e., what processor family does it belong to?
63*fae548d3Szrj Another field indicates which processor within
64*fae548d3Szrj the family is in use. The machine gives a number which
65*fae548d3Szrj distinguishes different versions of the architecture,
66*fae548d3Szrj containing, for example, 68020 for Motorola 68020.
67*fae548d3Szrj
68*fae548d3Szrj .enum bfd_architecture
69*fae548d3Szrj .{
70*fae548d3Szrj . bfd_arch_unknown, {* File arch not known. *}
71*fae548d3Szrj . bfd_arch_obscure, {* Arch known, not one of these. *}
72*fae548d3Szrj . bfd_arch_m68k, {* Motorola 68xxx. *}
73*fae548d3Szrj .#define bfd_mach_m68000 1
74*fae548d3Szrj .#define bfd_mach_m68008 2
75*fae548d3Szrj .#define bfd_mach_m68010 3
76*fae548d3Szrj .#define bfd_mach_m68020 4
77*fae548d3Szrj .#define bfd_mach_m68030 5
78*fae548d3Szrj .#define bfd_mach_m68040 6
79*fae548d3Szrj .#define bfd_mach_m68060 7
80*fae548d3Szrj .#define bfd_mach_cpu32 8
81*fae548d3Szrj .#define bfd_mach_fido 9
82*fae548d3Szrj .#define bfd_mach_mcf_isa_a_nodiv 10
83*fae548d3Szrj .#define bfd_mach_mcf_isa_a 11
84*fae548d3Szrj .#define bfd_mach_mcf_isa_a_mac 12
85*fae548d3Szrj .#define bfd_mach_mcf_isa_a_emac 13
86*fae548d3Szrj .#define bfd_mach_mcf_isa_aplus 14
87*fae548d3Szrj .#define bfd_mach_mcf_isa_aplus_mac 15
88*fae548d3Szrj .#define bfd_mach_mcf_isa_aplus_emac 16
89*fae548d3Szrj .#define bfd_mach_mcf_isa_b_nousp 17
90*fae548d3Szrj .#define bfd_mach_mcf_isa_b_nousp_mac 18
91*fae548d3Szrj .#define bfd_mach_mcf_isa_b_nousp_emac 19
92*fae548d3Szrj .#define bfd_mach_mcf_isa_b 20
93*fae548d3Szrj .#define bfd_mach_mcf_isa_b_mac 21
94*fae548d3Szrj .#define bfd_mach_mcf_isa_b_emac 22
95*fae548d3Szrj .#define bfd_mach_mcf_isa_b_float 23
96*fae548d3Szrj .#define bfd_mach_mcf_isa_b_float_mac 24
97*fae548d3Szrj .#define bfd_mach_mcf_isa_b_float_emac 25
98*fae548d3Szrj .#define bfd_mach_mcf_isa_c 26
99*fae548d3Szrj .#define bfd_mach_mcf_isa_c_mac 27
100*fae548d3Szrj .#define bfd_mach_mcf_isa_c_emac 28
101*fae548d3Szrj .#define bfd_mach_mcf_isa_c_nodiv 29
102*fae548d3Szrj .#define bfd_mach_mcf_isa_c_nodiv_mac 30
103*fae548d3Szrj .#define bfd_mach_mcf_isa_c_nodiv_emac 31
104*fae548d3Szrj . bfd_arch_vax, {* DEC Vax. *}
105*fae548d3Szrj .
106*fae548d3Szrj . bfd_arch_or1k, {* OpenRISC 1000. *}
107*fae548d3Szrj .#define bfd_mach_or1k 1
108*fae548d3Szrj .#define bfd_mach_or1knd 2
109*fae548d3Szrj .
110*fae548d3Szrj . bfd_arch_sparc, {* SPARC. *}
111*fae548d3Szrj .#define bfd_mach_sparc 1
112*fae548d3Szrj .{* The difference between v8plus and v9 is that v9 is a true 64 bit env. *}
113*fae548d3Szrj .#define bfd_mach_sparc_sparclet 2
114*fae548d3Szrj .#define bfd_mach_sparc_sparclite 3
115*fae548d3Szrj .#define bfd_mach_sparc_v8plus 4
116*fae548d3Szrj .#define bfd_mach_sparc_v8plusa 5 {* with ultrasparc add'ns. *}
117*fae548d3Szrj .#define bfd_mach_sparc_sparclite_le 6
118*fae548d3Szrj .#define bfd_mach_sparc_v9 7
119*fae548d3Szrj .#define bfd_mach_sparc_v9a 8 {* with ultrasparc add'ns. *}
120*fae548d3Szrj .#define bfd_mach_sparc_v8plusb 9 {* with cheetah add'ns. *}
121*fae548d3Szrj .#define bfd_mach_sparc_v9b 10 {* with cheetah add'ns. *}
122*fae548d3Szrj .#define bfd_mach_sparc_v8plusc 11 {* with UA2005 and T1 add'ns. *}
123*fae548d3Szrj .#define bfd_mach_sparc_v9c 12 {* with UA2005 and T1 add'ns. *}
124*fae548d3Szrj .#define bfd_mach_sparc_v8plusd 13 {* with UA2007 and T3 add'ns. *}
125*fae548d3Szrj .#define bfd_mach_sparc_v9d 14 {* with UA2007 and T3 add'ns. *}
126*fae548d3Szrj .#define bfd_mach_sparc_v8pluse 15 {* with OSA2001 and T4 add'ns (no IMA). *}
127*fae548d3Szrj .#define bfd_mach_sparc_v9e 16 {* with OSA2001 and T4 add'ns (no IMA). *}
128*fae548d3Szrj .#define bfd_mach_sparc_v8plusv 17 {* with OSA2011 and T4 and IMA and FJMAU add'ns. *}
129*fae548d3Szrj .#define bfd_mach_sparc_v9v 18 {* with OSA2011 and T4 and IMA and FJMAU add'ns. *}
130*fae548d3Szrj .#define bfd_mach_sparc_v8plusm 19 {* with OSA2015 and M7 add'ns. *}
131*fae548d3Szrj .#define bfd_mach_sparc_v9m 20 {* with OSA2015 and M7 add'ns. *}
132*fae548d3Szrj .#define bfd_mach_sparc_v8plusm8 21 {* with OSA2017 and M8 add'ns. *}
133*fae548d3Szrj .#define bfd_mach_sparc_v9m8 22 {* with OSA2017 and M8 add'ns. *}
134*fae548d3Szrj .{* Nonzero if MACH has the v9 instruction set. *}
135*fae548d3Szrj .#define bfd_mach_sparc_v9_p(mach) \
136*fae548d3Szrj . ((mach) >= bfd_mach_sparc_v8plus && (mach) <= bfd_mach_sparc_v9m8 \
137*fae548d3Szrj . && (mach) != bfd_mach_sparc_sparclite_le)
138*fae548d3Szrj .{* Nonzero if MACH is a 64 bit sparc architecture. *}
139*fae548d3Szrj .#define bfd_mach_sparc_64bit_p(mach) \
140*fae548d3Szrj . ((mach) >= bfd_mach_sparc_v9 \
141*fae548d3Szrj . && (mach) != bfd_mach_sparc_v8plusb \
142*fae548d3Szrj . && (mach) != bfd_mach_sparc_v8plusc \
143*fae548d3Szrj . && (mach) != bfd_mach_sparc_v8plusd \
144*fae548d3Szrj . && (mach) != bfd_mach_sparc_v8pluse \
145*fae548d3Szrj . && (mach) != bfd_mach_sparc_v8plusv \
146*fae548d3Szrj . && (mach) != bfd_mach_sparc_v8plusm \
147*fae548d3Szrj . && (mach) != bfd_mach_sparc_v8plusm8)
148*fae548d3Szrj . bfd_arch_spu, {* PowerPC SPU. *}
149*fae548d3Szrj .#define bfd_mach_spu 256
150*fae548d3Szrj . bfd_arch_mips, {* MIPS Rxxxx. *}
151*fae548d3Szrj .#define bfd_mach_mips3000 3000
152*fae548d3Szrj .#define bfd_mach_mips3900 3900
153*fae548d3Szrj .#define bfd_mach_mips4000 4000
154*fae548d3Szrj .#define bfd_mach_mips4010 4010
155*fae548d3Szrj .#define bfd_mach_mips4100 4100
156*fae548d3Szrj .#define bfd_mach_mips4111 4111
157*fae548d3Szrj .#define bfd_mach_mips4120 4120
158*fae548d3Szrj .#define bfd_mach_mips4300 4300
159*fae548d3Szrj .#define bfd_mach_mips4400 4400
160*fae548d3Szrj .#define bfd_mach_mips4600 4600
161*fae548d3Szrj .#define bfd_mach_mips4650 4650
162*fae548d3Szrj .#define bfd_mach_mips5000 5000
163*fae548d3Szrj .#define bfd_mach_mips5400 5400
164*fae548d3Szrj .#define bfd_mach_mips5500 5500
165*fae548d3Szrj .#define bfd_mach_mips5900 5900
166*fae548d3Szrj .#define bfd_mach_mips6000 6000
167*fae548d3Szrj .#define bfd_mach_mips7000 7000
168*fae548d3Szrj .#define bfd_mach_mips8000 8000
169*fae548d3Szrj .#define bfd_mach_mips9000 9000
170*fae548d3Szrj .#define bfd_mach_mips10000 10000
171*fae548d3Szrj .#define bfd_mach_mips12000 12000
172*fae548d3Szrj .#define bfd_mach_mips14000 14000
173*fae548d3Szrj .#define bfd_mach_mips16000 16000
174*fae548d3Szrj .#define bfd_mach_mips16 16
175*fae548d3Szrj .#define bfd_mach_mips5 5
176*fae548d3Szrj .#define bfd_mach_mips_loongson_2e 3001
177*fae548d3Szrj .#define bfd_mach_mips_loongson_2f 3002
178*fae548d3Szrj .#define bfd_mach_mips_gs464 3003
179*fae548d3Szrj .#define bfd_mach_mips_gs464e 3004
180*fae548d3Szrj .#define bfd_mach_mips_gs264e 3005
181*fae548d3Szrj .#define bfd_mach_mips_sb1 12310201 {* octal 'SB', 01. *}
182*fae548d3Szrj .#define bfd_mach_mips_octeon 6501
183*fae548d3Szrj .#define bfd_mach_mips_octeonp 6601
184*fae548d3Szrj .#define bfd_mach_mips_octeon2 6502
185*fae548d3Szrj .#define bfd_mach_mips_octeon3 6503
186*fae548d3Szrj .#define bfd_mach_mips_xlr 887682 {* decimal 'XLR'. *}
187*fae548d3Szrj .#define bfd_mach_mips_interaptiv_mr2 736550 {* decimal 'IA2'. *}
188*fae548d3Szrj .#define bfd_mach_mipsisa32 32
189*fae548d3Szrj .#define bfd_mach_mipsisa32r2 33
190*fae548d3Szrj .#define bfd_mach_mipsisa32r3 34
191*fae548d3Szrj .#define bfd_mach_mipsisa32r5 36
192*fae548d3Szrj .#define bfd_mach_mipsisa32r6 37
193*fae548d3Szrj .#define bfd_mach_mipsisa64 64
194*fae548d3Szrj .#define bfd_mach_mipsisa64r2 65
195*fae548d3Szrj .#define bfd_mach_mipsisa64r3 66
196*fae548d3Szrj .#define bfd_mach_mipsisa64r5 68
197*fae548d3Szrj .#define bfd_mach_mipsisa64r6 69
198*fae548d3Szrj .#define bfd_mach_mips_micromips 96
199*fae548d3Szrj . bfd_arch_i386, {* Intel 386. *}
200*fae548d3Szrj .#define bfd_mach_i386_intel_syntax (1 << 0)
201*fae548d3Szrj .#define bfd_mach_i386_i8086 (1 << 1)
202*fae548d3Szrj .#define bfd_mach_i386_i386 (1 << 2)
203*fae548d3Szrj .#define bfd_mach_x86_64 (1 << 3)
204*fae548d3Szrj .#define bfd_mach_x64_32 (1 << 4)
205*fae548d3Szrj .#define bfd_mach_i386_i386_intel_syntax (bfd_mach_i386_i386 | bfd_mach_i386_intel_syntax)
206*fae548d3Szrj .#define bfd_mach_x86_64_intel_syntax (bfd_mach_x86_64 | bfd_mach_i386_intel_syntax)
207*fae548d3Szrj .#define bfd_mach_x64_32_intel_syntax (bfd_mach_x64_32 | bfd_mach_i386_intel_syntax)
208*fae548d3Szrj . bfd_arch_l1om, {* Intel L1OM. *}
209*fae548d3Szrj .#define bfd_mach_l1om (1 << 5)
210*fae548d3Szrj .#define bfd_mach_l1om_intel_syntax (bfd_mach_l1om | bfd_mach_i386_intel_syntax)
211*fae548d3Szrj . bfd_arch_k1om, {* Intel K1OM. *}
212*fae548d3Szrj .#define bfd_mach_k1om (1 << 6)
213*fae548d3Szrj .#define bfd_mach_k1om_intel_syntax (bfd_mach_k1om | bfd_mach_i386_intel_syntax)
214*fae548d3Szrj .#define bfd_mach_i386_nacl (1 << 7)
215*fae548d3Szrj .#define bfd_mach_i386_i386_nacl (bfd_mach_i386_i386 | bfd_mach_i386_nacl)
216*fae548d3Szrj .#define bfd_mach_x86_64_nacl (bfd_mach_x86_64 | bfd_mach_i386_nacl)
217*fae548d3Szrj .#define bfd_mach_x64_32_nacl (bfd_mach_x64_32 | bfd_mach_i386_nacl)
218*fae548d3Szrj . bfd_arch_iamcu, {* Intel MCU. *}
219*fae548d3Szrj .#define bfd_mach_iamcu (1 << 8)
220*fae548d3Szrj .#define bfd_mach_i386_iamcu (bfd_mach_i386_i386 | bfd_mach_iamcu)
221*fae548d3Szrj .#define bfd_mach_i386_iamcu_intel_syntax (bfd_mach_i386_iamcu | bfd_mach_i386_intel_syntax)
222*fae548d3Szrj . bfd_arch_romp, {* IBM ROMP PC/RT. *}
223*fae548d3Szrj . bfd_arch_convex, {* Convex. *}
224*fae548d3Szrj . bfd_arch_m98k, {* Motorola 98xxx. *}
225*fae548d3Szrj . bfd_arch_pyramid, {* Pyramid Technology. *}
226*fae548d3Szrj . bfd_arch_h8300, {* Renesas H8/300 (formerly Hitachi H8/300). *}
227*fae548d3Szrj .#define bfd_mach_h8300 1
228*fae548d3Szrj .#define bfd_mach_h8300h 2
229*fae548d3Szrj .#define bfd_mach_h8300s 3
230*fae548d3Szrj .#define bfd_mach_h8300hn 4
231*fae548d3Szrj .#define bfd_mach_h8300sn 5
232*fae548d3Szrj .#define bfd_mach_h8300sx 6
233*fae548d3Szrj .#define bfd_mach_h8300sxn 7
234*fae548d3Szrj . bfd_arch_pdp11, {* DEC PDP-11. *}
235*fae548d3Szrj . bfd_arch_plugin,
236*fae548d3Szrj . bfd_arch_powerpc, {* PowerPC. *}
237*fae548d3Szrj .#define bfd_mach_ppc 32
238*fae548d3Szrj .#define bfd_mach_ppc64 64
239*fae548d3Szrj .#define bfd_mach_ppc_403 403
240*fae548d3Szrj .#define bfd_mach_ppc_403gc 4030
241*fae548d3Szrj .#define bfd_mach_ppc_405 405
242*fae548d3Szrj .#define bfd_mach_ppc_505 505
243*fae548d3Szrj .#define bfd_mach_ppc_601 601
244*fae548d3Szrj .#define bfd_mach_ppc_602 602
245*fae548d3Szrj .#define bfd_mach_ppc_603 603
246*fae548d3Szrj .#define bfd_mach_ppc_ec603e 6031
247*fae548d3Szrj .#define bfd_mach_ppc_604 604
248*fae548d3Szrj .#define bfd_mach_ppc_620 620
249*fae548d3Szrj .#define bfd_mach_ppc_630 630
250*fae548d3Szrj .#define bfd_mach_ppc_750 750
251*fae548d3Szrj .#define bfd_mach_ppc_860 860
252*fae548d3Szrj .#define bfd_mach_ppc_a35 35
253*fae548d3Szrj .#define bfd_mach_ppc_rs64ii 642
254*fae548d3Szrj .#define bfd_mach_ppc_rs64iii 643
255*fae548d3Szrj .#define bfd_mach_ppc_7400 7400
256*fae548d3Szrj .#define bfd_mach_ppc_e500 500
257*fae548d3Szrj .#define bfd_mach_ppc_e500mc 5001
258*fae548d3Szrj .#define bfd_mach_ppc_e500mc64 5005
259*fae548d3Szrj .#define bfd_mach_ppc_e5500 5006
260*fae548d3Szrj .#define bfd_mach_ppc_e6500 5007
261*fae548d3Szrj .#define bfd_mach_ppc_titan 83
262*fae548d3Szrj .#define bfd_mach_ppc_vle 84
263*fae548d3Szrj . bfd_arch_rs6000, {* IBM RS/6000. *}
264*fae548d3Szrj .#define bfd_mach_rs6k 6000
265*fae548d3Szrj .#define bfd_mach_rs6k_rs1 6001
266*fae548d3Szrj .#define bfd_mach_rs6k_rsc 6003
267*fae548d3Szrj .#define bfd_mach_rs6k_rs2 6002
268*fae548d3Szrj . bfd_arch_hppa, {* HP PA RISC. *}
269*fae548d3Szrj .#define bfd_mach_hppa10 10
270*fae548d3Szrj .#define bfd_mach_hppa11 11
271*fae548d3Szrj .#define bfd_mach_hppa20 20
272*fae548d3Szrj .#define bfd_mach_hppa20w 25
273*fae548d3Szrj . bfd_arch_d10v, {* Mitsubishi D10V. *}
274*fae548d3Szrj .#define bfd_mach_d10v 1
275*fae548d3Szrj .#define bfd_mach_d10v_ts2 2
276*fae548d3Szrj .#define bfd_mach_d10v_ts3 3
277*fae548d3Szrj . bfd_arch_d30v, {* Mitsubishi D30V. *}
278*fae548d3Szrj . bfd_arch_dlx, {* DLX. *}
279*fae548d3Szrj . bfd_arch_m68hc11, {* Motorola 68HC11. *}
280*fae548d3Szrj . bfd_arch_m68hc12, {* Motorola 68HC12. *}
281*fae548d3Szrj .#define bfd_mach_m6812_default 0
282*fae548d3Szrj .#define bfd_mach_m6812 1
283*fae548d3Szrj .#define bfd_mach_m6812s 2
284*fae548d3Szrj . bfd_arch_m9s12x, {* Freescale S12X. *}
285*fae548d3Szrj . bfd_arch_m9s12xg, {* Freescale XGATE. *}
286*fae548d3Szrj . bfd_arch_s12z, {* Freescale S12Z. *}
287*fae548d3Szrj .#define bfd_mach_s12z_default 0
288*fae548d3Szrj . bfd_arch_z8k, {* Zilog Z8000. *}
289*fae548d3Szrj .#define bfd_mach_z8001 1
290*fae548d3Szrj .#define bfd_mach_z8002 2
291*fae548d3Szrj . bfd_arch_sh, {* Renesas / SuperH SH (formerly Hitachi SH). *}
292*fae548d3Szrj .#define bfd_mach_sh 1
293*fae548d3Szrj .#define bfd_mach_sh2 0x20
294*fae548d3Szrj .#define bfd_mach_sh_dsp 0x2d
295*fae548d3Szrj .#define bfd_mach_sh2a 0x2a
296*fae548d3Szrj .#define bfd_mach_sh2a_nofpu 0x2b
297*fae548d3Szrj .#define bfd_mach_sh2a_nofpu_or_sh4_nommu_nofpu 0x2a1
298*fae548d3Szrj .#define bfd_mach_sh2a_nofpu_or_sh3_nommu 0x2a2
299*fae548d3Szrj .#define bfd_mach_sh2a_or_sh4 0x2a3
300*fae548d3Szrj .#define bfd_mach_sh2a_or_sh3e 0x2a4
301*fae548d3Szrj .#define bfd_mach_sh2e 0x2e
302*fae548d3Szrj .#define bfd_mach_sh3 0x30
303*fae548d3Szrj .#define bfd_mach_sh3_nommu 0x31
304*fae548d3Szrj .#define bfd_mach_sh3_dsp 0x3d
305*fae548d3Szrj .#define bfd_mach_sh3e 0x3e
306*fae548d3Szrj .#define bfd_mach_sh4 0x40
307*fae548d3Szrj .#define bfd_mach_sh4_nofpu 0x41
308*fae548d3Szrj .#define bfd_mach_sh4_nommu_nofpu 0x42
309*fae548d3Szrj .#define bfd_mach_sh4a 0x4a
310*fae548d3Szrj .#define bfd_mach_sh4a_nofpu 0x4b
311*fae548d3Szrj .#define bfd_mach_sh4al_dsp 0x4d
312*fae548d3Szrj . bfd_arch_alpha, {* Dec Alpha. *}
313*fae548d3Szrj .#define bfd_mach_alpha_ev4 0x10
314*fae548d3Szrj .#define bfd_mach_alpha_ev5 0x20
315*fae548d3Szrj .#define bfd_mach_alpha_ev6 0x30
316*fae548d3Szrj . bfd_arch_arm, {* Advanced Risc Machines ARM. *}
317*fae548d3Szrj .#define bfd_mach_arm_unknown 0
318*fae548d3Szrj .#define bfd_mach_arm_2 1
319*fae548d3Szrj .#define bfd_mach_arm_2a 2
320*fae548d3Szrj .#define bfd_mach_arm_3 3
321*fae548d3Szrj .#define bfd_mach_arm_3M 4
322*fae548d3Szrj .#define bfd_mach_arm_4 5
323*fae548d3Szrj .#define bfd_mach_arm_4T 6
324*fae548d3Szrj .#define bfd_mach_arm_5 7
325*fae548d3Szrj .#define bfd_mach_arm_5T 8
326*fae548d3Szrj .#define bfd_mach_arm_5TE 9
327*fae548d3Szrj .#define bfd_mach_arm_XScale 10
328*fae548d3Szrj .#define bfd_mach_arm_ep9312 11
329*fae548d3Szrj .#define bfd_mach_arm_iWMMXt 12
330*fae548d3Szrj .#define bfd_mach_arm_iWMMXt2 13
331*fae548d3Szrj .#define bfd_mach_arm_5TEJ 14
332*fae548d3Szrj .#define bfd_mach_arm_6 15
333*fae548d3Szrj .#define bfd_mach_arm_6KZ 16
334*fae548d3Szrj .#define bfd_mach_arm_6T2 17
335*fae548d3Szrj .#define bfd_mach_arm_6K 18
336*fae548d3Szrj .#define bfd_mach_arm_7 19
337*fae548d3Szrj .#define bfd_mach_arm_6M 20
338*fae548d3Szrj .#define bfd_mach_arm_6SM 21
339*fae548d3Szrj .#define bfd_mach_arm_7EM 22
340*fae548d3Szrj .#define bfd_mach_arm_8 23
341*fae548d3Szrj .#define bfd_mach_arm_8R 24
342*fae548d3Szrj .#define bfd_mach_arm_8M_BASE 25
343*fae548d3Szrj .#define bfd_mach_arm_8M_MAIN 26
344*fae548d3Szrj .#define bfd_mach_arm_8_1M_MAIN 27
345*fae548d3Szrj . bfd_arch_nds32, {* Andes NDS32. *}
346*fae548d3Szrj .#define bfd_mach_n1 1
347*fae548d3Szrj .#define bfd_mach_n1h 2
348*fae548d3Szrj .#define bfd_mach_n1h_v2 3
349*fae548d3Szrj .#define bfd_mach_n1h_v3 4
350*fae548d3Szrj .#define bfd_mach_n1h_v3m 5
351*fae548d3Szrj . bfd_arch_ns32k, {* National Semiconductors ns32000. *}
352*fae548d3Szrj . bfd_arch_tic30, {* Texas Instruments TMS320C30. *}
353*fae548d3Szrj . bfd_arch_tic4x, {* Texas Instruments TMS320C3X/4X. *}
354*fae548d3Szrj .#define bfd_mach_tic3x 30
355*fae548d3Szrj .#define bfd_mach_tic4x 40
356*fae548d3Szrj . bfd_arch_tic54x, {* Texas Instruments TMS320C54X. *}
357*fae548d3Szrj . bfd_arch_tic6x, {* Texas Instruments TMS320C6X. *}
358*fae548d3Szrj . bfd_arch_v850, {* NEC V850. *}
359*fae548d3Szrj . bfd_arch_v850_rh850,{* NEC V850 (using RH850 ABI). *}
360*fae548d3Szrj .#define bfd_mach_v850 1
361*fae548d3Szrj .#define bfd_mach_v850e 'E'
362*fae548d3Szrj .#define bfd_mach_v850e1 '1'
363*fae548d3Szrj .#define bfd_mach_v850e2 0x4532
364*fae548d3Szrj .#define bfd_mach_v850e2v3 0x45325633
365*fae548d3Szrj .#define bfd_mach_v850e3v5 0x45335635 {* ('E'|'3'|'V'|'5'). *}
366*fae548d3Szrj . bfd_arch_arc, {* ARC Cores. *}
367*fae548d3Szrj .#define bfd_mach_arc_a4 0
368*fae548d3Szrj .#define bfd_mach_arc_a5 1
369*fae548d3Szrj .#define bfd_mach_arc_arc600 2
370*fae548d3Szrj .#define bfd_mach_arc_arc601 4
371*fae548d3Szrj .#define bfd_mach_arc_arc700 3
372*fae548d3Szrj .#define bfd_mach_arc_arcv2 5
373*fae548d3Szrj . bfd_arch_m32c, {* Renesas M16C/M32C. *}
374*fae548d3Szrj .#define bfd_mach_m16c 0x75
375*fae548d3Szrj .#define bfd_mach_m32c 0x78
376*fae548d3Szrj . bfd_arch_m32r, {* Renesas M32R (formerly Mitsubishi M32R/D). *}
377*fae548d3Szrj .#define bfd_mach_m32r 1 {* For backwards compatibility. *}
378*fae548d3Szrj .#define bfd_mach_m32rx 'x'
379*fae548d3Szrj .#define bfd_mach_m32r2 '2'
380*fae548d3Szrj . bfd_arch_mn10200, {* Matsushita MN10200. *}
381*fae548d3Szrj . bfd_arch_mn10300, {* Matsushita MN10300. *}
382*fae548d3Szrj .#define bfd_mach_mn10300 300
383*fae548d3Szrj .#define bfd_mach_am33 330
384*fae548d3Szrj .#define bfd_mach_am33_2 332
385*fae548d3Szrj . bfd_arch_fr30,
386*fae548d3Szrj .#define bfd_mach_fr30 0x46523330
387*fae548d3Szrj . bfd_arch_frv,
388*fae548d3Szrj .#define bfd_mach_frv 1
389*fae548d3Szrj .#define bfd_mach_frvsimple 2
390*fae548d3Szrj .#define bfd_mach_fr300 300
391*fae548d3Szrj .#define bfd_mach_fr400 400
392*fae548d3Szrj .#define bfd_mach_fr450 450
393*fae548d3Szrj .#define bfd_mach_frvtomcat 499 {* fr500 prototype. *}
394*fae548d3Szrj .#define bfd_mach_fr500 500
395*fae548d3Szrj .#define bfd_mach_fr550 550
396*fae548d3Szrj . bfd_arch_moxie, {* The moxie processor. *}
397*fae548d3Szrj .#define bfd_mach_moxie 1
398*fae548d3Szrj . bfd_arch_ft32, {* The ft32 processor. *}
399*fae548d3Szrj .#define bfd_mach_ft32 1
400*fae548d3Szrj .#define bfd_mach_ft32b 2
401*fae548d3Szrj . bfd_arch_mcore,
402*fae548d3Szrj . bfd_arch_mep,
403*fae548d3Szrj .#define bfd_mach_mep 1
404*fae548d3Szrj .#define bfd_mach_mep_h1 0x6831
405*fae548d3Szrj .#define bfd_mach_mep_c5 0x6335
406*fae548d3Szrj . bfd_arch_metag,
407*fae548d3Szrj .#define bfd_mach_metag 1
408*fae548d3Szrj . bfd_arch_ia64, {* HP/Intel ia64. *}
409*fae548d3Szrj .#define bfd_mach_ia64_elf64 64
410*fae548d3Szrj .#define bfd_mach_ia64_elf32 32
411*fae548d3Szrj . bfd_arch_ip2k, {* Ubicom IP2K microcontrollers. *}
412*fae548d3Szrj .#define bfd_mach_ip2022 1
413*fae548d3Szrj .#define bfd_mach_ip2022ext 2
414*fae548d3Szrj . bfd_arch_iq2000, {* Vitesse IQ2000. *}
415*fae548d3Szrj .#define bfd_mach_iq2000 1
416*fae548d3Szrj .#define bfd_mach_iq10 2
417*fae548d3Szrj . bfd_arch_bpf, {* Linux eBPF. *}
418*fae548d3Szrj .#define bfd_mach_bpf 1
419*fae548d3Szrj . bfd_arch_epiphany, {* Adapteva EPIPHANY. *}
420*fae548d3Szrj .#define bfd_mach_epiphany16 1
421*fae548d3Szrj .#define bfd_mach_epiphany32 2
422*fae548d3Szrj . bfd_arch_mt,
423*fae548d3Szrj .#define bfd_mach_ms1 1
424*fae548d3Szrj .#define bfd_mach_mrisc2 2
425*fae548d3Szrj .#define bfd_mach_ms2 3
426*fae548d3Szrj . bfd_arch_pj,
427*fae548d3Szrj . bfd_arch_avr, {* Atmel AVR microcontrollers. *}
428*fae548d3Szrj .#define bfd_mach_avr1 1
429*fae548d3Szrj .#define bfd_mach_avr2 2
430*fae548d3Szrj .#define bfd_mach_avr25 25
431*fae548d3Szrj .#define bfd_mach_avr3 3
432*fae548d3Szrj .#define bfd_mach_avr31 31
433*fae548d3Szrj .#define bfd_mach_avr35 35
434*fae548d3Szrj .#define bfd_mach_avr4 4
435*fae548d3Szrj .#define bfd_mach_avr5 5
436*fae548d3Szrj .#define bfd_mach_avr51 51
437*fae548d3Szrj .#define bfd_mach_avr6 6
438*fae548d3Szrj .#define bfd_mach_avrtiny 100
439*fae548d3Szrj .#define bfd_mach_avrxmega1 101
440*fae548d3Szrj .#define bfd_mach_avrxmega2 102
441*fae548d3Szrj .#define bfd_mach_avrxmega3 103
442*fae548d3Szrj .#define bfd_mach_avrxmega4 104
443*fae548d3Szrj .#define bfd_mach_avrxmega5 105
444*fae548d3Szrj .#define bfd_mach_avrxmega6 106
445*fae548d3Szrj .#define bfd_mach_avrxmega7 107
446*fae548d3Szrj . bfd_arch_bfin, {* ADI Blackfin. *}
447*fae548d3Szrj .#define bfd_mach_bfin 1
448*fae548d3Szrj . bfd_arch_cr16, {* National Semiconductor CompactRISC (ie CR16). *}
449*fae548d3Szrj .#define bfd_mach_cr16 1
450*fae548d3Szrj . bfd_arch_crx, {* National Semiconductor CRX. *}
451*fae548d3Szrj .#define bfd_mach_crx 1
452*fae548d3Szrj . bfd_arch_cris, {* Axis CRIS. *}
453*fae548d3Szrj .#define bfd_mach_cris_v0_v10 255
454*fae548d3Szrj .#define bfd_mach_cris_v32 32
455*fae548d3Szrj .#define bfd_mach_cris_v10_v32 1032
456*fae548d3Szrj . bfd_arch_riscv,
457*fae548d3Szrj .#define bfd_mach_riscv32 132
458*fae548d3Szrj .#define bfd_mach_riscv64 164
459*fae548d3Szrj . bfd_arch_rl78,
460*fae548d3Szrj .#define bfd_mach_rl78 0x75
461*fae548d3Szrj . bfd_arch_rx, {* Renesas RX. *}
462*fae548d3Szrj .#define bfd_mach_rx 0x75
463*fae548d3Szrj .#define bfd_mach_rx_v2 0x76
464*fae548d3Szrj .#define bfd_mach_rx_v3 0x77
465*fae548d3Szrj . bfd_arch_s390, {* IBM s390. *}
466*fae548d3Szrj .#define bfd_mach_s390_31 31
467*fae548d3Szrj .#define bfd_mach_s390_64 64
468*fae548d3Szrj . bfd_arch_score, {* Sunplus score. *}
469*fae548d3Szrj .#define bfd_mach_score3 3
470*fae548d3Szrj .#define bfd_mach_score7 7
471*fae548d3Szrj . bfd_arch_mmix, {* Donald Knuth's educational processor. *}
472*fae548d3Szrj . bfd_arch_xstormy16,
473*fae548d3Szrj .#define bfd_mach_xstormy16 1
474*fae548d3Szrj . bfd_arch_msp430, {* Texas Instruments MSP430 architecture. *}
475*fae548d3Szrj .#define bfd_mach_msp11 11
476*fae548d3Szrj .#define bfd_mach_msp110 110
477*fae548d3Szrj .#define bfd_mach_msp12 12
478*fae548d3Szrj .#define bfd_mach_msp13 13
479*fae548d3Szrj .#define bfd_mach_msp14 14
480*fae548d3Szrj .#define bfd_mach_msp15 15
481*fae548d3Szrj .#define bfd_mach_msp16 16
482*fae548d3Szrj .#define bfd_mach_msp20 20
483*fae548d3Szrj .#define bfd_mach_msp21 21
484*fae548d3Szrj .#define bfd_mach_msp22 22
485*fae548d3Szrj .#define bfd_mach_msp23 23
486*fae548d3Szrj .#define bfd_mach_msp24 24
487*fae548d3Szrj .#define bfd_mach_msp26 26
488*fae548d3Szrj .#define bfd_mach_msp31 31
489*fae548d3Szrj .#define bfd_mach_msp32 32
490*fae548d3Szrj .#define bfd_mach_msp33 33
491*fae548d3Szrj .#define bfd_mach_msp41 41
492*fae548d3Szrj .#define bfd_mach_msp42 42
493*fae548d3Szrj .#define bfd_mach_msp43 43
494*fae548d3Szrj .#define bfd_mach_msp44 44
495*fae548d3Szrj .#define bfd_mach_msp430x 45
496*fae548d3Szrj .#define bfd_mach_msp46 46
497*fae548d3Szrj .#define bfd_mach_msp47 47
498*fae548d3Szrj .#define bfd_mach_msp54 54
499*fae548d3Szrj . bfd_arch_xc16x, {* Infineon's XC16X Series. *}
500*fae548d3Szrj .#define bfd_mach_xc16x 1
501*fae548d3Szrj .#define bfd_mach_xc16xl 2
502*fae548d3Szrj .#define bfd_mach_xc16xs 3
503*fae548d3Szrj . bfd_arch_xgate, {* Freescale XGATE. *}
504*fae548d3Szrj .#define bfd_mach_xgate 1
505*fae548d3Szrj . bfd_arch_xtensa, {* Tensilica's Xtensa cores. *}
506*fae548d3Szrj .#define bfd_mach_xtensa 1
507*fae548d3Szrj . bfd_arch_z80,
508*fae548d3Szrj .#define bfd_mach_gbz80 0 {* GameBoy Z80 (reduced instruction set) *}
509*fae548d3Szrj .#define bfd_mach_z80strict 1 {* Z80 without undocumented opcodes. *}
510*fae548d3Szrj .#define bfd_mach_z180 2 {* Z180: successor with additional instructions, but without halves of ix and iy *}
511*fae548d3Szrj .#define bfd_mach_z80 3 {* Z80 with ixl, ixh, iyl, and iyh. *}
512*fae548d3Szrj .#define bfd_mach_ez80_z80 4 {* eZ80 (successor of Z80 & Z180) in Z80 (16-bit address) mode *}
513*fae548d3Szrj .#define bfd_mach_ez80_adl 5 {* eZ80 (successor of Z80 & Z180) in ADL (24-bit address) mode *}
514*fae548d3Szrj .#define bfd_mach_z80full 7 {* Z80 with all undocumented instructions. *}
515*fae548d3Szrj .#define bfd_mach_r800 11 {* R800: successor with multiplication. *}
516*fae548d3Szrj . bfd_arch_lm32, {* Lattice Mico32. *}
517*fae548d3Szrj .#define bfd_mach_lm32 1
518*fae548d3Szrj . bfd_arch_microblaze,{* Xilinx MicroBlaze. *}
519*fae548d3Szrj . bfd_arch_tilepro, {* Tilera TILEPro. *}
520*fae548d3Szrj . bfd_arch_tilegx, {* Tilera TILE-Gx. *}
521*fae548d3Szrj .#define bfd_mach_tilepro 1
522*fae548d3Szrj .#define bfd_mach_tilegx 1
523*fae548d3Szrj .#define bfd_mach_tilegx32 2
524*fae548d3Szrj . bfd_arch_aarch64, {* AArch64. *}
525*fae548d3Szrj .#define bfd_mach_aarch64 0
526*fae548d3Szrj .#define bfd_mach_aarch64_ilp32 32
527*fae548d3Szrj . bfd_arch_nios2, {* Nios II. *}
528*fae548d3Szrj .#define bfd_mach_nios2 0
529*fae548d3Szrj .#define bfd_mach_nios2r1 1
530*fae548d3Szrj .#define bfd_mach_nios2r2 2
531*fae548d3Szrj . bfd_arch_visium, {* Visium. *}
532*fae548d3Szrj .#define bfd_mach_visium 1
533*fae548d3Szrj . bfd_arch_wasm32, {* WebAssembly. *}
534*fae548d3Szrj .#define bfd_mach_wasm32 1
535*fae548d3Szrj . bfd_arch_pru, {* PRU. *}
536*fae548d3Szrj .#define bfd_mach_pru 0
537*fae548d3Szrj . bfd_arch_nfp, {* Netronome Flow Processor *}
538*fae548d3Szrj .#define bfd_mach_nfp3200 0x3200
539*fae548d3Szrj .#define bfd_mach_nfp6000 0x6000
540*fae548d3Szrj . bfd_arch_csky, {* C-SKY. *}
541*fae548d3Szrj .#define bfd_mach_ck_unknown 0
542*fae548d3Szrj .#define bfd_mach_ck510 1
543*fae548d3Szrj .#define bfd_mach_ck610 2
544*fae548d3Szrj .#define bfd_mach_ck801 3
545*fae548d3Szrj .#define bfd_mach_ck802 4
546*fae548d3Szrj .#define bfd_mach_ck803 5
547*fae548d3Szrj .#define bfd_mach_ck807 6
548*fae548d3Szrj .#define bfd_mach_ck810 7
549*fae548d3Szrj . bfd_arch_last
550*fae548d3Szrj . };
551*fae548d3Szrj */
552*fae548d3Szrj
553*fae548d3Szrj /*
554*fae548d3Szrj SUBSECTION
555*fae548d3Szrj bfd_arch_info
556*fae548d3Szrj
557*fae548d3Szrj DESCRIPTION
558*fae548d3Szrj This structure contains information on architectures for use
559*fae548d3Szrj within BFD.
560*fae548d3Szrj
561*fae548d3Szrj .
562*fae548d3Szrj .typedef struct bfd_arch_info
563*fae548d3Szrj .{
564*fae548d3Szrj . int bits_per_word;
565*fae548d3Szrj . int bits_per_address;
566*fae548d3Szrj . int bits_per_byte;
567*fae548d3Szrj . enum bfd_architecture arch;
568*fae548d3Szrj . unsigned long mach;
569*fae548d3Szrj . const char *arch_name;
570*fae548d3Szrj . const char *printable_name;
571*fae548d3Szrj . unsigned int section_align_power;
572*fae548d3Szrj . {* TRUE if this is the default machine for the architecture.
573*fae548d3Szrj . The default arch should be the first entry for an arch so that
574*fae548d3Szrj . all the entries for that arch can be accessed via <<next>>. *}
575*fae548d3Szrj . bfd_boolean the_default;
576*fae548d3Szrj . const struct bfd_arch_info * (*compatible) (const struct bfd_arch_info *,
577*fae548d3Szrj . const struct bfd_arch_info *);
578*fae548d3Szrj .
579*fae548d3Szrj . bfd_boolean (*scan) (const struct bfd_arch_info *, const char *);
580*fae548d3Szrj .
581*fae548d3Szrj . {* Allocate via bfd_malloc and return a fill buffer of size COUNT. If
582*fae548d3Szrj . IS_BIGENDIAN is TRUE, the order of bytes is big endian. If CODE is
583*fae548d3Szrj . TRUE, the buffer contains code. *}
584*fae548d3Szrj . void *(*fill) (bfd_size_type count, bfd_boolean is_bigendian,
585*fae548d3Szrj . bfd_boolean code);
586*fae548d3Szrj .
587*fae548d3Szrj . const struct bfd_arch_info *next;
588*fae548d3Szrj .
589*fae548d3Szrj . {* On some architectures the offset for a relocation can point into
590*fae548d3Szrj . the middle of an instruction. This field specifies the maximum
591*fae548d3Szrj . offset such a relocation can have (in octets). This affects the
592*fae548d3Szrj . behaviour of the disassembler, since a value greater than zero
593*fae548d3Szrj . means that it may need to disassemble an instruction twice, once
594*fae548d3Szrj . to get its length and then a second time to display it. If the
595*fae548d3Szrj . value is negative then this has to be done for every single
596*fae548d3Szrj . instruction, regardless of the offset of the reloc. *}
597*fae548d3Szrj . signed int max_reloc_offset_into_insn;
598*fae548d3Szrj .}
599*fae548d3Szrj .bfd_arch_info_type;
600*fae548d3Szrj .
601*fae548d3Szrj */
602*fae548d3Szrj
603*fae548d3Szrj extern const bfd_arch_info_type bfd_aarch64_arch;
604*fae548d3Szrj extern const bfd_arch_info_type bfd_alpha_arch;
605*fae548d3Szrj extern const bfd_arch_info_type bfd_arc_arch;
606*fae548d3Szrj extern const bfd_arch_info_type bfd_arm_arch;
607*fae548d3Szrj extern const bfd_arch_info_type bfd_avr_arch;
608*fae548d3Szrj extern const bfd_arch_info_type bfd_bfin_arch;
609*fae548d3Szrj extern const bfd_arch_info_type bfd_cr16_arch;
610*fae548d3Szrj extern const bfd_arch_info_type bfd_cris_arch;
611*fae548d3Szrj extern const bfd_arch_info_type bfd_crx_arch;
612*fae548d3Szrj extern const bfd_arch_info_type bfd_csky_arch;
613*fae548d3Szrj extern const bfd_arch_info_type bfd_d10v_arch;
614*fae548d3Szrj extern const bfd_arch_info_type bfd_d30v_arch;
615*fae548d3Szrj extern const bfd_arch_info_type bfd_dlx_arch;
616*fae548d3Szrj extern const bfd_arch_info_type bfd_bpf_arch;
617*fae548d3Szrj extern const bfd_arch_info_type bfd_epiphany_arch;
618*fae548d3Szrj extern const bfd_arch_info_type bfd_fr30_arch;
619*fae548d3Szrj extern const bfd_arch_info_type bfd_frv_arch;
620*fae548d3Szrj extern const bfd_arch_info_type bfd_h8300_arch;
621*fae548d3Szrj extern const bfd_arch_info_type bfd_hppa_arch;
622*fae548d3Szrj extern const bfd_arch_info_type bfd_i386_arch;
623*fae548d3Szrj extern const bfd_arch_info_type bfd_iamcu_arch;
624*fae548d3Szrj extern const bfd_arch_info_type bfd_ia64_arch;
625*fae548d3Szrj extern const bfd_arch_info_type bfd_ip2k_arch;
626*fae548d3Szrj extern const bfd_arch_info_type bfd_iq2000_arch;
627*fae548d3Szrj extern const bfd_arch_info_type bfd_k1om_arch;
628*fae548d3Szrj extern const bfd_arch_info_type bfd_l1om_arch;
629*fae548d3Szrj extern const bfd_arch_info_type bfd_lm32_arch;
630*fae548d3Szrj extern const bfd_arch_info_type bfd_m32c_arch;
631*fae548d3Szrj extern const bfd_arch_info_type bfd_m32r_arch;
632*fae548d3Szrj extern const bfd_arch_info_type bfd_m68hc11_arch;
633*fae548d3Szrj extern const bfd_arch_info_type bfd_m68hc12_arch;
634*fae548d3Szrj extern const bfd_arch_info_type bfd_m9s12x_arch;
635*fae548d3Szrj extern const bfd_arch_info_type bfd_m9s12xg_arch;
636*fae548d3Szrj extern const bfd_arch_info_type bfd_s12z_arch;
637*fae548d3Szrj extern const bfd_arch_info_type bfd_m68k_arch;
638*fae548d3Szrj extern const bfd_arch_info_type bfd_mcore_arch;
639*fae548d3Szrj extern const bfd_arch_info_type bfd_mep_arch;
640*fae548d3Szrj extern const bfd_arch_info_type bfd_metag_arch;
641*fae548d3Szrj extern const bfd_arch_info_type bfd_mips_arch;
642*fae548d3Szrj extern const bfd_arch_info_type bfd_microblaze_arch;
643*fae548d3Szrj extern const bfd_arch_info_type bfd_mmix_arch;
644*fae548d3Szrj extern const bfd_arch_info_type bfd_mn10200_arch;
645*fae548d3Szrj extern const bfd_arch_info_type bfd_mn10300_arch;
646*fae548d3Szrj extern const bfd_arch_info_type bfd_moxie_arch;
647*fae548d3Szrj extern const bfd_arch_info_type bfd_ft32_arch;
648*fae548d3Szrj extern const bfd_arch_info_type bfd_msp430_arch;
649*fae548d3Szrj extern const bfd_arch_info_type bfd_mt_arch;
650*fae548d3Szrj extern const bfd_arch_info_type bfd_nds32_arch;
651*fae548d3Szrj extern const bfd_arch_info_type bfd_nfp_arch;
652*fae548d3Szrj extern const bfd_arch_info_type bfd_nios2_arch;
653*fae548d3Szrj extern const bfd_arch_info_type bfd_ns32k_arch;
654*fae548d3Szrj extern const bfd_arch_info_type bfd_or1k_arch;
655*fae548d3Szrj extern const bfd_arch_info_type bfd_pdp11_arch;
656*fae548d3Szrj extern const bfd_arch_info_type bfd_pj_arch;
657*fae548d3Szrj extern const bfd_arch_info_type bfd_plugin_arch;
658*fae548d3Szrj extern const bfd_arch_info_type bfd_powerpc_archs[];
659*fae548d3Szrj #define bfd_powerpc_arch bfd_powerpc_archs[0]
660*fae548d3Szrj extern const bfd_arch_info_type bfd_pru_arch;
661*fae548d3Szrj extern const bfd_arch_info_type bfd_riscv_arch;
662*fae548d3Szrj extern const bfd_arch_info_type bfd_rs6000_arch;
663*fae548d3Szrj extern const bfd_arch_info_type bfd_rl78_arch;
664*fae548d3Szrj extern const bfd_arch_info_type bfd_rx_arch;
665*fae548d3Szrj extern const bfd_arch_info_type bfd_s390_arch;
666*fae548d3Szrj extern const bfd_arch_info_type bfd_score_arch;
667*fae548d3Szrj extern const bfd_arch_info_type bfd_sh_arch;
668*fae548d3Szrj extern const bfd_arch_info_type bfd_sparc_arch;
669*fae548d3Szrj extern const bfd_arch_info_type bfd_spu_arch;
670*fae548d3Szrj extern const bfd_arch_info_type bfd_tic30_arch;
671*fae548d3Szrj extern const bfd_arch_info_type bfd_tic4x_arch;
672*fae548d3Szrj extern const bfd_arch_info_type bfd_tic54x_arch;
673*fae548d3Szrj extern const bfd_arch_info_type bfd_tic6x_arch;
674*fae548d3Szrj extern const bfd_arch_info_type bfd_tilegx_arch;
675*fae548d3Szrj extern const bfd_arch_info_type bfd_tilepro_arch;
676*fae548d3Szrj extern const bfd_arch_info_type bfd_v850_arch;
677*fae548d3Szrj extern const bfd_arch_info_type bfd_v850_rh850_arch;
678*fae548d3Szrj extern const bfd_arch_info_type bfd_vax_arch;
679*fae548d3Szrj extern const bfd_arch_info_type bfd_visium_arch;
680*fae548d3Szrj extern const bfd_arch_info_type bfd_wasm32_arch;
681*fae548d3Szrj extern const bfd_arch_info_type bfd_xstormy16_arch;
682*fae548d3Szrj extern const bfd_arch_info_type bfd_xtensa_arch;
683*fae548d3Szrj extern const bfd_arch_info_type bfd_xc16x_arch;
684*fae548d3Szrj extern const bfd_arch_info_type bfd_xgate_arch;
685*fae548d3Szrj extern const bfd_arch_info_type bfd_z80_arch;
686*fae548d3Szrj extern const bfd_arch_info_type bfd_z8k_arch;
687*fae548d3Szrj
688*fae548d3Szrj static const bfd_arch_info_type * const bfd_archures_list[] =
689*fae548d3Szrj {
690*fae548d3Szrj #ifdef SELECT_ARCHITECTURES
691*fae548d3Szrj SELECT_ARCHITECTURES,
692*fae548d3Szrj #else
693*fae548d3Szrj &bfd_aarch64_arch,
694*fae548d3Szrj &bfd_alpha_arch,
695*fae548d3Szrj &bfd_arc_arch,
696*fae548d3Szrj &bfd_arm_arch,
697*fae548d3Szrj &bfd_avr_arch,
698*fae548d3Szrj &bfd_bfin_arch,
699*fae548d3Szrj &bfd_cr16_arch,
700*fae548d3Szrj &bfd_cris_arch,
701*fae548d3Szrj &bfd_crx_arch,
702*fae548d3Szrj &bfd_csky_arch,
703*fae548d3Szrj &bfd_d10v_arch,
704*fae548d3Szrj &bfd_d30v_arch,
705*fae548d3Szrj &bfd_dlx_arch,
706*fae548d3Szrj &bfd_bpf_arch,
707*fae548d3Szrj &bfd_epiphany_arch,
708*fae548d3Szrj &bfd_fr30_arch,
709*fae548d3Szrj &bfd_frv_arch,
710*fae548d3Szrj &bfd_h8300_arch,
711*fae548d3Szrj &bfd_hppa_arch,
712*fae548d3Szrj &bfd_i386_arch,
713*fae548d3Szrj &bfd_iamcu_arch,
714*fae548d3Szrj &bfd_ia64_arch,
715*fae548d3Szrj &bfd_ip2k_arch,
716*fae548d3Szrj &bfd_iq2000_arch,
717*fae548d3Szrj &bfd_k1om_arch,
718*fae548d3Szrj &bfd_l1om_arch,
719*fae548d3Szrj &bfd_lm32_arch,
720*fae548d3Szrj &bfd_m32c_arch,
721*fae548d3Szrj &bfd_m32r_arch,
722*fae548d3Szrj &bfd_m68hc11_arch,
723*fae548d3Szrj &bfd_m68hc12_arch,
724*fae548d3Szrj &bfd_m9s12x_arch,
725*fae548d3Szrj &bfd_m9s12xg_arch,
726*fae548d3Szrj &bfd_s12z_arch,
727*fae548d3Szrj &bfd_m68k_arch,
728*fae548d3Szrj &bfd_mcore_arch,
729*fae548d3Szrj &bfd_mep_arch,
730*fae548d3Szrj &bfd_metag_arch,
731*fae548d3Szrj &bfd_microblaze_arch,
732*fae548d3Szrj &bfd_mips_arch,
733*fae548d3Szrj &bfd_mmix_arch,
734*fae548d3Szrj &bfd_mn10200_arch,
735*fae548d3Szrj &bfd_mn10300_arch,
736*fae548d3Szrj &bfd_moxie_arch,
737*fae548d3Szrj &bfd_ft32_arch,
738*fae548d3Szrj &bfd_msp430_arch,
739*fae548d3Szrj &bfd_mt_arch,
740*fae548d3Szrj &bfd_nds32_arch,
741*fae548d3Szrj &bfd_nfp_arch,
742*fae548d3Szrj &bfd_nios2_arch,
743*fae548d3Szrj &bfd_ns32k_arch,
744*fae548d3Szrj &bfd_or1k_arch,
745*fae548d3Szrj &bfd_pdp11_arch,
746*fae548d3Szrj &bfd_powerpc_arch,
747*fae548d3Szrj &bfd_pru_arch,
748*fae548d3Szrj &bfd_riscv_arch,
749*fae548d3Szrj &bfd_rl78_arch,
750*fae548d3Szrj &bfd_rs6000_arch,
751*fae548d3Szrj &bfd_rx_arch,
752*fae548d3Szrj &bfd_s390_arch,
753*fae548d3Szrj &bfd_score_arch,
754*fae548d3Szrj &bfd_sh_arch,
755*fae548d3Szrj &bfd_sparc_arch,
756*fae548d3Szrj &bfd_spu_arch,
757*fae548d3Szrj &bfd_tic30_arch,
758*fae548d3Szrj &bfd_tic4x_arch,
759*fae548d3Szrj &bfd_tic54x_arch,
760*fae548d3Szrj &bfd_tic6x_arch,
761*fae548d3Szrj &bfd_tilegx_arch,
762*fae548d3Szrj &bfd_tilepro_arch,
763*fae548d3Szrj &bfd_v850_arch,
764*fae548d3Szrj &bfd_v850_rh850_arch,
765*fae548d3Szrj &bfd_vax_arch,
766*fae548d3Szrj &bfd_visium_arch,
767*fae548d3Szrj &bfd_wasm32_arch,
768*fae548d3Szrj &bfd_xstormy16_arch,
769*fae548d3Szrj &bfd_xtensa_arch,
770*fae548d3Szrj &bfd_xc16x_arch,
771*fae548d3Szrj &bfd_xgate_arch,
772*fae548d3Szrj &bfd_z80_arch,
773*fae548d3Szrj &bfd_z8k_arch,
774*fae548d3Szrj #endif
775*fae548d3Szrj 0
776*fae548d3Szrj };
777*fae548d3Szrj
778*fae548d3Szrj /*
779*fae548d3Szrj FUNCTION
780*fae548d3Szrj bfd_printable_name
781*fae548d3Szrj
782*fae548d3Szrj SYNOPSIS
783*fae548d3Szrj const char *bfd_printable_name (bfd *abfd);
784*fae548d3Szrj
785*fae548d3Szrj DESCRIPTION
786*fae548d3Szrj Return a printable string representing the architecture and machine
787*fae548d3Szrj from the pointer to the architecture info structure.
788*fae548d3Szrj
789*fae548d3Szrj */
790*fae548d3Szrj
791*fae548d3Szrj const char *
bfd_printable_name(bfd * abfd)792*fae548d3Szrj bfd_printable_name (bfd *abfd)
793*fae548d3Szrj {
794*fae548d3Szrj return abfd->arch_info->printable_name;
795*fae548d3Szrj }
796*fae548d3Szrj
797*fae548d3Szrj /*
798*fae548d3Szrj FUNCTION
799*fae548d3Szrj bfd_scan_arch
800*fae548d3Szrj
801*fae548d3Szrj SYNOPSIS
802*fae548d3Szrj const bfd_arch_info_type *bfd_scan_arch (const char *string);
803*fae548d3Szrj
804*fae548d3Szrj DESCRIPTION
805*fae548d3Szrj Figure out if BFD supports any cpu which could be described with
806*fae548d3Szrj the name @var{string}. Return a pointer to an <<arch_info>>
807*fae548d3Szrj structure if a machine is found, otherwise NULL.
808*fae548d3Szrj */
809*fae548d3Szrj
810*fae548d3Szrj const bfd_arch_info_type *
bfd_scan_arch(const char * string)811*fae548d3Szrj bfd_scan_arch (const char *string)
812*fae548d3Szrj {
813*fae548d3Szrj const bfd_arch_info_type * const *app, *ap;
814*fae548d3Szrj
815*fae548d3Szrj /* Look through all the installed architectures. */
816*fae548d3Szrj for (app = bfd_archures_list; *app != NULL; app++)
817*fae548d3Szrj {
818*fae548d3Szrj for (ap = *app; ap != NULL; ap = ap->next)
819*fae548d3Szrj {
820*fae548d3Szrj if (ap->scan (ap, string))
821*fae548d3Szrj return ap;
822*fae548d3Szrj }
823*fae548d3Szrj }
824*fae548d3Szrj
825*fae548d3Szrj return NULL;
826*fae548d3Szrj }
827*fae548d3Szrj
828*fae548d3Szrj /*
829*fae548d3Szrj FUNCTION
830*fae548d3Szrj bfd_arch_list
831*fae548d3Szrj
832*fae548d3Szrj SYNOPSIS
833*fae548d3Szrj const char **bfd_arch_list (void);
834*fae548d3Szrj
835*fae548d3Szrj DESCRIPTION
836*fae548d3Szrj Return a freshly malloced NULL-terminated vector of the names
837*fae548d3Szrj of all the valid BFD architectures. Do not modify the names.
838*fae548d3Szrj */
839*fae548d3Szrj
840*fae548d3Szrj const char **
bfd_arch_list(void)841*fae548d3Szrj bfd_arch_list (void)
842*fae548d3Szrj {
843*fae548d3Szrj int vec_length = 0;
844*fae548d3Szrj const char **name_ptr;
845*fae548d3Szrj const char **name_list;
846*fae548d3Szrj const bfd_arch_info_type * const *app;
847*fae548d3Szrj bfd_size_type amt;
848*fae548d3Szrj
849*fae548d3Szrj /* Determine the number of architectures. */
850*fae548d3Szrj vec_length = 0;
851*fae548d3Szrj for (app = bfd_archures_list; *app != NULL; app++)
852*fae548d3Szrj {
853*fae548d3Szrj const bfd_arch_info_type *ap;
854*fae548d3Szrj for (ap = *app; ap != NULL; ap = ap->next)
855*fae548d3Szrj {
856*fae548d3Szrj vec_length++;
857*fae548d3Szrj }
858*fae548d3Szrj }
859*fae548d3Szrj
860*fae548d3Szrj amt = (vec_length + 1) * sizeof (char **);
861*fae548d3Szrj name_list = (const char **) bfd_malloc (amt);
862*fae548d3Szrj if (name_list == NULL)
863*fae548d3Szrj return NULL;
864*fae548d3Szrj
865*fae548d3Szrj /* Point the list at each of the names. */
866*fae548d3Szrj name_ptr = name_list;
867*fae548d3Szrj for (app = bfd_archures_list; *app != NULL; app++)
868*fae548d3Szrj {
869*fae548d3Szrj const bfd_arch_info_type *ap;
870*fae548d3Szrj for (ap = *app; ap != NULL; ap = ap->next)
871*fae548d3Szrj {
872*fae548d3Szrj *name_ptr = ap->printable_name;
873*fae548d3Szrj name_ptr++;
874*fae548d3Szrj }
875*fae548d3Szrj }
876*fae548d3Szrj *name_ptr = NULL;
877*fae548d3Szrj
878*fae548d3Szrj return name_list;
879*fae548d3Szrj }
880*fae548d3Szrj
881*fae548d3Szrj /*
882*fae548d3Szrj FUNCTION
883*fae548d3Szrj bfd_arch_get_compatible
884*fae548d3Szrj
885*fae548d3Szrj SYNOPSIS
886*fae548d3Szrj const bfd_arch_info_type *bfd_arch_get_compatible
887*fae548d3Szrj (const bfd *abfd, const bfd *bbfd, bfd_boolean accept_unknowns);
888*fae548d3Szrj
889*fae548d3Szrj DESCRIPTION
890*fae548d3Szrj Determine whether two BFDs' architectures and machine types
891*fae548d3Szrj are compatible. Calculates the lowest common denominator
892*fae548d3Szrj between the two architectures and machine types implied by
893*fae548d3Szrj the BFDs and returns a pointer to an <<arch_info>> structure
894*fae548d3Szrj describing the compatible machine.
895*fae548d3Szrj */
896*fae548d3Szrj
897*fae548d3Szrj const bfd_arch_info_type *
bfd_arch_get_compatible(const bfd * abfd,const bfd * bbfd,bfd_boolean accept_unknowns)898*fae548d3Szrj bfd_arch_get_compatible (const bfd *abfd,
899*fae548d3Szrj const bfd *bbfd,
900*fae548d3Szrj bfd_boolean accept_unknowns)
901*fae548d3Szrj {
902*fae548d3Szrj const bfd *ubfd, *kbfd;
903*fae548d3Szrj
904*fae548d3Szrj /* Look for an unknown architecture. */
905*fae548d3Szrj if (abfd->arch_info->arch == bfd_arch_unknown)
906*fae548d3Szrj ubfd = abfd, kbfd = bbfd;
907*fae548d3Szrj else if (bbfd->arch_info->arch == bfd_arch_unknown)
908*fae548d3Szrj ubfd = bbfd, kbfd = abfd;
909*fae548d3Szrj else
910*fae548d3Szrj /* Otherwise architecture-specific code has to decide. */
911*fae548d3Szrj return abfd->arch_info->compatible (abfd->arch_info, bbfd->arch_info);
912*fae548d3Szrj
913*fae548d3Szrj /* We can allow an unknown architecture if accept_unknowns is true,
914*fae548d3Szrj if UBFD is an IR object, or if the target is the "binary" format,
915*fae548d3Szrj which has an unknown architecture. Since the binary format can
916*fae548d3Szrj only be set by explicit request from the user, it is safe
917*fae548d3Szrj to assume that they know what they are doing. */
918*fae548d3Szrj if (accept_unknowns
919*fae548d3Szrj || ubfd->plugin_format == bfd_plugin_yes
920*fae548d3Szrj || strcmp (bfd_get_target (ubfd), "binary") == 0)
921*fae548d3Szrj return kbfd->arch_info;
922*fae548d3Szrj return NULL;
923*fae548d3Szrj }
924*fae548d3Szrj
925*fae548d3Szrj /*
926*fae548d3Szrj INTERNAL_DEFINITION
927*fae548d3Szrj bfd_default_arch_struct
928*fae548d3Szrj
929*fae548d3Szrj DESCRIPTION
930*fae548d3Szrj The <<bfd_default_arch_struct>> is an item of
931*fae548d3Szrj <<bfd_arch_info_type>> which has been initialized to a fairly
932*fae548d3Szrj generic state. A BFD starts life by pointing to this
933*fae548d3Szrj structure, until the correct back end has determined the real
934*fae548d3Szrj architecture of the file.
935*fae548d3Szrj
936*fae548d3Szrj .extern const bfd_arch_info_type bfd_default_arch_struct;
937*fae548d3Szrj */
938*fae548d3Szrj
939*fae548d3Szrj const bfd_arch_info_type bfd_default_arch_struct =
940*fae548d3Szrj {
941*fae548d3Szrj 32, 32, 8, bfd_arch_unknown, 0, "unknown", "unknown", 2, TRUE,
942*fae548d3Szrj bfd_default_compatible,
943*fae548d3Szrj bfd_default_scan,
944*fae548d3Szrj bfd_arch_default_fill,
945*fae548d3Szrj 0, 0
946*fae548d3Szrj };
947*fae548d3Szrj
948*fae548d3Szrj /*
949*fae548d3Szrj FUNCTION
950*fae548d3Szrj bfd_set_arch_info
951*fae548d3Szrj
952*fae548d3Szrj SYNOPSIS
953*fae548d3Szrj void bfd_set_arch_info (bfd *abfd, const bfd_arch_info_type *arg);
954*fae548d3Szrj
955*fae548d3Szrj DESCRIPTION
956*fae548d3Szrj Set the architecture info of @var{abfd} to @var{arg}.
957*fae548d3Szrj */
958*fae548d3Szrj
959*fae548d3Szrj void
bfd_set_arch_info(bfd * abfd,const bfd_arch_info_type * arg)960*fae548d3Szrj bfd_set_arch_info (bfd *abfd, const bfd_arch_info_type *arg)
961*fae548d3Szrj {
962*fae548d3Szrj abfd->arch_info = arg;
963*fae548d3Szrj }
964*fae548d3Szrj
965*fae548d3Szrj /*
966*fae548d3Szrj FUNCTION
967*fae548d3Szrj bfd_default_set_arch_mach
968*fae548d3Szrj
969*fae548d3Szrj SYNOPSIS
970*fae548d3Szrj bfd_boolean bfd_default_set_arch_mach
971*fae548d3Szrj (bfd *abfd, enum bfd_architecture arch, unsigned long mach);
972*fae548d3Szrj
973*fae548d3Szrj DESCRIPTION
974*fae548d3Szrj Set the architecture and machine type in BFD @var{abfd}
975*fae548d3Szrj to @var{arch} and @var{mach}. Find the correct
976*fae548d3Szrj pointer to a structure and insert it into the <<arch_info>>
977*fae548d3Szrj pointer.
978*fae548d3Szrj */
979*fae548d3Szrj
980*fae548d3Szrj bfd_boolean
bfd_default_set_arch_mach(bfd * abfd,enum bfd_architecture arch,unsigned long mach)981*fae548d3Szrj bfd_default_set_arch_mach (bfd *abfd,
982*fae548d3Szrj enum bfd_architecture arch,
983*fae548d3Szrj unsigned long mach)
984*fae548d3Szrj {
985*fae548d3Szrj abfd->arch_info = bfd_lookup_arch (arch, mach);
986*fae548d3Szrj if (abfd->arch_info != NULL)
987*fae548d3Szrj return TRUE;
988*fae548d3Szrj
989*fae548d3Szrj abfd->arch_info = &bfd_default_arch_struct;
990*fae548d3Szrj bfd_set_error (bfd_error_bad_value);
991*fae548d3Szrj return FALSE;
992*fae548d3Szrj }
993*fae548d3Szrj
994*fae548d3Szrj /*
995*fae548d3Szrj FUNCTION
996*fae548d3Szrj bfd_get_arch
997*fae548d3Szrj
998*fae548d3Szrj SYNOPSIS
999*fae548d3Szrj enum bfd_architecture bfd_get_arch (const bfd *abfd);
1000*fae548d3Szrj
1001*fae548d3Szrj DESCRIPTION
1002*fae548d3Szrj Return the enumerated type which describes the BFD @var{abfd}'s
1003*fae548d3Szrj architecture.
1004*fae548d3Szrj */
1005*fae548d3Szrj
1006*fae548d3Szrj enum bfd_architecture
bfd_get_arch(const bfd * abfd)1007*fae548d3Szrj bfd_get_arch (const bfd *abfd)
1008*fae548d3Szrj {
1009*fae548d3Szrj return abfd->arch_info->arch;
1010*fae548d3Szrj }
1011*fae548d3Szrj
1012*fae548d3Szrj /*
1013*fae548d3Szrj FUNCTION
1014*fae548d3Szrj bfd_get_mach
1015*fae548d3Szrj
1016*fae548d3Szrj SYNOPSIS
1017*fae548d3Szrj unsigned long bfd_get_mach (const bfd *abfd);
1018*fae548d3Szrj
1019*fae548d3Szrj DESCRIPTION
1020*fae548d3Szrj Return the long type which describes the BFD @var{abfd}'s
1021*fae548d3Szrj machine.
1022*fae548d3Szrj */
1023*fae548d3Szrj
1024*fae548d3Szrj unsigned long
bfd_get_mach(const bfd * abfd)1025*fae548d3Szrj bfd_get_mach (const bfd *abfd)
1026*fae548d3Szrj {
1027*fae548d3Szrj return abfd->arch_info->mach;
1028*fae548d3Szrj }
1029*fae548d3Szrj
1030*fae548d3Szrj /*
1031*fae548d3Szrj FUNCTION
1032*fae548d3Szrj bfd_arch_bits_per_byte
1033*fae548d3Szrj
1034*fae548d3Szrj SYNOPSIS
1035*fae548d3Szrj unsigned int bfd_arch_bits_per_byte (const bfd *abfd);
1036*fae548d3Szrj
1037*fae548d3Szrj DESCRIPTION
1038*fae548d3Szrj Return the number of bits in one of the BFD @var{abfd}'s
1039*fae548d3Szrj architecture's bytes.
1040*fae548d3Szrj */
1041*fae548d3Szrj
1042*fae548d3Szrj unsigned int
bfd_arch_bits_per_byte(const bfd * abfd)1043*fae548d3Szrj bfd_arch_bits_per_byte (const bfd *abfd)
1044*fae548d3Szrj {
1045*fae548d3Szrj return abfd->arch_info->bits_per_byte;
1046*fae548d3Szrj }
1047*fae548d3Szrj
1048*fae548d3Szrj /*
1049*fae548d3Szrj FUNCTION
1050*fae548d3Szrj bfd_arch_bits_per_address
1051*fae548d3Szrj
1052*fae548d3Szrj SYNOPSIS
1053*fae548d3Szrj unsigned int bfd_arch_bits_per_address (const bfd *abfd);
1054*fae548d3Szrj
1055*fae548d3Szrj DESCRIPTION
1056*fae548d3Szrj Return the number of bits in one of the BFD @var{abfd}'s
1057*fae548d3Szrj architecture's addresses.
1058*fae548d3Szrj */
1059*fae548d3Szrj
1060*fae548d3Szrj unsigned int
bfd_arch_bits_per_address(const bfd * abfd)1061*fae548d3Szrj bfd_arch_bits_per_address (const bfd *abfd)
1062*fae548d3Szrj {
1063*fae548d3Szrj return abfd->arch_info->bits_per_address;
1064*fae548d3Szrj }
1065*fae548d3Szrj
1066*fae548d3Szrj /*
1067*fae548d3Szrj INTERNAL_FUNCTION
1068*fae548d3Szrj bfd_default_compatible
1069*fae548d3Szrj
1070*fae548d3Szrj SYNOPSIS
1071*fae548d3Szrj const bfd_arch_info_type *bfd_default_compatible
1072*fae548d3Szrj (const bfd_arch_info_type *a, const bfd_arch_info_type *b);
1073*fae548d3Szrj
1074*fae548d3Szrj DESCRIPTION
1075*fae548d3Szrj The default function for testing for compatibility.
1076*fae548d3Szrj */
1077*fae548d3Szrj
1078*fae548d3Szrj const bfd_arch_info_type *
bfd_default_compatible(const bfd_arch_info_type * a,const bfd_arch_info_type * b)1079*fae548d3Szrj bfd_default_compatible (const bfd_arch_info_type *a,
1080*fae548d3Szrj const bfd_arch_info_type *b)
1081*fae548d3Szrj {
1082*fae548d3Szrj if (a->arch != b->arch)
1083*fae548d3Szrj return NULL;
1084*fae548d3Szrj
1085*fae548d3Szrj if (a->bits_per_word != b->bits_per_word)
1086*fae548d3Szrj return NULL;
1087*fae548d3Szrj
1088*fae548d3Szrj if (a->mach > b->mach)
1089*fae548d3Szrj return a;
1090*fae548d3Szrj
1091*fae548d3Szrj if (b->mach > a->mach)
1092*fae548d3Szrj return b;
1093*fae548d3Szrj
1094*fae548d3Szrj return a;
1095*fae548d3Szrj }
1096*fae548d3Szrj
1097*fae548d3Szrj /*
1098*fae548d3Szrj INTERNAL_FUNCTION
1099*fae548d3Szrj bfd_default_scan
1100*fae548d3Szrj
1101*fae548d3Szrj SYNOPSIS
1102*fae548d3Szrj bfd_boolean bfd_default_scan
1103*fae548d3Szrj (const struct bfd_arch_info *info, const char *string);
1104*fae548d3Szrj
1105*fae548d3Szrj DESCRIPTION
1106*fae548d3Szrj The default function for working out whether this is an
1107*fae548d3Szrj architecture hit and a machine hit.
1108*fae548d3Szrj */
1109*fae548d3Szrj
1110*fae548d3Szrj bfd_boolean
bfd_default_scan(const bfd_arch_info_type * info,const char * string)1111*fae548d3Szrj bfd_default_scan (const bfd_arch_info_type *info, const char *string)
1112*fae548d3Szrj {
1113*fae548d3Szrj const char *ptr_src;
1114*fae548d3Szrj const char *ptr_tst;
1115*fae548d3Szrj unsigned long number;
1116*fae548d3Szrj enum bfd_architecture arch;
1117*fae548d3Szrj const char *printable_name_colon;
1118*fae548d3Szrj
1119*fae548d3Szrj /* Exact match of the architecture name (ARCH_NAME) and also the
1120*fae548d3Szrj default architecture? */
1121*fae548d3Szrj if (strcasecmp (string, info->arch_name) == 0
1122*fae548d3Szrj && info->the_default)
1123*fae548d3Szrj return TRUE;
1124*fae548d3Szrj
1125*fae548d3Szrj /* Exact match of the machine name (PRINTABLE_NAME)? */
1126*fae548d3Szrj if (strcasecmp (string, info->printable_name) == 0)
1127*fae548d3Szrj return TRUE;
1128*fae548d3Szrj
1129*fae548d3Szrj /* Given that printable_name contains no colon, attempt to match:
1130*fae548d3Szrj ARCH_NAME [ ":" ] PRINTABLE_NAME? */
1131*fae548d3Szrj printable_name_colon = strchr (info->printable_name, ':');
1132*fae548d3Szrj if (printable_name_colon == NULL)
1133*fae548d3Szrj {
1134*fae548d3Szrj size_t strlen_arch_name = strlen (info->arch_name);
1135*fae548d3Szrj if (strncasecmp (string, info->arch_name, strlen_arch_name) == 0)
1136*fae548d3Szrj {
1137*fae548d3Szrj if (string[strlen_arch_name] == ':')
1138*fae548d3Szrj {
1139*fae548d3Szrj if (strcasecmp (string + strlen_arch_name + 1,
1140*fae548d3Szrj info->printable_name) == 0)
1141*fae548d3Szrj return TRUE;
1142*fae548d3Szrj }
1143*fae548d3Szrj else
1144*fae548d3Szrj {
1145*fae548d3Szrj if (strcasecmp (string + strlen_arch_name,
1146*fae548d3Szrj info->printable_name) == 0)
1147*fae548d3Szrj return TRUE;
1148*fae548d3Szrj }
1149*fae548d3Szrj }
1150*fae548d3Szrj }
1151*fae548d3Szrj
1152*fae548d3Szrj /* Given that PRINTABLE_NAME has the form: <arch> ":" <mach>;
1153*fae548d3Szrj Attempt to match: <arch> <mach>? */
1154*fae548d3Szrj if (printable_name_colon != NULL)
1155*fae548d3Szrj {
1156*fae548d3Szrj size_t colon_index = printable_name_colon - info->printable_name;
1157*fae548d3Szrj if (strncasecmp (string, info->printable_name, colon_index) == 0
1158*fae548d3Szrj && strcasecmp (string + colon_index,
1159*fae548d3Szrj info->printable_name + colon_index + 1) == 0)
1160*fae548d3Szrj return TRUE;
1161*fae548d3Szrj }
1162*fae548d3Szrj
1163*fae548d3Szrj /* Given that PRINTABLE_NAME has the form: <arch> ":" <mach>; Do not
1164*fae548d3Szrj attempt to match just <mach>, it could be ambiguous. This test
1165*fae548d3Szrj is left until later. */
1166*fae548d3Szrj
1167*fae548d3Szrj /* NOTE: The below is retained for compatibility only. Please do
1168*fae548d3Szrj not add to this code. */
1169*fae548d3Szrj
1170*fae548d3Szrj /* See how much of the supplied string matches with the
1171*fae548d3Szrj architecture, eg the string m68k:68020 would match the 68k entry
1172*fae548d3Szrj up to the :, then we get left with the machine number. */
1173*fae548d3Szrj
1174*fae548d3Szrj for (ptr_src = string, ptr_tst = info->arch_name;
1175*fae548d3Szrj *ptr_src && *ptr_tst;
1176*fae548d3Szrj ptr_src++, ptr_tst++)
1177*fae548d3Szrj {
1178*fae548d3Szrj if (*ptr_src != *ptr_tst)
1179*fae548d3Szrj break;
1180*fae548d3Szrj }
1181*fae548d3Szrj
1182*fae548d3Szrj /* Chewed up as much of the architecture as will match, skip any
1183*fae548d3Szrj colons. */
1184*fae548d3Szrj if (*ptr_src == ':')
1185*fae548d3Szrj ptr_src++;
1186*fae548d3Szrj
1187*fae548d3Szrj if (*ptr_src == 0)
1188*fae548d3Szrj {
1189*fae548d3Szrj /* Nothing more, then only keep this one if it is the default
1190*fae548d3Szrj machine for this architecture. */
1191*fae548d3Szrj return info->the_default;
1192*fae548d3Szrj }
1193*fae548d3Szrj
1194*fae548d3Szrj number = 0;
1195*fae548d3Szrj while (ISDIGIT (*ptr_src))
1196*fae548d3Szrj {
1197*fae548d3Szrj number = number * 10 + *ptr_src - '0';
1198*fae548d3Szrj ptr_src++;
1199*fae548d3Szrj }
1200*fae548d3Szrj
1201*fae548d3Szrj /* NOTE: The below is retained for compatibility only.
1202*fae548d3Szrj PLEASE DO NOT ADD TO THIS CODE. */
1203*fae548d3Szrj
1204*fae548d3Szrj switch (number)
1205*fae548d3Szrj {
1206*fae548d3Szrj case 68000:
1207*fae548d3Szrj arch = bfd_arch_m68k;
1208*fae548d3Szrj number = bfd_mach_m68000;
1209*fae548d3Szrj break;
1210*fae548d3Szrj case 68010:
1211*fae548d3Szrj arch = bfd_arch_m68k;
1212*fae548d3Szrj number = bfd_mach_m68010;
1213*fae548d3Szrj break;
1214*fae548d3Szrj case 68020:
1215*fae548d3Szrj arch = bfd_arch_m68k;
1216*fae548d3Szrj number = bfd_mach_m68020;
1217*fae548d3Szrj break;
1218*fae548d3Szrj case 68030:
1219*fae548d3Szrj arch = bfd_arch_m68k;
1220*fae548d3Szrj number = bfd_mach_m68030;
1221*fae548d3Szrj break;
1222*fae548d3Szrj case 68040:
1223*fae548d3Szrj arch = bfd_arch_m68k;
1224*fae548d3Szrj number = bfd_mach_m68040;
1225*fae548d3Szrj break;
1226*fae548d3Szrj case 68060:
1227*fae548d3Szrj arch = bfd_arch_m68k;
1228*fae548d3Szrj number = bfd_mach_m68060;
1229*fae548d3Szrj break;
1230*fae548d3Szrj case 68332:
1231*fae548d3Szrj arch = bfd_arch_m68k;
1232*fae548d3Szrj number = bfd_mach_cpu32;
1233*fae548d3Szrj break;
1234*fae548d3Szrj case 5200:
1235*fae548d3Szrj arch = bfd_arch_m68k;
1236*fae548d3Szrj number = bfd_mach_mcf_isa_a_nodiv;
1237*fae548d3Szrj break;
1238*fae548d3Szrj case 5206:
1239*fae548d3Szrj arch = bfd_arch_m68k;
1240*fae548d3Szrj number = bfd_mach_mcf_isa_a_mac;
1241*fae548d3Szrj break;
1242*fae548d3Szrj case 5307:
1243*fae548d3Szrj arch = bfd_arch_m68k;
1244*fae548d3Szrj number = bfd_mach_mcf_isa_a_mac;
1245*fae548d3Szrj break;
1246*fae548d3Szrj case 5407:
1247*fae548d3Szrj arch = bfd_arch_m68k;
1248*fae548d3Szrj number = bfd_mach_mcf_isa_b_nousp_mac;
1249*fae548d3Szrj break;
1250*fae548d3Szrj case 5282:
1251*fae548d3Szrj arch = bfd_arch_m68k;
1252*fae548d3Szrj number = bfd_mach_mcf_isa_aplus_emac;
1253*fae548d3Szrj break;
1254*fae548d3Szrj
1255*fae548d3Szrj case 3000:
1256*fae548d3Szrj arch = bfd_arch_mips;
1257*fae548d3Szrj number = bfd_mach_mips3000;
1258*fae548d3Szrj break;
1259*fae548d3Szrj
1260*fae548d3Szrj case 4000:
1261*fae548d3Szrj arch = bfd_arch_mips;
1262*fae548d3Szrj number = bfd_mach_mips4000;
1263*fae548d3Szrj break;
1264*fae548d3Szrj
1265*fae548d3Szrj case 6000:
1266*fae548d3Szrj arch = bfd_arch_rs6000;
1267*fae548d3Szrj break;
1268*fae548d3Szrj
1269*fae548d3Szrj case 7410:
1270*fae548d3Szrj arch = bfd_arch_sh;
1271*fae548d3Szrj number = bfd_mach_sh_dsp;
1272*fae548d3Szrj break;
1273*fae548d3Szrj
1274*fae548d3Szrj case 7708:
1275*fae548d3Szrj arch = bfd_arch_sh;
1276*fae548d3Szrj number = bfd_mach_sh3;
1277*fae548d3Szrj break;
1278*fae548d3Szrj
1279*fae548d3Szrj case 7729:
1280*fae548d3Szrj arch = bfd_arch_sh;
1281*fae548d3Szrj number = bfd_mach_sh3_dsp;
1282*fae548d3Szrj break;
1283*fae548d3Szrj
1284*fae548d3Szrj case 7750:
1285*fae548d3Szrj arch = bfd_arch_sh;
1286*fae548d3Szrj number = bfd_mach_sh4;
1287*fae548d3Szrj break;
1288*fae548d3Szrj
1289*fae548d3Szrj default:
1290*fae548d3Szrj return FALSE;
1291*fae548d3Szrj }
1292*fae548d3Szrj
1293*fae548d3Szrj if (arch != info->arch)
1294*fae548d3Szrj return FALSE;
1295*fae548d3Szrj
1296*fae548d3Szrj if (number != info->mach)
1297*fae548d3Szrj return FALSE;
1298*fae548d3Szrj
1299*fae548d3Szrj return TRUE;
1300*fae548d3Szrj }
1301*fae548d3Szrj
1302*fae548d3Szrj /*
1303*fae548d3Szrj FUNCTION
1304*fae548d3Szrj bfd_get_arch_info
1305*fae548d3Szrj
1306*fae548d3Szrj SYNOPSIS
1307*fae548d3Szrj const bfd_arch_info_type *bfd_get_arch_info (bfd *abfd);
1308*fae548d3Szrj
1309*fae548d3Szrj DESCRIPTION
1310*fae548d3Szrj Return the architecture info struct in @var{abfd}.
1311*fae548d3Szrj */
1312*fae548d3Szrj
1313*fae548d3Szrj const bfd_arch_info_type *
bfd_get_arch_info(bfd * abfd)1314*fae548d3Szrj bfd_get_arch_info (bfd *abfd)
1315*fae548d3Szrj {
1316*fae548d3Szrj return abfd->arch_info;
1317*fae548d3Szrj }
1318*fae548d3Szrj
1319*fae548d3Szrj /*
1320*fae548d3Szrj FUNCTION
1321*fae548d3Szrj bfd_lookup_arch
1322*fae548d3Szrj
1323*fae548d3Szrj SYNOPSIS
1324*fae548d3Szrj const bfd_arch_info_type *bfd_lookup_arch
1325*fae548d3Szrj (enum bfd_architecture arch, unsigned long machine);
1326*fae548d3Szrj
1327*fae548d3Szrj DESCRIPTION
1328*fae548d3Szrj Look for the architecture info structure which matches the
1329*fae548d3Szrj arguments @var{arch} and @var{machine}. A machine of 0 matches the
1330*fae548d3Szrj machine/architecture structure which marks itself as the
1331*fae548d3Szrj default.
1332*fae548d3Szrj */
1333*fae548d3Szrj
1334*fae548d3Szrj const bfd_arch_info_type *
bfd_lookup_arch(enum bfd_architecture arch,unsigned long machine)1335*fae548d3Szrj bfd_lookup_arch (enum bfd_architecture arch, unsigned long machine)
1336*fae548d3Szrj {
1337*fae548d3Szrj const bfd_arch_info_type * const *app, *ap;
1338*fae548d3Szrj
1339*fae548d3Szrj for (app = bfd_archures_list; *app != NULL; app++)
1340*fae548d3Szrj {
1341*fae548d3Szrj for (ap = *app; ap != NULL; ap = ap->next)
1342*fae548d3Szrj {
1343*fae548d3Szrj if (ap->arch == arch
1344*fae548d3Szrj && (ap->mach == machine
1345*fae548d3Szrj || (machine == 0 && ap->the_default)))
1346*fae548d3Szrj return ap;
1347*fae548d3Szrj }
1348*fae548d3Szrj }
1349*fae548d3Szrj
1350*fae548d3Szrj return NULL;
1351*fae548d3Szrj }
1352*fae548d3Szrj
1353*fae548d3Szrj /*
1354*fae548d3Szrj FUNCTION
1355*fae548d3Szrj bfd_printable_arch_mach
1356*fae548d3Szrj
1357*fae548d3Szrj SYNOPSIS
1358*fae548d3Szrj const char *bfd_printable_arch_mach
1359*fae548d3Szrj (enum bfd_architecture arch, unsigned long machine);
1360*fae548d3Szrj
1361*fae548d3Szrj DESCRIPTION
1362*fae548d3Szrj Return a printable string representing the architecture and
1363*fae548d3Szrj machine type.
1364*fae548d3Szrj
1365*fae548d3Szrj This routine is depreciated.
1366*fae548d3Szrj */
1367*fae548d3Szrj
1368*fae548d3Szrj const char *
bfd_printable_arch_mach(enum bfd_architecture arch,unsigned long machine)1369*fae548d3Szrj bfd_printable_arch_mach (enum bfd_architecture arch, unsigned long machine)
1370*fae548d3Szrj {
1371*fae548d3Szrj const bfd_arch_info_type *ap = bfd_lookup_arch (arch, machine);
1372*fae548d3Szrj
1373*fae548d3Szrj if (ap)
1374*fae548d3Szrj return ap->printable_name;
1375*fae548d3Szrj return "UNKNOWN!";
1376*fae548d3Szrj }
1377*fae548d3Szrj
1378*fae548d3Szrj /*
1379*fae548d3Szrj FUNCTION
1380*fae548d3Szrj bfd_octets_per_byte
1381*fae548d3Szrj
1382*fae548d3Szrj SYNOPSIS
1383*fae548d3Szrj unsigned int bfd_octets_per_byte (const bfd *abfd,
1384*fae548d3Szrj const asection *sec);
1385*fae548d3Szrj
1386*fae548d3Szrj DESCRIPTION
1387*fae548d3Szrj Return the number of octets (8-bit quantities) per target byte
1388*fae548d3Szrj (minimum addressable unit). In most cases, this will be one, but some
1389*fae548d3Szrj DSP targets have 16, 32, or even 48 bits per byte.
1390*fae548d3Szrj */
1391*fae548d3Szrj
1392*fae548d3Szrj unsigned int
bfd_octets_per_byte(const bfd * abfd,const asection * sec)1393*fae548d3Szrj bfd_octets_per_byte (const bfd *abfd, const asection *sec)
1394*fae548d3Szrj {
1395*fae548d3Szrj if (bfd_get_flavour (abfd) == bfd_target_elf_flavour
1396*fae548d3Szrj && sec != NULL
1397*fae548d3Szrj && (sec->flags & SEC_ELF_OCTETS) != 0)
1398*fae548d3Szrj return 1;
1399*fae548d3Szrj
1400*fae548d3Szrj return bfd_arch_mach_octets_per_byte (bfd_get_arch (abfd),
1401*fae548d3Szrj bfd_get_mach (abfd));
1402*fae548d3Szrj }
1403*fae548d3Szrj
1404*fae548d3Szrj /*
1405*fae548d3Szrj FUNCTION
1406*fae548d3Szrj bfd_arch_mach_octets_per_byte
1407*fae548d3Szrj
1408*fae548d3Szrj SYNOPSIS
1409*fae548d3Szrj unsigned int bfd_arch_mach_octets_per_byte
1410*fae548d3Szrj (enum bfd_architecture arch, unsigned long machine);
1411*fae548d3Szrj
1412*fae548d3Szrj DESCRIPTION
1413*fae548d3Szrj See bfd_octets_per_byte.
1414*fae548d3Szrj
1415*fae548d3Szrj This routine is provided for those cases where a bfd * is not
1416*fae548d3Szrj available
1417*fae548d3Szrj */
1418*fae548d3Szrj
1419*fae548d3Szrj unsigned int
bfd_arch_mach_octets_per_byte(enum bfd_architecture arch,unsigned long mach)1420*fae548d3Szrj bfd_arch_mach_octets_per_byte (enum bfd_architecture arch,
1421*fae548d3Szrj unsigned long mach)
1422*fae548d3Szrj {
1423*fae548d3Szrj const bfd_arch_info_type *ap = bfd_lookup_arch (arch, mach);
1424*fae548d3Szrj
1425*fae548d3Szrj if (ap)
1426*fae548d3Szrj return ap->bits_per_byte / 8;
1427*fae548d3Szrj return 1;
1428*fae548d3Szrj }
1429*fae548d3Szrj
1430*fae548d3Szrj /*
1431*fae548d3Szrj INTERNAL_FUNCTION
1432*fae548d3Szrj bfd_arch_default_fill
1433*fae548d3Szrj
1434*fae548d3Szrj SYNOPSIS
1435*fae548d3Szrj void *bfd_arch_default_fill (bfd_size_type count,
1436*fae548d3Szrj bfd_boolean is_bigendian,
1437*fae548d3Szrj bfd_boolean code);
1438*fae548d3Szrj
1439*fae548d3Szrj DESCRIPTION
1440*fae548d3Szrj Allocate via bfd_malloc and return a fill buffer of size COUNT.
1441*fae548d3Szrj If IS_BIGENDIAN is TRUE, the order of bytes is big endian. If
1442*fae548d3Szrj CODE is TRUE, the buffer contains code.
1443*fae548d3Szrj */
1444*fae548d3Szrj
1445*fae548d3Szrj void *
bfd_arch_default_fill(bfd_size_type count,bfd_boolean is_bigendian ATTRIBUTE_UNUSED,bfd_boolean code ATTRIBUTE_UNUSED)1446*fae548d3Szrj bfd_arch_default_fill (bfd_size_type count,
1447*fae548d3Szrj bfd_boolean is_bigendian ATTRIBUTE_UNUSED,
1448*fae548d3Szrj bfd_boolean code ATTRIBUTE_UNUSED)
1449*fae548d3Szrj {
1450*fae548d3Szrj void *fill = bfd_malloc (count);
1451*fae548d3Szrj if (fill != NULL)
1452*fae548d3Szrj memset (fill, 0, count);
1453*fae548d3Szrj return fill;
1454*fae548d3Szrj }
1455*fae548d3Szrj
1456*fae548d3Szrj bfd_boolean
_bfd_nowrite_set_arch_mach(bfd * abfd,enum bfd_architecture arch ATTRIBUTE_UNUSED,unsigned long mach ATTRIBUTE_UNUSED)1457*fae548d3Szrj _bfd_nowrite_set_arch_mach (bfd *abfd,
1458*fae548d3Szrj enum bfd_architecture arch ATTRIBUTE_UNUSED,
1459*fae548d3Szrj unsigned long mach ATTRIBUTE_UNUSED)
1460*fae548d3Szrj {
1461*fae548d3Szrj return _bfd_bool_bfd_false_error (abfd);
1462*fae548d3Szrj }
1463