1 /* Register to Stack convert for GNU compiler. 2 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 3 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2010, 2011, 2012 4 Free Software Foundation, Inc. 5 6 This file is part of GCC. 7 8 GCC is free software; you can redistribute it and/or modify it 9 under the terms of the GNU General Public License as published by 10 the Free Software Foundation; either version 3, or (at your option) 11 any later version. 12 13 GCC is distributed in the hope that it will be useful, but WITHOUT 14 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 15 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 16 License for more details. 17 18 You should have received a copy of the GNU General Public License 19 along with GCC; see the file COPYING3. If not see 20 <http://www.gnu.org/licenses/>. */ 21 22 /* This pass converts stack-like registers from the "flat register 23 file" model that gcc uses, to a stack convention that the 387 uses. 24 25 * The form of the input: 26 27 On input, the function consists of insn that have had their 28 registers fully allocated to a set of "virtual" registers. Note that 29 the word "virtual" is used differently here than elsewhere in gcc: for 30 each virtual stack reg, there is a hard reg, but the mapping between 31 them is not known until this pass is run. On output, hard register 32 numbers have been substituted, and various pop and exchange insns have 33 been emitted. The hard register numbers and the virtual register 34 numbers completely overlap - before this pass, all stack register 35 numbers are virtual, and afterward they are all hard. 36 37 The virtual registers can be manipulated normally by gcc, and their 38 semantics are the same as for normal registers. After the hard 39 register numbers are substituted, the semantics of an insn containing 40 stack-like regs are not the same as for an insn with normal regs: for 41 instance, it is not safe to delete an insn that appears to be a no-op 42 move. In general, no insn containing hard regs should be changed 43 after this pass is done. 44 45 * The form of the output: 46 47 After this pass, hard register numbers represent the distance from 48 the current top of stack to the desired register. A reference to 49 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1, 50 represents the register just below that, and so forth. Also, REG_DEAD 51 notes indicate whether or not a stack register should be popped. 52 53 A "swap" insn looks like a parallel of two patterns, where each 54 pattern is a SET: one sets A to B, the other B to A. 55 56 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG 57 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS, 58 will replace the existing stack top, not push a new value. 59 60 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose 61 SET_SRC is REG or MEM. 62 63 The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG 64 appears ambiguous. As a special case, the presence of a REG_DEAD note 65 for FIRST_STACK_REG differentiates between a load insn and a pop. 66 67 If a REG_DEAD is present, the insn represents a "pop" that discards 68 the top of the register stack. If there is no REG_DEAD note, then the 69 insn represents a "dup" or a push of the current top of stack onto the 70 stack. 71 72 * Methodology: 73 74 Existing REG_DEAD and REG_UNUSED notes for stack registers are 75 deleted and recreated from scratch. REG_DEAD is never created for a 76 SET_DEST, only REG_UNUSED. 77 78 * asm_operands: 79 80 There are several rules on the usage of stack-like regs in 81 asm_operands insns. These rules apply only to the operands that are 82 stack-like regs: 83 84 1. Given a set of input regs that die in an asm_operands, it is 85 necessary to know which are implicitly popped by the asm, and 86 which must be explicitly popped by gcc. 87 88 An input reg that is implicitly popped by the asm must be 89 explicitly clobbered, unless it is constrained to match an 90 output operand. 91 92 2. For any input reg that is implicitly popped by an asm, it is 93 necessary to know how to adjust the stack to compensate for the pop. 94 If any non-popped input is closer to the top of the reg-stack than 95 the implicitly popped reg, it would not be possible to know what the 96 stack looked like - it's not clear how the rest of the stack "slides 97 up". 98 99 All implicitly popped input regs must be closer to the top of 100 the reg-stack than any input that is not implicitly popped. 101 102 3. It is possible that if an input dies in an insn, reload might 103 use the input reg for an output reload. Consider this example: 104 105 asm ("foo" : "=t" (a) : "f" (b)); 106 107 This asm says that input B is not popped by the asm, and that 108 the asm pushes a result onto the reg-stack, i.e., the stack is one 109 deeper after the asm than it was before. But, it is possible that 110 reload will think that it can use the same reg for both the input and 111 the output, if input B dies in this insn. 112 113 If any input operand uses the "f" constraint, all output reg 114 constraints must use the "&" earlyclobber. 115 116 The asm above would be written as 117 118 asm ("foo" : "=&t" (a) : "f" (b)); 119 120 4. Some operands need to be in particular places on the stack. All 121 output operands fall in this category - there is no other way to 122 know which regs the outputs appear in unless the user indicates 123 this in the constraints. 124 125 Output operands must specifically indicate which reg an output 126 appears in after an asm. "=f" is not allowed: the operand 127 constraints must select a class with a single reg. 128 129 5. Output operands may not be "inserted" between existing stack regs. 130 Since no 387 opcode uses a read/write operand, all output operands 131 are dead before the asm_operands, and are pushed by the asm_operands. 132 It makes no sense to push anywhere but the top of the reg-stack. 133 134 Output operands must start at the top of the reg-stack: output 135 operands may not "skip" a reg. 136 137 6. Some asm statements may need extra stack space for internal 138 calculations. This can be guaranteed by clobbering stack registers 139 unrelated to the inputs and outputs. 140 141 Here are a couple of reasonable asms to want to write. This asm 142 takes one input, which is internally popped, and produces two outputs. 143 144 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp)); 145 146 This asm takes two inputs, which are popped by the fyl2xp1 opcode, 147 and replaces them with one output. The user must code the "st(1)" 148 clobber for reg-stack.c to know that fyl2xp1 pops both inputs. 149 150 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)"); 151 152 */ 153 154 #include "config.h" 155 #include "system.h" 156 #include "coretypes.h" 157 #include "tm.h" 158 #include "tree.h" 159 #include "rtl-error.h" 160 #include "tm_p.h" 161 #include "function.h" 162 #include "insn-config.h" 163 #include "regs.h" 164 #include "hard-reg-set.h" 165 #include "flags.h" 166 #include "recog.h" 167 #include "output.h" 168 #include "basic-block.h" 169 #include "cfglayout.h" 170 #include "reload.h" 171 #include "ggc.h" 172 #include "timevar.h" 173 #include "tree-pass.h" 174 #include "target.h" 175 #include "df.h" 176 #include "vecprim.h" 177 #include "emit-rtl.h" /* FIXME: Can go away once crtl is moved to rtl.h. */ 178 179 #ifdef STACK_REGS 180 181 /* We use this array to cache info about insns, because otherwise we 182 spend too much time in stack_regs_mentioned_p. 183 184 Indexed by insn UIDs. A value of zero is uninitialized, one indicates 185 the insn uses stack registers, two indicates the insn does not use 186 stack registers. */ 187 static VEC(char,heap) *stack_regs_mentioned_data; 188 189 #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1) 190 191 int regstack_completed = 0; 192 193 /* This is the basic stack record. TOP is an index into REG[] such 194 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty. 195 196 If TOP is -2, REG[] is not yet initialized. Stack initialization 197 consists of placing each live reg in array `reg' and setting `top' 198 appropriately. 199 200 REG_SET indicates which registers are live. */ 201 202 typedef struct stack_def 203 { 204 int top; /* index to top stack element */ 205 HARD_REG_SET reg_set; /* set of live registers */ 206 unsigned char reg[REG_STACK_SIZE];/* register - stack mapping */ 207 } *stack; 208 209 /* This is used to carry information about basic blocks. It is 210 attached to the AUX field of the standard CFG block. */ 211 212 typedef struct block_info_def 213 { 214 struct stack_def stack_in; /* Input stack configuration. */ 215 struct stack_def stack_out; /* Output stack configuration. */ 216 HARD_REG_SET out_reg_set; /* Stack regs live on output. */ 217 int done; /* True if block already converted. */ 218 int predecessors; /* Number of predecessors that need 219 to be visited. */ 220 } *block_info; 221 222 #define BLOCK_INFO(B) ((block_info) (B)->aux) 223 224 /* Passed to change_stack to indicate where to emit insns. */ 225 enum emit_where 226 { 227 EMIT_AFTER, 228 EMIT_BEFORE 229 }; 230 231 /* The block we're currently working on. */ 232 static basic_block current_block; 233 234 /* In the current_block, whether we're processing the first register 235 stack or call instruction, i.e. the regstack is currently the 236 same as BLOCK_INFO(current_block)->stack_in. */ 237 static bool starting_stack_p; 238 239 /* This is the register file for all register after conversion. */ 240 static rtx 241 FP_mode_reg[LAST_STACK_REG+1-FIRST_STACK_REG][(int) MAX_MACHINE_MODE]; 242 243 #define FP_MODE_REG(regno,mode) \ 244 (FP_mode_reg[(regno)-FIRST_STACK_REG][(int) (mode)]) 245 246 /* Used to initialize uninitialized registers. */ 247 static rtx not_a_num; 248 249 /* Forward declarations */ 250 251 static int stack_regs_mentioned_p (const_rtx pat); 252 static void pop_stack (stack, int); 253 static rtx *get_true_reg (rtx *); 254 255 static int check_asm_stack_operands (rtx); 256 static void get_asm_operands_in_out (rtx, int *, int *); 257 static rtx stack_result (tree); 258 static void replace_reg (rtx *, int); 259 static void remove_regno_note (rtx, enum reg_note, unsigned int); 260 static int get_hard_regnum (stack, rtx); 261 static rtx emit_pop_insn (rtx, stack, rtx, enum emit_where); 262 static void swap_to_top(rtx, stack, rtx, rtx); 263 static bool move_for_stack_reg (rtx, stack, rtx); 264 static bool move_nan_for_stack_reg (rtx, stack, rtx); 265 static int swap_rtx_condition_1 (rtx); 266 static int swap_rtx_condition (rtx); 267 static void compare_for_stack_reg (rtx, stack, rtx); 268 static bool subst_stack_regs_pat (rtx, stack, rtx); 269 static void subst_asm_stack_regs (rtx, stack); 270 static bool subst_stack_regs (rtx, stack); 271 static void change_stack (rtx, stack, stack, enum emit_where); 272 static void print_stack (FILE *, stack); 273 static rtx next_flags_user (rtx); 274 275 /* Return nonzero if any stack register is mentioned somewhere within PAT. */ 276 277 static int 278 stack_regs_mentioned_p (const_rtx pat) 279 { 280 const char *fmt; 281 int i; 282 283 if (STACK_REG_P (pat)) 284 return 1; 285 286 fmt = GET_RTX_FORMAT (GET_CODE (pat)); 287 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--) 288 { 289 if (fmt[i] == 'E') 290 { 291 int j; 292 293 for (j = XVECLEN (pat, i) - 1; j >= 0; j--) 294 if (stack_regs_mentioned_p (XVECEXP (pat, i, j))) 295 return 1; 296 } 297 else if (fmt[i] == 'e' && stack_regs_mentioned_p (XEXP (pat, i))) 298 return 1; 299 } 300 301 return 0; 302 } 303 304 /* Return nonzero if INSN mentions stacked registers, else return zero. */ 305 306 int 307 stack_regs_mentioned (const_rtx insn) 308 { 309 unsigned int uid, max; 310 int test; 311 312 if (! INSN_P (insn) || !stack_regs_mentioned_data) 313 return 0; 314 315 uid = INSN_UID (insn); 316 max = VEC_length (char, stack_regs_mentioned_data); 317 if (uid >= max) 318 { 319 /* Allocate some extra size to avoid too many reallocs, but 320 do not grow too quickly. */ 321 max = uid + uid / 20 + 1; 322 VEC_safe_grow_cleared (char, heap, stack_regs_mentioned_data, max); 323 } 324 325 test = VEC_index (char, stack_regs_mentioned_data, uid); 326 if (test == 0) 327 { 328 /* This insn has yet to be examined. Do so now. */ 329 test = stack_regs_mentioned_p (PATTERN (insn)) ? 1 : 2; 330 VEC_replace (char, stack_regs_mentioned_data, uid, test); 331 } 332 333 return test == 1; 334 } 335 336 static rtx ix86_flags_rtx; 337 338 static rtx 339 next_flags_user (rtx insn) 340 { 341 /* Search forward looking for the first use of this value. 342 Stop at block boundaries. */ 343 344 while (insn != BB_END (current_block)) 345 { 346 insn = NEXT_INSN (insn); 347 348 if (INSN_P (insn) && reg_mentioned_p (ix86_flags_rtx, PATTERN (insn))) 349 return insn; 350 351 if (CALL_P (insn)) 352 return NULL_RTX; 353 } 354 return NULL_RTX; 355 } 356 357 /* Reorganize the stack into ascending numbers, before this insn. */ 358 359 static void 360 straighten_stack (rtx insn, stack regstack) 361 { 362 struct stack_def temp_stack; 363 int top; 364 365 /* If there is only a single register on the stack, then the stack is 366 already in increasing order and no reorganization is needed. 367 368 Similarly if the stack is empty. */ 369 if (regstack->top <= 0) 370 return; 371 372 COPY_HARD_REG_SET (temp_stack.reg_set, regstack->reg_set); 373 374 for (top = temp_stack.top = regstack->top; top >= 0; top--) 375 temp_stack.reg[top] = FIRST_STACK_REG + temp_stack.top - top; 376 377 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE); 378 } 379 380 /* Pop a register from the stack. */ 381 382 static void 383 pop_stack (stack regstack, int regno) 384 { 385 int top = regstack->top; 386 387 CLEAR_HARD_REG_BIT (regstack->reg_set, regno); 388 regstack->top--; 389 /* If regno was not at the top of stack then adjust stack. */ 390 if (regstack->reg [top] != regno) 391 { 392 int i; 393 for (i = regstack->top; i >= 0; i--) 394 if (regstack->reg [i] == regno) 395 { 396 int j; 397 for (j = i; j < top; j++) 398 regstack->reg [j] = regstack->reg [j + 1]; 399 break; 400 } 401 } 402 } 403 404 /* Return a pointer to the REG expression within PAT. If PAT is not a 405 REG, possible enclosed by a conversion rtx, return the inner part of 406 PAT that stopped the search. */ 407 408 static rtx * 409 get_true_reg (rtx *pat) 410 { 411 for (;;) 412 switch (GET_CODE (*pat)) 413 { 414 case SUBREG: 415 /* Eliminate FP subregister accesses in favor of the 416 actual FP register in use. */ 417 { 418 rtx subreg; 419 if (FP_REG_P (subreg = SUBREG_REG (*pat))) 420 { 421 int regno_off = subreg_regno_offset (REGNO (subreg), 422 GET_MODE (subreg), 423 SUBREG_BYTE (*pat), 424 GET_MODE (*pat)); 425 *pat = FP_MODE_REG (REGNO (subreg) + regno_off, 426 GET_MODE (subreg)); 427 return pat; 428 } 429 } 430 case FLOAT: 431 case FIX: 432 case FLOAT_EXTEND: 433 pat = & XEXP (*pat, 0); 434 break; 435 436 case UNSPEC: 437 if (XINT (*pat, 1) == UNSPEC_TRUNC_NOOP 438 || XINT (*pat, 1) == UNSPEC_LDA) 439 pat = & XVECEXP (*pat, 0, 0); 440 return pat; 441 442 case FLOAT_TRUNCATE: 443 if (!flag_unsafe_math_optimizations) 444 return pat; 445 pat = & XEXP (*pat, 0); 446 break; 447 448 default: 449 return pat; 450 } 451 } 452 453 /* Set if we find any malformed asms in a block. */ 454 static bool any_malformed_asm; 455 456 /* There are many rules that an asm statement for stack-like regs must 457 follow. Those rules are explained at the top of this file: the rule 458 numbers below refer to that explanation. */ 459 460 static int 461 check_asm_stack_operands (rtx insn) 462 { 463 int i; 464 int n_clobbers; 465 int malformed_asm = 0; 466 rtx body = PATTERN (insn); 467 468 char reg_used_as_output[FIRST_PSEUDO_REGISTER]; 469 char implicitly_dies[FIRST_PSEUDO_REGISTER]; 470 int alt; 471 472 rtx *clobber_reg = 0; 473 int n_inputs, n_outputs; 474 475 /* Find out what the constraints require. If no constraint 476 alternative matches, this asm is malformed. */ 477 extract_insn (insn); 478 constrain_operands (1); 479 alt = which_alternative; 480 481 preprocess_constraints (); 482 483 get_asm_operands_in_out (body, &n_outputs, &n_inputs); 484 485 if (alt < 0) 486 { 487 malformed_asm = 1; 488 /* Avoid further trouble with this insn. */ 489 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx); 490 return 0; 491 } 492 493 /* Strip SUBREGs here to make the following code simpler. */ 494 for (i = 0; i < recog_data.n_operands; i++) 495 if (GET_CODE (recog_data.operand[i]) == SUBREG 496 && REG_P (SUBREG_REG (recog_data.operand[i]))) 497 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]); 498 499 /* Set up CLOBBER_REG. */ 500 501 n_clobbers = 0; 502 503 if (GET_CODE (body) == PARALLEL) 504 { 505 clobber_reg = XALLOCAVEC (rtx, XVECLEN (body, 0)); 506 507 for (i = 0; i < XVECLEN (body, 0); i++) 508 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER) 509 { 510 rtx clobber = XVECEXP (body, 0, i); 511 rtx reg = XEXP (clobber, 0); 512 513 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg))) 514 reg = SUBREG_REG (reg); 515 516 if (STACK_REG_P (reg)) 517 { 518 clobber_reg[n_clobbers] = reg; 519 n_clobbers++; 520 } 521 } 522 } 523 524 /* Enforce rule #4: Output operands must specifically indicate which 525 reg an output appears in after an asm. "=f" is not allowed: the 526 operand constraints must select a class with a single reg. 527 528 Also enforce rule #5: Output operands must start at the top of 529 the reg-stack: output operands may not "skip" a reg. */ 530 531 memset (reg_used_as_output, 0, sizeof (reg_used_as_output)); 532 for (i = 0; i < n_outputs; i++) 533 if (STACK_REG_P (recog_data.operand[i])) 534 { 535 if (reg_class_size[(int) recog_op_alt[i][alt].cl] != 1) 536 { 537 error_for_asm (insn, "output constraint %d must specify a single register", i); 538 malformed_asm = 1; 539 } 540 else 541 { 542 int j; 543 544 for (j = 0; j < n_clobbers; j++) 545 if (REGNO (recog_data.operand[i]) == REGNO (clobber_reg[j])) 546 { 547 error_for_asm (insn, "output constraint %d cannot be specified together with \"%s\" clobber", 548 i, reg_names [REGNO (clobber_reg[j])]); 549 malformed_asm = 1; 550 break; 551 } 552 if (j == n_clobbers) 553 reg_used_as_output[REGNO (recog_data.operand[i])] = 1; 554 } 555 } 556 557 558 /* Search for first non-popped reg. */ 559 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++) 560 if (! reg_used_as_output[i]) 561 break; 562 563 /* If there are any other popped regs, that's an error. */ 564 for (; i < LAST_STACK_REG + 1; i++) 565 if (reg_used_as_output[i]) 566 break; 567 568 if (i != LAST_STACK_REG + 1) 569 { 570 error_for_asm (insn, "output regs must be grouped at top of stack"); 571 malformed_asm = 1; 572 } 573 574 /* Enforce rule #2: All implicitly popped input regs must be closer 575 to the top of the reg-stack than any input that is not implicitly 576 popped. */ 577 578 memset (implicitly_dies, 0, sizeof (implicitly_dies)); 579 for (i = n_outputs; i < n_outputs + n_inputs; i++) 580 if (STACK_REG_P (recog_data.operand[i])) 581 { 582 /* An input reg is implicitly popped if it is tied to an 583 output, or if there is a CLOBBER for it. */ 584 int j; 585 586 for (j = 0; j < n_clobbers; j++) 587 if (operands_match_p (clobber_reg[j], recog_data.operand[i])) 588 break; 589 590 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0) 591 implicitly_dies[REGNO (recog_data.operand[i])] = 1; 592 } 593 594 /* Search for first non-popped reg. */ 595 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++) 596 if (! implicitly_dies[i]) 597 break; 598 599 /* If there are any other popped regs, that's an error. */ 600 for (; i < LAST_STACK_REG + 1; i++) 601 if (implicitly_dies[i]) 602 break; 603 604 if (i != LAST_STACK_REG + 1) 605 { 606 error_for_asm (insn, 607 "implicitly popped regs must be grouped at top of stack"); 608 malformed_asm = 1; 609 } 610 611 /* Enforce rule #3: If any input operand uses the "f" constraint, all 612 output constraints must use the "&" earlyclobber. 613 614 ??? Detect this more deterministically by having constrain_asm_operands 615 record any earlyclobber. */ 616 617 for (i = n_outputs; i < n_outputs + n_inputs; i++) 618 if (recog_op_alt[i][alt].matches == -1) 619 { 620 int j; 621 622 for (j = 0; j < n_outputs; j++) 623 if (operands_match_p (recog_data.operand[j], recog_data.operand[i])) 624 { 625 error_for_asm (insn, 626 "output operand %d must use %<&%> constraint", j); 627 malformed_asm = 1; 628 } 629 } 630 631 if (malformed_asm) 632 { 633 /* Avoid further trouble with this insn. */ 634 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx); 635 any_malformed_asm = true; 636 return 0; 637 } 638 639 return 1; 640 } 641 642 /* Calculate the number of inputs and outputs in BODY, an 643 asm_operands. N_OPERANDS is the total number of operands, and 644 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are 645 placed. */ 646 647 static void 648 get_asm_operands_in_out (rtx body, int *pout, int *pin) 649 { 650 rtx asmop = extract_asm_operands (body); 651 652 *pin = ASM_OPERANDS_INPUT_LENGTH (asmop); 653 *pout = (recog_data.n_operands 654 - ASM_OPERANDS_INPUT_LENGTH (asmop) 655 - ASM_OPERANDS_LABEL_LENGTH (asmop)); 656 } 657 658 /* If current function returns its result in an fp stack register, 659 return the REG. Otherwise, return 0. */ 660 661 static rtx 662 stack_result (tree decl) 663 { 664 rtx result; 665 666 /* If the value is supposed to be returned in memory, then clearly 667 it is not returned in a stack register. */ 668 if (aggregate_value_p (DECL_RESULT (decl), decl)) 669 return 0; 670 671 result = DECL_RTL_IF_SET (DECL_RESULT (decl)); 672 if (result != 0) 673 result = targetm.calls.function_value (TREE_TYPE (DECL_RESULT (decl)), 674 decl, true); 675 676 return result != 0 && STACK_REG_P (result) ? result : 0; 677 } 678 679 680 /* 681 * This section deals with stack register substitution, and forms the second 682 * pass over the RTL. 683 */ 684 685 /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for 686 the desired hard REGNO. */ 687 688 static void 689 replace_reg (rtx *reg, int regno) 690 { 691 gcc_assert (IN_RANGE (regno, FIRST_STACK_REG, LAST_STACK_REG)); 692 gcc_assert (STACK_REG_P (*reg)); 693 694 gcc_assert (SCALAR_FLOAT_MODE_P (GET_MODE (*reg)) 695 || GET_MODE_CLASS (GET_MODE (*reg)) == MODE_COMPLEX_FLOAT); 696 697 *reg = FP_MODE_REG (regno, GET_MODE (*reg)); 698 } 699 700 /* Remove a note of type NOTE, which must be found, for register 701 number REGNO from INSN. Remove only one such note. */ 702 703 static void 704 remove_regno_note (rtx insn, enum reg_note note, unsigned int regno) 705 { 706 rtx *note_link, this_rtx; 707 708 note_link = ®_NOTES (insn); 709 for (this_rtx = *note_link; this_rtx; this_rtx = XEXP (this_rtx, 1)) 710 if (REG_NOTE_KIND (this_rtx) == note 711 && REG_P (XEXP (this_rtx, 0)) && REGNO (XEXP (this_rtx, 0)) == regno) 712 { 713 *note_link = XEXP (this_rtx, 1); 714 return; 715 } 716 else 717 note_link = &XEXP (this_rtx, 1); 718 719 gcc_unreachable (); 720 } 721 722 /* Find the hard register number of virtual register REG in REGSTACK. 723 The hard register number is relative to the top of the stack. -1 is 724 returned if the register is not found. */ 725 726 static int 727 get_hard_regnum (stack regstack, rtx reg) 728 { 729 int i; 730 731 gcc_assert (STACK_REG_P (reg)); 732 733 for (i = regstack->top; i >= 0; i--) 734 if (regstack->reg[i] == REGNO (reg)) 735 break; 736 737 return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1; 738 } 739 740 /* Emit an insn to pop virtual register REG before or after INSN. 741 REGSTACK is the stack state after INSN and is updated to reflect this 742 pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn 743 is represented as a SET whose destination is the register to be popped 744 and source is the top of stack. A death note for the top of stack 745 cases the movdf pattern to pop. */ 746 747 static rtx 748 emit_pop_insn (rtx insn, stack regstack, rtx reg, enum emit_where where) 749 { 750 rtx pop_insn, pop_rtx; 751 int hard_regno; 752 753 /* For complex types take care to pop both halves. These may survive in 754 CLOBBER and USE expressions. */ 755 if (COMPLEX_MODE_P (GET_MODE (reg))) 756 { 757 rtx reg1 = FP_MODE_REG (REGNO (reg), DFmode); 758 rtx reg2 = FP_MODE_REG (REGNO (reg) + 1, DFmode); 759 760 pop_insn = NULL_RTX; 761 if (get_hard_regnum (regstack, reg1) >= 0) 762 pop_insn = emit_pop_insn (insn, regstack, reg1, where); 763 if (get_hard_regnum (regstack, reg2) >= 0) 764 pop_insn = emit_pop_insn (insn, regstack, reg2, where); 765 gcc_assert (pop_insn); 766 return pop_insn; 767 } 768 769 hard_regno = get_hard_regnum (regstack, reg); 770 771 gcc_assert (hard_regno >= FIRST_STACK_REG); 772 773 pop_rtx = gen_rtx_SET (VOIDmode, FP_MODE_REG (hard_regno, DFmode), 774 FP_MODE_REG (FIRST_STACK_REG, DFmode)); 775 776 if (where == EMIT_AFTER) 777 pop_insn = emit_insn_after (pop_rtx, insn); 778 else 779 pop_insn = emit_insn_before (pop_rtx, insn); 780 781 add_reg_note (pop_insn, REG_DEAD, FP_MODE_REG (FIRST_STACK_REG, DFmode)); 782 783 regstack->reg[regstack->top - (hard_regno - FIRST_STACK_REG)] 784 = regstack->reg[regstack->top]; 785 regstack->top -= 1; 786 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (reg)); 787 788 return pop_insn; 789 } 790 791 /* Emit an insn before or after INSN to swap virtual register REG with 792 the top of stack. REGSTACK is the stack state before the swap, and 793 is updated to reflect the swap. A swap insn is represented as a 794 PARALLEL of two patterns: each pattern moves one reg to the other. 795 796 If REG is already at the top of the stack, no insn is emitted. */ 797 798 static void 799 emit_swap_insn (rtx insn, stack regstack, rtx reg) 800 { 801 int hard_regno; 802 rtx swap_rtx; 803 int tmp, other_reg; /* swap regno temps */ 804 rtx i1; /* the stack-reg insn prior to INSN */ 805 rtx i1set = NULL_RTX; /* the SET rtx within I1 */ 806 807 hard_regno = get_hard_regnum (regstack, reg); 808 809 if (hard_regno == FIRST_STACK_REG) 810 return; 811 if (hard_regno == -1) 812 { 813 /* Something failed if the register wasn't on the stack. If we had 814 malformed asms, we zapped the instruction itself, but that didn't 815 produce the same pattern of register sets as before. To prevent 816 further failure, adjust REGSTACK to include REG at TOP. */ 817 gcc_assert (any_malformed_asm); 818 regstack->reg[++regstack->top] = REGNO (reg); 819 return; 820 } 821 gcc_assert (hard_regno >= FIRST_STACK_REG); 822 823 other_reg = regstack->top - (hard_regno - FIRST_STACK_REG); 824 825 tmp = regstack->reg[other_reg]; 826 regstack->reg[other_reg] = regstack->reg[regstack->top]; 827 regstack->reg[regstack->top] = tmp; 828 829 /* Find the previous insn involving stack regs, but don't pass a 830 block boundary. */ 831 i1 = NULL; 832 if (current_block && insn != BB_HEAD (current_block)) 833 { 834 rtx tmp = PREV_INSN (insn); 835 rtx limit = PREV_INSN (BB_HEAD (current_block)); 836 while (tmp != limit) 837 { 838 if (LABEL_P (tmp) 839 || CALL_P (tmp) 840 || NOTE_INSN_BASIC_BLOCK_P (tmp) 841 || (NONJUMP_INSN_P (tmp) 842 && stack_regs_mentioned (tmp))) 843 { 844 i1 = tmp; 845 break; 846 } 847 tmp = PREV_INSN (tmp); 848 } 849 } 850 851 if (i1 != NULL_RTX 852 && (i1set = single_set (i1)) != NULL_RTX) 853 { 854 rtx i1src = *get_true_reg (&SET_SRC (i1set)); 855 rtx i1dest = *get_true_reg (&SET_DEST (i1set)); 856 857 /* If the previous register stack push was from the reg we are to 858 swap with, omit the swap. */ 859 860 if (REG_P (i1dest) && REGNO (i1dest) == FIRST_STACK_REG 861 && REG_P (i1src) 862 && REGNO (i1src) == (unsigned) hard_regno - 1 863 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX) 864 return; 865 866 /* If the previous insn wrote to the reg we are to swap with, 867 omit the swap. */ 868 869 if (REG_P (i1dest) && REGNO (i1dest) == (unsigned) hard_regno 870 && REG_P (i1src) && REGNO (i1src) == FIRST_STACK_REG 871 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX) 872 return; 873 } 874 875 /* Avoid emitting the swap if this is the first register stack insn 876 of the current_block. Instead update the current_block's stack_in 877 and let compensate edges take care of this for us. */ 878 if (current_block && starting_stack_p) 879 { 880 BLOCK_INFO (current_block)->stack_in = *regstack; 881 starting_stack_p = false; 882 return; 883 } 884 885 swap_rtx = gen_swapxf (FP_MODE_REG (hard_regno, XFmode), 886 FP_MODE_REG (FIRST_STACK_REG, XFmode)); 887 888 if (i1) 889 emit_insn_after (swap_rtx, i1); 890 else if (current_block) 891 emit_insn_before (swap_rtx, BB_HEAD (current_block)); 892 else 893 emit_insn_before (swap_rtx, insn); 894 } 895 896 /* Emit an insns before INSN to swap virtual register SRC1 with 897 the top of stack and virtual register SRC2 with second stack 898 slot. REGSTACK is the stack state before the swaps, and 899 is updated to reflect the swaps. A swap insn is represented as a 900 PARALLEL of two patterns: each pattern moves one reg to the other. 901 902 If SRC1 and/or SRC2 are already at the right place, no swap insn 903 is emitted. */ 904 905 static void 906 swap_to_top (rtx insn, stack regstack, rtx src1, rtx src2) 907 { 908 struct stack_def temp_stack; 909 int regno, j, k, temp; 910 911 temp_stack = *regstack; 912 913 /* Place operand 1 at the top of stack. */ 914 regno = get_hard_regnum (&temp_stack, src1); 915 gcc_assert (regno >= 0); 916 if (regno != FIRST_STACK_REG) 917 { 918 k = temp_stack.top - (regno - FIRST_STACK_REG); 919 j = temp_stack.top; 920 921 temp = temp_stack.reg[k]; 922 temp_stack.reg[k] = temp_stack.reg[j]; 923 temp_stack.reg[j] = temp; 924 } 925 926 /* Place operand 2 next on the stack. */ 927 regno = get_hard_regnum (&temp_stack, src2); 928 gcc_assert (regno >= 0); 929 if (regno != FIRST_STACK_REG + 1) 930 { 931 k = temp_stack.top - (regno - FIRST_STACK_REG); 932 j = temp_stack.top - 1; 933 934 temp = temp_stack.reg[k]; 935 temp_stack.reg[k] = temp_stack.reg[j]; 936 temp_stack.reg[j] = temp; 937 } 938 939 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE); 940 } 941 942 /* Handle a move to or from a stack register in PAT, which is in INSN. 943 REGSTACK is the current stack. Return whether a control flow insn 944 was deleted in the process. */ 945 946 static bool 947 move_for_stack_reg (rtx insn, stack regstack, rtx pat) 948 { 949 rtx *psrc = get_true_reg (&SET_SRC (pat)); 950 rtx *pdest = get_true_reg (&SET_DEST (pat)); 951 rtx src, dest; 952 rtx note; 953 bool control_flow_insn_deleted = false; 954 955 src = *psrc; dest = *pdest; 956 957 if (STACK_REG_P (src) && STACK_REG_P (dest)) 958 { 959 /* Write from one stack reg to another. If SRC dies here, then 960 just change the register mapping and delete the insn. */ 961 962 note = find_regno_note (insn, REG_DEAD, REGNO (src)); 963 if (note) 964 { 965 int i; 966 967 /* If this is a no-op move, there must not be a REG_DEAD note. */ 968 gcc_assert (REGNO (src) != REGNO (dest)); 969 970 for (i = regstack->top; i >= 0; i--) 971 if (regstack->reg[i] == REGNO (src)) 972 break; 973 974 /* The destination must be dead, or life analysis is borked. */ 975 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG); 976 977 /* If the source is not live, this is yet another case of 978 uninitialized variables. Load up a NaN instead. */ 979 if (i < 0) 980 return move_nan_for_stack_reg (insn, regstack, dest); 981 982 /* It is possible that the dest is unused after this insn. 983 If so, just pop the src. */ 984 985 if (find_regno_note (insn, REG_UNUSED, REGNO (dest))) 986 emit_pop_insn (insn, regstack, src, EMIT_AFTER); 987 else 988 { 989 regstack->reg[i] = REGNO (dest); 990 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest)); 991 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src)); 992 } 993 994 control_flow_insn_deleted |= control_flow_insn_p (insn); 995 delete_insn (insn); 996 return control_flow_insn_deleted; 997 } 998 999 /* The source reg does not die. */ 1000 1001 /* If this appears to be a no-op move, delete it, or else it 1002 will confuse the machine description output patterns. But if 1003 it is REG_UNUSED, we must pop the reg now, as per-insn processing 1004 for REG_UNUSED will not work for deleted insns. */ 1005 1006 if (REGNO (src) == REGNO (dest)) 1007 { 1008 if (find_regno_note (insn, REG_UNUSED, REGNO (dest))) 1009 emit_pop_insn (insn, regstack, dest, EMIT_AFTER); 1010 1011 control_flow_insn_deleted |= control_flow_insn_p (insn); 1012 delete_insn (insn); 1013 return control_flow_insn_deleted; 1014 } 1015 1016 /* The destination ought to be dead. */ 1017 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG); 1018 1019 replace_reg (psrc, get_hard_regnum (regstack, src)); 1020 1021 regstack->reg[++regstack->top] = REGNO (dest); 1022 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest)); 1023 replace_reg (pdest, FIRST_STACK_REG); 1024 } 1025 else if (STACK_REG_P (src)) 1026 { 1027 /* Save from a stack reg to MEM, or possibly integer reg. Since 1028 only top of stack may be saved, emit an exchange first if 1029 needs be. */ 1030 1031 emit_swap_insn (insn, regstack, src); 1032 1033 note = find_regno_note (insn, REG_DEAD, REGNO (src)); 1034 if (note) 1035 { 1036 replace_reg (&XEXP (note, 0), FIRST_STACK_REG); 1037 regstack->top--; 1038 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src)); 1039 } 1040 else if ((GET_MODE (src) == XFmode) 1041 && regstack->top < REG_STACK_SIZE - 1) 1042 { 1043 /* A 387 cannot write an XFmode value to a MEM without 1044 clobbering the source reg. The output code can handle 1045 this by reading back the value from the MEM. 1046 But it is more efficient to use a temp register if one is 1047 available. Push the source value here if the register 1048 stack is not full, and then write the value to memory via 1049 a pop. */ 1050 rtx push_rtx; 1051 rtx top_stack_reg = FP_MODE_REG (FIRST_STACK_REG, GET_MODE (src)); 1052 1053 push_rtx = gen_movxf (top_stack_reg, top_stack_reg); 1054 emit_insn_before (push_rtx, insn); 1055 add_reg_note (insn, REG_DEAD, top_stack_reg); 1056 } 1057 1058 replace_reg (psrc, FIRST_STACK_REG); 1059 } 1060 else 1061 { 1062 rtx pat = PATTERN (insn); 1063 1064 gcc_assert (STACK_REG_P (dest)); 1065 1066 /* Load from MEM, or possibly integer REG or constant, into the 1067 stack regs. The actual target is always the top of the 1068 stack. The stack mapping is changed to reflect that DEST is 1069 now at top of stack. */ 1070 1071 /* The destination ought to be dead. However, there is a 1072 special case with i387 UNSPEC_TAN, where destination is live 1073 (an argument to fptan) but inherent load of 1.0 is modelled 1074 as a load from a constant. */ 1075 if (GET_CODE (pat) == PARALLEL 1076 && XVECLEN (pat, 0) == 2 1077 && GET_CODE (XVECEXP (pat, 0, 1)) == SET 1078 && GET_CODE (SET_SRC (XVECEXP (pat, 0, 1))) == UNSPEC 1079 && XINT (SET_SRC (XVECEXP (pat, 0, 1)), 1) == UNSPEC_TAN) 1080 emit_swap_insn (insn, regstack, dest); 1081 else 1082 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG); 1083 1084 gcc_assert (regstack->top < REG_STACK_SIZE); 1085 1086 regstack->reg[++regstack->top] = REGNO (dest); 1087 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest)); 1088 replace_reg (pdest, FIRST_STACK_REG); 1089 } 1090 1091 return control_flow_insn_deleted; 1092 } 1093 1094 /* A helper function which replaces INSN with a pattern that loads up 1095 a NaN into DEST, then invokes move_for_stack_reg. */ 1096 1097 static bool 1098 move_nan_for_stack_reg (rtx insn, stack regstack, rtx dest) 1099 { 1100 rtx pat; 1101 1102 dest = FP_MODE_REG (REGNO (dest), SFmode); 1103 pat = gen_rtx_SET (VOIDmode, dest, not_a_num); 1104 PATTERN (insn) = pat; 1105 INSN_CODE (insn) = -1; 1106 1107 return move_for_stack_reg (insn, regstack, pat); 1108 } 1109 1110 /* Swap the condition on a branch, if there is one. Return true if we 1111 found a condition to swap. False if the condition was not used as 1112 such. */ 1113 1114 static int 1115 swap_rtx_condition_1 (rtx pat) 1116 { 1117 const char *fmt; 1118 int i, r = 0; 1119 1120 if (COMPARISON_P (pat)) 1121 { 1122 PUT_CODE (pat, swap_condition (GET_CODE (pat))); 1123 r = 1; 1124 } 1125 else 1126 { 1127 fmt = GET_RTX_FORMAT (GET_CODE (pat)); 1128 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--) 1129 { 1130 if (fmt[i] == 'E') 1131 { 1132 int j; 1133 1134 for (j = XVECLEN (pat, i) - 1; j >= 0; j--) 1135 r |= swap_rtx_condition_1 (XVECEXP (pat, i, j)); 1136 } 1137 else if (fmt[i] == 'e') 1138 r |= swap_rtx_condition_1 (XEXP (pat, i)); 1139 } 1140 } 1141 1142 return r; 1143 } 1144 1145 static int 1146 swap_rtx_condition (rtx insn) 1147 { 1148 rtx pat = PATTERN (insn); 1149 1150 /* We're looking for a single set to cc0 or an HImode temporary. */ 1151 1152 if (GET_CODE (pat) == SET 1153 && REG_P (SET_DEST (pat)) 1154 && REGNO (SET_DEST (pat)) == FLAGS_REG) 1155 { 1156 insn = next_flags_user (insn); 1157 if (insn == NULL_RTX) 1158 return 0; 1159 pat = PATTERN (insn); 1160 } 1161 1162 /* See if this is, or ends in, a fnstsw. If so, we're not doing anything 1163 with the cc value right now. We may be able to search for one 1164 though. */ 1165 1166 if (GET_CODE (pat) == SET 1167 && GET_CODE (SET_SRC (pat)) == UNSPEC 1168 && XINT (SET_SRC (pat), 1) == UNSPEC_FNSTSW) 1169 { 1170 rtx dest = SET_DEST (pat); 1171 1172 /* Search forward looking for the first use of this value. 1173 Stop at block boundaries. */ 1174 while (insn != BB_END (current_block)) 1175 { 1176 insn = NEXT_INSN (insn); 1177 if (INSN_P (insn) && reg_mentioned_p (dest, insn)) 1178 break; 1179 if (CALL_P (insn)) 1180 return 0; 1181 } 1182 1183 /* We haven't found it. */ 1184 if (insn == BB_END (current_block)) 1185 return 0; 1186 1187 /* So we've found the insn using this value. If it is anything 1188 other than sahf or the value does not die (meaning we'd have 1189 to search further), then we must give up. */ 1190 pat = PATTERN (insn); 1191 if (GET_CODE (pat) != SET 1192 || GET_CODE (SET_SRC (pat)) != UNSPEC 1193 || XINT (SET_SRC (pat), 1) != UNSPEC_SAHF 1194 || ! dead_or_set_p (insn, dest)) 1195 return 0; 1196 1197 /* Now we are prepared to handle this as a normal cc0 setter. */ 1198 insn = next_flags_user (insn); 1199 if (insn == NULL_RTX) 1200 return 0; 1201 pat = PATTERN (insn); 1202 } 1203 1204 if (swap_rtx_condition_1 (pat)) 1205 { 1206 int fail = 0; 1207 INSN_CODE (insn) = -1; 1208 if (recog_memoized (insn) == -1) 1209 fail = 1; 1210 /* In case the flags don't die here, recurse to try fix 1211 following user too. */ 1212 else if (! dead_or_set_p (insn, ix86_flags_rtx)) 1213 { 1214 insn = next_flags_user (insn); 1215 if (!insn || !swap_rtx_condition (insn)) 1216 fail = 1; 1217 } 1218 if (fail) 1219 { 1220 swap_rtx_condition_1 (pat); 1221 return 0; 1222 } 1223 return 1; 1224 } 1225 return 0; 1226 } 1227 1228 /* Handle a comparison. Special care needs to be taken to avoid 1229 causing comparisons that a 387 cannot do correctly, such as EQ. 1230 1231 Also, a pop insn may need to be emitted. The 387 does have an 1232 `fcompp' insn that can pop two regs, but it is sometimes too expensive 1233 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to 1234 set up. */ 1235 1236 static void 1237 compare_for_stack_reg (rtx insn, stack regstack, rtx pat_src) 1238 { 1239 rtx *src1, *src2; 1240 rtx src1_note, src2_note; 1241 1242 src1 = get_true_reg (&XEXP (pat_src, 0)); 1243 src2 = get_true_reg (&XEXP (pat_src, 1)); 1244 1245 /* ??? If fxch turns out to be cheaper than fstp, give priority to 1246 registers that die in this insn - move those to stack top first. */ 1247 if ((! STACK_REG_P (*src1) 1248 || (STACK_REG_P (*src2) 1249 && get_hard_regnum (regstack, *src2) == FIRST_STACK_REG)) 1250 && swap_rtx_condition (insn)) 1251 { 1252 rtx temp; 1253 temp = XEXP (pat_src, 0); 1254 XEXP (pat_src, 0) = XEXP (pat_src, 1); 1255 XEXP (pat_src, 1) = temp; 1256 1257 src1 = get_true_reg (&XEXP (pat_src, 0)); 1258 src2 = get_true_reg (&XEXP (pat_src, 1)); 1259 1260 INSN_CODE (insn) = -1; 1261 } 1262 1263 /* We will fix any death note later. */ 1264 1265 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1266 1267 if (STACK_REG_P (*src2)) 1268 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); 1269 else 1270 src2_note = NULL_RTX; 1271 1272 emit_swap_insn (insn, regstack, *src1); 1273 1274 replace_reg (src1, FIRST_STACK_REG); 1275 1276 if (STACK_REG_P (*src2)) 1277 replace_reg (src2, get_hard_regnum (regstack, *src2)); 1278 1279 if (src1_note) 1280 { 1281 pop_stack (regstack, REGNO (XEXP (src1_note, 0))); 1282 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1283 } 1284 1285 /* If the second operand dies, handle that. But if the operands are 1286 the same stack register, don't bother, because only one death is 1287 needed, and it was just handled. */ 1288 1289 if (src2_note 1290 && ! (STACK_REG_P (*src1) && STACK_REG_P (*src2) 1291 && REGNO (*src1) == REGNO (*src2))) 1292 { 1293 /* As a special case, two regs may die in this insn if src2 is 1294 next to top of stack and the top of stack also dies. Since 1295 we have already popped src1, "next to top of stack" is really 1296 at top (FIRST_STACK_REG) now. */ 1297 1298 if (get_hard_regnum (regstack, XEXP (src2_note, 0)) == FIRST_STACK_REG 1299 && src1_note) 1300 { 1301 pop_stack (regstack, REGNO (XEXP (src2_note, 0))); 1302 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1); 1303 } 1304 else 1305 { 1306 /* The 386 can only represent death of the first operand in 1307 the case handled above. In all other cases, emit a separate 1308 pop and remove the death note from here. */ 1309 1310 /* link_cc0_insns (insn); */ 1311 1312 remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src2_note, 0))); 1313 1314 emit_pop_insn (insn, regstack, XEXP (src2_note, 0), 1315 EMIT_AFTER); 1316 } 1317 } 1318 } 1319 1320 /* Substitute new registers in LOC, which is part of a debug insn. 1321 REGSTACK is the current register layout. */ 1322 1323 static int 1324 subst_stack_regs_in_debug_insn (rtx *loc, void *data) 1325 { 1326 stack regstack = (stack)data; 1327 int hard_regno; 1328 1329 if (!STACK_REG_P (*loc)) 1330 return 0; 1331 1332 hard_regno = get_hard_regnum (regstack, *loc); 1333 1334 /* If we can't find an active register, reset this debug insn. */ 1335 if (hard_regno == -1) 1336 return 1; 1337 1338 gcc_assert (hard_regno >= FIRST_STACK_REG); 1339 1340 replace_reg (loc, hard_regno); 1341 1342 return -1; 1343 } 1344 1345 /* Substitute hardware stack regs in debug insn INSN, using stack 1346 layout REGSTACK. If we can't find a hardware stack reg for any of 1347 the REGs in it, reset the debug insn. */ 1348 1349 static void 1350 subst_all_stack_regs_in_debug_insn (rtx insn, struct stack_def *regstack) 1351 { 1352 int ret = for_each_rtx (&INSN_VAR_LOCATION_LOC (insn), 1353 subst_stack_regs_in_debug_insn, 1354 regstack); 1355 1356 if (ret == 1) 1357 INSN_VAR_LOCATION_LOC (insn) = gen_rtx_UNKNOWN_VAR_LOC (); 1358 else 1359 gcc_checking_assert (ret == 0); 1360 } 1361 1362 /* Substitute new registers in PAT, which is part of INSN. REGSTACK 1363 is the current register layout. Return whether a control flow insn 1364 was deleted in the process. */ 1365 1366 static bool 1367 subst_stack_regs_pat (rtx insn, stack regstack, rtx pat) 1368 { 1369 rtx *dest, *src; 1370 bool control_flow_insn_deleted = false; 1371 1372 switch (GET_CODE (pat)) 1373 { 1374 case USE: 1375 /* Deaths in USE insns can happen in non optimizing compilation. 1376 Handle them by popping the dying register. */ 1377 src = get_true_reg (&XEXP (pat, 0)); 1378 if (STACK_REG_P (*src) 1379 && find_regno_note (insn, REG_DEAD, REGNO (*src))) 1380 { 1381 /* USEs are ignored for liveness information so USEs of dead 1382 register might happen. */ 1383 if (TEST_HARD_REG_BIT (regstack->reg_set, REGNO (*src))) 1384 emit_pop_insn (insn, regstack, *src, EMIT_AFTER); 1385 return control_flow_insn_deleted; 1386 } 1387 /* Uninitialized USE might happen for functions returning uninitialized 1388 value. We will properly initialize the USE on the edge to EXIT_BLOCK, 1389 so it is safe to ignore the use here. This is consistent with behavior 1390 of dataflow analyzer that ignores USE too. (This also imply that 1391 forcibly initializing the register to NaN here would lead to ICE later, 1392 since the REG_DEAD notes are not issued.) */ 1393 break; 1394 1395 case VAR_LOCATION: 1396 gcc_unreachable (); 1397 1398 case CLOBBER: 1399 { 1400 rtx note; 1401 1402 dest = get_true_reg (&XEXP (pat, 0)); 1403 if (STACK_REG_P (*dest)) 1404 { 1405 note = find_reg_note (insn, REG_DEAD, *dest); 1406 1407 if (pat != PATTERN (insn)) 1408 { 1409 /* The fix_truncdi_1 pattern wants to be able to 1410 allocate its own scratch register. It does this by 1411 clobbering an fp reg so that it is assured of an 1412 empty reg-stack register. If the register is live, 1413 kill it now. Remove the DEAD/UNUSED note so we 1414 don't try to kill it later too. 1415 1416 In reality the UNUSED note can be absent in some 1417 complicated cases when the register is reused for 1418 partially set variable. */ 1419 1420 if (note) 1421 emit_pop_insn (insn, regstack, *dest, EMIT_BEFORE); 1422 else 1423 note = find_reg_note (insn, REG_UNUSED, *dest); 1424 if (note) 1425 remove_note (insn, note); 1426 replace_reg (dest, FIRST_STACK_REG + 1); 1427 } 1428 else 1429 { 1430 /* A top-level clobber with no REG_DEAD, and no hard-regnum 1431 indicates an uninitialized value. Because reload removed 1432 all other clobbers, this must be due to a function 1433 returning without a value. Load up a NaN. */ 1434 1435 if (!note) 1436 { 1437 rtx t = *dest; 1438 if (COMPLEX_MODE_P (GET_MODE (t))) 1439 { 1440 rtx u = FP_MODE_REG (REGNO (t) + 1, SFmode); 1441 if (get_hard_regnum (regstack, u) == -1) 1442 { 1443 rtx pat2 = gen_rtx_CLOBBER (VOIDmode, u); 1444 rtx insn2 = emit_insn_before (pat2, insn); 1445 control_flow_insn_deleted 1446 |= move_nan_for_stack_reg (insn2, regstack, u); 1447 } 1448 } 1449 if (get_hard_regnum (regstack, t) == -1) 1450 control_flow_insn_deleted 1451 |= move_nan_for_stack_reg (insn, regstack, t); 1452 } 1453 } 1454 } 1455 break; 1456 } 1457 1458 case SET: 1459 { 1460 rtx *src1 = (rtx *) 0, *src2; 1461 rtx src1_note, src2_note; 1462 rtx pat_src; 1463 1464 dest = get_true_reg (&SET_DEST (pat)); 1465 src = get_true_reg (&SET_SRC (pat)); 1466 pat_src = SET_SRC (pat); 1467 1468 /* See if this is a `movM' pattern, and handle elsewhere if so. */ 1469 if (STACK_REG_P (*src) 1470 || (STACK_REG_P (*dest) 1471 && (REG_P (*src) || MEM_P (*src) 1472 || GET_CODE (*src) == CONST_DOUBLE))) 1473 { 1474 control_flow_insn_deleted |= move_for_stack_reg (insn, regstack, pat); 1475 break; 1476 } 1477 1478 switch (GET_CODE (pat_src)) 1479 { 1480 case COMPARE: 1481 compare_for_stack_reg (insn, regstack, pat_src); 1482 break; 1483 1484 case CALL: 1485 { 1486 int count; 1487 for (count = hard_regno_nregs[REGNO (*dest)][GET_MODE (*dest)]; 1488 --count >= 0;) 1489 { 1490 regstack->reg[++regstack->top] = REGNO (*dest) + count; 1491 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest) + count); 1492 } 1493 } 1494 replace_reg (dest, FIRST_STACK_REG); 1495 break; 1496 1497 case REG: 1498 /* This is a `tstM2' case. */ 1499 gcc_assert (*dest == cc0_rtx); 1500 src1 = src; 1501 1502 /* Fall through. */ 1503 1504 case FLOAT_TRUNCATE: 1505 case SQRT: 1506 case ABS: 1507 case NEG: 1508 /* These insns only operate on the top of the stack. DEST might 1509 be cc0_rtx if we're processing a tstM pattern. Also, it's 1510 possible that the tstM case results in a REG_DEAD note on the 1511 source. */ 1512 1513 if (src1 == 0) 1514 src1 = get_true_reg (&XEXP (pat_src, 0)); 1515 1516 emit_swap_insn (insn, regstack, *src1); 1517 1518 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1519 1520 if (STACK_REG_P (*dest)) 1521 replace_reg (dest, FIRST_STACK_REG); 1522 1523 if (src1_note) 1524 { 1525 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1526 regstack->top--; 1527 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1)); 1528 } 1529 1530 replace_reg (src1, FIRST_STACK_REG); 1531 break; 1532 1533 case MINUS: 1534 case DIV: 1535 /* On i386, reversed forms of subM3 and divM3 exist for 1536 MODE_FLOAT, so the same code that works for addM3 and mulM3 1537 can be used. */ 1538 case MULT: 1539 case PLUS: 1540 /* These insns can accept the top of stack as a destination 1541 from a stack reg or mem, or can use the top of stack as a 1542 source and some other stack register (possibly top of stack) 1543 as a destination. */ 1544 1545 src1 = get_true_reg (&XEXP (pat_src, 0)); 1546 src2 = get_true_reg (&XEXP (pat_src, 1)); 1547 1548 /* We will fix any death note later. */ 1549 1550 if (STACK_REG_P (*src1)) 1551 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1552 else 1553 src1_note = NULL_RTX; 1554 if (STACK_REG_P (*src2)) 1555 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); 1556 else 1557 src2_note = NULL_RTX; 1558 1559 /* If either operand is not a stack register, then the dest 1560 must be top of stack. */ 1561 1562 if (! STACK_REG_P (*src1) || ! STACK_REG_P (*src2)) 1563 emit_swap_insn (insn, regstack, *dest); 1564 else 1565 { 1566 /* Both operands are REG. If neither operand is already 1567 at the top of stack, choose to make the one that is the 1568 dest the new top of stack. */ 1569 1570 int src1_hard_regnum, src2_hard_regnum; 1571 1572 src1_hard_regnum = get_hard_regnum (regstack, *src1); 1573 src2_hard_regnum = get_hard_regnum (regstack, *src2); 1574 1575 /* If the source is not live, this is yet another case of 1576 uninitialized variables. Load up a NaN instead. */ 1577 if (src1_hard_regnum == -1) 1578 { 1579 rtx pat2 = gen_rtx_CLOBBER (VOIDmode, *src1); 1580 rtx insn2 = emit_insn_before (pat2, insn); 1581 control_flow_insn_deleted 1582 |= move_nan_for_stack_reg (insn2, regstack, *src1); 1583 } 1584 if (src2_hard_regnum == -1) 1585 { 1586 rtx pat2 = gen_rtx_CLOBBER (VOIDmode, *src2); 1587 rtx insn2 = emit_insn_before (pat2, insn); 1588 control_flow_insn_deleted 1589 |= move_nan_for_stack_reg (insn2, regstack, *src2); 1590 } 1591 1592 if (src1_hard_regnum != FIRST_STACK_REG 1593 && src2_hard_regnum != FIRST_STACK_REG) 1594 emit_swap_insn (insn, regstack, *dest); 1595 } 1596 1597 if (STACK_REG_P (*src1)) 1598 replace_reg (src1, get_hard_regnum (regstack, *src1)); 1599 if (STACK_REG_P (*src2)) 1600 replace_reg (src2, get_hard_regnum (regstack, *src2)); 1601 1602 if (src1_note) 1603 { 1604 rtx src1_reg = XEXP (src1_note, 0); 1605 1606 /* If the register that dies is at the top of stack, then 1607 the destination is somewhere else - merely substitute it. 1608 But if the reg that dies is not at top of stack, then 1609 move the top of stack to the dead reg, as though we had 1610 done the insn and then a store-with-pop. */ 1611 1612 if (REGNO (src1_reg) == regstack->reg[regstack->top]) 1613 { 1614 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1615 replace_reg (dest, get_hard_regnum (regstack, *dest)); 1616 } 1617 else 1618 { 1619 int regno = get_hard_regnum (regstack, src1_reg); 1620 1621 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1622 replace_reg (dest, regno); 1623 1624 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)] 1625 = regstack->reg[regstack->top]; 1626 } 1627 1628 CLEAR_HARD_REG_BIT (regstack->reg_set, 1629 REGNO (XEXP (src1_note, 0))); 1630 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1631 regstack->top--; 1632 } 1633 else if (src2_note) 1634 { 1635 rtx src2_reg = XEXP (src2_note, 0); 1636 if (REGNO (src2_reg) == regstack->reg[regstack->top]) 1637 { 1638 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1639 replace_reg (dest, get_hard_regnum (regstack, *dest)); 1640 } 1641 else 1642 { 1643 int regno = get_hard_regnum (regstack, src2_reg); 1644 1645 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1646 replace_reg (dest, regno); 1647 1648 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)] 1649 = regstack->reg[regstack->top]; 1650 } 1651 1652 CLEAR_HARD_REG_BIT (regstack->reg_set, 1653 REGNO (XEXP (src2_note, 0))); 1654 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG); 1655 regstack->top--; 1656 } 1657 else 1658 { 1659 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1660 replace_reg (dest, get_hard_regnum (regstack, *dest)); 1661 } 1662 1663 /* Keep operand 1 matching with destination. */ 1664 if (COMMUTATIVE_ARITH_P (pat_src) 1665 && REG_P (*src1) && REG_P (*src2) 1666 && REGNO (*src1) != REGNO (*dest)) 1667 { 1668 int tmp = REGNO (*src1); 1669 replace_reg (src1, REGNO (*src2)); 1670 replace_reg (src2, tmp); 1671 } 1672 break; 1673 1674 case UNSPEC: 1675 switch (XINT (pat_src, 1)) 1676 { 1677 case UNSPEC_STA: 1678 case UNSPEC_FIST: 1679 1680 case UNSPEC_FIST_FLOOR: 1681 case UNSPEC_FIST_CEIL: 1682 1683 /* These insns only operate on the top of the stack. */ 1684 1685 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1686 emit_swap_insn (insn, regstack, *src1); 1687 1688 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1689 1690 if (STACK_REG_P (*dest)) 1691 replace_reg (dest, FIRST_STACK_REG); 1692 1693 if (src1_note) 1694 { 1695 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1696 regstack->top--; 1697 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1)); 1698 } 1699 1700 replace_reg (src1, FIRST_STACK_REG); 1701 break; 1702 1703 case UNSPEC_FXAM: 1704 1705 /* This insn only operate on the top of the stack. */ 1706 1707 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1708 emit_swap_insn (insn, regstack, *src1); 1709 1710 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1711 1712 replace_reg (src1, FIRST_STACK_REG); 1713 1714 if (src1_note) 1715 { 1716 remove_regno_note (insn, REG_DEAD, 1717 REGNO (XEXP (src1_note, 0))); 1718 emit_pop_insn (insn, regstack, XEXP (src1_note, 0), 1719 EMIT_AFTER); 1720 } 1721 1722 break; 1723 1724 case UNSPEC_SIN: 1725 case UNSPEC_COS: 1726 case UNSPEC_FRNDINT: 1727 case UNSPEC_F2XM1: 1728 1729 case UNSPEC_FRNDINT_FLOOR: 1730 case UNSPEC_FRNDINT_CEIL: 1731 case UNSPEC_FRNDINT_TRUNC: 1732 case UNSPEC_FRNDINT_MASK_PM: 1733 1734 /* Above insns operate on the top of the stack. */ 1735 1736 case UNSPEC_SINCOS_COS: 1737 case UNSPEC_XTRACT_FRACT: 1738 1739 /* Above insns operate on the top two stack slots, 1740 first part of one input, double output insn. */ 1741 1742 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1743 1744 emit_swap_insn (insn, regstack, *src1); 1745 1746 /* Input should never die, it is replaced with output. */ 1747 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1748 gcc_assert (!src1_note); 1749 1750 if (STACK_REG_P (*dest)) 1751 replace_reg (dest, FIRST_STACK_REG); 1752 1753 replace_reg (src1, FIRST_STACK_REG); 1754 break; 1755 1756 case UNSPEC_SINCOS_SIN: 1757 case UNSPEC_XTRACT_EXP: 1758 1759 /* These insns operate on the top two stack slots, 1760 second part of one input, double output insn. */ 1761 1762 regstack->top++; 1763 /* FALLTHRU */ 1764 1765 case UNSPEC_TAN: 1766 1767 /* For UNSPEC_TAN, regstack->top is already increased 1768 by inherent load of constant 1.0. */ 1769 1770 /* Output value is generated in the second stack slot. 1771 Move current value from second slot to the top. */ 1772 regstack->reg[regstack->top] 1773 = regstack->reg[regstack->top - 1]; 1774 1775 gcc_assert (STACK_REG_P (*dest)); 1776 1777 regstack->reg[regstack->top - 1] = REGNO (*dest); 1778 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1779 replace_reg (dest, FIRST_STACK_REG + 1); 1780 1781 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1782 1783 replace_reg (src1, FIRST_STACK_REG); 1784 break; 1785 1786 case UNSPEC_FPATAN: 1787 case UNSPEC_FYL2X: 1788 case UNSPEC_FYL2XP1: 1789 /* These insns operate on the top two stack slots. */ 1790 1791 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1792 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1)); 1793 1794 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1795 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); 1796 1797 swap_to_top (insn, regstack, *src1, *src2); 1798 1799 replace_reg (src1, FIRST_STACK_REG); 1800 replace_reg (src2, FIRST_STACK_REG + 1); 1801 1802 if (src1_note) 1803 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1804 if (src2_note) 1805 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1); 1806 1807 /* Pop both input operands from the stack. */ 1808 CLEAR_HARD_REG_BIT (regstack->reg_set, 1809 regstack->reg[regstack->top]); 1810 CLEAR_HARD_REG_BIT (regstack->reg_set, 1811 regstack->reg[regstack->top - 1]); 1812 regstack->top -= 2; 1813 1814 /* Push the result back onto the stack. */ 1815 regstack->reg[++regstack->top] = REGNO (*dest); 1816 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1817 replace_reg (dest, FIRST_STACK_REG); 1818 break; 1819 1820 case UNSPEC_FSCALE_FRACT: 1821 case UNSPEC_FPREM_F: 1822 case UNSPEC_FPREM1_F: 1823 /* These insns operate on the top two stack slots, 1824 first part of double input, double output insn. */ 1825 1826 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1827 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1)); 1828 1829 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1830 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); 1831 1832 /* Inputs should never die, they are 1833 replaced with outputs. */ 1834 gcc_assert (!src1_note); 1835 gcc_assert (!src2_note); 1836 1837 swap_to_top (insn, regstack, *src1, *src2); 1838 1839 /* Push the result back onto stack. Empty stack slot 1840 will be filled in second part of insn. */ 1841 if (STACK_REG_P (*dest)) 1842 { 1843 regstack->reg[regstack->top] = REGNO (*dest); 1844 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1845 replace_reg (dest, FIRST_STACK_REG); 1846 } 1847 1848 replace_reg (src1, FIRST_STACK_REG); 1849 replace_reg (src2, FIRST_STACK_REG + 1); 1850 break; 1851 1852 case UNSPEC_FSCALE_EXP: 1853 case UNSPEC_FPREM_U: 1854 case UNSPEC_FPREM1_U: 1855 /* These insns operate on the top two stack slots, 1856 second part of double input, double output insn. */ 1857 1858 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1859 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1)); 1860 1861 /* Push the result back onto stack. Fill empty slot from 1862 first part of insn and fix top of stack pointer. */ 1863 if (STACK_REG_P (*dest)) 1864 { 1865 regstack->reg[regstack->top - 1] = REGNO (*dest); 1866 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1867 replace_reg (dest, FIRST_STACK_REG + 1); 1868 } 1869 1870 replace_reg (src1, FIRST_STACK_REG); 1871 replace_reg (src2, FIRST_STACK_REG + 1); 1872 break; 1873 1874 case UNSPEC_C2_FLAG: 1875 /* This insn operates on the top two stack slots, 1876 third part of C2 setting double input insn. */ 1877 1878 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1879 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1)); 1880 1881 replace_reg (src1, FIRST_STACK_REG); 1882 replace_reg (src2, FIRST_STACK_REG + 1); 1883 break; 1884 1885 case UNSPEC_SAHF: 1886 /* (unspec [(unspec [(compare)] UNSPEC_FNSTSW)] UNSPEC_SAHF) 1887 The combination matches the PPRO fcomi instruction. */ 1888 1889 pat_src = XVECEXP (pat_src, 0, 0); 1890 gcc_assert (GET_CODE (pat_src) == UNSPEC); 1891 gcc_assert (XINT (pat_src, 1) == UNSPEC_FNSTSW); 1892 /* Fall through. */ 1893 1894 case UNSPEC_FNSTSW: 1895 /* Combined fcomp+fnstsw generated for doing well with 1896 CSE. When optimizing this would have been broken 1897 up before now. */ 1898 1899 pat_src = XVECEXP (pat_src, 0, 0); 1900 gcc_assert (GET_CODE (pat_src) == COMPARE); 1901 1902 compare_for_stack_reg (insn, regstack, pat_src); 1903 break; 1904 1905 default: 1906 gcc_unreachable (); 1907 } 1908 break; 1909 1910 case IF_THEN_ELSE: 1911 /* This insn requires the top of stack to be the destination. */ 1912 1913 src1 = get_true_reg (&XEXP (pat_src, 1)); 1914 src2 = get_true_reg (&XEXP (pat_src, 2)); 1915 1916 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1917 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); 1918 1919 /* If the comparison operator is an FP comparison operator, 1920 it is handled correctly by compare_for_stack_reg () who 1921 will move the destination to the top of stack. But if the 1922 comparison operator is not an FP comparison operator, we 1923 have to handle it here. */ 1924 if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG 1925 && REGNO (*dest) != regstack->reg[regstack->top]) 1926 { 1927 /* In case one of operands is the top of stack and the operands 1928 dies, it is safe to make it the destination operand by 1929 reversing the direction of cmove and avoid fxch. */ 1930 if ((REGNO (*src1) == regstack->reg[regstack->top] 1931 && src1_note) 1932 || (REGNO (*src2) == regstack->reg[regstack->top] 1933 && src2_note)) 1934 { 1935 int idx1 = (get_hard_regnum (regstack, *src1) 1936 - FIRST_STACK_REG); 1937 int idx2 = (get_hard_regnum (regstack, *src2) 1938 - FIRST_STACK_REG); 1939 1940 /* Make reg-stack believe that the operands are already 1941 swapped on the stack */ 1942 regstack->reg[regstack->top - idx1] = REGNO (*src2); 1943 regstack->reg[regstack->top - idx2] = REGNO (*src1); 1944 1945 /* Reverse condition to compensate the operand swap. 1946 i386 do have comparison always reversible. */ 1947 PUT_CODE (XEXP (pat_src, 0), 1948 reversed_comparison_code (XEXP (pat_src, 0), insn)); 1949 } 1950 else 1951 emit_swap_insn (insn, regstack, *dest); 1952 } 1953 1954 { 1955 rtx src_note [3]; 1956 int i; 1957 1958 src_note[0] = 0; 1959 src_note[1] = src1_note; 1960 src_note[2] = src2_note; 1961 1962 if (STACK_REG_P (*src1)) 1963 replace_reg (src1, get_hard_regnum (regstack, *src1)); 1964 if (STACK_REG_P (*src2)) 1965 replace_reg (src2, get_hard_regnum (regstack, *src2)); 1966 1967 for (i = 1; i <= 2; i++) 1968 if (src_note [i]) 1969 { 1970 int regno = REGNO (XEXP (src_note[i], 0)); 1971 1972 /* If the register that dies is not at the top of 1973 stack, then move the top of stack to the dead reg. 1974 Top of stack should never die, as it is the 1975 destination. */ 1976 gcc_assert (regno != regstack->reg[regstack->top]); 1977 remove_regno_note (insn, REG_DEAD, regno); 1978 emit_pop_insn (insn, regstack, XEXP (src_note[i], 0), 1979 EMIT_AFTER); 1980 } 1981 } 1982 1983 /* Make dest the top of stack. Add dest to regstack if 1984 not present. */ 1985 if (get_hard_regnum (regstack, *dest) < FIRST_STACK_REG) 1986 regstack->reg[++regstack->top] = REGNO (*dest); 1987 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1988 replace_reg (dest, FIRST_STACK_REG); 1989 break; 1990 1991 default: 1992 gcc_unreachable (); 1993 } 1994 break; 1995 } 1996 1997 default: 1998 break; 1999 } 2000 2001 return control_flow_insn_deleted; 2002 } 2003 2004 /* Substitute hard regnums for any stack regs in INSN, which has 2005 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info 2006 before the insn, and is updated with changes made here. 2007 2008 There are several requirements and assumptions about the use of 2009 stack-like regs in asm statements. These rules are enforced by 2010 record_asm_stack_regs; see comments there for details. Any 2011 asm_operands left in the RTL at this point may be assume to meet the 2012 requirements, since record_asm_stack_regs removes any problem asm. */ 2013 2014 static void 2015 subst_asm_stack_regs (rtx insn, stack regstack) 2016 { 2017 rtx body = PATTERN (insn); 2018 int alt; 2019 2020 rtx *note_reg; /* Array of note contents */ 2021 rtx **note_loc; /* Address of REG field of each note */ 2022 enum reg_note *note_kind; /* The type of each note */ 2023 2024 rtx *clobber_reg = 0; 2025 rtx **clobber_loc = 0; 2026 2027 struct stack_def temp_stack; 2028 int n_notes; 2029 int n_clobbers; 2030 rtx note; 2031 int i; 2032 int n_inputs, n_outputs; 2033 2034 if (! check_asm_stack_operands (insn)) 2035 return; 2036 2037 /* Find out what the constraints required. If no constraint 2038 alternative matches, that is a compiler bug: we should have caught 2039 such an insn in check_asm_stack_operands. */ 2040 extract_insn (insn); 2041 constrain_operands (1); 2042 alt = which_alternative; 2043 2044 preprocess_constraints (); 2045 2046 get_asm_operands_in_out (body, &n_outputs, &n_inputs); 2047 2048 gcc_assert (alt >= 0); 2049 2050 /* Strip SUBREGs here to make the following code simpler. */ 2051 for (i = 0; i < recog_data.n_operands; i++) 2052 if (GET_CODE (recog_data.operand[i]) == SUBREG 2053 && REG_P (SUBREG_REG (recog_data.operand[i]))) 2054 { 2055 recog_data.operand_loc[i] = & SUBREG_REG (recog_data.operand[i]); 2056 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]); 2057 } 2058 2059 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */ 2060 2061 for (i = 0, note = REG_NOTES (insn); note; note = XEXP (note, 1)) 2062 i++; 2063 2064 note_reg = XALLOCAVEC (rtx, i); 2065 note_loc = XALLOCAVEC (rtx *, i); 2066 note_kind = XALLOCAVEC (enum reg_note, i); 2067 2068 n_notes = 0; 2069 for (note = REG_NOTES (insn); note; note = XEXP (note, 1)) 2070 { 2071 rtx reg = XEXP (note, 0); 2072 rtx *loc = & XEXP (note, 0); 2073 2074 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg))) 2075 { 2076 loc = & SUBREG_REG (reg); 2077 reg = SUBREG_REG (reg); 2078 } 2079 2080 if (STACK_REG_P (reg) 2081 && (REG_NOTE_KIND (note) == REG_DEAD 2082 || REG_NOTE_KIND (note) == REG_UNUSED)) 2083 { 2084 note_reg[n_notes] = reg; 2085 note_loc[n_notes] = loc; 2086 note_kind[n_notes] = REG_NOTE_KIND (note); 2087 n_notes++; 2088 } 2089 } 2090 2091 /* Set up CLOBBER_REG and CLOBBER_LOC. */ 2092 2093 n_clobbers = 0; 2094 2095 if (GET_CODE (body) == PARALLEL) 2096 { 2097 clobber_reg = XALLOCAVEC (rtx, XVECLEN (body, 0)); 2098 clobber_loc = XALLOCAVEC (rtx *, XVECLEN (body, 0)); 2099 2100 for (i = 0; i < XVECLEN (body, 0); i++) 2101 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER) 2102 { 2103 rtx clobber = XVECEXP (body, 0, i); 2104 rtx reg = XEXP (clobber, 0); 2105 rtx *loc = & XEXP (clobber, 0); 2106 2107 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg))) 2108 { 2109 loc = & SUBREG_REG (reg); 2110 reg = SUBREG_REG (reg); 2111 } 2112 2113 if (STACK_REG_P (reg)) 2114 { 2115 clobber_reg[n_clobbers] = reg; 2116 clobber_loc[n_clobbers] = loc; 2117 n_clobbers++; 2118 } 2119 } 2120 } 2121 2122 temp_stack = *regstack; 2123 2124 /* Put the input regs into the desired place in TEMP_STACK. */ 2125 2126 for (i = n_outputs; i < n_outputs + n_inputs; i++) 2127 if (STACK_REG_P (recog_data.operand[i]) 2128 && reg_class_subset_p (recog_op_alt[i][alt].cl, 2129 FLOAT_REGS) 2130 && recog_op_alt[i][alt].cl != FLOAT_REGS) 2131 { 2132 /* If an operand needs to be in a particular reg in 2133 FLOAT_REGS, the constraint was either 't' or 'u'. Since 2134 these constraints are for single register classes, and 2135 reload guaranteed that operand[i] is already in that class, 2136 we can just use REGNO (recog_data.operand[i]) to know which 2137 actual reg this operand needs to be in. */ 2138 2139 int regno = get_hard_regnum (&temp_stack, recog_data.operand[i]); 2140 2141 gcc_assert (regno >= 0); 2142 2143 if ((unsigned int) regno != REGNO (recog_data.operand[i])) 2144 { 2145 /* recog_data.operand[i] is not in the right place. Find 2146 it and swap it with whatever is already in I's place. 2147 K is where recog_data.operand[i] is now. J is where it 2148 should be. */ 2149 int j, k, temp; 2150 2151 k = temp_stack.top - (regno - FIRST_STACK_REG); 2152 j = (temp_stack.top 2153 - (REGNO (recog_data.operand[i]) - FIRST_STACK_REG)); 2154 2155 temp = temp_stack.reg[k]; 2156 temp_stack.reg[k] = temp_stack.reg[j]; 2157 temp_stack.reg[j] = temp; 2158 } 2159 } 2160 2161 /* Emit insns before INSN to make sure the reg-stack is in the right 2162 order. */ 2163 2164 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE); 2165 2166 /* Make the needed input register substitutions. Do death notes and 2167 clobbers too, because these are for inputs, not outputs. */ 2168 2169 for (i = n_outputs; i < n_outputs + n_inputs; i++) 2170 if (STACK_REG_P (recog_data.operand[i])) 2171 { 2172 int regnum = get_hard_regnum (regstack, recog_data.operand[i]); 2173 2174 gcc_assert (regnum >= 0); 2175 2176 replace_reg (recog_data.operand_loc[i], regnum); 2177 } 2178 2179 for (i = 0; i < n_notes; i++) 2180 if (note_kind[i] == REG_DEAD) 2181 { 2182 int regnum = get_hard_regnum (regstack, note_reg[i]); 2183 2184 gcc_assert (regnum >= 0); 2185 2186 replace_reg (note_loc[i], regnum); 2187 } 2188 2189 for (i = 0; i < n_clobbers; i++) 2190 { 2191 /* It's OK for a CLOBBER to reference a reg that is not live. 2192 Don't try to replace it in that case. */ 2193 int regnum = get_hard_regnum (regstack, clobber_reg[i]); 2194 2195 if (regnum >= 0) 2196 { 2197 /* Sigh - clobbers always have QImode. But replace_reg knows 2198 that these regs can't be MODE_INT and will assert. Just put 2199 the right reg there without calling replace_reg. */ 2200 2201 *clobber_loc[i] = FP_MODE_REG (regnum, DFmode); 2202 } 2203 } 2204 2205 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */ 2206 2207 for (i = n_outputs; i < n_outputs + n_inputs; i++) 2208 if (STACK_REG_P (recog_data.operand[i])) 2209 { 2210 /* An input reg is implicitly popped if it is tied to an 2211 output, or if there is a CLOBBER for it. */ 2212 int j; 2213 2214 for (j = 0; j < n_clobbers; j++) 2215 if (operands_match_p (clobber_reg[j], recog_data.operand[i])) 2216 break; 2217 2218 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0) 2219 { 2220 /* recog_data.operand[i] might not be at the top of stack. 2221 But that's OK, because all we need to do is pop the 2222 right number of regs off of the top of the reg-stack. 2223 record_asm_stack_regs guaranteed that all implicitly 2224 popped regs were grouped at the top of the reg-stack. */ 2225 2226 CLEAR_HARD_REG_BIT (regstack->reg_set, 2227 regstack->reg[regstack->top]); 2228 regstack->top--; 2229 } 2230 } 2231 2232 /* Now add to REGSTACK any outputs that the asm implicitly pushed. 2233 Note that there isn't any need to substitute register numbers. 2234 ??? Explain why this is true. */ 2235 2236 for (i = LAST_STACK_REG; i >= FIRST_STACK_REG; i--) 2237 { 2238 /* See if there is an output for this hard reg. */ 2239 int j; 2240 2241 for (j = 0; j < n_outputs; j++) 2242 if (STACK_REG_P (recog_data.operand[j]) 2243 && REGNO (recog_data.operand[j]) == (unsigned) i) 2244 { 2245 regstack->reg[++regstack->top] = i; 2246 SET_HARD_REG_BIT (regstack->reg_set, i); 2247 break; 2248 } 2249 } 2250 2251 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD 2252 input that the asm didn't implicitly pop. If the asm didn't 2253 implicitly pop an input reg, that reg will still be live. 2254 2255 Note that we can't use find_regno_note here: the register numbers 2256 in the death notes have already been substituted. */ 2257 2258 for (i = 0; i < n_outputs; i++) 2259 if (STACK_REG_P (recog_data.operand[i])) 2260 { 2261 int j; 2262 2263 for (j = 0; j < n_notes; j++) 2264 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j]) 2265 && note_kind[j] == REG_UNUSED) 2266 { 2267 insn = emit_pop_insn (insn, regstack, recog_data.operand[i], 2268 EMIT_AFTER); 2269 break; 2270 } 2271 } 2272 2273 for (i = n_outputs; i < n_outputs + n_inputs; i++) 2274 if (STACK_REG_P (recog_data.operand[i])) 2275 { 2276 int j; 2277 2278 for (j = 0; j < n_notes; j++) 2279 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j]) 2280 && note_kind[j] == REG_DEAD 2281 && TEST_HARD_REG_BIT (regstack->reg_set, 2282 REGNO (recog_data.operand[i]))) 2283 { 2284 insn = emit_pop_insn (insn, regstack, recog_data.operand[i], 2285 EMIT_AFTER); 2286 break; 2287 } 2288 } 2289 } 2290 2291 /* Substitute stack hard reg numbers for stack virtual registers in 2292 INSN. Non-stack register numbers are not changed. REGSTACK is the 2293 current stack content. Insns may be emitted as needed to arrange the 2294 stack for the 387 based on the contents of the insn. Return whether 2295 a control flow insn was deleted in the process. */ 2296 2297 static bool 2298 subst_stack_regs (rtx insn, stack regstack) 2299 { 2300 rtx *note_link, note; 2301 bool control_flow_insn_deleted = false; 2302 int i; 2303 2304 if (CALL_P (insn)) 2305 { 2306 int top = regstack->top; 2307 2308 /* If there are any floating point parameters to be passed in 2309 registers for this call, make sure they are in the right 2310 order. */ 2311 2312 if (top >= 0) 2313 { 2314 straighten_stack (insn, regstack); 2315 2316 /* Now mark the arguments as dead after the call. */ 2317 2318 while (regstack->top >= 0) 2319 { 2320 CLEAR_HARD_REG_BIT (regstack->reg_set, FIRST_STACK_REG + regstack->top); 2321 regstack->top--; 2322 } 2323 } 2324 } 2325 2326 /* Do the actual substitution if any stack regs are mentioned. 2327 Since we only record whether entire insn mentions stack regs, and 2328 subst_stack_regs_pat only works for patterns that contain stack regs, 2329 we must check each pattern in a parallel here. A call_value_pop could 2330 fail otherwise. */ 2331 2332 if (stack_regs_mentioned (insn)) 2333 { 2334 int n_operands = asm_noperands (PATTERN (insn)); 2335 if (n_operands >= 0) 2336 { 2337 /* This insn is an `asm' with operands. Decode the operands, 2338 decide how many are inputs, and do register substitution. 2339 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */ 2340 2341 subst_asm_stack_regs (insn, regstack); 2342 return control_flow_insn_deleted; 2343 } 2344 2345 if (GET_CODE (PATTERN (insn)) == PARALLEL) 2346 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++) 2347 { 2348 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn), 0, i))) 2349 { 2350 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER) 2351 XVECEXP (PATTERN (insn), 0, i) 2352 = shallow_copy_rtx (XVECEXP (PATTERN (insn), 0, i)); 2353 control_flow_insn_deleted 2354 |= subst_stack_regs_pat (insn, regstack, 2355 XVECEXP (PATTERN (insn), 0, i)); 2356 } 2357 } 2358 else 2359 control_flow_insn_deleted 2360 |= subst_stack_regs_pat (insn, regstack, PATTERN (insn)); 2361 } 2362 2363 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any 2364 REG_UNUSED will already have been dealt with, so just return. */ 2365 2366 if (NOTE_P (insn) || INSN_DELETED_P (insn)) 2367 return control_flow_insn_deleted; 2368 2369 /* If this a noreturn call, we can't insert pop insns after it. 2370 Instead, reset the stack state to empty. */ 2371 if (CALL_P (insn) 2372 && find_reg_note (insn, REG_NORETURN, NULL)) 2373 { 2374 regstack->top = -1; 2375 CLEAR_HARD_REG_SET (regstack->reg_set); 2376 return control_flow_insn_deleted; 2377 } 2378 2379 /* If there is a REG_UNUSED note on a stack register on this insn, 2380 the indicated reg must be popped. The REG_UNUSED note is removed, 2381 since the form of the newly emitted pop insn references the reg, 2382 making it no longer `unset'. */ 2383 2384 note_link = ®_NOTES (insn); 2385 for (note = *note_link; note; note = XEXP (note, 1)) 2386 if (REG_NOTE_KIND (note) == REG_UNUSED && STACK_REG_P (XEXP (note, 0))) 2387 { 2388 *note_link = XEXP (note, 1); 2389 insn = emit_pop_insn (insn, regstack, XEXP (note, 0), EMIT_AFTER); 2390 } 2391 else 2392 note_link = &XEXP (note, 1); 2393 2394 return control_flow_insn_deleted; 2395 } 2396 2397 /* Change the organization of the stack so that it fits a new basic 2398 block. Some registers might have to be popped, but there can never be 2399 a register live in the new block that is not now live. 2400 2401 Insert any needed insns before or after INSN, as indicated by 2402 WHERE. OLD is the original stack layout, and NEW is the desired 2403 form. OLD is updated to reflect the code emitted, i.e., it will be 2404 the same as NEW upon return. 2405 2406 This function will not preserve block_end[]. But that information 2407 is no longer needed once this has executed. */ 2408 2409 static void 2410 change_stack (rtx insn, stack old, stack new_stack, enum emit_where where) 2411 { 2412 int reg; 2413 int update_end = 0; 2414 int i; 2415 2416 /* Stack adjustments for the first insn in a block update the 2417 current_block's stack_in instead of inserting insns directly. 2418 compensate_edges will add the necessary code later. */ 2419 if (current_block 2420 && starting_stack_p 2421 && where == EMIT_BEFORE) 2422 { 2423 BLOCK_INFO (current_block)->stack_in = *new_stack; 2424 starting_stack_p = false; 2425 *old = *new_stack; 2426 return; 2427 } 2428 2429 /* We will be inserting new insns "backwards". If we are to insert 2430 after INSN, find the next insn, and insert before it. */ 2431 2432 if (where == EMIT_AFTER) 2433 { 2434 if (current_block && BB_END (current_block) == insn) 2435 update_end = 1; 2436 insn = NEXT_INSN (insn); 2437 } 2438 2439 /* Initialize partially dead variables. */ 2440 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++) 2441 if (TEST_HARD_REG_BIT (new_stack->reg_set, i) 2442 && !TEST_HARD_REG_BIT (old->reg_set, i)) 2443 { 2444 old->reg[++old->top] = i; 2445 SET_HARD_REG_BIT (old->reg_set, i); 2446 emit_insn_before (gen_rtx_SET (VOIDmode, 2447 FP_MODE_REG (i, SFmode), not_a_num), insn); 2448 } 2449 2450 /* Pop any registers that are not needed in the new block. */ 2451 2452 /* If the destination block's stack already has a specified layout 2453 and contains two or more registers, use a more intelligent algorithm 2454 to pop registers that minimizes the number number of fxchs below. */ 2455 if (new_stack->top > 0) 2456 { 2457 bool slots[REG_STACK_SIZE]; 2458 int pops[REG_STACK_SIZE]; 2459 int next, dest, topsrc; 2460 2461 /* First pass to determine the free slots. */ 2462 for (reg = 0; reg <= new_stack->top; reg++) 2463 slots[reg] = TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[reg]); 2464 2465 /* Second pass to allocate preferred slots. */ 2466 topsrc = -1; 2467 for (reg = old->top; reg > new_stack->top; reg--) 2468 if (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[reg])) 2469 { 2470 dest = -1; 2471 for (next = 0; next <= new_stack->top; next++) 2472 if (!slots[next] && new_stack->reg[next] == old->reg[reg]) 2473 { 2474 /* If this is a preference for the new top of stack, record 2475 the fact by remembering it's old->reg in topsrc. */ 2476 if (next == new_stack->top) 2477 topsrc = reg; 2478 slots[next] = true; 2479 dest = next; 2480 break; 2481 } 2482 pops[reg] = dest; 2483 } 2484 else 2485 pops[reg] = reg; 2486 2487 /* Intentionally, avoid placing the top of stack in it's correct 2488 location, if we still need to permute the stack below and we 2489 can usefully place it somewhere else. This is the case if any 2490 slot is still unallocated, in which case we should place the 2491 top of stack there. */ 2492 if (topsrc != -1) 2493 for (reg = 0; reg < new_stack->top; reg++) 2494 if (!slots[reg]) 2495 { 2496 pops[topsrc] = reg; 2497 slots[new_stack->top] = false; 2498 slots[reg] = true; 2499 break; 2500 } 2501 2502 /* Third pass allocates remaining slots and emits pop insns. */ 2503 next = new_stack->top; 2504 for (reg = old->top; reg > new_stack->top; reg--) 2505 { 2506 dest = pops[reg]; 2507 if (dest == -1) 2508 { 2509 /* Find next free slot. */ 2510 while (slots[next]) 2511 next--; 2512 dest = next--; 2513 } 2514 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[dest], DFmode), 2515 EMIT_BEFORE); 2516 } 2517 } 2518 else 2519 { 2520 /* The following loop attempts to maximize the number of times we 2521 pop the top of the stack, as this permits the use of the faster 2522 ffreep instruction on platforms that support it. */ 2523 int live, next; 2524 2525 live = 0; 2526 for (reg = 0; reg <= old->top; reg++) 2527 if (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[reg])) 2528 live++; 2529 2530 next = live; 2531 while (old->top >= live) 2532 if (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[old->top])) 2533 { 2534 while (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[next])) 2535 next--; 2536 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[next], DFmode), 2537 EMIT_BEFORE); 2538 } 2539 else 2540 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[old->top], DFmode), 2541 EMIT_BEFORE); 2542 } 2543 2544 if (new_stack->top == -2) 2545 { 2546 /* If the new block has never been processed, then it can inherit 2547 the old stack order. */ 2548 2549 new_stack->top = old->top; 2550 memcpy (new_stack->reg, old->reg, sizeof (new_stack->reg)); 2551 } 2552 else 2553 { 2554 /* This block has been entered before, and we must match the 2555 previously selected stack order. */ 2556 2557 /* By now, the only difference should be the order of the stack, 2558 not their depth or liveliness. */ 2559 2560 gcc_assert (hard_reg_set_equal_p (old->reg_set, new_stack->reg_set)); 2561 gcc_assert (old->top == new_stack->top); 2562 2563 /* If the stack is not empty (new_stack->top != -1), loop here emitting 2564 swaps until the stack is correct. 2565 2566 The worst case number of swaps emitted is N + 2, where N is the 2567 depth of the stack. In some cases, the reg at the top of 2568 stack may be correct, but swapped anyway in order to fix 2569 other regs. But since we never swap any other reg away from 2570 its correct slot, this algorithm will converge. */ 2571 2572 if (new_stack->top != -1) 2573 do 2574 { 2575 /* Swap the reg at top of stack into the position it is 2576 supposed to be in, until the correct top of stack appears. */ 2577 2578 while (old->reg[old->top] != new_stack->reg[new_stack->top]) 2579 { 2580 for (reg = new_stack->top; reg >= 0; reg--) 2581 if (new_stack->reg[reg] == old->reg[old->top]) 2582 break; 2583 2584 gcc_assert (reg != -1); 2585 2586 emit_swap_insn (insn, old, 2587 FP_MODE_REG (old->reg[reg], DFmode)); 2588 } 2589 2590 /* See if any regs remain incorrect. If so, bring an 2591 incorrect reg to the top of stack, and let the while loop 2592 above fix it. */ 2593 2594 for (reg = new_stack->top; reg >= 0; reg--) 2595 if (new_stack->reg[reg] != old->reg[reg]) 2596 { 2597 emit_swap_insn (insn, old, 2598 FP_MODE_REG (old->reg[reg], DFmode)); 2599 break; 2600 } 2601 } while (reg >= 0); 2602 2603 /* At this point there must be no differences. */ 2604 2605 for (reg = old->top; reg >= 0; reg--) 2606 gcc_assert (old->reg[reg] == new_stack->reg[reg]); 2607 } 2608 2609 if (update_end) 2610 BB_END (current_block) = PREV_INSN (insn); 2611 } 2612 2613 /* Print stack configuration. */ 2614 2615 static void 2616 print_stack (FILE *file, stack s) 2617 { 2618 if (! file) 2619 return; 2620 2621 if (s->top == -2) 2622 fprintf (file, "uninitialized\n"); 2623 else if (s->top == -1) 2624 fprintf (file, "empty\n"); 2625 else 2626 { 2627 int i; 2628 fputs ("[ ", file); 2629 for (i = 0; i <= s->top; ++i) 2630 fprintf (file, "%d ", s->reg[i]); 2631 fputs ("]\n", file); 2632 } 2633 } 2634 2635 /* This function was doing life analysis. We now let the regular live 2636 code do it's job, so we only need to check some extra invariants 2637 that reg-stack expects. Primary among these being that all registers 2638 are initialized before use. 2639 2640 The function returns true when code was emitted to CFG edges and 2641 commit_edge_insertions needs to be called. */ 2642 2643 static int 2644 convert_regs_entry (void) 2645 { 2646 int inserted = 0; 2647 edge e; 2648 edge_iterator ei; 2649 2650 /* Load something into each stack register live at function entry. 2651 Such live registers can be caused by uninitialized variables or 2652 functions not returning values on all paths. In order to keep 2653 the push/pop code happy, and to not scrog the register stack, we 2654 must put something in these registers. Use a QNaN. 2655 2656 Note that we are inserting converted code here. This code is 2657 never seen by the convert_regs pass. */ 2658 2659 FOR_EACH_EDGE (e, ei, ENTRY_BLOCK_PTR->succs) 2660 { 2661 basic_block block = e->dest; 2662 block_info bi = BLOCK_INFO (block); 2663 int reg, top = -1; 2664 2665 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg) 2666 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg)) 2667 { 2668 rtx init; 2669 2670 bi->stack_in.reg[++top] = reg; 2671 2672 init = gen_rtx_SET (VOIDmode, 2673 FP_MODE_REG (FIRST_STACK_REG, SFmode), 2674 not_a_num); 2675 insert_insn_on_edge (init, e); 2676 inserted = 1; 2677 } 2678 2679 bi->stack_in.top = top; 2680 } 2681 2682 return inserted; 2683 } 2684 2685 /* Construct the desired stack for function exit. This will either 2686 be `empty', or the function return value at top-of-stack. */ 2687 2688 static void 2689 convert_regs_exit (void) 2690 { 2691 int value_reg_low, value_reg_high; 2692 stack output_stack; 2693 rtx retvalue; 2694 2695 retvalue = stack_result (current_function_decl); 2696 value_reg_low = value_reg_high = -1; 2697 if (retvalue) 2698 { 2699 value_reg_low = REGNO (retvalue); 2700 value_reg_high = END_HARD_REGNO (retvalue) - 1; 2701 } 2702 2703 output_stack = &BLOCK_INFO (EXIT_BLOCK_PTR)->stack_in; 2704 if (value_reg_low == -1) 2705 output_stack->top = -1; 2706 else 2707 { 2708 int reg; 2709 2710 output_stack->top = value_reg_high - value_reg_low; 2711 for (reg = value_reg_low; reg <= value_reg_high; ++reg) 2712 { 2713 output_stack->reg[value_reg_high - reg] = reg; 2714 SET_HARD_REG_BIT (output_stack->reg_set, reg); 2715 } 2716 } 2717 } 2718 2719 /* Copy the stack info from the end of edge E's source block to the 2720 start of E's destination block. */ 2721 2722 static void 2723 propagate_stack (edge e) 2724 { 2725 stack src_stack = &BLOCK_INFO (e->src)->stack_out; 2726 stack dest_stack = &BLOCK_INFO (e->dest)->stack_in; 2727 int reg; 2728 2729 /* Preserve the order of the original stack, but check whether 2730 any pops are needed. */ 2731 dest_stack->top = -1; 2732 for (reg = 0; reg <= src_stack->top; ++reg) 2733 if (TEST_HARD_REG_BIT (dest_stack->reg_set, src_stack->reg[reg])) 2734 dest_stack->reg[++dest_stack->top] = src_stack->reg[reg]; 2735 2736 /* Push in any partially dead values. */ 2737 for (reg = FIRST_STACK_REG; reg < LAST_STACK_REG + 1; reg++) 2738 if (TEST_HARD_REG_BIT (dest_stack->reg_set, reg) 2739 && !TEST_HARD_REG_BIT (src_stack->reg_set, reg)) 2740 dest_stack->reg[++dest_stack->top] = reg; 2741 } 2742 2743 2744 /* Adjust the stack of edge E's source block on exit to match the stack 2745 of it's target block upon input. The stack layouts of both blocks 2746 should have been defined by now. */ 2747 2748 static bool 2749 compensate_edge (edge e) 2750 { 2751 basic_block source = e->src, target = e->dest; 2752 stack target_stack = &BLOCK_INFO (target)->stack_in; 2753 stack source_stack = &BLOCK_INFO (source)->stack_out; 2754 struct stack_def regstack; 2755 int reg; 2756 2757 if (dump_file) 2758 fprintf (dump_file, "Edge %d->%d: ", source->index, target->index); 2759 2760 gcc_assert (target_stack->top != -2); 2761 2762 /* Check whether stacks are identical. */ 2763 if (target_stack->top == source_stack->top) 2764 { 2765 for (reg = target_stack->top; reg >= 0; --reg) 2766 if (target_stack->reg[reg] != source_stack->reg[reg]) 2767 break; 2768 2769 if (reg == -1) 2770 { 2771 if (dump_file) 2772 fprintf (dump_file, "no changes needed\n"); 2773 return false; 2774 } 2775 } 2776 2777 if (dump_file) 2778 { 2779 fprintf (dump_file, "correcting stack to "); 2780 print_stack (dump_file, target_stack); 2781 } 2782 2783 /* Abnormal calls may appear to have values live in st(0), but the 2784 abnormal return path will not have actually loaded the values. */ 2785 if (e->flags & EDGE_ABNORMAL_CALL) 2786 { 2787 /* Assert that the lifetimes are as we expect -- one value 2788 live at st(0) on the end of the source block, and no 2789 values live at the beginning of the destination block. 2790 For complex return values, we may have st(1) live as well. */ 2791 gcc_assert (source_stack->top == 0 || source_stack->top == 1); 2792 gcc_assert (target_stack->top == -1); 2793 return false; 2794 } 2795 2796 /* Handle non-call EH edges specially. The normal return path have 2797 values in registers. These will be popped en masse by the unwind 2798 library. */ 2799 if (e->flags & EDGE_EH) 2800 { 2801 gcc_assert (target_stack->top == -1); 2802 return false; 2803 } 2804 2805 /* We don't support abnormal edges. Global takes care to 2806 avoid any live register across them, so we should never 2807 have to insert instructions on such edges. */ 2808 gcc_assert (! (e->flags & EDGE_ABNORMAL)); 2809 2810 /* Make a copy of source_stack as change_stack is destructive. */ 2811 regstack = *source_stack; 2812 2813 /* It is better to output directly to the end of the block 2814 instead of to the edge, because emit_swap can do minimal 2815 insn scheduling. We can do this when there is only one 2816 edge out, and it is not abnormal. */ 2817 if (EDGE_COUNT (source->succs) == 1) 2818 { 2819 current_block = source; 2820 change_stack (BB_END (source), ®stack, target_stack, 2821 (JUMP_P (BB_END (source)) ? EMIT_BEFORE : EMIT_AFTER)); 2822 } 2823 else 2824 { 2825 rtx seq, after; 2826 2827 current_block = NULL; 2828 start_sequence (); 2829 2830 /* ??? change_stack needs some point to emit insns after. */ 2831 after = emit_note (NOTE_INSN_DELETED); 2832 2833 change_stack (after, ®stack, target_stack, EMIT_BEFORE); 2834 2835 seq = get_insns (); 2836 end_sequence (); 2837 2838 insert_insn_on_edge (seq, e); 2839 return true; 2840 } 2841 return false; 2842 } 2843 2844 /* Traverse all non-entry edges in the CFG, and emit the necessary 2845 edge compensation code to change the stack from stack_out of the 2846 source block to the stack_in of the destination block. */ 2847 2848 static bool 2849 compensate_edges (void) 2850 { 2851 bool inserted = false; 2852 basic_block bb; 2853 2854 starting_stack_p = false; 2855 2856 FOR_EACH_BB (bb) 2857 if (bb != ENTRY_BLOCK_PTR) 2858 { 2859 edge e; 2860 edge_iterator ei; 2861 2862 FOR_EACH_EDGE (e, ei, bb->succs) 2863 inserted |= compensate_edge (e); 2864 } 2865 return inserted; 2866 } 2867 2868 /* Select the better of two edges E1 and E2 to use to determine the 2869 stack layout for their shared destination basic block. This is 2870 typically the more frequently executed. The edge E1 may be NULL 2871 (in which case E2 is returned), but E2 is always non-NULL. */ 2872 2873 static edge 2874 better_edge (edge e1, edge e2) 2875 { 2876 if (!e1) 2877 return e2; 2878 2879 if (EDGE_FREQUENCY (e1) > EDGE_FREQUENCY (e2)) 2880 return e1; 2881 if (EDGE_FREQUENCY (e1) < EDGE_FREQUENCY (e2)) 2882 return e2; 2883 2884 if (e1->count > e2->count) 2885 return e1; 2886 if (e1->count < e2->count) 2887 return e2; 2888 2889 /* Prefer critical edges to minimize inserting compensation code on 2890 critical edges. */ 2891 2892 if (EDGE_CRITICAL_P (e1) != EDGE_CRITICAL_P (e2)) 2893 return EDGE_CRITICAL_P (e1) ? e1 : e2; 2894 2895 /* Avoid non-deterministic behavior. */ 2896 return (e1->src->index < e2->src->index) ? e1 : e2; 2897 } 2898 2899 /* Convert stack register references in one block. Return true if the CFG 2900 has been modified in the process. */ 2901 2902 static bool 2903 convert_regs_1 (basic_block block) 2904 { 2905 struct stack_def regstack; 2906 block_info bi = BLOCK_INFO (block); 2907 int reg; 2908 rtx insn, next; 2909 bool control_flow_insn_deleted = false; 2910 bool cfg_altered = false; 2911 int debug_insns_with_starting_stack = 0; 2912 2913 any_malformed_asm = false; 2914 2915 /* Choose an initial stack layout, if one hasn't already been chosen. */ 2916 if (bi->stack_in.top == -2) 2917 { 2918 edge e, beste = NULL; 2919 edge_iterator ei; 2920 2921 /* Select the best incoming edge (typically the most frequent) to 2922 use as a template for this basic block. */ 2923 FOR_EACH_EDGE (e, ei, block->preds) 2924 if (BLOCK_INFO (e->src)->done) 2925 beste = better_edge (beste, e); 2926 2927 if (beste) 2928 propagate_stack (beste); 2929 else 2930 { 2931 /* No predecessors. Create an arbitrary input stack. */ 2932 bi->stack_in.top = -1; 2933 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg) 2934 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg)) 2935 bi->stack_in.reg[++bi->stack_in.top] = reg; 2936 } 2937 } 2938 2939 if (dump_file) 2940 { 2941 fprintf (dump_file, "\nBasic block %d\nInput stack: ", block->index); 2942 print_stack (dump_file, &bi->stack_in); 2943 } 2944 2945 /* Process all insns in this block. Keep track of NEXT so that we 2946 don't process insns emitted while substituting in INSN. */ 2947 current_block = block; 2948 next = BB_HEAD (block); 2949 regstack = bi->stack_in; 2950 starting_stack_p = true; 2951 2952 do 2953 { 2954 insn = next; 2955 next = NEXT_INSN (insn); 2956 2957 /* Ensure we have not missed a block boundary. */ 2958 gcc_assert (next); 2959 if (insn == BB_END (block)) 2960 next = NULL; 2961 2962 /* Don't bother processing unless there is a stack reg 2963 mentioned or if it's a CALL_INSN. */ 2964 if (DEBUG_INSN_P (insn)) 2965 { 2966 if (starting_stack_p) 2967 debug_insns_with_starting_stack++; 2968 else 2969 { 2970 subst_all_stack_regs_in_debug_insn (insn, ®stack); 2971 2972 /* Nothing must ever die at a debug insn. If something 2973 is referenced in it that becomes dead, it should have 2974 died before and the reference in the debug insn 2975 should have been removed so as to avoid changing code 2976 generation. */ 2977 gcc_assert (!find_reg_note (insn, REG_DEAD, NULL)); 2978 } 2979 } 2980 else if (stack_regs_mentioned (insn) 2981 || CALL_P (insn)) 2982 { 2983 if (dump_file) 2984 { 2985 fprintf (dump_file, " insn %d input stack: ", 2986 INSN_UID (insn)); 2987 print_stack (dump_file, ®stack); 2988 } 2989 control_flow_insn_deleted |= subst_stack_regs (insn, ®stack); 2990 starting_stack_p = false; 2991 } 2992 } 2993 while (next); 2994 2995 if (debug_insns_with_starting_stack) 2996 { 2997 /* Since it's the first non-debug instruction that determines 2998 the stack requirements of the current basic block, we refrain 2999 from updating debug insns before it in the loop above, and 3000 fix them up here. */ 3001 for (insn = BB_HEAD (block); debug_insns_with_starting_stack; 3002 insn = NEXT_INSN (insn)) 3003 { 3004 if (!DEBUG_INSN_P (insn)) 3005 continue; 3006 3007 debug_insns_with_starting_stack--; 3008 subst_all_stack_regs_in_debug_insn (insn, &bi->stack_in); 3009 } 3010 } 3011 3012 if (dump_file) 3013 { 3014 fprintf (dump_file, "Expected live registers ["); 3015 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg) 3016 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg)) 3017 fprintf (dump_file, " %d", reg); 3018 fprintf (dump_file, " ]\nOutput stack: "); 3019 print_stack (dump_file, ®stack); 3020 } 3021 3022 insn = BB_END (block); 3023 if (JUMP_P (insn)) 3024 insn = PREV_INSN (insn); 3025 3026 /* If the function is declared to return a value, but it returns one 3027 in only some cases, some registers might come live here. Emit 3028 necessary moves for them. */ 3029 3030 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg) 3031 { 3032 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg) 3033 && ! TEST_HARD_REG_BIT (regstack.reg_set, reg)) 3034 { 3035 rtx set; 3036 3037 if (dump_file) 3038 fprintf (dump_file, "Emitting insn initializing reg %d\n", reg); 3039 3040 set = gen_rtx_SET (VOIDmode, FP_MODE_REG (reg, SFmode), not_a_num); 3041 insn = emit_insn_after (set, insn); 3042 control_flow_insn_deleted |= subst_stack_regs (insn, ®stack); 3043 } 3044 } 3045 3046 /* Amongst the insns possibly deleted during the substitution process above, 3047 might have been the only trapping insn in the block. We purge the now 3048 possibly dead EH edges here to avoid an ICE from fixup_abnormal_edges, 3049 called at the end of convert_regs. The order in which we process the 3050 blocks ensures that we never delete an already processed edge. 3051 3052 Note that, at this point, the CFG may have been damaged by the emission 3053 of instructions after an abnormal call, which moves the basic block end 3054 (and is the reason why we call fixup_abnormal_edges later). So we must 3055 be sure that the trapping insn has been deleted before trying to purge 3056 dead edges, otherwise we risk purging valid edges. 3057 3058 ??? We are normally supposed not to delete trapping insns, so we pretend 3059 that the insns deleted above don't actually trap. It would have been 3060 better to detect this earlier and avoid creating the EH edge in the first 3061 place, still, but we don't have enough information at that time. */ 3062 3063 if (control_flow_insn_deleted) 3064 cfg_altered |= purge_dead_edges (block); 3065 3066 /* Something failed if the stack lives don't match. If we had malformed 3067 asms, we zapped the instruction itself, but that didn't produce the 3068 same pattern of register kills as before. */ 3069 3070 gcc_assert (hard_reg_set_equal_p (regstack.reg_set, bi->out_reg_set) 3071 || any_malformed_asm); 3072 bi->stack_out = regstack; 3073 bi->done = true; 3074 3075 return cfg_altered; 3076 } 3077 3078 /* Convert registers in all blocks reachable from BLOCK. Return true if the 3079 CFG has been modified in the process. */ 3080 3081 static bool 3082 convert_regs_2 (basic_block block) 3083 { 3084 basic_block *stack, *sp; 3085 bool cfg_altered = false; 3086 3087 /* We process the blocks in a top-down manner, in a way such that one block 3088 is only processed after all its predecessors. The number of predecessors 3089 of every block has already been computed. */ 3090 3091 stack = XNEWVEC (basic_block, n_basic_blocks); 3092 sp = stack; 3093 3094 *sp++ = block; 3095 3096 do 3097 { 3098 edge e; 3099 edge_iterator ei; 3100 3101 block = *--sp; 3102 3103 /* Processing BLOCK is achieved by convert_regs_1, which may purge 3104 some dead EH outgoing edge after the deletion of the trapping 3105 insn inside the block. Since the number of predecessors of 3106 BLOCK's successors was computed based on the initial edge set, 3107 we check the necessity to process some of these successors 3108 before such an edge deletion may happen. However, there is 3109 a pitfall: if BLOCK is the only predecessor of a successor and 3110 the edge between them happens to be deleted, the successor 3111 becomes unreachable and should not be processed. The problem 3112 is that there is no way to preventively detect this case so we 3113 stack the successor in all cases and hand over the task of 3114 fixing up the discrepancy to convert_regs_1. */ 3115 3116 FOR_EACH_EDGE (e, ei, block->succs) 3117 if (! (e->flags & EDGE_DFS_BACK)) 3118 { 3119 BLOCK_INFO (e->dest)->predecessors--; 3120 if (!BLOCK_INFO (e->dest)->predecessors) 3121 *sp++ = e->dest; 3122 } 3123 3124 cfg_altered |= convert_regs_1 (block); 3125 } 3126 while (sp != stack); 3127 3128 free (stack); 3129 3130 return cfg_altered; 3131 } 3132 3133 /* Traverse all basic blocks in a function, converting the register 3134 references in each insn from the "flat" register file that gcc uses, 3135 to the stack-like registers the 387 uses. */ 3136 3137 static void 3138 convert_regs (void) 3139 { 3140 bool cfg_altered = false; 3141 int inserted; 3142 basic_block b; 3143 edge e; 3144 edge_iterator ei; 3145 3146 /* Initialize uninitialized registers on function entry. */ 3147 inserted = convert_regs_entry (); 3148 3149 /* Construct the desired stack for function exit. */ 3150 convert_regs_exit (); 3151 BLOCK_INFO (EXIT_BLOCK_PTR)->done = 1; 3152 3153 /* ??? Future: process inner loops first, and give them arbitrary 3154 initial stacks which emit_swap_insn can modify. This ought to 3155 prevent double fxch that often appears at the head of a loop. */ 3156 3157 /* Process all blocks reachable from all entry points. */ 3158 FOR_EACH_EDGE (e, ei, ENTRY_BLOCK_PTR->succs) 3159 cfg_altered |= convert_regs_2 (e->dest); 3160 3161 /* ??? Process all unreachable blocks. Though there's no excuse 3162 for keeping these even when not optimizing. */ 3163 FOR_EACH_BB (b) 3164 { 3165 block_info bi = BLOCK_INFO (b); 3166 3167 if (! bi->done) 3168 cfg_altered |= convert_regs_2 (b); 3169 } 3170 3171 /* We must fix up abnormal edges before inserting compensation code 3172 because both mechanisms insert insns on edges. */ 3173 inserted |= fixup_abnormal_edges (); 3174 3175 inserted |= compensate_edges (); 3176 3177 clear_aux_for_blocks (); 3178 3179 if (inserted) 3180 commit_edge_insertions (); 3181 3182 if (cfg_altered) 3183 cleanup_cfg (0); 3184 3185 if (dump_file) 3186 fputc ('\n', dump_file); 3187 } 3188 3189 /* Convert register usage from "flat" register file usage to a "stack 3190 register file. FILE is the dump file, if used. 3191 3192 Construct a CFG and run life analysis. Then convert each insn one 3193 by one. Run a last cleanup_cfg pass, if optimizing, to eliminate 3194 code duplication created when the converter inserts pop insns on 3195 the edges. */ 3196 3197 static bool 3198 reg_to_stack (void) 3199 { 3200 basic_block bb; 3201 int i; 3202 int max_uid; 3203 3204 /* Clean up previous run. */ 3205 if (stack_regs_mentioned_data != NULL) 3206 VEC_free (char, heap, stack_regs_mentioned_data); 3207 3208 /* See if there is something to do. Flow analysis is quite 3209 expensive so we might save some compilation time. */ 3210 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++) 3211 if (df_regs_ever_live_p (i)) 3212 break; 3213 if (i > LAST_STACK_REG) 3214 return false; 3215 3216 df_note_add_problem (); 3217 df_analyze (); 3218 3219 mark_dfs_back_edges (); 3220 3221 /* Set up block info for each basic block. */ 3222 alloc_aux_for_blocks (sizeof (struct block_info_def)); 3223 FOR_EACH_BB (bb) 3224 { 3225 block_info bi = BLOCK_INFO (bb); 3226 edge_iterator ei; 3227 edge e; 3228 int reg; 3229 3230 FOR_EACH_EDGE (e, ei, bb->preds) 3231 if (!(e->flags & EDGE_DFS_BACK) 3232 && e->src != ENTRY_BLOCK_PTR) 3233 bi->predecessors++; 3234 3235 /* Set current register status at last instruction `uninitialized'. */ 3236 bi->stack_in.top = -2; 3237 3238 /* Copy live_at_end and live_at_start into temporaries. */ 3239 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; reg++) 3240 { 3241 if (REGNO_REG_SET_P (DF_LR_OUT (bb), reg)) 3242 SET_HARD_REG_BIT (bi->out_reg_set, reg); 3243 if (REGNO_REG_SET_P (DF_LR_IN (bb), reg)) 3244 SET_HARD_REG_BIT (bi->stack_in.reg_set, reg); 3245 } 3246 } 3247 3248 /* Create the replacement registers up front. */ 3249 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++) 3250 { 3251 enum machine_mode mode; 3252 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); 3253 mode != VOIDmode; 3254 mode = GET_MODE_WIDER_MODE (mode)) 3255 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i); 3256 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT); 3257 mode != VOIDmode; 3258 mode = GET_MODE_WIDER_MODE (mode)) 3259 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i); 3260 } 3261 3262 ix86_flags_rtx = gen_rtx_REG (CCmode, FLAGS_REG); 3263 3264 /* A QNaN for initializing uninitialized variables. 3265 3266 ??? We can't load from constant memory in PIC mode, because 3267 we're inserting these instructions before the prologue and 3268 the PIC register hasn't been set up. In that case, fall back 3269 on zero, which we can get from `fldz'. */ 3270 3271 if ((flag_pic && !TARGET_64BIT) 3272 || ix86_cmodel == CM_LARGE || ix86_cmodel == CM_LARGE_PIC) 3273 not_a_num = CONST0_RTX (SFmode); 3274 else 3275 { 3276 REAL_VALUE_TYPE r; 3277 3278 real_nan (&r, "", 1, SFmode); 3279 not_a_num = CONST_DOUBLE_FROM_REAL_VALUE (r, SFmode); 3280 not_a_num = force_const_mem (SFmode, not_a_num); 3281 } 3282 3283 /* Allocate a cache for stack_regs_mentioned. */ 3284 max_uid = get_max_uid (); 3285 stack_regs_mentioned_data = VEC_alloc (char, heap, max_uid + 1); 3286 memset (VEC_address (char, stack_regs_mentioned_data), 3287 0, sizeof (char) * (max_uid + 1)); 3288 3289 convert_regs (); 3290 3291 free_aux_for_blocks (); 3292 return true; 3293 } 3294 #endif /* STACK_REGS */ 3295 3296 static bool 3297 gate_handle_stack_regs (void) 3298 { 3299 #ifdef STACK_REGS 3300 return 1; 3301 #else 3302 return 0; 3303 #endif 3304 } 3305 3306 struct rtl_opt_pass pass_stack_regs = 3307 { 3308 { 3309 RTL_PASS, 3310 "*stack_regs", /* name */ 3311 gate_handle_stack_regs, /* gate */ 3312 NULL, /* execute */ 3313 NULL, /* sub */ 3314 NULL, /* next */ 3315 0, /* static_pass_number */ 3316 TV_REG_STACK, /* tv_id */ 3317 0, /* properties_required */ 3318 0, /* properties_provided */ 3319 0, /* properties_destroyed */ 3320 0, /* todo_flags_start */ 3321 0 /* todo_flags_finish */ 3322 } 3323 }; 3324 3325 /* Convert register usage from flat register file usage to a stack 3326 register file. */ 3327 static unsigned int 3328 rest_of_handle_stack_regs (void) 3329 { 3330 #ifdef STACK_REGS 3331 reg_to_stack (); 3332 regstack_completed = 1; 3333 #endif 3334 return 0; 3335 } 3336 3337 struct rtl_opt_pass pass_stack_regs_run = 3338 { 3339 { 3340 RTL_PASS, 3341 "stack", /* name */ 3342 NULL, /* gate */ 3343 rest_of_handle_stack_regs, /* execute */ 3344 NULL, /* sub */ 3345 NULL, /* next */ 3346 0, /* static_pass_number */ 3347 TV_REG_STACK, /* tv_id */ 3348 0, /* properties_required */ 3349 0, /* properties_provided */ 3350 0, /* properties_destroyed */ 3351 0, /* todo_flags_start */ 3352 TODO_df_finish | TODO_verify_rtl_sharing | 3353 TODO_ggc_collect /* todo_flags_finish */ 3354 } 3355 }; 3356