xref: /dragonfly/contrib/gcc-8.0/gcc/addresses.h (revision 38fd1498)
1*38fd1498Szrj /* Inline functions to test validity of reg classes for addressing modes.
2*38fd1498Szrj    Copyright (C) 2006-2018 Free Software Foundation, Inc.
3*38fd1498Szrj 
4*38fd1498Szrj This file is part of GCC.
5*38fd1498Szrj 
6*38fd1498Szrj GCC is free software; you can redistribute it and/or modify it under
7*38fd1498Szrj the terms of the GNU General Public License as published by the Free
8*38fd1498Szrj Software Foundation; either version 3, or (at your option) any later
9*38fd1498Szrj version.
10*38fd1498Szrj 
11*38fd1498Szrj GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12*38fd1498Szrj WARRANTY; without even the implied warranty of MERCHANTABILITY or
13*38fd1498Szrj FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
14*38fd1498Szrj for more details.
15*38fd1498Szrj 
16*38fd1498Szrj You should have received a copy of the GNU General Public License
17*38fd1498Szrj along with GCC; see the file COPYING3.  If not see
18*38fd1498Szrj <http://www.gnu.org/licenses/>.  */
19*38fd1498Szrj 
20*38fd1498Szrj /* Wrapper function to unify target macros MODE_CODE_BASE_REG_CLASS,
21*38fd1498Szrj    MODE_BASE_REG_REG_CLASS, MODE_BASE_REG_CLASS and BASE_REG_CLASS.
22*38fd1498Szrj    Arguments as for the MODE_CODE_BASE_REG_CLASS macro.  */
23*38fd1498Szrj 
24*38fd1498Szrj #ifndef GCC_ADDRESSES_H
25*38fd1498Szrj #define GCC_ADDRESSES_H
26*38fd1498Szrj 
27*38fd1498Szrj static inline enum reg_class
base_reg_class(machine_mode mode ATTRIBUTE_UNUSED,addr_space_t as ATTRIBUTE_UNUSED,enum rtx_code outer_code ATTRIBUTE_UNUSED,enum rtx_code index_code ATTRIBUTE_UNUSED)28*38fd1498Szrj base_reg_class (machine_mode mode ATTRIBUTE_UNUSED,
29*38fd1498Szrj 		addr_space_t as ATTRIBUTE_UNUSED,
30*38fd1498Szrj 		enum rtx_code outer_code ATTRIBUTE_UNUSED,
31*38fd1498Szrj 		enum rtx_code index_code ATTRIBUTE_UNUSED)
32*38fd1498Szrj {
33*38fd1498Szrj #ifdef MODE_CODE_BASE_REG_CLASS
34*38fd1498Szrj   return MODE_CODE_BASE_REG_CLASS (MACRO_MODE (mode), as, outer_code,
35*38fd1498Szrj 				   index_code);
36*38fd1498Szrj #else
37*38fd1498Szrj #ifdef MODE_BASE_REG_REG_CLASS
38*38fd1498Szrj   if (index_code == REG)
39*38fd1498Szrj     return MODE_BASE_REG_REG_CLASS (MACRO_MODE (mode));
40*38fd1498Szrj #endif
41*38fd1498Szrj #ifdef MODE_BASE_REG_CLASS
42*38fd1498Szrj   return MODE_BASE_REG_CLASS (MACRO_MODE (mode));
43*38fd1498Szrj #else
44*38fd1498Szrj   return BASE_REG_CLASS;
45*38fd1498Szrj #endif
46*38fd1498Szrj #endif
47*38fd1498Szrj }
48*38fd1498Szrj 
49*38fd1498Szrj /* Wrapper function to unify target macros REGNO_MODE_CODE_OK_FOR_BASE_P,
50*38fd1498Szrj    REGNO_MODE_OK_FOR_REG_BASE_P, REGNO_MODE_OK_FOR_BASE_P and
51*38fd1498Szrj    REGNO_OK_FOR_BASE_P.
52*38fd1498Szrj    Arguments as for the REGNO_MODE_CODE_OK_FOR_BASE_P macro.  */
53*38fd1498Szrj 
54*38fd1498Szrj static inline bool
ok_for_base_p_1(unsigned regno ATTRIBUTE_UNUSED,machine_mode mode ATTRIBUTE_UNUSED,addr_space_t as ATTRIBUTE_UNUSED,enum rtx_code outer_code ATTRIBUTE_UNUSED,enum rtx_code index_code ATTRIBUTE_UNUSED)55*38fd1498Szrj ok_for_base_p_1 (unsigned regno ATTRIBUTE_UNUSED,
56*38fd1498Szrj 		 machine_mode mode ATTRIBUTE_UNUSED,
57*38fd1498Szrj 		 addr_space_t as ATTRIBUTE_UNUSED,
58*38fd1498Szrj 		 enum rtx_code outer_code ATTRIBUTE_UNUSED,
59*38fd1498Szrj 		 enum rtx_code index_code ATTRIBUTE_UNUSED)
60*38fd1498Szrj {
61*38fd1498Szrj #ifdef REGNO_MODE_CODE_OK_FOR_BASE_P
62*38fd1498Szrj   return REGNO_MODE_CODE_OK_FOR_BASE_P (regno, MACRO_MODE (mode), as,
63*38fd1498Szrj 					outer_code, index_code);
64*38fd1498Szrj #else
65*38fd1498Szrj #ifdef REGNO_MODE_OK_FOR_REG_BASE_P
66*38fd1498Szrj   if (index_code == REG)
67*38fd1498Szrj     return REGNO_MODE_OK_FOR_REG_BASE_P (regno, MACRO_MODE (mode));
68*38fd1498Szrj #endif
69*38fd1498Szrj #ifdef REGNO_MODE_OK_FOR_BASE_P
70*38fd1498Szrj   return REGNO_MODE_OK_FOR_BASE_P (regno, MACRO_MODE (mode));
71*38fd1498Szrj #else
72*38fd1498Szrj   return REGNO_OK_FOR_BASE_P (regno);
73*38fd1498Szrj #endif
74*38fd1498Szrj #endif
75*38fd1498Szrj }
76*38fd1498Szrj 
77*38fd1498Szrj /* Wrapper around ok_for_base_p_1, for use after register allocation is
78*38fd1498Szrj    complete.  Arguments as for the called function.  */
79*38fd1498Szrj 
80*38fd1498Szrj static inline bool
regno_ok_for_base_p(unsigned regno,machine_mode mode,addr_space_t as,enum rtx_code outer_code,enum rtx_code index_code)81*38fd1498Szrj regno_ok_for_base_p (unsigned regno, machine_mode mode, addr_space_t as,
82*38fd1498Szrj 		     enum rtx_code outer_code, enum rtx_code index_code)
83*38fd1498Szrj {
84*38fd1498Szrj   if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] >= 0)
85*38fd1498Szrj     regno = reg_renumber[regno];
86*38fd1498Szrj 
87*38fd1498Szrj   return ok_for_base_p_1 (regno, mode, as, outer_code, index_code);
88*38fd1498Szrj }
89*38fd1498Szrj 
90*38fd1498Szrj #endif /* GCC_ADDRESSES_H */
91