1 /* Subroutines used for macro/preprocessor support on the ia-32. 2 Copyright (C) 2008-2018 Free Software Foundation, Inc. 3 4 This file is part of GCC. 5 6 GCC is free software; you can redistribute it and/or modify 7 it under the terms of the GNU General Public License as published by 8 the Free Software Foundation; either version 3, or (at your option) 9 any later version. 10 11 GCC is distributed in the hope that it will be useful, 12 but WITHOUT ANY WARRANTY; without even the implied warranty of 13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 GNU General Public License for more details. 15 16 You should have received a copy of the GNU General Public License 17 along with GCC; see the file COPYING3. If not see 18 <http://www.gnu.org/licenses/>. */ 19 20 #define IN_TARGET_CODE 1 21 22 #include "config.h" 23 #include "system.h" 24 #include "coretypes.h" 25 #include "target.h" 26 #include "c-family/c-common.h" 27 #include "memmodel.h" 28 #include "tm_p.h" 29 #include "c-family/c-pragma.h" 30 31 static bool ix86_pragma_target_parse (tree, tree); 32 static void ix86_target_macros_internal 33 (HOST_WIDE_INT, HOST_WIDE_INT, enum processor_type, enum processor_type, enum fpmath_unit, 34 void (*def_or_undef) (cpp_reader *, const char *)); 35 36 /* Internal function to either define or undef the appropriate system 37 macros. */ 38 static void 39 ix86_target_macros_internal (HOST_WIDE_INT isa_flag, 40 HOST_WIDE_INT isa_flag2, 41 enum processor_type arch, 42 enum processor_type tune, 43 enum fpmath_unit fpmath, 44 void (*def_or_undef) (cpp_reader *, 45 const char *)) 46 { 47 /* For some of the k6/pentium varients there weren't separate ISA bits to 48 identify which tune/arch flag was passed, so figure it out here. */ 49 size_t arch_len = strlen (ix86_arch_string); 50 size_t tune_len = strlen (ix86_tune_string); 51 int last_arch_char = ix86_arch_string[arch_len - 1]; 52 int last_tune_char = ix86_tune_string[tune_len - 1]; 53 54 /* Built-ins based on -march=. */ 55 switch (arch) 56 { 57 case PROCESSOR_I386: 58 break; 59 case PROCESSOR_I486: 60 def_or_undef (parse_in, "__i486"); 61 def_or_undef (parse_in, "__i486__"); 62 break; 63 case PROCESSOR_LAKEMONT: 64 /* Intel MCU is based on Intel Pentium CPU. */ 65 case PROCESSOR_PENTIUM: 66 def_or_undef (parse_in, "__i586"); 67 def_or_undef (parse_in, "__i586__"); 68 def_or_undef (parse_in, "__pentium"); 69 def_or_undef (parse_in, "__pentium__"); 70 if (isa_flag & OPTION_MASK_ISA_MMX) 71 def_or_undef (parse_in, "__pentium_mmx__"); 72 break; 73 case PROCESSOR_PENTIUMPRO: 74 def_or_undef (parse_in, "__i686"); 75 def_or_undef (parse_in, "__i686__"); 76 def_or_undef (parse_in, "__pentiumpro"); 77 def_or_undef (parse_in, "__pentiumpro__"); 78 break; 79 case PROCESSOR_GEODE: 80 def_or_undef (parse_in, "__geode"); 81 def_or_undef (parse_in, "__geode__"); 82 break; 83 case PROCESSOR_K6: 84 def_or_undef (parse_in, "__k6"); 85 def_or_undef (parse_in, "__k6__"); 86 if (last_arch_char == '2') 87 def_or_undef (parse_in, "__k6_2__"); 88 else if (last_arch_char == '3') 89 def_or_undef (parse_in, "__k6_3__"); 90 else if (isa_flag & OPTION_MASK_ISA_3DNOW) 91 def_or_undef (parse_in, "__k6_3__"); 92 break; 93 case PROCESSOR_ATHLON: 94 def_or_undef (parse_in, "__athlon"); 95 def_or_undef (parse_in, "__athlon__"); 96 if (isa_flag & OPTION_MASK_ISA_SSE) 97 def_or_undef (parse_in, "__athlon_sse__"); 98 break; 99 case PROCESSOR_K8: 100 def_or_undef (parse_in, "__k8"); 101 def_or_undef (parse_in, "__k8__"); 102 break; 103 case PROCESSOR_AMDFAM10: 104 def_or_undef (parse_in, "__amdfam10"); 105 def_or_undef (parse_in, "__amdfam10__"); 106 break; 107 case PROCESSOR_BDVER1: 108 def_or_undef (parse_in, "__bdver1"); 109 def_or_undef (parse_in, "__bdver1__"); 110 break; 111 case PROCESSOR_BDVER2: 112 def_or_undef (parse_in, "__bdver2"); 113 def_or_undef (parse_in, "__bdver2__"); 114 break; 115 case PROCESSOR_BDVER3: 116 def_or_undef (parse_in, "__bdver3"); 117 def_or_undef (parse_in, "__bdver3__"); 118 break; 119 case PROCESSOR_BDVER4: 120 def_or_undef (parse_in, "__bdver4"); 121 def_or_undef (parse_in, "__bdver4__"); 122 break; 123 case PROCESSOR_ZNVER1: 124 def_or_undef (parse_in, "__znver1"); 125 def_or_undef (parse_in, "__znver1__"); 126 break; 127 case PROCESSOR_BTVER1: 128 def_or_undef (parse_in, "__btver1"); 129 def_or_undef (parse_in, "__btver1__"); 130 break; 131 case PROCESSOR_BTVER2: 132 def_or_undef (parse_in, "__btver2"); 133 def_or_undef (parse_in, "__btver2__"); 134 break; 135 case PROCESSOR_PENTIUM4: 136 def_or_undef (parse_in, "__pentium4"); 137 def_or_undef (parse_in, "__pentium4__"); 138 break; 139 case PROCESSOR_NOCONA: 140 def_or_undef (parse_in, "__nocona"); 141 def_or_undef (parse_in, "__nocona__"); 142 break; 143 case PROCESSOR_CORE2: 144 def_or_undef (parse_in, "__core2"); 145 def_or_undef (parse_in, "__core2__"); 146 break; 147 case PROCESSOR_NEHALEM: 148 def_or_undef (parse_in, "__corei7"); 149 def_or_undef (parse_in, "__corei7__"); 150 def_or_undef (parse_in, "__nehalem"); 151 def_or_undef (parse_in, "__nehalem__"); 152 break; 153 case PROCESSOR_SANDYBRIDGE: 154 def_or_undef (parse_in, "__corei7_avx"); 155 def_or_undef (parse_in, "__corei7_avx__"); 156 def_or_undef (parse_in, "__sandybridge"); 157 def_or_undef (parse_in, "__sandybridge__"); 158 break; 159 case PROCESSOR_HASWELL: 160 def_or_undef (parse_in, "__core_avx2"); 161 def_or_undef (parse_in, "__core_avx2__"); 162 def_or_undef (parse_in, "__haswell"); 163 def_or_undef (parse_in, "__haswell__"); 164 break; 165 case PROCESSOR_BONNELL: 166 def_or_undef (parse_in, "__atom"); 167 def_or_undef (parse_in, "__atom__"); 168 def_or_undef (parse_in, "__bonnell"); 169 def_or_undef (parse_in, "__bonnell__"); 170 break; 171 case PROCESSOR_SILVERMONT: 172 def_or_undef (parse_in, "__slm"); 173 def_or_undef (parse_in, "__slm__"); 174 def_or_undef (parse_in, "__silvermont"); 175 def_or_undef (parse_in, "__silvermont__"); 176 break; 177 case PROCESSOR_KNL: 178 def_or_undef (parse_in, "__knl"); 179 def_or_undef (parse_in, "__knl__"); 180 break; 181 case PROCESSOR_KNM: 182 def_or_undef (parse_in, "__knm"); 183 def_or_undef (parse_in, "__knm__"); 184 break; 185 case PROCESSOR_SKYLAKE: 186 def_or_undef (parse_in, "__skylake"); 187 def_or_undef (parse_in, "__skylake__"); 188 break; 189 case PROCESSOR_SKYLAKE_AVX512: 190 def_or_undef (parse_in, "__skylake_avx512"); 191 def_or_undef (parse_in, "__skylake_avx512__"); 192 break; 193 case PROCESSOR_CANNONLAKE: 194 def_or_undef (parse_in, "__cannonlake"); 195 def_or_undef (parse_in, "__cannonlake__"); 196 break; 197 case PROCESSOR_ICELAKE_CLIENT: 198 def_or_undef (parse_in, "__icelake_client"); 199 def_or_undef (parse_in, "__icelake_client__"); 200 break; 201 case PROCESSOR_ICELAKE_SERVER: 202 def_or_undef (parse_in, "__icelake_server"); 203 def_or_undef (parse_in, "__icelake_server__"); 204 break; 205 /* use PROCESSOR_max to not set/unset the arch macro. */ 206 case PROCESSOR_max: 207 break; 208 case PROCESSOR_INTEL: 209 case PROCESSOR_GENERIC: 210 gcc_unreachable (); 211 } 212 213 /* Built-ins based on -mtune=. */ 214 switch (tune) 215 { 216 case PROCESSOR_I386: 217 def_or_undef (parse_in, "__tune_i386__"); 218 break; 219 case PROCESSOR_I486: 220 def_or_undef (parse_in, "__tune_i486__"); 221 break; 222 case PROCESSOR_PENTIUM: 223 def_or_undef (parse_in, "__tune_i586__"); 224 def_or_undef (parse_in, "__tune_pentium__"); 225 if (last_tune_char == 'x') 226 def_or_undef (parse_in, "__tune_pentium_mmx__"); 227 break; 228 case PROCESSOR_PENTIUMPRO: 229 def_or_undef (parse_in, "__tune_i686__"); 230 def_or_undef (parse_in, "__tune_pentiumpro__"); 231 switch (last_tune_char) 232 { 233 case '3': 234 def_or_undef (parse_in, "__tune_pentium3__"); 235 /* FALLTHRU */ 236 case '2': 237 def_or_undef (parse_in, "__tune_pentium2__"); 238 break; 239 } 240 break; 241 case PROCESSOR_GEODE: 242 def_or_undef (parse_in, "__tune_geode__"); 243 break; 244 case PROCESSOR_K6: 245 def_or_undef (parse_in, "__tune_k6__"); 246 if (last_tune_char == '2') 247 def_or_undef (parse_in, "__tune_k6_2__"); 248 else if (last_tune_char == '3') 249 def_or_undef (parse_in, "__tune_k6_3__"); 250 else if (isa_flag & OPTION_MASK_ISA_3DNOW) 251 def_or_undef (parse_in, "__tune_k6_3__"); 252 break; 253 case PROCESSOR_ATHLON: 254 def_or_undef (parse_in, "__tune_athlon__"); 255 if (isa_flag & OPTION_MASK_ISA_SSE) 256 def_or_undef (parse_in, "__tune_athlon_sse__"); 257 break; 258 case PROCESSOR_K8: 259 def_or_undef (parse_in, "__tune_k8__"); 260 break; 261 case PROCESSOR_AMDFAM10: 262 def_or_undef (parse_in, "__tune_amdfam10__"); 263 break; 264 case PROCESSOR_BDVER1: 265 def_or_undef (parse_in, "__tune_bdver1__"); 266 break; 267 case PROCESSOR_BDVER2: 268 def_or_undef (parse_in, "__tune_bdver2__"); 269 break; 270 case PROCESSOR_BDVER3: 271 def_or_undef (parse_in, "__tune_bdver3__"); 272 break; 273 case PROCESSOR_BDVER4: 274 def_or_undef (parse_in, "__tune_bdver4__"); 275 break; 276 case PROCESSOR_ZNVER1: 277 def_or_undef (parse_in, "__tune_znver1__"); 278 break; 279 case PROCESSOR_BTVER1: 280 def_or_undef (parse_in, "__tune_btver1__"); 281 break; 282 case PROCESSOR_BTVER2: 283 def_or_undef (parse_in, "__tune_btver2__"); 284 break; 285 case PROCESSOR_PENTIUM4: 286 def_or_undef (parse_in, "__tune_pentium4__"); 287 break; 288 case PROCESSOR_NOCONA: 289 def_or_undef (parse_in, "__tune_nocona__"); 290 break; 291 case PROCESSOR_CORE2: 292 def_or_undef (parse_in, "__tune_core2__"); 293 break; 294 case PROCESSOR_NEHALEM: 295 def_or_undef (parse_in, "__tune_corei7__"); 296 def_or_undef (parse_in, "__tune_nehalem__"); 297 break; 298 case PROCESSOR_SANDYBRIDGE: 299 def_or_undef (parse_in, "__tune_corei7_avx__"); 300 def_or_undef (parse_in, "__tune_sandybridge__"); 301 break; 302 case PROCESSOR_HASWELL: 303 def_or_undef (parse_in, "__tune_core_avx2__"); 304 def_or_undef (parse_in, "__tune_haswell__"); 305 break; 306 case PROCESSOR_BONNELL: 307 def_or_undef (parse_in, "__tune_atom__"); 308 def_or_undef (parse_in, "__tune_bonnell__"); 309 break; 310 case PROCESSOR_SILVERMONT: 311 def_or_undef (parse_in, "__tune_slm__"); 312 def_or_undef (parse_in, "__tune_silvermont__"); 313 break; 314 case PROCESSOR_KNL: 315 def_or_undef (parse_in, "__tune_knl__"); 316 break; 317 case PROCESSOR_KNM: 318 def_or_undef (parse_in, "__tune_knm__"); 319 break; 320 case PROCESSOR_SKYLAKE: 321 def_or_undef (parse_in, "__tune_skylake__"); 322 break; 323 case PROCESSOR_SKYLAKE_AVX512: 324 def_or_undef (parse_in, "__tune_skylake_avx512__"); 325 break; 326 case PROCESSOR_CANNONLAKE: 327 def_or_undef (parse_in, "__tune_cannonlake__"); 328 break; 329 case PROCESSOR_ICELAKE_CLIENT: 330 def_or_undef (parse_in, "__tune_icelake_client__"); 331 break; 332 case PROCESSOR_ICELAKE_SERVER: 333 def_or_undef (parse_in, "__tune_icelake_server__"); 334 break; 335 case PROCESSOR_LAKEMONT: 336 def_or_undef (parse_in, "__tune_lakemont__"); 337 break; 338 case PROCESSOR_INTEL: 339 case PROCESSOR_GENERIC: 340 break; 341 /* use PROCESSOR_max to not set/unset the tune macro. */ 342 case PROCESSOR_max: 343 break; 344 } 345 346 switch (ix86_cmodel) 347 { 348 case CM_SMALL: 349 case CM_SMALL_PIC: 350 def_or_undef (parse_in, "__code_model_small__"); 351 break; 352 case CM_MEDIUM: 353 case CM_MEDIUM_PIC: 354 def_or_undef (parse_in, "__code_model_medium__"); 355 break; 356 case CM_LARGE: 357 case CM_LARGE_PIC: 358 def_or_undef (parse_in, "__code_model_large__"); 359 break; 360 case CM_32: 361 def_or_undef (parse_in, "__code_model_32__"); 362 break; 363 case CM_KERNEL: 364 def_or_undef (parse_in, "__code_model_kernel__"); 365 break; 366 default: 367 ; 368 } 369 370 if (isa_flag2 & OPTION_MASK_ISA_WBNOINVD) 371 def_or_undef (parse_in, "__WBNOINVD__"); 372 if (isa_flag & OPTION_MASK_ISA_MMX) 373 def_or_undef (parse_in, "__MMX__"); 374 if (isa_flag & OPTION_MASK_ISA_3DNOW) 375 def_or_undef (parse_in, "__3dNOW__"); 376 if (isa_flag & OPTION_MASK_ISA_3DNOW_A) 377 def_or_undef (parse_in, "__3dNOW_A__"); 378 if (isa_flag & OPTION_MASK_ISA_SSE) 379 def_or_undef (parse_in, "__SSE__"); 380 if (isa_flag & OPTION_MASK_ISA_SSE2) 381 def_or_undef (parse_in, "__SSE2__"); 382 if (isa_flag & OPTION_MASK_ISA_SSE3) 383 def_or_undef (parse_in, "__SSE3__"); 384 if (isa_flag & OPTION_MASK_ISA_SSSE3) 385 def_or_undef (parse_in, "__SSSE3__"); 386 if (isa_flag & OPTION_MASK_ISA_SSE4_1) 387 def_or_undef (parse_in, "__SSE4_1__"); 388 if (isa_flag & OPTION_MASK_ISA_SSE4_2) 389 def_or_undef (parse_in, "__SSE4_2__"); 390 if (isa_flag & OPTION_MASK_ISA_AES) 391 def_or_undef (parse_in, "__AES__"); 392 if (isa_flag & OPTION_MASK_ISA_SHA) 393 def_or_undef (parse_in, "__SHA__"); 394 if (isa_flag & OPTION_MASK_ISA_PCLMUL) 395 def_or_undef (parse_in, "__PCLMUL__"); 396 if (isa_flag & OPTION_MASK_ISA_AVX) 397 def_or_undef (parse_in, "__AVX__"); 398 if (isa_flag & OPTION_MASK_ISA_AVX2) 399 def_or_undef (parse_in, "__AVX2__"); 400 if (isa_flag & OPTION_MASK_ISA_AVX512F) 401 def_or_undef (parse_in, "__AVX512F__"); 402 if (isa_flag & OPTION_MASK_ISA_AVX512ER) 403 def_or_undef (parse_in, "__AVX512ER__"); 404 if (isa_flag & OPTION_MASK_ISA_AVX512CD) 405 def_or_undef (parse_in, "__AVX512CD__"); 406 if (isa_flag & OPTION_MASK_ISA_AVX512PF) 407 def_or_undef (parse_in, "__AVX512PF__"); 408 if (isa_flag & OPTION_MASK_ISA_AVX512DQ) 409 def_or_undef (parse_in, "__AVX512DQ__"); 410 if (isa_flag & OPTION_MASK_ISA_AVX512BW) 411 def_or_undef (parse_in, "__AVX512BW__"); 412 if (isa_flag & OPTION_MASK_ISA_AVX512VL) 413 def_or_undef (parse_in, "__AVX512VL__"); 414 if (isa_flag & OPTION_MASK_ISA_AVX512VBMI) 415 def_or_undef (parse_in, "__AVX512VBMI__"); 416 if (isa_flag & OPTION_MASK_ISA_AVX512IFMA) 417 def_or_undef (parse_in, "__AVX512IFMA__"); 418 if (isa_flag2 & OPTION_MASK_ISA_AVX5124VNNIW) 419 def_or_undef (parse_in, "__AVX5124VNNIW__"); 420 if (isa_flag & OPTION_MASK_ISA_AVX512VBMI2) 421 def_or_undef (parse_in, "__AVX512VBMI2__"); 422 if (isa_flag & OPTION_MASK_ISA_AVX512VNNI) 423 def_or_undef (parse_in, "__AVX512VNNI__"); 424 if (isa_flag2 & OPTION_MASK_ISA_PCONFIG) 425 def_or_undef (parse_in, "__PCONFIG__"); 426 if (isa_flag2 & OPTION_MASK_ISA_SGX) 427 def_or_undef (parse_in, "__SGX__"); 428 if (isa_flag2 & OPTION_MASK_ISA_AVX5124FMAPS) 429 def_or_undef (parse_in, "__AVX5124FMAPS__"); 430 if (isa_flag & OPTION_MASK_ISA_AVX512BITALG) 431 def_or_undef (parse_in, "__AVX512BITALG__"); 432 if (isa_flag & OPTION_MASK_ISA_AVX512VPOPCNTDQ) 433 def_or_undef (parse_in, "__AVX512VPOPCNTDQ__"); 434 if (isa_flag & OPTION_MASK_ISA_FMA) 435 def_or_undef (parse_in, "__FMA__"); 436 if (isa_flag & OPTION_MASK_ISA_RTM) 437 def_or_undef (parse_in, "__RTM__"); 438 if (isa_flag & OPTION_MASK_ISA_SSE4A) 439 def_or_undef (parse_in, "__SSE4A__"); 440 if (isa_flag & OPTION_MASK_ISA_FMA4) 441 def_or_undef (parse_in, "__FMA4__"); 442 if (isa_flag & OPTION_MASK_ISA_XOP) 443 def_or_undef (parse_in, "__XOP__"); 444 if (isa_flag & OPTION_MASK_ISA_LWP) 445 def_or_undef (parse_in, "__LWP__"); 446 if (isa_flag & OPTION_MASK_ISA_ABM) 447 def_or_undef (parse_in, "__ABM__"); 448 if (isa_flag & OPTION_MASK_ISA_BMI) 449 def_or_undef (parse_in, "__BMI__"); 450 if (isa_flag & OPTION_MASK_ISA_BMI2) 451 def_or_undef (parse_in, "__BMI2__"); 452 if (isa_flag & OPTION_MASK_ISA_LZCNT) 453 def_or_undef (parse_in, "__LZCNT__"); 454 if (isa_flag & OPTION_MASK_ISA_TBM) 455 def_or_undef (parse_in, "__TBM__"); 456 if (isa_flag & OPTION_MASK_ISA_POPCNT) 457 def_or_undef (parse_in, "__POPCNT__"); 458 if (isa_flag & OPTION_MASK_ISA_FSGSBASE) 459 def_or_undef (parse_in, "__FSGSBASE__"); 460 if (isa_flag & OPTION_MASK_ISA_RDRND) 461 def_or_undef (parse_in, "__RDRND__"); 462 if (isa_flag & OPTION_MASK_ISA_F16C) 463 def_or_undef (parse_in, "__F16C__"); 464 if (isa_flag & OPTION_MASK_ISA_RDSEED) 465 def_or_undef (parse_in, "__RDSEED__"); 466 if (isa_flag & OPTION_MASK_ISA_PRFCHW) 467 def_or_undef (parse_in, "__PRFCHW__"); 468 if (isa_flag & OPTION_MASK_ISA_ADX) 469 def_or_undef (parse_in, "__ADX__"); 470 if (isa_flag & OPTION_MASK_ISA_FXSR) 471 def_or_undef (parse_in, "__FXSR__"); 472 if (isa_flag & OPTION_MASK_ISA_XSAVE) 473 def_or_undef (parse_in, "__XSAVE__"); 474 if (isa_flag & OPTION_MASK_ISA_XSAVEOPT) 475 def_or_undef (parse_in, "__XSAVEOPT__"); 476 if (isa_flag & OPTION_MASK_ISA_PREFETCHWT1) 477 def_or_undef (parse_in, "__PREFETCHWT1__"); 478 if ((fpmath & FPMATH_SSE) && (isa_flag & OPTION_MASK_ISA_SSE)) 479 def_or_undef (parse_in, "__SSE_MATH__"); 480 if ((fpmath & FPMATH_SSE) && (isa_flag & OPTION_MASK_ISA_SSE2)) 481 def_or_undef (parse_in, "__SSE2_MATH__"); 482 if (isa_flag & OPTION_MASK_ISA_CLFLUSHOPT) 483 def_or_undef (parse_in, "__CLFLUSHOPT__"); 484 if (isa_flag2 & OPTION_MASK_ISA_CLZERO) 485 def_or_undef (parse_in, "__CLZERO__"); 486 if (isa_flag & OPTION_MASK_ISA_XSAVEC) 487 def_or_undef (parse_in, "__XSAVEC__"); 488 if (isa_flag & OPTION_MASK_ISA_XSAVES) 489 def_or_undef (parse_in, "__XSAVES__"); 490 if (isa_flag2 & OPTION_MASK_ISA_MPX) 491 def_or_undef (parse_in, "__MPX__"); 492 if (isa_flag & OPTION_MASK_ISA_CLWB) 493 def_or_undef (parse_in, "__CLWB__"); 494 if (isa_flag2 & OPTION_MASK_ISA_MWAITX) 495 def_or_undef (parse_in, "__MWAITX__"); 496 if (isa_flag & OPTION_MASK_ISA_PKU) 497 def_or_undef (parse_in, "__PKU__"); 498 if (isa_flag2 & OPTION_MASK_ISA_RDPID) 499 def_or_undef (parse_in, "__RDPID__"); 500 if (isa_flag & OPTION_MASK_ISA_GFNI) 501 def_or_undef (parse_in, "__GFNI__"); 502 if ((isa_flag & OPTION_MASK_ISA_SHSTK)) 503 def_or_undef (parse_in, "__SHSTK__"); 504 if (isa_flag2 & OPTION_MASK_ISA_VAES) 505 def_or_undef (parse_in, "__VAES__"); 506 if (isa_flag & OPTION_MASK_ISA_VPCLMULQDQ) 507 def_or_undef (parse_in, "__VPCLMULQDQ__"); 508 if (isa_flag & OPTION_MASK_ISA_MOVDIRI) 509 def_or_undef (parse_in, "__MOVDIRI__"); 510 if (isa_flag2 & OPTION_MASK_ISA_MOVDIR64B) 511 def_or_undef (parse_in, "__MOVDIR64B__"); 512 if (TARGET_IAMCU) 513 { 514 def_or_undef (parse_in, "__iamcu"); 515 def_or_undef (parse_in, "__iamcu__"); 516 } 517 } 518 519 520 /* Hook to validate the current #pragma GCC target and set the state, and 521 update the macros based on what was changed. If ARGS is NULL, then 522 POP_TARGET is used to reset the options. */ 523 524 static bool 525 ix86_pragma_target_parse (tree args, tree pop_target) 526 { 527 tree prev_tree = build_target_option_node (&global_options); 528 tree cur_tree; 529 struct cl_target_option *prev_opt; 530 struct cl_target_option *cur_opt; 531 HOST_WIDE_INT prev_isa; 532 HOST_WIDE_INT cur_isa; 533 HOST_WIDE_INT diff_isa; 534 HOST_WIDE_INT prev_isa2; 535 HOST_WIDE_INT cur_isa2; 536 HOST_WIDE_INT diff_isa2; 537 enum processor_type prev_arch; 538 enum processor_type prev_tune; 539 enum processor_type cur_arch; 540 enum processor_type cur_tune; 541 542 if (! args) 543 { 544 cur_tree = (pop_target ? pop_target : target_option_default_node); 545 cl_target_option_restore (&global_options, 546 TREE_TARGET_OPTION (cur_tree)); 547 } 548 else 549 { 550 cur_tree = ix86_valid_target_attribute_tree (args, &global_options, 551 &global_options_set); 552 if (!cur_tree || cur_tree == error_mark_node) 553 { 554 cl_target_option_restore (&global_options, 555 TREE_TARGET_OPTION (prev_tree)); 556 return false; 557 } 558 } 559 560 target_option_current_node = cur_tree; 561 ix86_reset_previous_fndecl (); 562 563 /* Figure out the previous/current isa, arch, tune and the differences. */ 564 prev_opt = TREE_TARGET_OPTION (prev_tree); 565 cur_opt = TREE_TARGET_OPTION (cur_tree); 566 prev_isa = prev_opt->x_ix86_isa_flags; 567 cur_isa = cur_opt->x_ix86_isa_flags; 568 diff_isa = (prev_isa ^ cur_isa); 569 prev_isa2 = prev_opt->x_ix86_isa_flags2; 570 cur_isa2 = cur_opt->x_ix86_isa_flags2; 571 diff_isa2 = (prev_isa2 ^ cur_isa2); 572 prev_arch = (enum processor_type) prev_opt->arch; 573 prev_tune = (enum processor_type) prev_opt->tune; 574 cur_arch = (enum processor_type) cur_opt->arch; 575 cur_tune = (enum processor_type) cur_opt->tune; 576 577 /* If the same processor is used for both previous and current options, don't 578 change the macros. */ 579 if (cur_arch == prev_arch) 580 cur_arch = prev_arch = PROCESSOR_max; 581 582 if (cur_tune == prev_tune) 583 cur_tune = prev_tune = PROCESSOR_max; 584 585 /* Undef all of the macros for that are no longer current. */ 586 ix86_target_macros_internal (prev_isa & diff_isa, 587 prev_isa2 & diff_isa2, 588 prev_arch, 589 prev_tune, 590 (enum fpmath_unit) prev_opt->x_ix86_fpmath, 591 cpp_undef); 592 593 /* For the definitions, ensure all newly defined macros are considered 594 as used for -Wunused-macros. There is no point warning about the 595 compiler predefined macros. */ 596 cpp_options *cpp_opts = cpp_get_options (parse_in); 597 unsigned char saved_warn_unused_macros = cpp_opts->warn_unused_macros; 598 cpp_opts->warn_unused_macros = 0; 599 600 /* Define all of the macros for new options that were just turned on. */ 601 ix86_target_macros_internal (cur_isa & diff_isa, 602 cur_isa2 & diff_isa2, 603 cur_arch, 604 cur_tune, 605 (enum fpmath_unit) cur_opt->x_ix86_fpmath, 606 cpp_define); 607 608 cpp_opts->warn_unused_macros = saved_warn_unused_macros; 609 610 return true; 611 } 612 613 /* Function to tell the preprocessor about the defines for the current target. */ 614 615 void 616 ix86_target_macros (void) 617 { 618 /* 32/64-bit won't change with target specific options, so do the assert and 619 builtin_define_std calls here. */ 620 if (TARGET_64BIT) 621 { 622 cpp_assert (parse_in, "cpu=x86_64"); 623 cpp_assert (parse_in, "machine=x86_64"); 624 cpp_define (parse_in, "__amd64"); 625 cpp_define (parse_in, "__amd64__"); 626 cpp_define (parse_in, "__x86_64"); 627 cpp_define (parse_in, "__x86_64__"); 628 if (TARGET_X32) 629 { 630 cpp_define (parse_in, "_ILP32"); 631 cpp_define (parse_in, "__ILP32__"); 632 } 633 } 634 else 635 { 636 cpp_assert (parse_in, "cpu=i386"); 637 cpp_assert (parse_in, "machine=i386"); 638 builtin_define_std ("i386"); 639 } 640 641 if (!TARGET_80387) 642 cpp_define (parse_in, "_SOFT_FLOAT"); 643 644 if (TARGET_LONG_DOUBLE_64) 645 cpp_define (parse_in, "__LONG_DOUBLE_64__"); 646 647 if (TARGET_LONG_DOUBLE_128) 648 cpp_define (parse_in, "__LONG_DOUBLE_128__"); 649 650 if (TARGET_128BIT_LONG_DOUBLE) 651 cpp_define (parse_in, "__SIZEOF_FLOAT80__=16"); 652 else 653 cpp_define (parse_in, "__SIZEOF_FLOAT80__=12"); 654 655 cpp_define (parse_in, "__SIZEOF_FLOAT128__=16"); 656 657 cpp_define_formatted (parse_in, "__ATOMIC_HLE_ACQUIRE=%d", IX86_HLE_ACQUIRE); 658 cpp_define_formatted (parse_in, "__ATOMIC_HLE_RELEASE=%d", IX86_HLE_RELEASE); 659 660 cpp_define (parse_in, "__GCC_ASM_FLAG_OUTPUTS__"); 661 662 ix86_target_macros_internal (ix86_isa_flags, 663 ix86_isa_flags2, 664 ix86_arch, 665 ix86_tune, 666 ix86_fpmath, 667 cpp_define); 668 669 cpp_define (parse_in, "__SEG_FS"); 670 cpp_define (parse_in, "__SEG_GS"); 671 672 if (flag_cf_protection != CF_NONE) 673 cpp_define_formatted (parse_in, "__CET__=%d", 674 flag_cf_protection & ~CF_SET); 675 } 676 677 678 /* Register target pragmas. We need to add the hook for parsing #pragma GCC 679 option here rather than in i386.c since it will pull in various preprocessor 680 functions, and those are not present in languages like fortran without a 681 preprocessor. */ 682 683 void 684 ix86_register_pragmas (void) 685 { 686 /* Update pragma hook to allow parsing #pragma GCC target. */ 687 targetm.target_option.pragma_parse = ix86_pragma_target_parse; 688 689 c_register_addr_space ("__seg_fs", ADDR_SPACE_SEG_FS); 690 c_register_addr_space ("__seg_gs", ADDR_SPACE_SEG_GS); 691 692 #ifdef REGISTER_SUBTARGET_PRAGMAS 693 REGISTER_SUBTARGET_PRAGMAS (); 694 #endif 695 } 696