1; Options for the IA-32 and AMD64 ports of the compiler. 2 3; Copyright (C) 2005-2018 Free Software Foundation, Inc. 4; 5; This file is part of GCC. 6; 7; GCC is free software; you can redistribute it and/or modify it under 8; the terms of the GNU General Public License as published by the Free 9; Software Foundation; either version 3, or (at your option) any later 10; version. 11; 12; GCC is distributed in the hope that it will be useful, but WITHOUT ANY 13; WARRANTY; without even the implied warranty of MERCHANTABILITY or 14; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 15; for more details. 16; 17; You should have received a copy of the GNU General Public License 18; along with GCC; see the file COPYING3. If not see 19; <http://www.gnu.org/licenses/>. 20 21HeaderInclude 22config/i386/i386-opts.h 23 24; Bit flags that specify the ISA we are compiling for. 25Variable 26HOST_WIDE_INT ix86_isa_flags = TARGET_64BIT_DEFAULT | TARGET_SUBTARGET_ISA_DEFAULT 27 28Variable 29HOST_WIDE_INT ix86_isa_flags2 = 0 30 31; A mask of ix86_isa_flags that includes bit X if X was set or cleared 32; on the command line. 33Variable 34HOST_WIDE_INT ix86_isa_flags_explicit 35 36Variable 37HOST_WIDE_INT ix86_isa_flags2_explicit 38 39; Additional target flags 40Variable 41int ix86_target_flags 42 43TargetVariable 44int recip_mask = RECIP_MASK_DEFAULT 45 46Variable 47int recip_mask_explicit 48 49TargetSave 50int x_recip_mask_explicit 51 52;; Definitions to add to the cl_target_option structure 53;; -march= processor 54TargetSave 55unsigned char arch 56 57;; -mtune= processor 58TargetSave 59unsigned char tune 60 61;; -march= processor-string 62TargetSave 63const char *x_ix86_arch_string 64 65;; -mtune= processor-string 66TargetSave 67const char *x_ix86_tune_string 68 69;; CPU schedule model 70TargetSave 71unsigned char schedule 72 73;; True if processor has SSE prefetch instruction. 74TargetSave 75unsigned char prefetch_sse 76 77;; branch cost 78TargetSave 79unsigned char branch_cost 80 81;; which flags were passed by the user 82TargetSave 83HOST_WIDE_INT x_ix86_isa_flags2_explicit 84 85;; which flags were passed by the user 86TargetSave 87HOST_WIDE_INT x_ix86_isa_flags_explicit 88 89;; whether -mtune was not specified 90TargetSave 91unsigned char tune_defaulted 92 93;; whether -march was specified 94TargetSave 95unsigned char arch_specified 96 97;; -mcmodel= model 98TargetSave 99enum cmodel x_ix86_cmodel 100 101;; -mabi= 102TargetSave 103enum calling_abi x_ix86_abi 104 105;; -masm= 106TargetSave 107enum asm_dialect x_ix86_asm_dialect 108 109;; -mbranch-cost= 110TargetSave 111int x_ix86_branch_cost 112 113;; -mdump-tune-features= 114TargetSave 115int x_ix86_dump_tunes 116 117;; -mstackrealign= 118TargetSave 119int x_ix86_force_align_arg_pointer 120 121;; -mforce-drap= 122TargetSave 123int x_ix86_force_drap 124 125;; -mincoming-stack-boundary= 126TargetSave 127int x_ix86_incoming_stack_boundary_arg 128 129;; -maddress-mode= 130TargetSave 131enum pmode x_ix86_pmode 132 133;; -mpreferred-stack-boundary= 134TargetSave 135int x_ix86_preferred_stack_boundary_arg 136 137;; -mrecip= 138TargetSave 139const char *x_ix86_recip_name 140 141;; -mregparm= 142TargetSave 143int x_ix86_regparm 144 145;; -mlarge-data-threshold= 146TargetSave 147int x_ix86_section_threshold 148 149;; -msse2avx= 150TargetSave 151int x_ix86_sse2avx 152 153;; -mstack-protector-guard= 154TargetSave 155enum stack_protector_guard x_ix86_stack_protector_guard 156 157;; -mstringop-strategy= 158TargetSave 159enum stringop_alg x_ix86_stringop_alg 160 161;; -mtls-dialect= 162TargetSave 163enum tls_dialect x_ix86_tls_dialect 164 165;; -mtune-ctrl= 166TargetSave 167const char *x_ix86_tune_ctrl_string 168 169;; -mmemcpy-strategy= 170TargetSave 171const char *x_ix86_tune_memcpy_strategy 172 173;; -mmemset-strategy= 174TargetSave 175const char *x_ix86_tune_memset_strategy 176 177;; -mno-default= 178TargetSave 179int x_ix86_tune_no_default 180 181;; -mveclibabi= 182TargetSave 183enum ix86_veclibabi x_ix86_veclibabi_type 184 185;; -mprefer-vector-width= 186TargetSave 187enum prefer_vector_width x_prefer_vector_width_type 188 189;; x86 options 190m128bit-long-double 191Target RejectNegative Report Mask(128BIT_LONG_DOUBLE) Save 192sizeof(long double) is 16. 193 194m80387 195Target Report Mask(80387) Save 196Use hardware fp. 197 198m96bit-long-double 199Target RejectNegative Report InverseMask(128BIT_LONG_DOUBLE) Save 200sizeof(long double) is 12. 201 202mlong-double-80 203Target Report RejectNegative Negative(mlong-double-64) InverseMask(LONG_DOUBLE_64) Save 204Use 80-bit long double. 205 206mlong-double-64 207Target Report RejectNegative Negative(mlong-double-128) Mask(LONG_DOUBLE_64) InverseMask(LONG_DOUBLE_128) Save 208Use 64-bit long double. 209 210mlong-double-128 211Target Report RejectNegative Negative(mlong-double-80) Mask(LONG_DOUBLE_128) InverseMask(LONG_DOUBLE_64) Save 212Use 128-bit long double. 213 214maccumulate-outgoing-args 215Target Report Mask(ACCUMULATE_OUTGOING_ARGS) Save 216Reserve space for outgoing arguments in the function prologue. 217 218malign-double 219Target Report Mask(ALIGN_DOUBLE) Save 220Align some doubles on dword boundary. 221 222malign-functions= 223Target RejectNegative Joined UInteger 224Function starts are aligned to this power of 2. 225 226malign-jumps= 227Target RejectNegative Joined UInteger 228Jump targets are aligned to this power of 2. 229 230malign-loops= 231Target RejectNegative Joined UInteger 232Loop code aligned to this power of 2. 233 234malign-stringops 235Target RejectNegative Report InverseMask(NO_ALIGN_STRINGOPS, ALIGN_STRINGOPS) Save 236Align destination of the string operations. 237 238malign-data= 239Target RejectNegative Joined Var(ix86_align_data_type) Enum(ix86_align_data) Init(ix86_align_data_type_compat) 240Use the given data alignment. 241 242Enum 243Name(ix86_align_data) Type(enum ix86_align_data) 244Known data alignment choices (for use with the -malign-data= option): 245 246EnumValue 247Enum(ix86_align_data) String(compat) Value(ix86_align_data_type_compat) 248 249EnumValue 250Enum(ix86_align_data) String(abi) Value(ix86_align_data_type_abi) 251 252EnumValue 253Enum(ix86_align_data) String(cacheline) Value(ix86_align_data_type_cacheline) 254 255march= 256Target RejectNegative Joined Var(ix86_arch_string) 257Generate code for given CPU. 258 259masm= 260Target RejectNegative Joined Enum(asm_dialect) Var(ix86_asm_dialect) Init(ASM_ATT) 261Use given assembler dialect. 262 263Enum 264Name(asm_dialect) Type(enum asm_dialect) 265Known assembler dialects (for use with the -masm= option): 266 267EnumValue 268Enum(asm_dialect) String(intel) Value(ASM_INTEL) 269 270EnumValue 271Enum(asm_dialect) String(att) Value(ASM_ATT) 272 273mbranch-cost= 274Target RejectNegative Joined UInteger Var(ix86_branch_cost) IntegerRange(0, 5) 275Branches are this expensive (arbitrary units). 276 277mlarge-data-threshold= 278Target RejectNegative Joined UInteger Var(ix86_section_threshold) Init(DEFAULT_LARGE_SECTION_THRESHOLD) 279-mlarge-data-threshold=<number> Data greater than given threshold will go into .ldata section in x86-64 medium model. 280 281mcmodel= 282Target RejectNegative Joined Enum(cmodel) Var(ix86_cmodel) Init(CM_32) 283Use given x86-64 code model. 284 285Enum 286Name(cmodel) Type(enum cmodel) 287Known code models (for use with the -mcmodel= option): 288 289EnumValue 290Enum(cmodel) String(small) Value(CM_SMALL) 291 292EnumValue 293Enum(cmodel) String(medium) Value(CM_MEDIUM) 294 295EnumValue 296Enum(cmodel) String(large) Value(CM_LARGE) 297 298EnumValue 299Enum(cmodel) String(32) Value(CM_32) 300 301EnumValue 302Enum(cmodel) String(kernel) Value(CM_KERNEL) 303 304maddress-mode= 305Target RejectNegative Joined Enum(pmode) Var(ix86_pmode) Init(PMODE_SI) 306Use given address mode. 307 308Enum 309Name(pmode) Type(enum pmode) 310Known address mode (for use with the -maddress-mode= option): 311 312EnumValue 313Enum(pmode) String(short) Value(PMODE_SI) 314 315EnumValue 316Enum(pmode) String(long) Value(PMODE_DI) 317 318mcpu= 319Target RejectNegative Joined Undocumented Alias(mtune=) Warn(%<-mcpu=%> is deprecated; use %<-mtune=%> or %<-march=%> instead) 320 321mfancy-math-387 322Target RejectNegative Report InverseMask(NO_FANCY_MATH_387, USE_FANCY_MATH_387) Save 323Generate sin, cos, sqrt for FPU. 324 325mforce-drap 326Target Report Var(ix86_force_drap) 327Always use Dynamic Realigned Argument Pointer (DRAP) to realign stack. 328 329mfp-ret-in-387 330Target Report Mask(FLOAT_RETURNS) Save 331Return values of functions in FPU registers. 332 333mfpmath= 334Target RejectNegative Joined Var(ix86_fpmath) Enum(fpmath_unit) Init(FPMATH_387) Save 335Generate floating point mathematics using given instruction set. 336 337Enum 338Name(fpmath_unit) Type(enum fpmath_unit) 339Valid arguments to -mfpmath=: 340 341EnumValue 342Enum(fpmath_unit) String(387) Value(FPMATH_387) 343 344EnumValue 345Enum(fpmath_unit) String(sse) Value(FPMATH_SSE) 346 347EnumValue 348Enum(fpmath_unit) String(387,sse) Value({(enum fpmath_unit) (FPMATH_SSE | FPMATH_387)}) 349 350EnumValue 351Enum(fpmath_unit) String(387+sse) Value({(enum fpmath_unit) (FPMATH_SSE | FPMATH_387)}) 352 353EnumValue 354Enum(fpmath_unit) String(sse,387) Value({(enum fpmath_unit) (FPMATH_SSE | FPMATH_387)}) 355 356EnumValue 357Enum(fpmath_unit) String(sse+387) Value({(enum fpmath_unit) (FPMATH_SSE | FPMATH_387)}) 358 359EnumValue 360Enum(fpmath_unit) String(both) Value({(enum fpmath_unit) (FPMATH_SSE | FPMATH_387)}) 361 362mhard-float 363Target RejectNegative Mask(80387) Save 364Use hardware fp. 365 366mieee-fp 367Target Report Mask(IEEE_FP) Save 368Use IEEE math for fp comparisons. 369 370minline-all-stringops 371Target Report Mask(INLINE_ALL_STRINGOPS) Save 372Inline all known string operations. 373 374minline-stringops-dynamically 375Target Report Mask(INLINE_STRINGOPS_DYNAMICALLY) Save 376Inline memset/memcpy string operations, but perform inline version only for small blocks. 377 378mintel-syntax 379Target Undocumented Alias(masm=, intel, att) Warn(%<-mintel-syntax%> and %<-mno-intel-syntax%> are deprecated; use %<-masm=intel%> and %<-masm=att%> instead) 380;; Deprecated 381 382mms-bitfields 383Target Report Mask(MS_BITFIELD_LAYOUT) Save 384Use native (MS) bitfield layout. 385 386mno-align-stringops 387Target RejectNegative Report Mask(NO_ALIGN_STRINGOPS) Undocumented Save 388 389mno-fancy-math-387 390Target RejectNegative Report Mask(NO_FANCY_MATH_387) Undocumented Save 391 392mno-push-args 393Target RejectNegative Report Mask(NO_PUSH_ARGS) Undocumented Save 394 395mno-red-zone 396Target RejectNegative Report Mask(NO_RED_ZONE) Undocumented Save 397 398momit-leaf-frame-pointer 399Target Report Mask(OMIT_LEAF_FRAME_POINTER) Save 400Omit the frame pointer in leaf functions. 401 402mpc32 403Target RejectNegative Report 404Set 80387 floating-point precision to 32-bit. 405 406mpc64 407Target RejectNegative Report 408Set 80387 floating-point precision to 64-bit. 409 410mpc80 411Target RejectNegative Report 412Set 80387 floating-point precision to 80-bit. 413 414mpreferred-stack-boundary= 415Target RejectNegative Joined UInteger Var(ix86_preferred_stack_boundary_arg) 416Attempt to keep stack aligned to this power of 2. 417 418mincoming-stack-boundary= 419Target RejectNegative Joined UInteger Var(ix86_incoming_stack_boundary_arg) 420Assume incoming stack aligned to this power of 2. 421 422mpush-args 423Target Report InverseMask(NO_PUSH_ARGS, PUSH_ARGS) Save 424Use push instructions to save outgoing arguments. 425 426mred-zone 427Target RejectNegative Report InverseMask(NO_RED_ZONE, RED_ZONE) Save 428Use red-zone in the x86-64 code. 429 430mregparm= 431Target RejectNegative Joined UInteger Var(ix86_regparm) 432Number of registers used to pass integer arguments. 433 434mrtd 435Target Report Mask(RTD) Save 436Alternate calling convention. 437 438msoft-float 439Target InverseMask(80387) Save 440Do not use hardware fp. 441 442msseregparm 443Target RejectNegative Mask(SSEREGPARM) Save 444Use SSE register passing conventions for SF and DF mode. 445 446mstackrealign 447Target Report Var(ix86_force_align_arg_pointer) 448Realign stack in prologue. 449 450mstack-arg-probe 451Target Report Mask(STACK_PROBE) Save 452Enable stack probing. 453 454mmemcpy-strategy= 455Target RejectNegative Joined Var(ix86_tune_memcpy_strategy) 456Specify memcpy expansion strategy when expected size is known. 457 458mmemset-strategy= 459Target RejectNegative Joined Var(ix86_tune_memset_strategy) 460Specify memset expansion strategy when expected size is known. 461 462mstringop-strategy= 463Target RejectNegative Joined Enum(stringop_alg) Var(ix86_stringop_alg) Init(no_stringop) 464Chose strategy to generate stringop using. 465 466Enum 467Name(stringop_alg) Type(enum stringop_alg) 468Valid arguments to -mstringop-strategy=: 469 470EnumValue 471Enum(stringop_alg) String(rep_byte) Value(rep_prefix_1_byte) 472 473EnumValue 474Enum(stringop_alg) String(libcall) Value(libcall) 475 476EnumValue 477Enum(stringop_alg) String(rep_4byte) Value(rep_prefix_4_byte) 478 479EnumValue 480Enum(stringop_alg) String(rep_8byte) Value(rep_prefix_8_byte) 481 482EnumValue 483Enum(stringop_alg) String(byte_loop) Value(loop_1_byte) 484 485EnumValue 486Enum(stringop_alg) String(loop) Value(loop) 487 488EnumValue 489Enum(stringop_alg) String(unrolled_loop) Value(unrolled_loop) 490 491EnumValue 492Enum(stringop_alg) String(vector_loop) Value(vector_loop) 493 494mtls-dialect= 495Target RejectNegative Joined Var(ix86_tls_dialect) Enum(tls_dialect) Init(TLS_DIALECT_GNU) 496Use given thread-local storage dialect. 497 498Enum 499Name(tls_dialect) Type(enum tls_dialect) 500Known TLS dialects (for use with the -mtls-dialect= option): 501 502EnumValue 503Enum(tls_dialect) String(gnu) Value(TLS_DIALECT_GNU) 504 505EnumValue 506Enum(tls_dialect) String(gnu2) Value(TLS_DIALECT_GNU2) 507 508mtls-direct-seg-refs 509Target Report Mask(TLS_DIRECT_SEG_REFS) 510Use direct references against %gs when accessing tls data. 511 512mtune= 513Target RejectNegative Joined Var(ix86_tune_string) 514Schedule code for given CPU. 515 516mtune-ctrl= 517Target RejectNegative Joined Var(ix86_tune_ctrl_string) 518Fine grain control of tune features. 519 520mno-default 521Target RejectNegative Var(ix86_tune_no_default) 522Clear all tune features. 523 524mdump-tune-features 525Target RejectNegative Var(ix86_dump_tunes) 526 527miamcu 528Target Report Mask(IAMCU) 529Generate code that conforms to Intel MCU psABI. 530 531mabi= 532Target RejectNegative Joined Var(ix86_abi) Enum(calling_abi) Init(SYSV_ABI) 533Generate code that conforms to the given ABI. 534 535Enum 536Name(calling_abi) Type(enum calling_abi) 537Known ABIs (for use with the -mabi= option): 538 539EnumValue 540Enum(calling_abi) String(sysv) Value(SYSV_ABI) 541 542EnumValue 543Enum(calling_abi) String(ms) Value(MS_ABI) 544 545mcall-ms2sysv-xlogues 546Target Report Mask(CALL_MS2SYSV_XLOGUES) Save 547Use libgcc stubs to save and restore registers clobbered by 64-bit Microsoft to System V ABI calls. 548 549mveclibabi= 550Target RejectNegative Joined Var(ix86_veclibabi_type) Enum(ix86_veclibabi) Init(ix86_veclibabi_type_none) 551Vector library ABI to use. 552 553Enum 554Name(ix86_veclibabi) Type(enum ix86_veclibabi) 555Known vectorization library ABIs (for use with the -mveclibabi= option): 556 557EnumValue 558Enum(ix86_veclibabi) String(svml) Value(ix86_veclibabi_type_svml) 559 560EnumValue 561Enum(ix86_veclibabi) String(acml) Value(ix86_veclibabi_type_acml) 562 563mvect8-ret-in-mem 564Target Report Mask(VECT8_RETURNS) Save 565Return 8-byte vectors in memory. 566 567mrecip 568Target Report Mask(RECIP) Save 569Generate reciprocals instead of divss and sqrtss. 570 571mrecip= 572Target Report RejectNegative Joined Var(ix86_recip_name) 573Control generation of reciprocal estimates. 574 575mcld 576Target Report Mask(CLD) Save 577Generate cld instruction in the function prologue. 578 579mvzeroupper 580Target Report Mask(VZEROUPPER) Save 581Generate vzeroupper instruction before a transfer of control flow out of 582the function. 583 584mstv 585Target Report Mask(STV) Save 586Disable Scalar to Vector optimization pass transforming 64-bit integer 587computations into a vector ones. 588 589mdispatch-scheduler 590Target RejectNegative Var(flag_dispatch_scheduler) 591Do dispatch scheduling if processor is bdver1, bdver2, bdver3, bdver4 592or znver1 and Haifa scheduling is selected. 593 594mprefer-avx128 595Target Alias(mprefer-vector-width=, 128, 256) 596Use 128-bit AVX instructions instead of 256-bit AVX instructions in the auto-vectorizer. 597 598mprefer-vector-width= 599Target Report RejectNegative Joined Var(prefer_vector_width_type) Enum(prefer_vector_width) Init(PVW_NONE) 600Use given register vector width instructions instead of maximum register width in the auto-vectorizer. 601 602Enum 603Name(prefer_vector_width) Type(enum prefer_vector_width) 604Known preferred register vector length (to use with the -mprefer-vector-width= option) 605 606EnumValue 607Enum(prefer_vector_width) String(none) Value(PVW_NONE) 608 609EnumValue 610Enum(prefer_vector_width) String(128) Value(PVW_AVX128) 611 612EnumValue 613Enum(prefer_vector_width) String(256) Value(PVW_AVX256) 614 615EnumValue 616Enum(prefer_vector_width) String(512) Value(PVW_AVX512) 617 618;; ISA support 619 620m32 621Target RejectNegative Negative(m64) Report InverseMask(ISA_64BIT) Var(ix86_isa_flags) Save 622Generate 32bit i386 code. 623 624m64 625Target RejectNegative Negative(mx32) Report Mask(ABI_64) Var(ix86_isa_flags) Save 626Generate 64bit x86-64 code. 627 628mx32 629Target RejectNegative Negative(m16) Report Mask(ABI_X32) Var(ix86_isa_flags) Save 630Generate 32bit x86-64 code. 631 632m16 633Target RejectNegative Negative(m32) Report Mask(CODE16) InverseMask(ISA_64BIT) Var(ix86_isa_flags) Save 634Generate 16bit i386 code. 635 636mmmx 637Target Report Mask(ISA_MMX) Var(ix86_isa_flags) Save 638Support MMX built-in functions. 639 640m3dnow 641Target Report Mask(ISA_3DNOW) Var(ix86_isa_flags) Save 642Support 3DNow! built-in functions. 643 644m3dnowa 645Target Report Mask(ISA_3DNOW_A) Var(ix86_isa_flags) Save 646Support Athlon 3Dnow! built-in functions. 647 648msse 649Target Report Mask(ISA_SSE) Var(ix86_isa_flags) Save 650Support MMX and SSE built-in functions and code generation. 651 652msse2 653Target Report Mask(ISA_SSE2) Var(ix86_isa_flags) Save 654Support MMX, SSE and SSE2 built-in functions and code generation. 655 656msse3 657Target Report Mask(ISA_SSE3) Var(ix86_isa_flags) Save 658Support MMX, SSE, SSE2 and SSE3 built-in functions and code generation. 659 660mssse3 661Target Report Mask(ISA_SSSE3) Var(ix86_isa_flags) Save 662Support MMX, SSE, SSE2, SSE3 and SSSE3 built-in functions and code generation. 663 664msse4.1 665Target Report Mask(ISA_SSE4_1) Var(ix86_isa_flags) Save 666Support MMX, SSE, SSE2, SSE3, SSSE3 and SSE4.1 built-in functions and code generation. 667 668msse4.2 669Target Report Mask(ISA_SSE4_2) Var(ix86_isa_flags) Save 670Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1 and SSE4.2 built-in functions and code generation. 671 672msse4 673Target RejectNegative Report Mask(ISA_SSE4_2) Var(ix86_isa_flags) Save 674Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1 and SSE4.2 built-in functions and code generation. 675 676mno-sse4 677Target RejectNegative Report InverseMask(ISA_SSE4_1) Var(ix86_isa_flags) Save 678Do not support SSE4.1 and SSE4.2 built-in functions and code generation. 679 680msse5 681Target Undocumented Alias(mavx) Warn(%<-msse5%> was removed) 682;; Deprecated 683 684mavx 685Target Report Mask(ISA_AVX) Var(ix86_isa_flags) Save 686Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2 and AVX built-in functions and code generation. 687 688mavx2 689Target Report Mask(ISA_AVX2) Var(ix86_isa_flags) Save 690Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX and AVX2 built-in functions and code generation. 691 692mavx512f 693Target Report Mask(ISA_AVX512F) Var(ix86_isa_flags) Save 694Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F built-in functions and code generation. 695 696mavx512pf 697Target Report Mask(ISA_AVX512PF) Var(ix86_isa_flags) Save 698Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512PF built-in functions and code generation. 699 700mavx512er 701Target Report Mask(ISA_AVX512ER) Var(ix86_isa_flags) Save 702Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512ER built-in functions and code generation. 703 704mavx512cd 705Target Report Mask(ISA_AVX512CD) Var(ix86_isa_flags) Save 706Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512CD built-in functions and code generation. 707 708mavx512dq 709Target Report Mask(ISA_AVX512DQ) Var(ix86_isa_flags) Save 710Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512DQ built-in functions and code generation. 711 712mavx512bw 713Target Report Mask(ISA_AVX512BW) Var(ix86_isa_flags) Save 714Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512BW built-in functions and code generation. 715 716mavx512vl 717Target Report Mask(ISA_AVX512VL) Var(ix86_isa_flags) Save 718Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512VL built-in functions and code generation. 719 720mavx512ifma 721Target Report Mask(ISA_AVX512IFMA) Var(ix86_isa_flags) Save 722Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512IFMA built-in functions and code generation. 723 724mavx512vbmi 725Target Report Mask(ISA_AVX512VBMI) Var(ix86_isa_flags) Save 726Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512VBMI built-in functions and code generation. 727 728mavx5124fmaps 729Target Report Mask(ISA_AVX5124FMAPS) Var(ix86_isa_flags2) Save 730Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX512F and AVX5124FMAPS built-in functions and code generation. 731 732mavx5124vnniw 733Target Report Mask(ISA_AVX5124VNNIW) Var(ix86_isa_flags2) Save 734Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX512F and AVX5124VNNIW built-in functions and code generation. 735 736mavx512vpopcntdq 737Target Report Mask(ISA_AVX512VPOPCNTDQ) Var(ix86_isa_flags) Save 738Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX512F and AVX512VPOPCNTDQ built-in functions and code generation. 739 740mavx512vbmi2 741Target Report Mask(ISA_AVX512VBMI2) Var(ix86_isa_flags) Save 742Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX512F and AVX512VBMI2 built-in functions and code generation. 743 744mavx512vnni 745Target Report Mask(ISA_AVX512VNNI) Var(ix86_isa_flags) Save 746Support AVX512VNNI built-in functions and code generation. 747 748mavx512bitalg 749Target Report Mask(ISA_AVX512BITALG) Var(ix86_isa_flags) Save 750Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX512F and AVX512BITALG built-in functions and code generation. 751 752mfma 753Target Report Mask(ISA_FMA) Var(ix86_isa_flags) Save 754Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX and FMA built-in functions and code generation. 755 756msse4a 757Target Report Mask(ISA_SSE4A) Var(ix86_isa_flags) Save 758Support MMX, SSE, SSE2, SSE3 and SSE4A built-in functions and code generation. 759 760mfma4 761Target Report Mask(ISA_FMA4) Var(ix86_isa_flags) Save 762Support FMA4 built-in functions and code generation. 763 764mxop 765Target Report Mask(ISA_XOP) Var(ix86_isa_flags) Save 766Support XOP built-in functions and code generation. 767 768mlwp 769Target Report Mask(ISA_LWP) Var(ix86_isa_flags) Save 770Support LWP built-in functions and code generation. 771 772mabm 773Target Report Mask(ISA_ABM) Var(ix86_isa_flags) Save 774Support code generation of Advanced Bit Manipulation (ABM) instructions. 775 776mpopcnt 777Target Report Mask(ISA_POPCNT) Var(ix86_isa_flags) Save 778Support code generation of popcnt instruction. 779 780mpconfig 781Target Report Mask(ISA_PCONFIG) Var(ix86_isa_flags2) Save 782Support PCONFIG built-in functions and code generation. 783 784mwbnoinvd 785Target Report Mask(ISA_WBNOINVD) Var(ix86_isa_flags2) Save 786Support WBNOINVD built-in functions and code generation. 787 788msgx 789Target Report Mask(ISA_SGX) Var(ix86_isa_flags2) Save 790Support SGX built-in functions and code generation. 791 792mrdpid 793Target Report Mask(ISA_RDPID) Var(ix86_isa_flags2) Save 794Support RDPID built-in functions and code generation. 795 796mgfni 797Target Report Mask(ISA_GFNI) Var(ix86_isa_flags) Save 798Support GFNI built-in functions and code generation. 799 800mvaes 801Target Report Mask(ISA_VAES) Var(ix86_isa_flags2) Save 802Support VAES built-in functions and code generation. 803 804mvpclmulqdq 805Target Report Mask(ISA_VPCLMULQDQ) Var(ix86_isa_flags) Save 806Support VPCLMULQDQ built-in functions and code generation. 807 808mbmi 809Target Report Mask(ISA_BMI) Var(ix86_isa_flags) Save 810Support BMI built-in functions and code generation. 811 812mbmi2 813Target Report Mask(ISA_BMI2) Var(ix86_isa_flags) Save 814Support BMI2 built-in functions and code generation. 815 816mlzcnt 817Target Report Mask(ISA_LZCNT) Var(ix86_isa_flags) Save 818Support LZCNT built-in function and code generation. 819 820mhle 821Target Report Mask(ISA_HLE) Var(ix86_isa_flags2) Save 822Support Hardware Lock Elision prefixes. 823 824mrdseed 825Target Report Mask(ISA_RDSEED) Var(ix86_isa_flags) Save 826Support RDSEED instruction. 827 828mprfchw 829Target Report Mask(ISA_PRFCHW) Var(ix86_isa_flags) Save 830Support PREFETCHW instruction. 831 832madx 833Target Report Mask(ISA_ADX) Var(ix86_isa_flags) Save 834Support flag-preserving add-carry instructions. 835 836mclflushopt 837Target Report Mask(ISA_CLFLUSHOPT) Var(ix86_isa_flags) Save 838Support CLFLUSHOPT instructions. 839 840mclwb 841Target Report Mask(ISA_CLWB) Var(ix86_isa_flags) Save 842Support CLWB instruction. 843 844mpcommit 845Target Undocumented Warn(%<-mpcommit%> was deprecated) 846;; Deprecated 847 848mfxsr 849Target Report Mask(ISA_FXSR) Var(ix86_isa_flags) Save 850Support FXSAVE and FXRSTOR instructions. 851 852mxsave 853Target Report Mask(ISA_XSAVE) Var(ix86_isa_flags) Save 854Support XSAVE and XRSTOR instructions. 855 856mxsaveopt 857Target Report Mask(ISA_XSAVEOPT) Var(ix86_isa_flags) Save 858Support XSAVEOPT instruction. 859 860mxsavec 861Target Report Mask(ISA_XSAVEC) Var(ix86_isa_flags) Save 862Support XSAVEC instructions. 863 864mxsaves 865Target Report Mask(ISA_XSAVES) Var(ix86_isa_flags) Save 866Support XSAVES and XRSTORS instructions. 867 868mtbm 869Target Report Mask(ISA_TBM) Var(ix86_isa_flags) Save 870Support TBM built-in functions and code generation. 871 872mcx16 873Target Report Mask(ISA_CX16) Var(ix86_isa_flags2) Save 874Support code generation of cmpxchg16b instruction. 875 876msahf 877Target Report Mask(ISA_SAHF) Var(ix86_isa_flags) Save 878Support code generation of sahf instruction in 64bit x86-64 code. 879 880mmovbe 881Target Report Mask(ISA_MOVBE) Var(ix86_isa_flags2) Save 882Support code generation of movbe instruction. 883 884mcrc32 885Target Report Mask(ISA_CRC32) Var(ix86_isa_flags) Save 886Support code generation of crc32 instruction. 887 888maes 889Target Report Mask(ISA_AES) Var(ix86_isa_flags) Save 890Support AES built-in functions and code generation. 891 892msha 893Target Report Mask(ISA_SHA) Var(ix86_isa_flags) Save 894Support SHA1 and SHA256 built-in functions and code generation. 895 896mpclmul 897Target Report Mask(ISA_PCLMUL) Var(ix86_isa_flags) Save 898Support PCLMUL built-in functions and code generation. 899 900msse2avx 901Target Report Var(ix86_sse2avx) 902Encode SSE instructions with VEX prefix. 903 904mfsgsbase 905Target Report Mask(ISA_FSGSBASE) Var(ix86_isa_flags) Save 906Support FSGSBASE built-in functions and code generation. 907 908mrdrnd 909Target Report Mask(ISA_RDRND) Var(ix86_isa_flags) Save 910Support RDRND built-in functions and code generation. 911 912mf16c 913Target Report Mask(ISA_F16C) Var(ix86_isa_flags) Save 914Support F16C built-in functions and code generation. 915 916mprefetchwt1 917Target Report Mask(ISA_PREFETCHWT1) Var(ix86_isa_flags) Save 918Support PREFETCHWT1 built-in functions and code generation. 919 920mfentry 921Target Report Var(flag_fentry) 922Emit profiling counter call at function entry before prologue. 923 924mrecord-mcount 925Target Report Var(flag_record_mcount) 926Generate __mcount_loc section with all mcount or __fentry__ calls. 927 928mnop-mcount 929Target Report Var(flag_nop_mcount) 930Generate mcount/__fentry__ calls as nops. To activate they need to be 931patched in. 932 933mskip-rax-setup 934Target Report Var(flag_skip_rax_setup) 935Skip setting up RAX register when passing variable arguments. 936 937m8bit-idiv 938Target Report Mask(USE_8BIT_IDIV) Save 939Expand 32bit/64bit integer divide into 8bit unsigned integer divide with run-time check. 940 941mavx256-split-unaligned-load 942Target Report Mask(AVX256_SPLIT_UNALIGNED_LOAD) Save 943Split 32-byte AVX unaligned load. 944 945mavx256-split-unaligned-store 946Target Report Mask(AVX256_SPLIT_UNALIGNED_STORE) Save 947Split 32-byte AVX unaligned store. 948 949mrtm 950Target Report Mask(ISA_RTM) Var(ix86_isa_flags) Save 951Support RTM built-in functions and code generation. 952 953mmpx 954Target Report Mask(ISA_MPX) Var(ix86_isa_flags2) Save 955Support MPX code generation. 956 957mmwaitx 958Target Report Mask(ISA_MWAITX) Var(ix86_isa_flags2) Save 959Support MWAITX and MONITORX built-in functions and code generation. 960 961mclzero 962Target Report Mask(ISA_CLZERO) Var(ix86_isa_flags2) Save 963Support CLZERO built-in functions and code generation. 964 965mpku 966Target Report Mask(ISA_PKU) Var(ix86_isa_flags) Save 967Support PKU built-in functions and code generation. 968 969mstack-protector-guard= 970Target RejectNegative Joined Enum(stack_protector_guard) Var(ix86_stack_protector_guard) Init(SSP_TLS) 971Use given stack-protector guard. 972 973Enum 974Name(stack_protector_guard) Type(enum stack_protector_guard) 975Known stack protector guard (for use with the -mstack-protector-guard= option): 976 977EnumValue 978Enum(stack_protector_guard) String(tls) Value(SSP_TLS) 979 980EnumValue 981Enum(stack_protector_guard) String(global) Value(SSP_GLOBAL) 982 983mstack-protector-guard-reg= 984Target RejectNegative Joined Var(ix86_stack_protector_guard_reg_str) 985Use the given base register for addressing the stack-protector guard. 986 987TargetVariable 988addr_space_t ix86_stack_protector_guard_reg = ADDR_SPACE_GENERIC 989 990mstack-protector-guard-offset= 991Target RejectNegative Joined Integer Var(ix86_stack_protector_guard_offset_str) 992Use the given offset for addressing the stack-protector guard. 993 994TargetVariable 995HOST_WIDE_INT ix86_stack_protector_guard_offset = 0 996 997mstack-protector-guard-symbol= 998Target RejectNegative Joined Integer Var(ix86_stack_protector_guard_symbol_str) 999Use the given symbol for addressing the stack-protector guard. 1000 1001mmitigate-rop 1002Target Var(flag_mitigate_rop) 1003Attempt to avoid generating instruction sequences containing ret bytes. 1004 1005mgeneral-regs-only 1006Target Report RejectNegative Mask(GENERAL_REGS_ONLY) Var(ix86_target_flags) Save 1007Generate code which uses only the general registers. 1008 1009mshstk 1010Target Report Mask(ISA_SHSTK) Var(ix86_isa_flags) Save 1011Enable shadow stack built-in functions from Control-flow Enforcement 1012Technology (CET). 1013 1014mcet-switch 1015Target Report Undocumented Var(flag_cet_switch) Init(0) 1016Turn on CET instrumentation for switch statements that use a jump table and 1017an indirect jump. 1018 1019mforce-indirect-call 1020Target Report Var(flag_force_indirect_call) Init(0) 1021Make all function calls indirect. 1022 1023mindirect-branch= 1024Target Report RejectNegative Joined Enum(indirect_branch) Var(ix86_indirect_branch) Init(indirect_branch_keep) 1025Convert indirect call and jump to call and return thunks. 1026 1027mfunction-return= 1028Target Report RejectNegative Joined Enum(indirect_branch) Var(ix86_function_return) Init(indirect_branch_keep) 1029Convert function return to call and return thunk. 1030 1031Enum 1032Name(indirect_branch) Type(enum indirect_branch) 1033Known indirect branch choices (for use with the -mindirect-branch=/-mfunction-return= options): 1034 1035EnumValue 1036Enum(indirect_branch) String(keep) Value(indirect_branch_keep) 1037 1038EnumValue 1039Enum(indirect_branch) String(thunk) Value(indirect_branch_thunk) 1040 1041EnumValue 1042Enum(indirect_branch) String(thunk-inline) Value(indirect_branch_thunk_inline) 1043 1044EnumValue 1045Enum(indirect_branch) String(thunk-extern) Value(indirect_branch_thunk_extern) 1046 1047mindirect-branch-register 1048Target Report Var(ix86_indirect_branch_register) Init(0) 1049Force indirect call and jump via register. 1050 1051mmovdiri 1052Target Report Mask(ISA_MOVDIRI) Var(ix86_isa_flags) Save 1053Support MOVDIRI built-in functions and code generation. 1054 1055mmovdir64b 1056Target Report Mask(ISA_MOVDIR64B) Var(ix86_isa_flags2) Save 1057Support MOVDIR64B built-in functions and code generation. 1058