1 /* Copyright (C) 2004-2018 Free Software Foundation, Inc. 2 3 This file is part of GCC. 4 5 GCC is free software; you can redistribute it and/or modify 6 it under the terms of the GNU General Public License as published by 7 the Free Software Foundation; either version 3, or (at your option) 8 any later version. 9 10 GCC is distributed in the hope that it will be useful, 11 but WITHOUT ANY WARRANTY; without even the implied warranty of 12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 GNU General Public License for more details. 14 15 Under Section 7 of GPL version 3, you are granted additional 16 permissions described in the GCC Runtime Library Exception, version 17 3.1, as published by the Free Software Foundation. 18 19 You should have received a copy of the GNU General Public License and 20 a copy of the GCC Runtime Library Exception along with this program; 21 see the files COPYING3 and COPYING.RUNTIME respectively. If not, see 22 <http://www.gnu.org/licenses/>. */ 23 24 /* Implemented from the mm3dnow.h (of supposedly AMD origin) included with 25 MSVC 7.1. */ 26 27 #ifndef _MM3DNOW_H_INCLUDED 28 #define _MM3DNOW_H_INCLUDED 29 30 #include <mmintrin.h> 31 #include <prfchwintrin.h> 32 33 #if defined __x86_64__ && !defined __SSE__ || !defined __3dNOW__ 34 #pragma GCC push_options 35 #ifdef __x86_64__ 36 #pragma GCC target("sse,3dnow") 37 #else 38 #pragma GCC target("3dnow") 39 #endif 40 #define __DISABLE_3dNOW__ 41 #endif /* __3dNOW__ */ 42 43 extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__)) 44 _m_femms (void) 45 { 46 __builtin_ia32_femms(); 47 } 48 49 extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__)) 50 _m_pavgusb (__m64 __A, __m64 __B) 51 { 52 return (__m64)__builtin_ia32_pavgusb ((__v8qi)__A, (__v8qi)__B); 53 } 54 55 extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__)) 56 _m_pf2id (__m64 __A) 57 { 58 return (__m64)__builtin_ia32_pf2id ((__v2sf)__A); 59 } 60 61 extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__)) 62 _m_pfacc (__m64 __A, __m64 __B) 63 { 64 return (__m64)__builtin_ia32_pfacc ((__v2sf)__A, (__v2sf)__B); 65 } 66 67 extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__)) 68 _m_pfadd (__m64 __A, __m64 __B) 69 { 70 return (__m64)__builtin_ia32_pfadd ((__v2sf)__A, (__v2sf)__B); 71 } 72 73 extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__)) 74 _m_pfcmpeq (__m64 __A, __m64 __B) 75 { 76 return (__m64)__builtin_ia32_pfcmpeq ((__v2sf)__A, (__v2sf)__B); 77 } 78 79 extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__)) 80 _m_pfcmpge (__m64 __A, __m64 __B) 81 { 82 return (__m64)__builtin_ia32_pfcmpge ((__v2sf)__A, (__v2sf)__B); 83 } 84 85 extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__)) 86 _m_pfcmpgt (__m64 __A, __m64 __B) 87 { 88 return (__m64)__builtin_ia32_pfcmpgt ((__v2sf)__A, (__v2sf)__B); 89 } 90 91 extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__)) 92 _m_pfmax (__m64 __A, __m64 __B) 93 { 94 return (__m64)__builtin_ia32_pfmax ((__v2sf)__A, (__v2sf)__B); 95 } 96 97 extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__)) 98 _m_pfmin (__m64 __A, __m64 __B) 99 { 100 return (__m64)__builtin_ia32_pfmin ((__v2sf)__A, (__v2sf)__B); 101 } 102 103 extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__)) 104 _m_pfmul (__m64 __A, __m64 __B) 105 { 106 return (__m64)__builtin_ia32_pfmul ((__v2sf)__A, (__v2sf)__B); 107 } 108 109 extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__)) 110 _m_pfrcp (__m64 __A) 111 { 112 return (__m64)__builtin_ia32_pfrcp ((__v2sf)__A); 113 } 114 115 extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__)) 116 _m_pfrcpit1 (__m64 __A, __m64 __B) 117 { 118 return (__m64)__builtin_ia32_pfrcpit1 ((__v2sf)__A, (__v2sf)__B); 119 } 120 121 extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__)) 122 _m_pfrcpit2 (__m64 __A, __m64 __B) 123 { 124 return (__m64)__builtin_ia32_pfrcpit2 ((__v2sf)__A, (__v2sf)__B); 125 } 126 127 extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__)) 128 _m_pfrsqrt (__m64 __A) 129 { 130 return (__m64)__builtin_ia32_pfrsqrt ((__v2sf)__A); 131 } 132 133 extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__)) 134 _m_pfrsqit1 (__m64 __A, __m64 __B) 135 { 136 return (__m64)__builtin_ia32_pfrsqit1 ((__v2sf)__A, (__v2sf)__B); 137 } 138 139 extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__)) 140 _m_pfsub (__m64 __A, __m64 __B) 141 { 142 return (__m64)__builtin_ia32_pfsub ((__v2sf)__A, (__v2sf)__B); 143 } 144 145 extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__)) 146 _m_pfsubr (__m64 __A, __m64 __B) 147 { 148 return (__m64)__builtin_ia32_pfsubr ((__v2sf)__A, (__v2sf)__B); 149 } 150 151 extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__)) 152 _m_pi2fd (__m64 __A) 153 { 154 return (__m64)__builtin_ia32_pi2fd ((__v2si)__A); 155 } 156 157 extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__)) 158 _m_pmulhrw (__m64 __A, __m64 __B) 159 { 160 return (__m64)__builtin_ia32_pmulhrw ((__v4hi)__A, (__v4hi)__B); 161 } 162 163 extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__)) 164 _m_prefetch (void *__P) 165 { 166 __builtin_prefetch (__P, 0, 3 /* _MM_HINT_T0 */); 167 } 168 169 extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__)) 170 _m_from_float (float __A) 171 { 172 return __extension__ (__m64)(__v2sf){ __A, 0.0f }; 173 } 174 175 extern __inline float __attribute__((__gnu_inline__, __always_inline__, __artificial__)) 176 _m_to_float (__m64 __A) 177 { 178 union { __v2sf v; float a[2]; } __tmp; 179 __tmp.v = (__v2sf)__A; 180 return __tmp.a[0]; 181 } 182 183 #ifdef __DISABLE_3dNOW__ 184 #undef __DISABLE_3dNOW__ 185 #pragma GCC pop_options 186 #endif /* __DISABLE_3dNOW__ */ 187 188 #if defined __x86_64__ && !defined __SSE__ || !defined __3dNOW_A__ 189 #pragma GCC push_options 190 #ifdef __x86_64__ 191 #pragma GCC target("sse,3dnowa") 192 #else 193 #pragma GCC target("3dnowa") 194 #endif 195 #define __DISABLE_3dNOW_A__ 196 #endif /* __3dNOW_A__ */ 197 198 extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__)) 199 _m_pf2iw (__m64 __A) 200 { 201 return (__m64)__builtin_ia32_pf2iw ((__v2sf)__A); 202 } 203 204 extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__)) 205 _m_pfnacc (__m64 __A, __m64 __B) 206 { 207 return (__m64)__builtin_ia32_pfnacc ((__v2sf)__A, (__v2sf)__B); 208 } 209 210 extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__)) 211 _m_pfpnacc (__m64 __A, __m64 __B) 212 { 213 return (__m64)__builtin_ia32_pfpnacc ((__v2sf)__A, (__v2sf)__B); 214 } 215 216 extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__)) 217 _m_pi2fw (__m64 __A) 218 { 219 return (__m64)__builtin_ia32_pi2fw ((__v2si)__A); 220 } 221 222 extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__)) 223 _m_pswapd (__m64 __A) 224 { 225 return (__m64)__builtin_ia32_pswapdsf ((__v2sf)__A); 226 } 227 228 #ifdef __DISABLE_3dNOW_A__ 229 #undef __DISABLE_3dNOW_A__ 230 #pragma GCC pop_options 231 #endif /* __DISABLE_3dNOW_A__ */ 232 233 #endif /* _MM3DNOW_H_INCLUDED */ 234