1 /* Local Register Allocator (LRA) intercommunication header file. 2 Copyright (C) 2010-2018 Free Software Foundation, Inc. 3 Contributed by Vladimir Makarov <vmakarov@redhat.com>. 4 5 This file is part of GCC. 6 7 GCC is free software; you can redistribute it and/or modify it under 8 the terms of the GNU General Public License as published by the Free 9 Software Foundation; either version 3, or (at your option) any later 10 version. 11 12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY 13 WARRANTY; without even the implied warranty of MERCHANTABILITY or 14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 15 for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with GCC; see the file COPYING3. If not see 19 <http://www.gnu.org/licenses/>. */ 20 21 #ifndef GCC_LRA_INT_H 22 #define GCC_LRA_INT_H 23 24 #define lra_assert(c) gcc_checking_assert (c) 25 26 /* The parameter used to prevent infinite reloading for an insn. Each 27 insn operands might require a reload and, if it is a memory, its 28 base and index registers might require a reload too. */ 29 #define LRA_MAX_INSN_RELOADS (MAX_RECOG_OPERANDS * 3) 30 31 typedef struct lra_live_range *lra_live_range_t; 32 33 /* The structure describes program points where a given pseudo lives. 34 The live ranges can be used to find conflicts with other pseudos. 35 If the live ranges of two pseudos are intersected, the pseudos are 36 in conflict. */ 37 struct lra_live_range 38 { 39 /* Pseudo regno whose live range is described by given 40 structure. */ 41 int regno; 42 /* Program point range. */ 43 int start, finish; 44 /* Next structure describing program points where the pseudo 45 lives. */ 46 lra_live_range_t next; 47 /* Pointer to structures with the same start. */ 48 lra_live_range_t start_next; 49 }; 50 51 typedef struct lra_copy *lra_copy_t; 52 53 /* Copy between pseudos which affects assigning hard registers. */ 54 struct lra_copy 55 { 56 /* True if regno1 is the destination of the copy. */ 57 bool regno1_dest_p; 58 /* Execution frequency of the copy. */ 59 int freq; 60 /* Pseudos connected by the copy. REGNO1 < REGNO2. */ 61 int regno1, regno2; 62 /* Next copy with correspondingly REGNO1 and REGNO2. */ 63 lra_copy_t regno1_next, regno2_next; 64 }; 65 66 /* Common info about a register (pseudo or hard register). */ 67 struct lra_reg 68 { 69 /* Bitmap of UIDs of insns (including debug insns) referring the 70 reg. */ 71 bitmap_head insn_bitmap; 72 /* The following fields are defined only for pseudos. */ 73 /* Hard registers with which the pseudo conflicts. */ 74 HARD_REG_SET conflict_hard_regs; 75 /* Call used registers with which the pseudo conflicts, taking into account 76 the registers used by functions called from calls which cross the 77 pseudo. */ 78 HARD_REG_SET actual_call_used_reg_set; 79 /* We assign hard registers to reload pseudos which can occur in few 80 places. So two hard register preferences are enough for them. 81 The following fields define the preferred hard registers. If 82 there are no such hard registers the first field value is 83 negative. If there is only one preferred hard register, the 2nd 84 field is negative. */ 85 int preferred_hard_regno1, preferred_hard_regno2; 86 /* Profits to use the corresponding preferred hard registers. If 87 the both hard registers defined, the first hard register has not 88 less profit than the second one. */ 89 int preferred_hard_regno_profit1, preferred_hard_regno_profit2; 90 #ifdef STACK_REGS 91 /* True if the pseudo should not be assigned to a stack register. */ 92 bool no_stack_p; 93 #endif 94 /* True if the pseudo crosses a call. It is setup in lra-lives.c 95 and used to check that the pseudo crossing a call did not get a 96 call used hard register. */ 97 bool call_p; 98 /* Number of references and execution frequencies of the register in 99 *non-debug* insns. */ 100 int nrefs, freq; 101 int last_reload; 102 /* rtx used to undo the inheritance. It can be non-null only 103 between subsequent inheritance and undo inheritance passes. */ 104 rtx restore_rtx; 105 /* Value holding by register. If the pseudos have the same value 106 they do not conflict. */ 107 int val; 108 /* Offset from relative eliminate register to pesudo reg. */ 109 poly_int64 offset; 110 /* These members are set up in lra-lives.c and updated in 111 lra-coalesce.c. */ 112 /* The biggest size mode in which each pseudo reg is referred in 113 whole function (possibly via subreg). */ 114 machine_mode biggest_mode; 115 /* Live ranges of the pseudo. */ 116 lra_live_range_t live_ranges; 117 /* This member is set up in lra-lives.c for subsequent 118 assignments. */ 119 lra_copy_t copies; 120 }; 121 122 /* References to the common info about each register. */ 123 extern struct lra_reg *lra_reg_info; 124 125 extern HARD_REG_SET hard_regs_spilled_into; 126 127 /* Static info about each insn operand (common for all insns with the 128 same ICODE). Warning: if the structure definition is changed, the 129 initializer for debug_operand_data in lra.c should be changed 130 too. */ 131 struct lra_operand_data 132 { 133 /* The machine description constraint string of the operand. */ 134 const char *constraint; 135 /* Alternatives for which early_clobber can be true. */ 136 alternative_mask early_clobber_alts; 137 /* It is taken only from machine description (which is different 138 from recog_data.operand_mode) and can be of VOIDmode. */ 139 ENUM_BITFIELD(machine_mode) mode : 16; 140 /* The type of the operand (in/out/inout). */ 141 ENUM_BITFIELD (op_type) type : 8; 142 /* Through if accessed through STRICT_LOW. */ 143 unsigned int strict_low : 1; 144 /* True if the operand is an operator. */ 145 unsigned int is_operator : 1; 146 /* True if there is an early clobber alternative for this operand. 147 This field is set up every time when corresponding 148 operand_alternative in lra_static_insn_data is set up. */ 149 unsigned int early_clobber : 1; 150 /* True if the operand is an address. */ 151 unsigned int is_address : 1; 152 }; 153 154 /* Info about register occurrence in an insn. */ 155 struct lra_insn_reg 156 { 157 /* Alternatives for which early_clobber can be true. */ 158 alternative_mask early_clobber_alts; 159 /* The biggest mode through which the insn refers to the register 160 occurrence (remember the register can be accessed through a 161 subreg in the insn). */ 162 ENUM_BITFIELD(machine_mode) biggest_mode : 16; 163 /* The type of the corresponding operand which is the register. */ 164 ENUM_BITFIELD (op_type) type : 8; 165 /* True if the reg is accessed through a subreg and the subreg is 166 just a part of the register. */ 167 unsigned int subreg_p : 1; 168 /* True if there is an early clobber alternative for this 169 operand. */ 170 unsigned int early_clobber : 1; 171 /* The corresponding regno of the register. */ 172 int regno; 173 /* Next reg info of the same insn. */ 174 struct lra_insn_reg *next; 175 }; 176 177 /* Static part (common info for insns with the same ICODE) of LRA 178 internal insn info. It exists in at most one exemplar for each 179 non-negative ICODE. There is only one exception. Each asm insn has 180 own structure. Warning: if the structure definition is changed, 181 the initializer for debug_insn_static_data in lra.c should be 182 changed too. */ 183 struct lra_static_insn_data 184 { 185 /* Static info about each insn operand. */ 186 struct lra_operand_data *operand; 187 /* Each duplication refers to the number of the corresponding 188 operand which is duplicated. */ 189 int *dup_num; 190 /* The number of an operand marked as commutative, -1 otherwise. */ 191 int commutative; 192 /* Number of operands, duplications, and alternatives of the 193 insn. */ 194 char n_operands; 195 char n_dups; 196 char n_alternatives; 197 /* Insns in machine description (or clobbers in asm) may contain 198 explicit hard regs which are not operands. The following list 199 describes such hard registers. */ 200 struct lra_insn_reg *hard_regs; 201 /* Array [n_alternatives][n_operand] of static constraint info for 202 given operand in given alternative. This info can be changed if 203 the target reg info is changed. */ 204 const struct operand_alternative *operand_alternative; 205 }; 206 207 /* Negative insn alternative numbers used for special cases. */ 208 #define LRA_UNKNOWN_ALT -1 209 #define LRA_NON_CLOBBERED_ALT -2 210 211 /* LRA internal info about an insn (LRA internal insn 212 representation). */ 213 struct lra_insn_recog_data 214 { 215 /* The insn code. */ 216 int icode; 217 /* The alternative should be used for the insn, LRA_UNKNOWN_ALT if 218 unknown, or we should assume any alternative, or the insn is a 219 debug insn. LRA_NON_CLOBBERED_ALT means ignoring any earlier 220 clobbers for the insn. */ 221 int used_insn_alternative; 222 /* SP offset before the insn relative to one at the func start. */ 223 poly_int64 sp_offset; 224 /* The insn itself. */ 225 rtx_insn *insn; 226 /* Common data for insns with the same ICODE. Asm insns (their 227 ICODE is negative) do not share such structures. */ 228 struct lra_static_insn_data *insn_static_data; 229 /* Two arrays of size correspondingly equal to the operand and the 230 duplication numbers: */ 231 rtx **operand_loc; /* The operand locations, NULL if no operands. */ 232 rtx **dup_loc; /* The dup locations, NULL if no dups. */ 233 /* Number of hard registers implicitly used/clobbered in given call 234 insn. The value can be NULL or points to array of the hard 235 register numbers ending with a negative value. To differ 236 clobbered and used hard regs, clobbered hard regs are incremented 237 by FIRST_PSEUDO_REGISTER. */ 238 int *arg_hard_regs; 239 /* Cached value of get_preferred_alternatives. */ 240 alternative_mask preferred_alternatives; 241 /* The following member value is always NULL for a debug insn. */ 242 struct lra_insn_reg *regs; 243 }; 244 245 typedef struct lra_insn_recog_data *lra_insn_recog_data_t; 246 247 /* Whether the clobber is used temporary in LRA. */ 248 #define LRA_TEMP_CLOBBER_P(x) \ 249 (RTL_FLAG_CHECK1 ("TEMP_CLOBBER_P", (x), CLOBBER)->unchanging) 250 251 /* Cost factor for each additional reload and maximal cost reject for 252 insn reloads. One might ask about such strange numbers. Their 253 values occurred historically from former reload pass. */ 254 #define LRA_LOSER_COST_FACTOR 6 255 #define LRA_MAX_REJECT 600 256 257 /* Maximum allowed number of assignment pass iterations after the 258 latest spill pass when any former reload pseudo was spilled. It is 259 for preventing LRA cycling in a bug case. */ 260 #define LRA_MAX_ASSIGNMENT_ITERATION_NUMBER 30 261 262 /* The maximal number of inheritance/split passes in LRA. It should 263 be more 1 in order to perform caller saves transformations and much 264 less MAX_CONSTRAINT_ITERATION_NUMBER to prevent LRA to do as many 265 as permitted constraint passes in some complicated cases. The 266 first inheritance/split pass has a biggest impact on generated code 267 quality. Each subsequent affects generated code in less degree. 268 For example, the 3rd pass does not change generated SPEC2000 code 269 at all on x86-64. */ 270 #define LRA_MAX_INHERITANCE_PASSES 2 271 272 #if LRA_MAX_INHERITANCE_PASSES <= 0 \ 273 || LRA_MAX_INHERITANCE_PASSES >= LRA_MAX_ASSIGNMENT_ITERATION_NUMBER - 8 274 #error wrong LRA_MAX_INHERITANCE_PASSES value 275 #endif 276 277 /* Analogous macro to the above one but for rematerialization. */ 278 #define LRA_MAX_REMATERIALIZATION_PASSES 2 279 280 #if LRA_MAX_REMATERIALIZATION_PASSES <= 0 \ 281 || LRA_MAX_REMATERIALIZATION_PASSES >= LRA_MAX_ASSIGNMENT_ITERATION_NUMBER - 8 282 #error wrong LRA_MAX_REMATERIALIZATION_PASSES value 283 #endif 284 285 /* lra.c: */ 286 287 extern FILE *lra_dump_file; 288 289 extern bool lra_reg_spill_p; 290 291 extern HARD_REG_SET lra_no_alloc_regs; 292 293 extern int lra_insn_recog_data_len; 294 extern lra_insn_recog_data_t *lra_insn_recog_data; 295 296 extern int lra_curr_reload_num; 297 298 extern void lra_dump_bitmap_with_title (const char *, bitmap, int); 299 extern hashval_t lra_rtx_hash (rtx x); 300 extern void lra_push_insn (rtx_insn *); 301 extern void lra_push_insn_by_uid (unsigned int); 302 extern void lra_push_insn_and_update_insn_regno_info (rtx_insn *); 303 extern rtx_insn *lra_pop_insn (void); 304 extern unsigned int lra_insn_stack_length (void); 305 306 extern rtx lra_create_new_reg_with_unique_value (machine_mode, rtx, 307 enum reg_class, const char *); 308 extern void lra_set_regno_unique_value (int); 309 extern void lra_invalidate_insn_data (rtx_insn *); 310 extern void lra_set_insn_deleted (rtx_insn *); 311 extern void lra_delete_dead_insn (rtx_insn *); 312 extern void lra_emit_add (rtx, rtx, rtx); 313 extern void lra_emit_move (rtx, rtx); 314 extern void lra_update_dups (lra_insn_recog_data_t, signed char *); 315 316 extern void lra_process_new_insns (rtx_insn *, rtx_insn *, rtx_insn *, 317 const char *); 318 319 extern bool lra_substitute_pseudo (rtx *, int, rtx, bool, bool); 320 extern bool lra_substitute_pseudo_within_insn (rtx_insn *, int, rtx, bool); 321 322 extern lra_insn_recog_data_t lra_set_insn_recog_data (rtx_insn *); 323 extern lra_insn_recog_data_t lra_update_insn_recog_data (rtx_insn *); 324 extern void lra_set_used_insn_alternative (rtx_insn *, int); 325 extern void lra_set_used_insn_alternative_by_uid (int, int); 326 327 extern void lra_invalidate_insn_regno_info (rtx_insn *); 328 extern void lra_update_insn_regno_info (rtx_insn *); 329 extern struct lra_insn_reg *lra_get_insn_regs (int); 330 331 extern void lra_free_copies (void); 332 extern void lra_create_copy (int, int, int); 333 extern lra_copy_t lra_get_copy (int); 334 extern bool lra_former_scratch_p (int); 335 extern bool lra_former_scratch_operand_p (rtx_insn *, int); 336 extern void lra_register_new_scratch_op (rtx_insn *, int); 337 338 extern int lra_new_regno_start; 339 extern int lra_constraint_new_regno_start; 340 extern int lra_bad_spill_regno_start; 341 extern bitmap_head lra_inheritance_pseudos; 342 extern bitmap_head lra_split_regs; 343 extern bitmap_head lra_subreg_reload_pseudos; 344 extern bitmap_head lra_optional_reload_pseudos; 345 346 /* lra-constraints.c: */ 347 348 extern void lra_init_equiv (void); 349 extern int lra_constraint_offset (int, machine_mode); 350 351 extern int lra_constraint_iter; 352 extern bool lra_risky_transformations_p; 353 extern int lra_inheritance_iter; 354 extern int lra_undo_inheritance_iter; 355 extern bool lra_constrain_insn (rtx_insn *); 356 extern bool lra_constraints (bool); 357 extern void lra_constraints_init (void); 358 extern void lra_constraints_finish (void); 359 extern bool spill_hard_reg_in_range (int, enum reg_class, rtx_insn *, rtx_insn *); 360 extern void lra_inheritance (void); 361 extern bool lra_undo_inheritance (void); 362 363 /* lra-lives.c: */ 364 365 extern int lra_live_max_point; 366 extern int *lra_point_freq; 367 368 extern int lra_hard_reg_usage[FIRST_PSEUDO_REGISTER]; 369 370 extern int lra_live_range_iter; 371 extern void lra_create_live_ranges (bool, bool); 372 extern lra_live_range_t lra_copy_live_range_list (lra_live_range_t); 373 extern lra_live_range_t lra_merge_live_ranges (lra_live_range_t, 374 lra_live_range_t); 375 extern bool lra_intersected_live_ranges_p (lra_live_range_t, 376 lra_live_range_t); 377 extern void lra_print_live_range_list (FILE *, lra_live_range_t); 378 extern void debug (lra_live_range &ref); 379 extern void debug (lra_live_range *ptr); 380 extern void lra_debug_live_range_list (lra_live_range_t); 381 extern void lra_debug_pseudo_live_ranges (int); 382 extern void lra_debug_live_ranges (void); 383 extern void lra_clear_live_ranges (void); 384 extern void lra_live_ranges_init (void); 385 extern void lra_live_ranges_finish (void); 386 extern void lra_setup_reload_pseudo_preferenced_hard_reg (int, int, int); 387 388 /* lra-assigns.c: */ 389 390 extern int lra_assignment_iter; 391 extern int lra_assignment_iter_after_spill; 392 extern void lra_setup_reg_renumber (int, int, bool); 393 extern bool lra_assign (bool &); 394 extern bool lra_split_hard_reg_for (void); 395 396 /* lra-coalesce.c: */ 397 398 extern int lra_coalesce_iter; 399 extern bool lra_coalesce (void); 400 401 /* lra-spills.c: */ 402 403 extern bool lra_need_for_spills_p (void); 404 extern void lra_spill (void); 405 extern void lra_final_code_change (void); 406 407 /* lra-remat.c: */ 408 409 extern int lra_rematerialization_iter; 410 extern bool lra_remat (void); 411 412 /* lra-elimination.c: */ 413 414 extern void lra_debug_elim_table (void); 415 extern int lra_get_elimination_hard_regno (int); 416 extern rtx lra_eliminate_regs_1 (rtx_insn *, rtx, machine_mode, 417 bool, bool, poly_int64, bool); 418 extern void eliminate_regs_in_insn (rtx_insn *insn, bool, bool, poly_int64); 419 extern void lra_eliminate (bool, bool); 420 421 extern void lra_eliminate_reg_if_possible (rtx *); 422 423 424 425 /* Return the hard register which given pseudo REGNO assigned to. 426 Negative value means that the register got memory or we don't know 427 allocation yet. */ 428 static inline int 429 lra_get_regno_hard_regno (int regno) 430 { 431 resize_reg_info (); 432 return reg_renumber[regno]; 433 } 434 435 /* Change class of pseudo REGNO to NEW_CLASS. Print info about it 436 using TITLE. Output a new line if NL_P. */ 437 static void inline 438 lra_change_class (int regno, enum reg_class new_class, 439 const char *title, bool nl_p) 440 { 441 lra_assert (regno >= FIRST_PSEUDO_REGISTER); 442 if (lra_dump_file != NULL) 443 fprintf (lra_dump_file, "%s class %s for r%d", 444 title, reg_class_names[new_class], regno); 445 setup_reg_classes (regno, new_class, NO_REGS, new_class); 446 if (lra_dump_file != NULL && nl_p) 447 fprintf (lra_dump_file, "\n"); 448 } 449 450 /* Update insn operands which are duplication of NOP operand. The 451 insn is represented by its LRA internal representation ID. */ 452 static inline void 453 lra_update_dup (lra_insn_recog_data_t id, int nop) 454 { 455 int i; 456 struct lra_static_insn_data *static_id = id->insn_static_data; 457 458 for (i = 0; i < static_id->n_dups; i++) 459 if (static_id->dup_num[i] == nop) 460 *id->dup_loc[i] = *id->operand_loc[nop]; 461 } 462 463 /* Process operator duplications in insn with ID. We do it after the 464 operands processing. Generally speaking, we could do this probably 465 simultaneously with operands processing because a common practice 466 is to enumerate the operators after their operands. */ 467 static inline void 468 lra_update_operator_dups (lra_insn_recog_data_t id) 469 { 470 int i; 471 struct lra_static_insn_data *static_id = id->insn_static_data; 472 473 for (i = 0; i < static_id->n_dups; i++) 474 { 475 int ndup = static_id->dup_num[i]; 476 477 if (static_id->operand[ndup].is_operator) 478 *id->dup_loc[i] = *id->operand_loc[ndup]; 479 } 480 } 481 482 /* Return info about INSN. Set up the info if it is not done yet. */ 483 static inline lra_insn_recog_data_t 484 lra_get_insn_recog_data (rtx_insn *insn) 485 { 486 lra_insn_recog_data_t data; 487 unsigned int uid = INSN_UID (insn); 488 489 if (lra_insn_recog_data_len > (int) uid 490 && (data = lra_insn_recog_data[uid]) != NULL) 491 { 492 /* Check that we did not change insn without updating the insn 493 info. */ 494 lra_assert (data->insn == insn 495 && (INSN_CODE (insn) < 0 496 || data->icode == INSN_CODE (insn))); 497 return data; 498 } 499 return lra_set_insn_recog_data (insn); 500 } 501 502 /* Update offset from pseudos with VAL by INCR. */ 503 static inline void 504 lra_update_reg_val_offset (int val, poly_int64 incr) 505 { 506 int i; 507 508 for (i = FIRST_PSEUDO_REGISTER; i < max_reg_num (); i++) 509 { 510 if (lra_reg_info[i].val == val) 511 lra_reg_info[i].offset += incr; 512 } 513 } 514 515 /* Return true if register content is equal to VAL with OFFSET. */ 516 static inline bool 517 lra_reg_val_equal_p (int regno, int val, poly_int64 offset) 518 { 519 if (lra_reg_info[regno].val == val 520 && known_eq (lra_reg_info[regno].offset, offset)) 521 return true; 522 523 return false; 524 } 525 526 /* Assign value of register FROM to TO. */ 527 static inline void 528 lra_assign_reg_val (int from, int to) 529 { 530 lra_reg_info[to].val = lra_reg_info[from].val; 531 lra_reg_info[to].offset = lra_reg_info[from].offset; 532 } 533 534 #endif /* GCC_LRA_INT_H */ 535