1*38fd1498Szrj/* Machine mode class definitions for GCC. 2*38fd1498Szrj Copyright (C) 2003-2018 Free Software Foundation, Inc. 3*38fd1498Szrj 4*38fd1498SzrjThis file is part of GCC. 5*38fd1498Szrj 6*38fd1498SzrjGCC is free software; you can redistribute it and/or modify it under 7*38fd1498Szrjthe terms of the GNU General Public License as published by the Free 8*38fd1498SzrjSoftware Foundation; either version 3, or (at your option) any later 9*38fd1498Szrjversion. 10*38fd1498Szrj 11*38fd1498SzrjGCC is distributed in the hope that it will be useful, but WITHOUT ANY 12*38fd1498SzrjWARRANTY; without even the implied warranty of MERCHANTABILITY or 13*38fd1498SzrjFITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 14*38fd1498Szrjfor more details. 15*38fd1498Szrj 16*38fd1498SzrjYou should have received a copy of the GNU General Public License 17*38fd1498Szrjalong with GCC; see the file COPYING3. If not see 18*38fd1498Szrj<http://www.gnu.org/licenses/>. */ 19*38fd1498Szrj 20*38fd1498Szrj#define MODE_CLASSES \ 21*38fd1498Szrj DEF_MODE_CLASS (MODE_RANDOM), /* other */ \ 22*38fd1498Szrj DEF_MODE_CLASS (MODE_CC), /* condition code in a register */ \ 23*38fd1498Szrj DEF_MODE_CLASS (MODE_INT), /* integer */ \ 24*38fd1498Szrj DEF_MODE_CLASS (MODE_PARTIAL_INT), /* integer with padding bits */ \ 25*38fd1498Szrj DEF_MODE_CLASS (MODE_POINTER_BOUNDS), /* bounds */ \ 26*38fd1498Szrj DEF_MODE_CLASS (MODE_FRACT), /* signed fractional number */ \ 27*38fd1498Szrj DEF_MODE_CLASS (MODE_UFRACT), /* unsigned fractional number */ \ 28*38fd1498Szrj DEF_MODE_CLASS (MODE_ACCUM), /* signed accumulator */ \ 29*38fd1498Szrj DEF_MODE_CLASS (MODE_UACCUM), /* unsigned accumulator */ \ 30*38fd1498Szrj DEF_MODE_CLASS (MODE_FLOAT), /* floating point */ \ 31*38fd1498Szrj DEF_MODE_CLASS (MODE_DECIMAL_FLOAT), /* decimal floating point */ \ 32*38fd1498Szrj DEF_MODE_CLASS (MODE_COMPLEX_INT), /* complex numbers */ \ 33*38fd1498Szrj DEF_MODE_CLASS (MODE_COMPLEX_FLOAT), \ 34*38fd1498Szrj DEF_MODE_CLASS (MODE_VECTOR_BOOL), /* vectors of single bits */ \ 35*38fd1498Szrj DEF_MODE_CLASS (MODE_VECTOR_INT), /* SIMD vectors */ \ 36*38fd1498Szrj DEF_MODE_CLASS (MODE_VECTOR_FRACT), /* SIMD vectors */ \ 37*38fd1498Szrj DEF_MODE_CLASS (MODE_VECTOR_UFRACT), /* SIMD vectors */ \ 38*38fd1498Szrj DEF_MODE_CLASS (MODE_VECTOR_ACCUM), /* SIMD vectors */ \ 39*38fd1498Szrj DEF_MODE_CLASS (MODE_VECTOR_UACCUM), /* SIMD vectors */ \ 40*38fd1498Szrj DEF_MODE_CLASS (MODE_VECTOR_FLOAT) 41