1 /* Register to Stack convert for GNU compiler. 2 Copyright (C) 1992-2018 Free Software Foundation, Inc. 3 4 This file is part of GCC. 5 6 GCC is free software; you can redistribute it and/or modify it 7 under the terms of the GNU General Public License as published by 8 the Free Software Foundation; either version 3, or (at your option) 9 any later version. 10 11 GCC is distributed in the hope that it will be useful, but WITHOUT 12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 14 License for more details. 15 16 You should have received a copy of the GNU General Public License 17 along with GCC; see the file COPYING3. If not see 18 <http://www.gnu.org/licenses/>. */ 19 20 /* This pass converts stack-like registers from the "flat register 21 file" model that gcc uses, to a stack convention that the 387 uses. 22 23 * The form of the input: 24 25 On input, the function consists of insn that have had their 26 registers fully allocated to a set of "virtual" registers. Note that 27 the word "virtual" is used differently here than elsewhere in gcc: for 28 each virtual stack reg, there is a hard reg, but the mapping between 29 them is not known until this pass is run. On output, hard register 30 numbers have been substituted, and various pop and exchange insns have 31 been emitted. The hard register numbers and the virtual register 32 numbers completely overlap - before this pass, all stack register 33 numbers are virtual, and afterward they are all hard. 34 35 The virtual registers can be manipulated normally by gcc, and their 36 semantics are the same as for normal registers. After the hard 37 register numbers are substituted, the semantics of an insn containing 38 stack-like regs are not the same as for an insn with normal regs: for 39 instance, it is not safe to delete an insn that appears to be a no-op 40 move. In general, no insn containing hard regs should be changed 41 after this pass is done. 42 43 * The form of the output: 44 45 After this pass, hard register numbers represent the distance from 46 the current top of stack to the desired register. A reference to 47 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1, 48 represents the register just below that, and so forth. Also, REG_DEAD 49 notes indicate whether or not a stack register should be popped. 50 51 A "swap" insn looks like a parallel of two patterns, where each 52 pattern is a SET: one sets A to B, the other B to A. 53 54 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG 55 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS, 56 will replace the existing stack top, not push a new value. 57 58 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose 59 SET_SRC is REG or MEM. 60 61 The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG 62 appears ambiguous. As a special case, the presence of a REG_DEAD note 63 for FIRST_STACK_REG differentiates between a load insn and a pop. 64 65 If a REG_DEAD is present, the insn represents a "pop" that discards 66 the top of the register stack. If there is no REG_DEAD note, then the 67 insn represents a "dup" or a push of the current top of stack onto the 68 stack. 69 70 * Methodology: 71 72 Existing REG_DEAD and REG_UNUSED notes for stack registers are 73 deleted and recreated from scratch. REG_DEAD is never created for a 74 SET_DEST, only REG_UNUSED. 75 76 * asm_operands: 77 78 There are several rules on the usage of stack-like regs in 79 asm_operands insns. These rules apply only to the operands that are 80 stack-like regs: 81 82 1. Given a set of input regs that die in an asm_operands, it is 83 necessary to know which are implicitly popped by the asm, and 84 which must be explicitly popped by gcc. 85 86 An input reg that is implicitly popped by the asm must be 87 explicitly clobbered, unless it is constrained to match an 88 output operand. 89 90 2. For any input reg that is implicitly popped by an asm, it is 91 necessary to know how to adjust the stack to compensate for the pop. 92 If any non-popped input is closer to the top of the reg-stack than 93 the implicitly popped reg, it would not be possible to know what the 94 stack looked like - it's not clear how the rest of the stack "slides 95 up". 96 97 All implicitly popped input regs must be closer to the top of 98 the reg-stack than any input that is not implicitly popped. 99 100 All explicitly referenced input operands may not "skip" a reg. 101 Otherwise we can have holes in the stack. 102 103 3. It is possible that if an input dies in an insn, reload might 104 use the input reg for an output reload. Consider this example: 105 106 asm ("foo" : "=t" (a) : "f" (b)); 107 108 This asm says that input B is not popped by the asm, and that 109 the asm pushes a result onto the reg-stack, i.e., the stack is one 110 deeper after the asm than it was before. But, it is possible that 111 reload will think that it can use the same reg for both the input and 112 the output, if input B dies in this insn. 113 114 If any input operand uses the "f" constraint, all output reg 115 constraints must use the "&" earlyclobber. 116 117 The asm above would be written as 118 119 asm ("foo" : "=&t" (a) : "f" (b)); 120 121 4. Some operands need to be in particular places on the stack. All 122 output operands fall in this category - there is no other way to 123 know which regs the outputs appear in unless the user indicates 124 this in the constraints. 125 126 Output operands must specifically indicate which reg an output 127 appears in after an asm. "=f" is not allowed: the operand 128 constraints must select a class with a single reg. 129 130 5. Output operands may not be "inserted" between existing stack regs. 131 Since no 387 opcode uses a read/write operand, all output operands 132 are dead before the asm_operands, and are pushed by the asm_operands. 133 It makes no sense to push anywhere but the top of the reg-stack. 134 135 Output operands must start at the top of the reg-stack: output 136 operands may not "skip" a reg. 137 138 6. Some asm statements may need extra stack space for internal 139 calculations. This can be guaranteed by clobbering stack registers 140 unrelated to the inputs and outputs. 141 142 Here are a couple of reasonable asms to want to write. This asm 143 takes one input, which is internally popped, and produces two outputs. 144 145 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp)); 146 147 This asm takes two inputs, which are popped by the fyl2xp1 opcode, 148 and replaces them with one output. The user must code the "st(1)" 149 clobber for reg-stack.c to know that fyl2xp1 pops both inputs. 150 151 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)"); 152 153 */ 154 155 #include "config.h" 156 #include "system.h" 157 #include "coretypes.h" 158 #include "backend.h" 159 #include "target.h" 160 #include "rtl.h" 161 #include "tree.h" 162 #include "df.h" 163 #include "insn-config.h" 164 #include "memmodel.h" 165 #include "emit-rtl.h" /* FIXME: Can go away once crtl is moved to rtl.h. */ 166 #include "recog.h" 167 #include "varasm.h" 168 #include "rtl-error.h" 169 #include "cfgrtl.h" 170 #include "cfganal.h" 171 #include "cfgbuild.h" 172 #include "cfgcleanup.h" 173 #include "reload.h" 174 #include "tree-pass.h" 175 #include "rtl-iter.h" 176 177 #ifdef STACK_REGS 178 179 /* We use this array to cache info about insns, because otherwise we 180 spend too much time in stack_regs_mentioned_p. 181 182 Indexed by insn UIDs. A value of zero is uninitialized, one indicates 183 the insn uses stack registers, two indicates the insn does not use 184 stack registers. */ 185 static vec<char> stack_regs_mentioned_data; 186 187 #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1) 188 189 int regstack_completed = 0; 190 191 /* This is the basic stack record. TOP is an index into REG[] such 192 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty. 193 194 If TOP is -2, REG[] is not yet initialized. Stack initialization 195 consists of placing each live reg in array `reg' and setting `top' 196 appropriately. 197 198 REG_SET indicates which registers are live. */ 199 200 typedef struct stack_def 201 { 202 int top; /* index to top stack element */ 203 HARD_REG_SET reg_set; /* set of live registers */ 204 unsigned char reg[REG_STACK_SIZE];/* register - stack mapping */ 205 } *stack_ptr; 206 207 /* This is used to carry information about basic blocks. It is 208 attached to the AUX field of the standard CFG block. */ 209 210 typedef struct block_info_def 211 { 212 struct stack_def stack_in; /* Input stack configuration. */ 213 struct stack_def stack_out; /* Output stack configuration. */ 214 HARD_REG_SET out_reg_set; /* Stack regs live on output. */ 215 int done; /* True if block already converted. */ 216 int predecessors; /* Number of predecessors that need 217 to be visited. */ 218 } *block_info; 219 220 #define BLOCK_INFO(B) ((block_info) (B)->aux) 221 222 /* Passed to change_stack to indicate where to emit insns. */ 223 enum emit_where 224 { 225 EMIT_AFTER, 226 EMIT_BEFORE 227 }; 228 229 /* The block we're currently working on. */ 230 static basic_block current_block; 231 232 /* In the current_block, whether we're processing the first register 233 stack or call instruction, i.e. the regstack is currently the 234 same as BLOCK_INFO(current_block)->stack_in. */ 235 static bool starting_stack_p; 236 237 /* This is the register file for all register after conversion. */ 238 static rtx 239 FP_mode_reg[LAST_STACK_REG+1-FIRST_STACK_REG][(int) MAX_MACHINE_MODE]; 240 241 #define FP_MODE_REG(regno,mode) \ 242 (FP_mode_reg[(regno)-FIRST_STACK_REG][(int) (mode)]) 243 244 /* Used to initialize uninitialized registers. */ 245 static rtx not_a_num; 246 247 /* Forward declarations */ 248 249 static int stack_regs_mentioned_p (const_rtx pat); 250 static void pop_stack (stack_ptr, int); 251 static rtx *get_true_reg (rtx *); 252 253 static int check_asm_stack_operands (rtx_insn *); 254 static void get_asm_operands_in_out (rtx, int *, int *); 255 static rtx stack_result (tree); 256 static void replace_reg (rtx *, int); 257 static void remove_regno_note (rtx_insn *, enum reg_note, unsigned int); 258 static int get_hard_regnum (stack_ptr, rtx); 259 static rtx_insn *emit_pop_insn (rtx_insn *, stack_ptr, rtx, enum emit_where); 260 static void swap_to_top (rtx_insn *, stack_ptr, rtx, rtx); 261 static bool move_for_stack_reg (rtx_insn *, stack_ptr, rtx); 262 static bool move_nan_for_stack_reg (rtx_insn *, stack_ptr, rtx); 263 static int swap_rtx_condition_1 (rtx); 264 static int swap_rtx_condition (rtx_insn *); 265 static void compare_for_stack_reg (rtx_insn *, stack_ptr, rtx, bool); 266 static bool subst_stack_regs_pat (rtx_insn *, stack_ptr, rtx); 267 static void subst_asm_stack_regs (rtx_insn *, stack_ptr); 268 static bool subst_stack_regs (rtx_insn *, stack_ptr); 269 static void change_stack (rtx_insn *, stack_ptr, stack_ptr, enum emit_where); 270 static void print_stack (FILE *, stack_ptr); 271 static rtx_insn *next_flags_user (rtx_insn *); 272 273 /* Return nonzero if any stack register is mentioned somewhere within PAT. */ 274 275 static int 276 stack_regs_mentioned_p (const_rtx pat) 277 { 278 const char *fmt; 279 int i; 280 281 if (STACK_REG_P (pat)) 282 return 1; 283 284 fmt = GET_RTX_FORMAT (GET_CODE (pat)); 285 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--) 286 { 287 if (fmt[i] == 'E') 288 { 289 int j; 290 291 for (j = XVECLEN (pat, i) - 1; j >= 0; j--) 292 if (stack_regs_mentioned_p (XVECEXP (pat, i, j))) 293 return 1; 294 } 295 else if (fmt[i] == 'e' && stack_regs_mentioned_p (XEXP (pat, i))) 296 return 1; 297 } 298 299 return 0; 300 } 301 302 /* Return nonzero if INSN mentions stacked registers, else return zero. */ 303 304 int 305 stack_regs_mentioned (const_rtx insn) 306 { 307 unsigned int uid, max; 308 int test; 309 310 if (! INSN_P (insn) || !stack_regs_mentioned_data.exists ()) 311 return 0; 312 313 uid = INSN_UID (insn); 314 max = stack_regs_mentioned_data.length (); 315 if (uid >= max) 316 { 317 /* Allocate some extra size to avoid too many reallocs, but 318 do not grow too quickly. */ 319 max = uid + uid / 20 + 1; 320 stack_regs_mentioned_data.safe_grow_cleared (max); 321 } 322 323 test = stack_regs_mentioned_data[uid]; 324 if (test == 0) 325 { 326 /* This insn has yet to be examined. Do so now. */ 327 test = stack_regs_mentioned_p (PATTERN (insn)) ? 1 : 2; 328 stack_regs_mentioned_data[uid] = test; 329 } 330 331 return test == 1; 332 } 333 334 static rtx ix86_flags_rtx; 335 336 static rtx_insn * 337 next_flags_user (rtx_insn *insn) 338 { 339 /* Search forward looking for the first use of this value. 340 Stop at block boundaries. */ 341 342 while (insn != BB_END (current_block)) 343 { 344 insn = NEXT_INSN (insn); 345 346 if (INSN_P (insn) && reg_mentioned_p (ix86_flags_rtx, PATTERN (insn))) 347 return insn; 348 349 if (CALL_P (insn)) 350 return NULL; 351 } 352 return NULL; 353 } 354 355 /* Reorganize the stack into ascending numbers, before this insn. */ 356 357 static void 358 straighten_stack (rtx_insn *insn, stack_ptr regstack) 359 { 360 struct stack_def temp_stack; 361 int top; 362 363 /* If there is only a single register on the stack, then the stack is 364 already in increasing order and no reorganization is needed. 365 366 Similarly if the stack is empty. */ 367 if (regstack->top <= 0) 368 return; 369 370 COPY_HARD_REG_SET (temp_stack.reg_set, regstack->reg_set); 371 372 for (top = temp_stack.top = regstack->top; top >= 0; top--) 373 temp_stack.reg[top] = FIRST_STACK_REG + temp_stack.top - top; 374 375 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE); 376 } 377 378 /* Pop a register from the stack. */ 379 380 static void 381 pop_stack (stack_ptr regstack, int regno) 382 { 383 int top = regstack->top; 384 385 CLEAR_HARD_REG_BIT (regstack->reg_set, regno); 386 regstack->top--; 387 /* If regno was not at the top of stack then adjust stack. */ 388 if (regstack->reg [top] != regno) 389 { 390 int i; 391 for (i = regstack->top; i >= 0; i--) 392 if (regstack->reg [i] == regno) 393 { 394 int j; 395 for (j = i; j < top; j++) 396 regstack->reg [j] = regstack->reg [j + 1]; 397 break; 398 } 399 } 400 } 401 402 /* Return a pointer to the REG expression within PAT. If PAT is not a 403 REG, possible enclosed by a conversion rtx, return the inner part of 404 PAT that stopped the search. */ 405 406 static rtx * 407 get_true_reg (rtx *pat) 408 { 409 for (;;) 410 switch (GET_CODE (*pat)) 411 { 412 case SUBREG: 413 /* Eliminate FP subregister accesses in favor of the 414 actual FP register in use. */ 415 { 416 rtx subreg; 417 if (STACK_REG_P (subreg = SUBREG_REG (*pat))) 418 { 419 int regno_off = subreg_regno_offset (REGNO (subreg), 420 GET_MODE (subreg), 421 SUBREG_BYTE (*pat), 422 GET_MODE (*pat)); 423 *pat = FP_MODE_REG (REGNO (subreg) + regno_off, 424 GET_MODE (subreg)); 425 return pat; 426 } 427 pat = &XEXP (*pat, 0); 428 break; 429 } 430 case FLOAT: 431 case FIX: 432 case FLOAT_EXTEND: 433 pat = &XEXP (*pat, 0); 434 break; 435 436 case UNSPEC: 437 if (XINT (*pat, 1) == UNSPEC_TRUNC_NOOP 438 || XINT (*pat, 1) == UNSPEC_FILD_ATOMIC) 439 pat = &XVECEXP (*pat, 0, 0); 440 return pat; 441 442 case FLOAT_TRUNCATE: 443 if (!flag_unsafe_math_optimizations) 444 return pat; 445 pat = &XEXP (*pat, 0); 446 break; 447 448 default: 449 return pat; 450 } 451 } 452 453 /* Set if we find any malformed asms in a block. */ 454 static bool any_malformed_asm; 455 456 /* There are many rules that an asm statement for stack-like regs must 457 follow. Those rules are explained at the top of this file: the rule 458 numbers below refer to that explanation. */ 459 460 static int 461 check_asm_stack_operands (rtx_insn *insn) 462 { 463 int i; 464 int n_clobbers; 465 int malformed_asm = 0; 466 rtx body = PATTERN (insn); 467 468 char reg_used_as_output[FIRST_PSEUDO_REGISTER]; 469 char implicitly_dies[FIRST_PSEUDO_REGISTER]; 470 char explicitly_used[FIRST_PSEUDO_REGISTER]; 471 472 rtx *clobber_reg = 0; 473 int n_inputs, n_outputs; 474 475 /* Find out what the constraints require. If no constraint 476 alternative matches, this asm is malformed. */ 477 extract_constrain_insn (insn); 478 479 preprocess_constraints (insn); 480 481 get_asm_operands_in_out (body, &n_outputs, &n_inputs); 482 483 if (which_alternative < 0) 484 { 485 malformed_asm = 1; 486 /* Avoid further trouble with this insn. */ 487 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx); 488 return 0; 489 } 490 const operand_alternative *op_alt = which_op_alt (); 491 492 /* Strip SUBREGs here to make the following code simpler. */ 493 for (i = 0; i < recog_data.n_operands; i++) 494 if (GET_CODE (recog_data.operand[i]) == SUBREG 495 && REG_P (SUBREG_REG (recog_data.operand[i]))) 496 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]); 497 498 /* Set up CLOBBER_REG. */ 499 500 n_clobbers = 0; 501 502 if (GET_CODE (body) == PARALLEL) 503 { 504 clobber_reg = XALLOCAVEC (rtx, XVECLEN (body, 0)); 505 506 for (i = 0; i < XVECLEN (body, 0); i++) 507 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER) 508 { 509 rtx clobber = XVECEXP (body, 0, i); 510 rtx reg = XEXP (clobber, 0); 511 512 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg))) 513 reg = SUBREG_REG (reg); 514 515 if (STACK_REG_P (reg)) 516 { 517 clobber_reg[n_clobbers] = reg; 518 n_clobbers++; 519 } 520 } 521 } 522 523 /* Enforce rule #4: Output operands must specifically indicate which 524 reg an output appears in after an asm. "=f" is not allowed: the 525 operand constraints must select a class with a single reg. 526 527 Also enforce rule #5: Output operands must start at the top of 528 the reg-stack: output operands may not "skip" a reg. */ 529 530 memset (reg_used_as_output, 0, sizeof (reg_used_as_output)); 531 for (i = 0; i < n_outputs; i++) 532 if (STACK_REG_P (recog_data.operand[i])) 533 { 534 if (reg_class_size[(int) op_alt[i].cl] != 1) 535 { 536 error_for_asm (insn, "output constraint %d must specify a single register", i); 537 malformed_asm = 1; 538 } 539 else 540 { 541 int j; 542 543 for (j = 0; j < n_clobbers; j++) 544 if (REGNO (recog_data.operand[i]) == REGNO (clobber_reg[j])) 545 { 546 error_for_asm (insn, "output constraint %d cannot be specified together with \"%s\" clobber", 547 i, reg_names [REGNO (clobber_reg[j])]); 548 malformed_asm = 1; 549 break; 550 } 551 if (j == n_clobbers) 552 reg_used_as_output[REGNO (recog_data.operand[i])] = 1; 553 } 554 } 555 556 557 /* Search for first non-popped reg. */ 558 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++) 559 if (! reg_used_as_output[i]) 560 break; 561 562 /* If there are any other popped regs, that's an error. */ 563 for (; i < LAST_STACK_REG + 1; i++) 564 if (reg_used_as_output[i]) 565 break; 566 567 if (i != LAST_STACK_REG + 1) 568 { 569 error_for_asm (insn, "output regs must be grouped at top of stack"); 570 malformed_asm = 1; 571 } 572 573 /* Enforce rule #2: All implicitly popped input regs must be closer 574 to the top of the reg-stack than any input that is not implicitly 575 popped. */ 576 577 memset (implicitly_dies, 0, sizeof (implicitly_dies)); 578 memset (explicitly_used, 0, sizeof (explicitly_used)); 579 for (i = n_outputs; i < n_outputs + n_inputs; i++) 580 if (STACK_REG_P (recog_data.operand[i])) 581 { 582 /* An input reg is implicitly popped if it is tied to an 583 output, or if there is a CLOBBER for it. */ 584 int j; 585 586 for (j = 0; j < n_clobbers; j++) 587 if (operands_match_p (clobber_reg[j], recog_data.operand[i])) 588 break; 589 590 if (j < n_clobbers || op_alt[i].matches >= 0) 591 implicitly_dies[REGNO (recog_data.operand[i])] = 1; 592 else if (reg_class_size[(int) op_alt[i].cl] == 1) 593 explicitly_used[REGNO (recog_data.operand[i])] = 1; 594 } 595 596 /* Search for first non-popped reg. */ 597 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++) 598 if (! implicitly_dies[i]) 599 break; 600 601 /* If there are any other popped regs, that's an error. */ 602 for (; i < LAST_STACK_REG + 1; i++) 603 if (implicitly_dies[i]) 604 break; 605 606 if (i != LAST_STACK_REG + 1) 607 { 608 error_for_asm (insn, 609 "implicitly popped regs must be grouped at top of stack"); 610 malformed_asm = 1; 611 } 612 613 /* Search for first not-explicitly used reg. */ 614 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++) 615 if (! implicitly_dies[i] && ! explicitly_used[i]) 616 break; 617 618 /* If there are any other explicitly used regs, that's an error. */ 619 for (; i < LAST_STACK_REG + 1; i++) 620 if (explicitly_used[i]) 621 break; 622 623 if (i != LAST_STACK_REG + 1) 624 { 625 error_for_asm (insn, 626 "explicitly used regs must be grouped at top of stack"); 627 malformed_asm = 1; 628 } 629 630 /* Enforce rule #3: If any input operand uses the "f" constraint, all 631 output constraints must use the "&" earlyclobber. 632 633 ??? Detect this more deterministically by having constrain_asm_operands 634 record any earlyclobber. */ 635 636 for (i = n_outputs; i < n_outputs + n_inputs; i++) 637 if (STACK_REG_P (recog_data.operand[i]) && op_alt[i].matches == -1) 638 { 639 int j; 640 641 for (j = 0; j < n_outputs; j++) 642 if (operands_match_p (recog_data.operand[j], recog_data.operand[i])) 643 { 644 error_for_asm (insn, 645 "output operand %d must use %<&%> constraint", j); 646 malformed_asm = 1; 647 } 648 } 649 650 if (malformed_asm) 651 { 652 /* Avoid further trouble with this insn. */ 653 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx); 654 any_malformed_asm = true; 655 return 0; 656 } 657 658 return 1; 659 } 660 661 /* Calculate the number of inputs and outputs in BODY, an 662 asm_operands. N_OPERANDS is the total number of operands, and 663 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are 664 placed. */ 665 666 static void 667 get_asm_operands_in_out (rtx body, int *pout, int *pin) 668 { 669 rtx asmop = extract_asm_operands (body); 670 671 *pin = ASM_OPERANDS_INPUT_LENGTH (asmop); 672 *pout = (recog_data.n_operands 673 - ASM_OPERANDS_INPUT_LENGTH (asmop) 674 - ASM_OPERANDS_LABEL_LENGTH (asmop)); 675 } 676 677 /* If current function returns its result in an fp stack register, 678 return the REG. Otherwise, return 0. */ 679 680 static rtx 681 stack_result (tree decl) 682 { 683 rtx result; 684 685 /* If the value is supposed to be returned in memory, then clearly 686 it is not returned in a stack register. */ 687 if (aggregate_value_p (DECL_RESULT (decl), decl)) 688 return 0; 689 690 result = DECL_RTL_IF_SET (DECL_RESULT (decl)); 691 if (result != 0) 692 result = targetm.calls.function_value (TREE_TYPE (DECL_RESULT (decl)), 693 decl, true); 694 695 return result != 0 && STACK_REG_P (result) ? result : 0; 696 } 697 698 699 /* 700 * This section deals with stack register substitution, and forms the second 701 * pass over the RTL. 702 */ 703 704 /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for 705 the desired hard REGNO. */ 706 707 static void 708 replace_reg (rtx *reg, int regno) 709 { 710 gcc_assert (IN_RANGE (regno, FIRST_STACK_REG, LAST_STACK_REG)); 711 gcc_assert (STACK_REG_P (*reg)); 712 713 gcc_assert (SCALAR_FLOAT_MODE_P (GET_MODE (*reg)) 714 || GET_MODE_CLASS (GET_MODE (*reg)) == MODE_COMPLEX_FLOAT); 715 716 *reg = FP_MODE_REG (regno, GET_MODE (*reg)); 717 } 718 719 /* Remove a note of type NOTE, which must be found, for register 720 number REGNO from INSN. Remove only one such note. */ 721 722 static void 723 remove_regno_note (rtx_insn *insn, enum reg_note note, unsigned int regno) 724 { 725 rtx *note_link, this_rtx; 726 727 note_link = ®_NOTES (insn); 728 for (this_rtx = *note_link; this_rtx; this_rtx = XEXP (this_rtx, 1)) 729 if (REG_NOTE_KIND (this_rtx) == note 730 && REG_P (XEXP (this_rtx, 0)) && REGNO (XEXP (this_rtx, 0)) == regno) 731 { 732 *note_link = XEXP (this_rtx, 1); 733 return; 734 } 735 else 736 note_link = &XEXP (this_rtx, 1); 737 738 gcc_unreachable (); 739 } 740 741 /* Find the hard register number of virtual register REG in REGSTACK. 742 The hard register number is relative to the top of the stack. -1 is 743 returned if the register is not found. */ 744 745 static int 746 get_hard_regnum (stack_ptr regstack, rtx reg) 747 { 748 int i; 749 750 gcc_assert (STACK_REG_P (reg)); 751 752 for (i = regstack->top; i >= 0; i--) 753 if (regstack->reg[i] == REGNO (reg)) 754 break; 755 756 return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1; 757 } 758 759 /* Emit an insn to pop virtual register REG before or after INSN. 760 REGSTACK is the stack state after INSN and is updated to reflect this 761 pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn 762 is represented as a SET whose destination is the register to be popped 763 and source is the top of stack. A death note for the top of stack 764 cases the movdf pattern to pop. */ 765 766 static rtx_insn * 767 emit_pop_insn (rtx_insn *insn, stack_ptr regstack, rtx reg, enum emit_where where) 768 { 769 rtx_insn *pop_insn; 770 rtx pop_rtx; 771 int hard_regno; 772 773 /* For complex types take care to pop both halves. These may survive in 774 CLOBBER and USE expressions. */ 775 if (COMPLEX_MODE_P (GET_MODE (reg))) 776 { 777 rtx reg1 = FP_MODE_REG (REGNO (reg), DFmode); 778 rtx reg2 = FP_MODE_REG (REGNO (reg) + 1, DFmode); 779 780 pop_insn = NULL; 781 if (get_hard_regnum (regstack, reg1) >= 0) 782 pop_insn = emit_pop_insn (insn, regstack, reg1, where); 783 if (get_hard_regnum (regstack, reg2) >= 0) 784 pop_insn = emit_pop_insn (insn, regstack, reg2, where); 785 gcc_assert (pop_insn); 786 return pop_insn; 787 } 788 789 hard_regno = get_hard_regnum (regstack, reg); 790 791 gcc_assert (hard_regno >= FIRST_STACK_REG); 792 793 pop_rtx = gen_rtx_SET (FP_MODE_REG (hard_regno, DFmode), 794 FP_MODE_REG (FIRST_STACK_REG, DFmode)); 795 796 if (where == EMIT_AFTER) 797 pop_insn = emit_insn_after (pop_rtx, insn); 798 else 799 pop_insn = emit_insn_before (pop_rtx, insn); 800 801 add_reg_note (pop_insn, REG_DEAD, FP_MODE_REG (FIRST_STACK_REG, DFmode)); 802 803 regstack->reg[regstack->top - (hard_regno - FIRST_STACK_REG)] 804 = regstack->reg[regstack->top]; 805 regstack->top -= 1; 806 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (reg)); 807 808 return pop_insn; 809 } 810 811 /* Emit an insn before or after INSN to swap virtual register REG with 812 the top of stack. REGSTACK is the stack state before the swap, and 813 is updated to reflect the swap. A swap insn is represented as a 814 PARALLEL of two patterns: each pattern moves one reg to the other. 815 816 If REG is already at the top of the stack, no insn is emitted. */ 817 818 static void 819 emit_swap_insn (rtx_insn *insn, stack_ptr regstack, rtx reg) 820 { 821 int hard_regno; 822 rtx swap_rtx; 823 int other_reg; /* swap regno temps */ 824 rtx_insn *i1; /* the stack-reg insn prior to INSN */ 825 rtx i1set = NULL_RTX; /* the SET rtx within I1 */ 826 827 hard_regno = get_hard_regnum (regstack, reg); 828 829 if (hard_regno == FIRST_STACK_REG) 830 return; 831 if (hard_regno == -1) 832 { 833 /* Something failed if the register wasn't on the stack. If we had 834 malformed asms, we zapped the instruction itself, but that didn't 835 produce the same pattern of register sets as before. To prevent 836 further failure, adjust REGSTACK to include REG at TOP. */ 837 gcc_assert (any_malformed_asm); 838 regstack->reg[++regstack->top] = REGNO (reg); 839 return; 840 } 841 gcc_assert (hard_regno >= FIRST_STACK_REG); 842 843 other_reg = regstack->top - (hard_regno - FIRST_STACK_REG); 844 std::swap (regstack->reg[regstack->top], regstack->reg[other_reg]); 845 846 /* Find the previous insn involving stack regs, but don't pass a 847 block boundary. */ 848 i1 = NULL; 849 if (current_block && insn != BB_HEAD (current_block)) 850 { 851 rtx_insn *tmp = PREV_INSN (insn); 852 rtx_insn *limit = PREV_INSN (BB_HEAD (current_block)); 853 while (tmp != limit) 854 { 855 if (LABEL_P (tmp) 856 || CALL_P (tmp) 857 || NOTE_INSN_BASIC_BLOCK_P (tmp) 858 || (NONJUMP_INSN_P (tmp) 859 && stack_regs_mentioned (tmp))) 860 { 861 i1 = tmp; 862 break; 863 } 864 tmp = PREV_INSN (tmp); 865 } 866 } 867 868 if (i1 != NULL_RTX 869 && (i1set = single_set (i1)) != NULL_RTX) 870 { 871 rtx i1src = *get_true_reg (&SET_SRC (i1set)); 872 rtx i1dest = *get_true_reg (&SET_DEST (i1set)); 873 874 /* If the previous register stack push was from the reg we are to 875 swap with, omit the swap. */ 876 877 if (REG_P (i1dest) && REGNO (i1dest) == FIRST_STACK_REG 878 && REG_P (i1src) 879 && REGNO (i1src) == (unsigned) hard_regno - 1 880 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX) 881 return; 882 883 /* If the previous insn wrote to the reg we are to swap with, 884 omit the swap. */ 885 886 if (REG_P (i1dest) && REGNO (i1dest) == (unsigned) hard_regno 887 && REG_P (i1src) && REGNO (i1src) == FIRST_STACK_REG 888 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX) 889 return; 890 891 /* Instead of 892 fld a 893 fld b 894 fxch %st(1) 895 just use 896 fld b 897 fld a 898 if possible. Similarly for fld1, fldz, fldpi etc. instead of any 899 of the loads or for float extension from memory. */ 900 901 i1src = SET_SRC (i1set); 902 if (GET_CODE (i1src) == FLOAT_EXTEND) 903 i1src = XEXP (i1src, 0); 904 if (REG_P (i1dest) 905 && REGNO (i1dest) == FIRST_STACK_REG 906 && (MEM_P (i1src) || GET_CODE (i1src) == CONST_DOUBLE) 907 && !side_effects_p (i1src) 908 && hard_regno == FIRST_STACK_REG + 1 909 && i1 != BB_HEAD (current_block)) 910 { 911 /* i1 is the last insn that involves stack regs before insn, and 912 is known to be a load without other side-effects, i.e. fld b 913 in the above comment. */ 914 rtx_insn *i2 = NULL; 915 rtx i2set; 916 rtx_insn *tmp = PREV_INSN (i1); 917 rtx_insn *limit = PREV_INSN (BB_HEAD (current_block)); 918 /* Find the previous insn involving stack regs, but don't pass a 919 block boundary. */ 920 while (tmp != limit) 921 { 922 if (LABEL_P (tmp) 923 || CALL_P (tmp) 924 || NOTE_INSN_BASIC_BLOCK_P (tmp) 925 || (NONJUMP_INSN_P (tmp) 926 && stack_regs_mentioned (tmp))) 927 { 928 i2 = tmp; 929 break; 930 } 931 tmp = PREV_INSN (tmp); 932 } 933 if (i2 != NULL_RTX 934 && (i2set = single_set (i2)) != NULL_RTX) 935 { 936 rtx i2dest = *get_true_reg (&SET_DEST (i2set)); 937 rtx i2src = SET_SRC (i2set); 938 if (GET_CODE (i2src) == FLOAT_EXTEND) 939 i2src = XEXP (i2src, 0); 940 /* If the last two insns before insn that involve 941 stack regs are loads, where the latter (i1) 942 pushes onto the register stack and thus 943 moves the value from the first load (i2) from 944 %st to %st(1), consider swapping them. */ 945 if (REG_P (i2dest) 946 && REGNO (i2dest) == FIRST_STACK_REG 947 && (MEM_P (i2src) || GET_CODE (i2src) == CONST_DOUBLE) 948 /* Ensure i2 doesn't have other side-effects. */ 949 && !side_effects_p (i2src) 950 /* And that the two instructions can actually be 951 swapped, i.e. there shouldn't be any stores 952 in between i2 and i1 that might alias with 953 the i1 memory, and the memory address can't 954 use registers set in between i2 and i1. */ 955 && !modified_between_p (SET_SRC (i1set), i2, i1)) 956 { 957 /* Move i1 (fld b above) right before i2 (fld a 958 above. */ 959 remove_insn (i1); 960 SET_PREV_INSN (i1) = NULL_RTX; 961 SET_NEXT_INSN (i1) = NULL_RTX; 962 set_block_for_insn (i1, NULL); 963 emit_insn_before (i1, i2); 964 return; 965 } 966 } 967 } 968 } 969 970 /* Avoid emitting the swap if this is the first register stack insn 971 of the current_block. Instead update the current_block's stack_in 972 and let compensate edges take care of this for us. */ 973 if (current_block && starting_stack_p) 974 { 975 BLOCK_INFO (current_block)->stack_in = *regstack; 976 starting_stack_p = false; 977 return; 978 } 979 980 swap_rtx = gen_swapxf (FP_MODE_REG (hard_regno, XFmode), 981 FP_MODE_REG (FIRST_STACK_REG, XFmode)); 982 983 if (i1) 984 emit_insn_after (swap_rtx, i1); 985 else if (current_block) 986 emit_insn_before (swap_rtx, BB_HEAD (current_block)); 987 else 988 emit_insn_before (swap_rtx, insn); 989 } 990 991 /* Emit an insns before INSN to swap virtual register SRC1 with 992 the top of stack and virtual register SRC2 with second stack 993 slot. REGSTACK is the stack state before the swaps, and 994 is updated to reflect the swaps. A swap insn is represented as a 995 PARALLEL of two patterns: each pattern moves one reg to the other. 996 997 If SRC1 and/or SRC2 are already at the right place, no swap insn 998 is emitted. */ 999 1000 static void 1001 swap_to_top (rtx_insn *insn, stack_ptr regstack, rtx src1, rtx src2) 1002 { 1003 struct stack_def temp_stack; 1004 int regno, j, k; 1005 1006 temp_stack = *regstack; 1007 1008 /* Place operand 1 at the top of stack. */ 1009 regno = get_hard_regnum (&temp_stack, src1); 1010 gcc_assert (regno >= 0); 1011 if (regno != FIRST_STACK_REG) 1012 { 1013 k = temp_stack.top - (regno - FIRST_STACK_REG); 1014 j = temp_stack.top; 1015 1016 std::swap (temp_stack.reg[j], temp_stack.reg[k]); 1017 } 1018 1019 /* Place operand 2 next on the stack. */ 1020 regno = get_hard_regnum (&temp_stack, src2); 1021 gcc_assert (regno >= 0); 1022 if (regno != FIRST_STACK_REG + 1) 1023 { 1024 k = temp_stack.top - (regno - FIRST_STACK_REG); 1025 j = temp_stack.top - 1; 1026 1027 std::swap (temp_stack.reg[j], temp_stack.reg[k]); 1028 } 1029 1030 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE); 1031 } 1032 1033 /* Handle a move to or from a stack register in PAT, which is in INSN. 1034 REGSTACK is the current stack. Return whether a control flow insn 1035 was deleted in the process. */ 1036 1037 static bool 1038 move_for_stack_reg (rtx_insn *insn, stack_ptr regstack, rtx pat) 1039 { 1040 rtx *psrc = get_true_reg (&SET_SRC (pat)); 1041 rtx *pdest = get_true_reg (&SET_DEST (pat)); 1042 rtx src, dest; 1043 rtx note; 1044 bool control_flow_insn_deleted = false; 1045 1046 src = *psrc; dest = *pdest; 1047 1048 if (STACK_REG_P (src) && STACK_REG_P (dest)) 1049 { 1050 /* Write from one stack reg to another. If SRC dies here, then 1051 just change the register mapping and delete the insn. */ 1052 1053 note = find_regno_note (insn, REG_DEAD, REGNO (src)); 1054 if (note) 1055 { 1056 int i; 1057 1058 /* If this is a no-op move, there must not be a REG_DEAD note. */ 1059 gcc_assert (REGNO (src) != REGNO (dest)); 1060 1061 for (i = regstack->top; i >= 0; i--) 1062 if (regstack->reg[i] == REGNO (src)) 1063 break; 1064 1065 /* The destination must be dead, or life analysis is borked. */ 1066 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG); 1067 1068 /* If the source is not live, this is yet another case of 1069 uninitialized variables. Load up a NaN instead. */ 1070 if (i < 0) 1071 return move_nan_for_stack_reg (insn, regstack, dest); 1072 1073 /* It is possible that the dest is unused after this insn. 1074 If so, just pop the src. */ 1075 1076 if (find_regno_note (insn, REG_UNUSED, REGNO (dest))) 1077 emit_pop_insn (insn, regstack, src, EMIT_AFTER); 1078 else 1079 { 1080 regstack->reg[i] = REGNO (dest); 1081 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest)); 1082 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src)); 1083 } 1084 1085 control_flow_insn_deleted |= control_flow_insn_p (insn); 1086 delete_insn (insn); 1087 return control_flow_insn_deleted; 1088 } 1089 1090 /* The source reg does not die. */ 1091 1092 /* If this appears to be a no-op move, delete it, or else it 1093 will confuse the machine description output patterns. But if 1094 it is REG_UNUSED, we must pop the reg now, as per-insn processing 1095 for REG_UNUSED will not work for deleted insns. */ 1096 1097 if (REGNO (src) == REGNO (dest)) 1098 { 1099 if (find_regno_note (insn, REG_UNUSED, REGNO (dest))) 1100 emit_pop_insn (insn, regstack, dest, EMIT_AFTER); 1101 1102 control_flow_insn_deleted |= control_flow_insn_p (insn); 1103 delete_insn (insn); 1104 return control_flow_insn_deleted; 1105 } 1106 1107 /* The destination ought to be dead. */ 1108 if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG) 1109 gcc_assert (any_malformed_asm); 1110 else 1111 { 1112 replace_reg (psrc, get_hard_regnum (regstack, src)); 1113 1114 regstack->reg[++regstack->top] = REGNO (dest); 1115 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest)); 1116 replace_reg (pdest, FIRST_STACK_REG); 1117 } 1118 } 1119 else if (STACK_REG_P (src)) 1120 { 1121 /* Save from a stack reg to MEM, or possibly integer reg. Since 1122 only top of stack may be saved, emit an exchange first if 1123 needs be. */ 1124 1125 emit_swap_insn (insn, regstack, src); 1126 1127 note = find_regno_note (insn, REG_DEAD, REGNO (src)); 1128 if (note) 1129 { 1130 replace_reg (&XEXP (note, 0), FIRST_STACK_REG); 1131 regstack->top--; 1132 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src)); 1133 } 1134 else if ((GET_MODE (src) == XFmode) 1135 && regstack->top < REG_STACK_SIZE - 1) 1136 { 1137 /* A 387 cannot write an XFmode value to a MEM without 1138 clobbering the source reg. The output code can handle 1139 this by reading back the value from the MEM. 1140 But it is more efficient to use a temp register if one is 1141 available. Push the source value here if the register 1142 stack is not full, and then write the value to memory via 1143 a pop. */ 1144 rtx push_rtx; 1145 rtx top_stack_reg = FP_MODE_REG (FIRST_STACK_REG, GET_MODE (src)); 1146 1147 push_rtx = gen_movxf (top_stack_reg, top_stack_reg); 1148 emit_insn_before (push_rtx, insn); 1149 add_reg_note (insn, REG_DEAD, top_stack_reg); 1150 } 1151 1152 replace_reg (psrc, FIRST_STACK_REG); 1153 } 1154 else 1155 { 1156 rtx pat = PATTERN (insn); 1157 1158 gcc_assert (STACK_REG_P (dest)); 1159 1160 /* Load from MEM, or possibly integer REG or constant, into the 1161 stack regs. The actual target is always the top of the 1162 stack. The stack mapping is changed to reflect that DEST is 1163 now at top of stack. */ 1164 1165 /* The destination ought to be dead. However, there is a 1166 special case with i387 UNSPEC_TAN, where destination is live 1167 (an argument to fptan) but inherent load of 1.0 is modelled 1168 as a load from a constant. */ 1169 if (GET_CODE (pat) == PARALLEL 1170 && XVECLEN (pat, 0) == 2 1171 && GET_CODE (XVECEXP (pat, 0, 1)) == SET 1172 && GET_CODE (SET_SRC (XVECEXP (pat, 0, 1))) == UNSPEC 1173 && XINT (SET_SRC (XVECEXP (pat, 0, 1)), 1) == UNSPEC_TAN) 1174 emit_swap_insn (insn, regstack, dest); 1175 else 1176 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG 1177 || any_malformed_asm); 1178 1179 gcc_assert (regstack->top < REG_STACK_SIZE); 1180 1181 regstack->reg[++regstack->top] = REGNO (dest); 1182 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest)); 1183 replace_reg (pdest, FIRST_STACK_REG); 1184 } 1185 1186 return control_flow_insn_deleted; 1187 } 1188 1189 /* A helper function which replaces INSN with a pattern that loads up 1190 a NaN into DEST, then invokes move_for_stack_reg. */ 1191 1192 static bool 1193 move_nan_for_stack_reg (rtx_insn *insn, stack_ptr regstack, rtx dest) 1194 { 1195 rtx pat; 1196 1197 dest = FP_MODE_REG (REGNO (dest), SFmode); 1198 pat = gen_rtx_SET (dest, not_a_num); 1199 PATTERN (insn) = pat; 1200 INSN_CODE (insn) = -1; 1201 1202 return move_for_stack_reg (insn, regstack, pat); 1203 } 1204 1205 /* Swap the condition on a branch, if there is one. Return true if we 1206 found a condition to swap. False if the condition was not used as 1207 such. */ 1208 1209 static int 1210 swap_rtx_condition_1 (rtx pat) 1211 { 1212 const char *fmt; 1213 int i, r = 0; 1214 1215 if (COMPARISON_P (pat)) 1216 { 1217 PUT_CODE (pat, swap_condition (GET_CODE (pat))); 1218 r = 1; 1219 } 1220 else 1221 { 1222 fmt = GET_RTX_FORMAT (GET_CODE (pat)); 1223 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--) 1224 { 1225 if (fmt[i] == 'E') 1226 { 1227 int j; 1228 1229 for (j = XVECLEN (pat, i) - 1; j >= 0; j--) 1230 r |= swap_rtx_condition_1 (XVECEXP (pat, i, j)); 1231 } 1232 else if (fmt[i] == 'e') 1233 r |= swap_rtx_condition_1 (XEXP (pat, i)); 1234 } 1235 } 1236 1237 return r; 1238 } 1239 1240 static int 1241 swap_rtx_condition (rtx_insn *insn) 1242 { 1243 rtx pat = PATTERN (insn); 1244 1245 /* We're looking for a single set to cc0 or an HImode temporary. */ 1246 1247 if (GET_CODE (pat) == SET 1248 && REG_P (SET_DEST (pat)) 1249 && REGNO (SET_DEST (pat)) == FLAGS_REG) 1250 { 1251 insn = next_flags_user (insn); 1252 if (insn == NULL_RTX) 1253 return 0; 1254 pat = PATTERN (insn); 1255 } 1256 1257 /* See if this is, or ends in, a fnstsw. If so, we're not doing anything 1258 with the cc value right now. We may be able to search for one 1259 though. */ 1260 1261 if (GET_CODE (pat) == SET 1262 && GET_CODE (SET_SRC (pat)) == UNSPEC 1263 && XINT (SET_SRC (pat), 1) == UNSPEC_FNSTSW) 1264 { 1265 rtx dest = SET_DEST (pat); 1266 1267 /* Search forward looking for the first use of this value. 1268 Stop at block boundaries. */ 1269 while (insn != BB_END (current_block)) 1270 { 1271 insn = NEXT_INSN (insn); 1272 if (INSN_P (insn) && reg_mentioned_p (dest, insn)) 1273 break; 1274 if (CALL_P (insn)) 1275 return 0; 1276 } 1277 1278 /* We haven't found it. */ 1279 if (insn == BB_END (current_block)) 1280 return 0; 1281 1282 /* So we've found the insn using this value. If it is anything 1283 other than sahf or the value does not die (meaning we'd have 1284 to search further), then we must give up. */ 1285 pat = PATTERN (insn); 1286 if (GET_CODE (pat) != SET 1287 || GET_CODE (SET_SRC (pat)) != UNSPEC 1288 || XINT (SET_SRC (pat), 1) != UNSPEC_SAHF 1289 || ! dead_or_set_p (insn, dest)) 1290 return 0; 1291 1292 /* Now we are prepared to handle this as a normal cc0 setter. */ 1293 insn = next_flags_user (insn); 1294 if (insn == NULL_RTX) 1295 return 0; 1296 pat = PATTERN (insn); 1297 } 1298 1299 if (swap_rtx_condition_1 (pat)) 1300 { 1301 int fail = 0; 1302 INSN_CODE (insn) = -1; 1303 if (recog_memoized (insn) == -1) 1304 fail = 1; 1305 /* In case the flags don't die here, recurse to try fix 1306 following user too. */ 1307 else if (! dead_or_set_p (insn, ix86_flags_rtx)) 1308 { 1309 insn = next_flags_user (insn); 1310 if (!insn || !swap_rtx_condition (insn)) 1311 fail = 1; 1312 } 1313 if (fail) 1314 { 1315 swap_rtx_condition_1 (pat); 1316 return 0; 1317 } 1318 return 1; 1319 } 1320 return 0; 1321 } 1322 1323 /* Handle a comparison. Special care needs to be taken to avoid 1324 causing comparisons that a 387 cannot do correctly, such as EQ. 1325 1326 Also, a pop insn may need to be emitted. The 387 does have an 1327 `fcompp' insn that can pop two regs, but it is sometimes too expensive 1328 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to 1329 set up. */ 1330 1331 static void 1332 compare_for_stack_reg (rtx_insn *insn, stack_ptr regstack, 1333 rtx pat_src, bool can_pop_second_op) 1334 { 1335 rtx *src1, *src2; 1336 rtx src1_note, src2_note; 1337 1338 src1 = get_true_reg (&XEXP (pat_src, 0)); 1339 src2 = get_true_reg (&XEXP (pat_src, 1)); 1340 1341 /* ??? If fxch turns out to be cheaper than fstp, give priority to 1342 registers that die in this insn - move those to stack top first. */ 1343 if ((! STACK_REG_P (*src1) 1344 || (STACK_REG_P (*src2) 1345 && get_hard_regnum (regstack, *src2) == FIRST_STACK_REG)) 1346 && swap_rtx_condition (insn)) 1347 { 1348 std::swap (XEXP (pat_src, 0), XEXP (pat_src, 1)); 1349 1350 src1 = get_true_reg (&XEXP (pat_src, 0)); 1351 src2 = get_true_reg (&XEXP (pat_src, 1)); 1352 1353 INSN_CODE (insn) = -1; 1354 } 1355 1356 /* We will fix any death note later. */ 1357 1358 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1359 1360 if (STACK_REG_P (*src2)) 1361 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); 1362 else 1363 src2_note = NULL_RTX; 1364 1365 emit_swap_insn (insn, regstack, *src1); 1366 1367 replace_reg (src1, FIRST_STACK_REG); 1368 1369 if (STACK_REG_P (*src2)) 1370 replace_reg (src2, get_hard_regnum (regstack, *src2)); 1371 1372 if (src1_note) 1373 { 1374 if (*src2 == CONST0_RTX (GET_MODE (*src2))) 1375 { 1376 /* This is `ftst' insn that can't pop register. */ 1377 remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src1_note, 0))); 1378 emit_pop_insn (insn, regstack, XEXP (src1_note, 0), 1379 EMIT_AFTER); 1380 } 1381 else 1382 { 1383 pop_stack (regstack, REGNO (XEXP (src1_note, 0))); 1384 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1385 } 1386 } 1387 1388 /* If the second operand dies, handle that. But if the operands are 1389 the same stack register, don't bother, because only one death is 1390 needed, and it was just handled. */ 1391 1392 if (src2_note 1393 && ! (STACK_REG_P (*src1) && STACK_REG_P (*src2) 1394 && REGNO (*src1) == REGNO (*src2))) 1395 { 1396 /* As a special case, two regs may die in this insn if src2 is 1397 next to top of stack and the top of stack also dies. Since 1398 we have already popped src1, "next to top of stack" is really 1399 at top (FIRST_STACK_REG) now. */ 1400 1401 if (get_hard_regnum (regstack, XEXP (src2_note, 0)) == FIRST_STACK_REG 1402 && src1_note && can_pop_second_op) 1403 { 1404 pop_stack (regstack, REGNO (XEXP (src2_note, 0))); 1405 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1); 1406 } 1407 else 1408 { 1409 /* The 386 can only represent death of the first operand in 1410 the case handled above. In all other cases, emit a separate 1411 pop and remove the death note from here. */ 1412 remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src2_note, 0))); 1413 emit_pop_insn (insn, regstack, XEXP (src2_note, 0), 1414 EMIT_AFTER); 1415 } 1416 } 1417 } 1418 1419 /* Substitute hardware stack regs in debug insn INSN, using stack 1420 layout REGSTACK. If we can't find a hardware stack reg for any of 1421 the REGs in it, reset the debug insn. */ 1422 1423 static void 1424 subst_all_stack_regs_in_debug_insn (rtx_insn *insn, struct stack_def *regstack) 1425 { 1426 subrtx_ptr_iterator::array_type array; 1427 FOR_EACH_SUBRTX_PTR (iter, array, &INSN_VAR_LOCATION_LOC (insn), NONCONST) 1428 { 1429 rtx *loc = *iter; 1430 rtx x = *loc; 1431 if (STACK_REG_P (x)) 1432 { 1433 int hard_regno = get_hard_regnum (regstack, x); 1434 1435 /* If we can't find an active register, reset this debug insn. */ 1436 if (hard_regno == -1) 1437 { 1438 INSN_VAR_LOCATION_LOC (insn) = gen_rtx_UNKNOWN_VAR_LOC (); 1439 return; 1440 } 1441 1442 gcc_assert (hard_regno >= FIRST_STACK_REG); 1443 replace_reg (loc, hard_regno); 1444 iter.skip_subrtxes (); 1445 } 1446 } 1447 } 1448 1449 /* Substitute new registers in PAT, which is part of INSN. REGSTACK 1450 is the current register layout. Return whether a control flow insn 1451 was deleted in the process. */ 1452 1453 static bool 1454 subst_stack_regs_pat (rtx_insn *insn, stack_ptr regstack, rtx pat) 1455 { 1456 rtx *dest, *src; 1457 bool control_flow_insn_deleted = false; 1458 1459 switch (GET_CODE (pat)) 1460 { 1461 case USE: 1462 /* Deaths in USE insns can happen in non optimizing compilation. 1463 Handle them by popping the dying register. */ 1464 src = get_true_reg (&XEXP (pat, 0)); 1465 if (STACK_REG_P (*src) 1466 && find_regno_note (insn, REG_DEAD, REGNO (*src))) 1467 { 1468 /* USEs are ignored for liveness information so USEs of dead 1469 register might happen. */ 1470 if (TEST_HARD_REG_BIT (regstack->reg_set, REGNO (*src))) 1471 emit_pop_insn (insn, regstack, *src, EMIT_AFTER); 1472 return control_flow_insn_deleted; 1473 } 1474 /* Uninitialized USE might happen for functions returning uninitialized 1475 value. We will properly initialize the USE on the edge to EXIT_BLOCK, 1476 so it is safe to ignore the use here. This is consistent with behavior 1477 of dataflow analyzer that ignores USE too. (This also imply that 1478 forcibly initializing the register to NaN here would lead to ICE later, 1479 since the REG_DEAD notes are not issued.) */ 1480 break; 1481 1482 case VAR_LOCATION: 1483 gcc_unreachable (); 1484 1485 case CLOBBER: 1486 { 1487 rtx note; 1488 1489 dest = get_true_reg (&XEXP (pat, 0)); 1490 if (STACK_REG_P (*dest)) 1491 { 1492 note = find_reg_note (insn, REG_DEAD, *dest); 1493 1494 if (pat != PATTERN (insn)) 1495 { 1496 /* The fix_truncdi_1 pattern wants to be able to 1497 allocate its own scratch register. It does this by 1498 clobbering an fp reg so that it is assured of an 1499 empty reg-stack register. If the register is live, 1500 kill it now. Remove the DEAD/UNUSED note so we 1501 don't try to kill it later too. 1502 1503 In reality the UNUSED note can be absent in some 1504 complicated cases when the register is reused for 1505 partially set variable. */ 1506 1507 if (note) 1508 emit_pop_insn (insn, regstack, *dest, EMIT_BEFORE); 1509 else 1510 note = find_reg_note (insn, REG_UNUSED, *dest); 1511 if (note) 1512 remove_note (insn, note); 1513 replace_reg (dest, FIRST_STACK_REG + 1); 1514 } 1515 else 1516 { 1517 /* A top-level clobber with no REG_DEAD, and no hard-regnum 1518 indicates an uninitialized value. Because reload removed 1519 all other clobbers, this must be due to a function 1520 returning without a value. Load up a NaN. */ 1521 1522 if (!note) 1523 { 1524 rtx t = *dest; 1525 if (COMPLEX_MODE_P (GET_MODE (t))) 1526 { 1527 rtx u = FP_MODE_REG (REGNO (t) + 1, SFmode); 1528 if (get_hard_regnum (regstack, u) == -1) 1529 { 1530 rtx pat2 = gen_rtx_CLOBBER (VOIDmode, u); 1531 rtx_insn *insn2 = emit_insn_before (pat2, insn); 1532 control_flow_insn_deleted 1533 |= move_nan_for_stack_reg (insn2, regstack, u); 1534 } 1535 } 1536 if (get_hard_regnum (regstack, t) == -1) 1537 control_flow_insn_deleted 1538 |= move_nan_for_stack_reg (insn, regstack, t); 1539 } 1540 } 1541 } 1542 break; 1543 } 1544 1545 case SET: 1546 { 1547 rtx *src1 = (rtx *) 0, *src2; 1548 rtx src1_note, src2_note; 1549 rtx pat_src; 1550 1551 dest = get_true_reg (&SET_DEST (pat)); 1552 src = get_true_reg (&SET_SRC (pat)); 1553 pat_src = SET_SRC (pat); 1554 1555 /* See if this is a `movM' pattern, and handle elsewhere if so. */ 1556 if (STACK_REG_P (*src) 1557 || (STACK_REG_P (*dest) 1558 && (REG_P (*src) || MEM_P (*src) 1559 || CONST_DOUBLE_P (*src)))) 1560 { 1561 control_flow_insn_deleted |= move_for_stack_reg (insn, regstack, pat); 1562 break; 1563 } 1564 1565 switch (GET_CODE (pat_src)) 1566 { 1567 case CALL: 1568 { 1569 int count; 1570 for (count = REG_NREGS (*dest); --count >= 0;) 1571 { 1572 regstack->reg[++regstack->top] = REGNO (*dest) + count; 1573 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest) + count); 1574 } 1575 } 1576 replace_reg (dest, FIRST_STACK_REG); 1577 break; 1578 1579 case REG: 1580 /* This is a `tstM2' case. */ 1581 gcc_assert (*dest == cc0_rtx); 1582 src1 = src; 1583 1584 /* Fall through. */ 1585 1586 case FLOAT_TRUNCATE: 1587 case SQRT: 1588 case ABS: 1589 case NEG: 1590 /* These insns only operate on the top of the stack. DEST might 1591 be cc0_rtx if we're processing a tstM pattern. Also, it's 1592 possible that the tstM case results in a REG_DEAD note on the 1593 source. */ 1594 1595 if (src1 == 0) 1596 src1 = get_true_reg (&XEXP (pat_src, 0)); 1597 1598 emit_swap_insn (insn, regstack, *src1); 1599 1600 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1601 1602 if (STACK_REG_P (*dest)) 1603 replace_reg (dest, FIRST_STACK_REG); 1604 1605 if (src1_note) 1606 { 1607 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1608 regstack->top--; 1609 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1)); 1610 } 1611 1612 replace_reg (src1, FIRST_STACK_REG); 1613 break; 1614 1615 case MINUS: 1616 case DIV: 1617 /* On i386, reversed forms of subM3 and divM3 exist for 1618 MODE_FLOAT, so the same code that works for addM3 and mulM3 1619 can be used. */ 1620 case MULT: 1621 case PLUS: 1622 /* These insns can accept the top of stack as a destination 1623 from a stack reg or mem, or can use the top of stack as a 1624 source and some other stack register (possibly top of stack) 1625 as a destination. */ 1626 1627 src1 = get_true_reg (&XEXP (pat_src, 0)); 1628 src2 = get_true_reg (&XEXP (pat_src, 1)); 1629 1630 /* We will fix any death note later. */ 1631 1632 if (STACK_REG_P (*src1)) 1633 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1634 else 1635 src1_note = NULL_RTX; 1636 if (STACK_REG_P (*src2)) 1637 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); 1638 else 1639 src2_note = NULL_RTX; 1640 1641 /* If either operand is not a stack register, then the dest 1642 must be top of stack. */ 1643 1644 if (! STACK_REG_P (*src1) || ! STACK_REG_P (*src2)) 1645 emit_swap_insn (insn, regstack, *dest); 1646 else 1647 { 1648 /* Both operands are REG. If neither operand is already 1649 at the top of stack, choose to make the one that is the 1650 dest the new top of stack. */ 1651 1652 int src1_hard_regnum, src2_hard_regnum; 1653 1654 src1_hard_regnum = get_hard_regnum (regstack, *src1); 1655 src2_hard_regnum = get_hard_regnum (regstack, *src2); 1656 1657 /* If the source is not live, this is yet another case of 1658 uninitialized variables. Load up a NaN instead. */ 1659 if (src1_hard_regnum == -1) 1660 { 1661 rtx pat2 = gen_rtx_CLOBBER (VOIDmode, *src1); 1662 rtx_insn *insn2 = emit_insn_before (pat2, insn); 1663 control_flow_insn_deleted 1664 |= move_nan_for_stack_reg (insn2, regstack, *src1); 1665 } 1666 if (src2_hard_regnum == -1) 1667 { 1668 rtx pat2 = gen_rtx_CLOBBER (VOIDmode, *src2); 1669 rtx_insn *insn2 = emit_insn_before (pat2, insn); 1670 control_flow_insn_deleted 1671 |= move_nan_for_stack_reg (insn2, regstack, *src2); 1672 } 1673 1674 if (src1_hard_regnum != FIRST_STACK_REG 1675 && src2_hard_regnum != FIRST_STACK_REG) 1676 emit_swap_insn (insn, regstack, *dest); 1677 } 1678 1679 if (STACK_REG_P (*src1)) 1680 replace_reg (src1, get_hard_regnum (regstack, *src1)); 1681 if (STACK_REG_P (*src2)) 1682 replace_reg (src2, get_hard_regnum (regstack, *src2)); 1683 1684 if (src1_note) 1685 { 1686 rtx src1_reg = XEXP (src1_note, 0); 1687 1688 /* If the register that dies is at the top of stack, then 1689 the destination is somewhere else - merely substitute it. 1690 But if the reg that dies is not at top of stack, then 1691 move the top of stack to the dead reg, as though we had 1692 done the insn and then a store-with-pop. */ 1693 1694 if (REGNO (src1_reg) == regstack->reg[regstack->top]) 1695 { 1696 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1697 replace_reg (dest, get_hard_regnum (regstack, *dest)); 1698 } 1699 else 1700 { 1701 int regno = get_hard_regnum (regstack, src1_reg); 1702 1703 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1704 replace_reg (dest, regno); 1705 1706 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)] 1707 = regstack->reg[regstack->top]; 1708 } 1709 1710 CLEAR_HARD_REG_BIT (regstack->reg_set, 1711 REGNO (XEXP (src1_note, 0))); 1712 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1713 regstack->top--; 1714 } 1715 else if (src2_note) 1716 { 1717 rtx src2_reg = XEXP (src2_note, 0); 1718 if (REGNO (src2_reg) == regstack->reg[regstack->top]) 1719 { 1720 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1721 replace_reg (dest, get_hard_regnum (regstack, *dest)); 1722 } 1723 else 1724 { 1725 int regno = get_hard_regnum (regstack, src2_reg); 1726 1727 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1728 replace_reg (dest, regno); 1729 1730 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)] 1731 = regstack->reg[regstack->top]; 1732 } 1733 1734 CLEAR_HARD_REG_BIT (regstack->reg_set, 1735 REGNO (XEXP (src2_note, 0))); 1736 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG); 1737 regstack->top--; 1738 } 1739 else 1740 { 1741 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1742 replace_reg (dest, get_hard_regnum (regstack, *dest)); 1743 } 1744 1745 /* Keep operand 1 matching with destination. */ 1746 if (COMMUTATIVE_ARITH_P (pat_src) 1747 && REG_P (*src1) && REG_P (*src2) 1748 && REGNO (*src1) != REGNO (*dest)) 1749 { 1750 int tmp = REGNO (*src1); 1751 replace_reg (src1, REGNO (*src2)); 1752 replace_reg (src2, tmp); 1753 } 1754 break; 1755 1756 case UNSPEC: 1757 switch (XINT (pat_src, 1)) 1758 { 1759 case UNSPEC_FIST: 1760 case UNSPEC_FIST_ATOMIC: 1761 1762 case UNSPEC_FIST_FLOOR: 1763 case UNSPEC_FIST_CEIL: 1764 1765 /* These insns only operate on the top of the stack. */ 1766 1767 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1768 emit_swap_insn (insn, regstack, *src1); 1769 1770 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1771 1772 if (STACK_REG_P (*dest)) 1773 replace_reg (dest, FIRST_STACK_REG); 1774 1775 if (src1_note) 1776 { 1777 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1778 regstack->top--; 1779 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1)); 1780 } 1781 1782 replace_reg (src1, FIRST_STACK_REG); 1783 break; 1784 1785 case UNSPEC_FXAM: 1786 1787 /* This insn only operate on the top of the stack. */ 1788 1789 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1790 emit_swap_insn (insn, regstack, *src1); 1791 1792 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1793 1794 replace_reg (src1, FIRST_STACK_REG); 1795 1796 if (src1_note) 1797 { 1798 remove_regno_note (insn, REG_DEAD, 1799 REGNO (XEXP (src1_note, 0))); 1800 emit_pop_insn (insn, regstack, XEXP (src1_note, 0), 1801 EMIT_AFTER); 1802 } 1803 1804 break; 1805 1806 case UNSPEC_SIN: 1807 case UNSPEC_COS: 1808 case UNSPEC_FRNDINT: 1809 case UNSPEC_F2XM1: 1810 1811 case UNSPEC_FRNDINT_FLOOR: 1812 case UNSPEC_FRNDINT_CEIL: 1813 case UNSPEC_FRNDINT_TRUNC: 1814 case UNSPEC_FRNDINT_MASK_PM: 1815 1816 /* Above insns operate on the top of the stack. */ 1817 1818 case UNSPEC_SINCOS_COS: 1819 case UNSPEC_XTRACT_FRACT: 1820 1821 /* Above insns operate on the top two stack slots, 1822 first part of one input, double output insn. */ 1823 1824 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1825 1826 emit_swap_insn (insn, regstack, *src1); 1827 1828 /* Input should never die, it is replaced with output. */ 1829 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1830 gcc_assert (!src1_note); 1831 1832 if (STACK_REG_P (*dest)) 1833 replace_reg (dest, FIRST_STACK_REG); 1834 1835 replace_reg (src1, FIRST_STACK_REG); 1836 break; 1837 1838 case UNSPEC_SINCOS_SIN: 1839 case UNSPEC_XTRACT_EXP: 1840 1841 /* These insns operate on the top two stack slots, 1842 second part of one input, double output insn. */ 1843 1844 regstack->top++; 1845 /* FALLTHRU */ 1846 1847 case UNSPEC_TAN: 1848 1849 /* For UNSPEC_TAN, regstack->top is already increased 1850 by inherent load of constant 1.0. */ 1851 1852 /* Output value is generated in the second stack slot. 1853 Move current value from second slot to the top. */ 1854 regstack->reg[regstack->top] 1855 = regstack->reg[regstack->top - 1]; 1856 1857 gcc_assert (STACK_REG_P (*dest)); 1858 1859 regstack->reg[regstack->top - 1] = REGNO (*dest); 1860 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1861 replace_reg (dest, FIRST_STACK_REG + 1); 1862 1863 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1864 1865 replace_reg (src1, FIRST_STACK_REG); 1866 break; 1867 1868 case UNSPEC_FPATAN: 1869 case UNSPEC_FYL2X: 1870 case UNSPEC_FYL2XP1: 1871 /* These insns operate on the top two stack slots. */ 1872 1873 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1874 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1)); 1875 1876 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1877 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); 1878 1879 swap_to_top (insn, regstack, *src1, *src2); 1880 1881 replace_reg (src1, FIRST_STACK_REG); 1882 replace_reg (src2, FIRST_STACK_REG + 1); 1883 1884 if (src1_note) 1885 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1886 if (src2_note) 1887 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1); 1888 1889 /* Pop both input operands from the stack. */ 1890 CLEAR_HARD_REG_BIT (regstack->reg_set, 1891 regstack->reg[regstack->top]); 1892 CLEAR_HARD_REG_BIT (regstack->reg_set, 1893 regstack->reg[regstack->top - 1]); 1894 regstack->top -= 2; 1895 1896 /* Push the result back onto the stack. */ 1897 regstack->reg[++regstack->top] = REGNO (*dest); 1898 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1899 replace_reg (dest, FIRST_STACK_REG); 1900 break; 1901 1902 case UNSPEC_FSCALE_FRACT: 1903 case UNSPEC_FPREM_F: 1904 case UNSPEC_FPREM1_F: 1905 /* These insns operate on the top two stack slots, 1906 first part of double input, double output insn. */ 1907 1908 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1909 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1)); 1910 1911 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1912 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); 1913 1914 /* Inputs should never die, they are 1915 replaced with outputs. */ 1916 gcc_assert (!src1_note); 1917 gcc_assert (!src2_note); 1918 1919 swap_to_top (insn, regstack, *src1, *src2); 1920 1921 /* Push the result back onto stack. Empty stack slot 1922 will be filled in second part of insn. */ 1923 if (STACK_REG_P (*dest)) 1924 { 1925 regstack->reg[regstack->top] = REGNO (*dest); 1926 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1927 replace_reg (dest, FIRST_STACK_REG); 1928 } 1929 1930 replace_reg (src1, FIRST_STACK_REG); 1931 replace_reg (src2, FIRST_STACK_REG + 1); 1932 break; 1933 1934 case UNSPEC_FSCALE_EXP: 1935 case UNSPEC_FPREM_U: 1936 case UNSPEC_FPREM1_U: 1937 /* These insns operate on the top two stack slots, 1938 second part of double input, double output insn. */ 1939 1940 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1941 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1)); 1942 1943 /* Push the result back onto stack. Fill empty slot from 1944 first part of insn and fix top of stack pointer. */ 1945 if (STACK_REG_P (*dest)) 1946 { 1947 regstack->reg[regstack->top - 1] = REGNO (*dest); 1948 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1949 replace_reg (dest, FIRST_STACK_REG + 1); 1950 } 1951 1952 replace_reg (src1, FIRST_STACK_REG); 1953 replace_reg (src2, FIRST_STACK_REG + 1); 1954 break; 1955 1956 case UNSPEC_C2_FLAG: 1957 /* This insn operates on the top two stack slots, 1958 third part of C2 setting double input insn. */ 1959 1960 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1961 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1)); 1962 1963 replace_reg (src1, FIRST_STACK_REG); 1964 replace_reg (src2, FIRST_STACK_REG + 1); 1965 break; 1966 1967 case UNSPEC_FNSTSW: 1968 /* Combined fcomp+fnstsw generated for doing well with 1969 CSE. When optimizing this would have been broken 1970 up before now. */ 1971 1972 pat_src = XVECEXP (pat_src, 0, 0); 1973 if (GET_CODE (pat_src) == COMPARE) 1974 goto do_compare; 1975 1976 /* Fall through. */ 1977 1978 case UNSPEC_NOTRAP: 1979 1980 pat_src = XVECEXP (pat_src, 0, 0); 1981 gcc_assert (GET_CODE (pat_src) == COMPARE); 1982 goto do_compare; 1983 1984 default: 1985 gcc_unreachable (); 1986 } 1987 break; 1988 1989 case COMPARE: 1990 do_compare: 1991 /* `fcomi' insn can't pop two regs. */ 1992 compare_for_stack_reg (insn, regstack, pat_src, 1993 REGNO (*dest) != FLAGS_REG); 1994 break; 1995 1996 case IF_THEN_ELSE: 1997 /* This insn requires the top of stack to be the destination. */ 1998 1999 src1 = get_true_reg (&XEXP (pat_src, 1)); 2000 src2 = get_true_reg (&XEXP (pat_src, 2)); 2001 2002 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 2003 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); 2004 2005 /* If the comparison operator is an FP comparison operator, 2006 it is handled correctly by compare_for_stack_reg () who 2007 will move the destination to the top of stack. But if the 2008 comparison operator is not an FP comparison operator, we 2009 have to handle it here. */ 2010 if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG 2011 && REGNO (*dest) != regstack->reg[regstack->top]) 2012 { 2013 /* In case one of operands is the top of stack and the operands 2014 dies, it is safe to make it the destination operand by 2015 reversing the direction of cmove and avoid fxch. */ 2016 if ((REGNO (*src1) == regstack->reg[regstack->top] 2017 && src1_note) 2018 || (REGNO (*src2) == regstack->reg[regstack->top] 2019 && src2_note)) 2020 { 2021 int idx1 = (get_hard_regnum (regstack, *src1) 2022 - FIRST_STACK_REG); 2023 int idx2 = (get_hard_regnum (regstack, *src2) 2024 - FIRST_STACK_REG); 2025 2026 /* Make reg-stack believe that the operands are already 2027 swapped on the stack */ 2028 regstack->reg[regstack->top - idx1] = REGNO (*src2); 2029 regstack->reg[regstack->top - idx2] = REGNO (*src1); 2030 2031 /* Reverse condition to compensate the operand swap. 2032 i386 do have comparison always reversible. */ 2033 PUT_CODE (XEXP (pat_src, 0), 2034 reversed_comparison_code (XEXP (pat_src, 0), insn)); 2035 } 2036 else 2037 emit_swap_insn (insn, regstack, *dest); 2038 } 2039 2040 { 2041 rtx src_note [3]; 2042 int i; 2043 2044 src_note[0] = 0; 2045 src_note[1] = src1_note; 2046 src_note[2] = src2_note; 2047 2048 if (STACK_REG_P (*src1)) 2049 replace_reg (src1, get_hard_regnum (regstack, *src1)); 2050 if (STACK_REG_P (*src2)) 2051 replace_reg (src2, get_hard_regnum (regstack, *src2)); 2052 2053 for (i = 1; i <= 2; i++) 2054 if (src_note [i]) 2055 { 2056 int regno = REGNO (XEXP (src_note[i], 0)); 2057 2058 /* If the register that dies is not at the top of 2059 stack, then move the top of stack to the dead reg. 2060 Top of stack should never die, as it is the 2061 destination. */ 2062 gcc_assert (regno != regstack->reg[regstack->top]); 2063 remove_regno_note (insn, REG_DEAD, regno); 2064 emit_pop_insn (insn, regstack, XEXP (src_note[i], 0), 2065 EMIT_AFTER); 2066 } 2067 } 2068 2069 /* Make dest the top of stack. Add dest to regstack if 2070 not present. */ 2071 if (get_hard_regnum (regstack, *dest) < FIRST_STACK_REG) 2072 regstack->reg[++regstack->top] = REGNO (*dest); 2073 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 2074 replace_reg (dest, FIRST_STACK_REG); 2075 break; 2076 2077 default: 2078 gcc_unreachable (); 2079 } 2080 break; 2081 } 2082 2083 default: 2084 break; 2085 } 2086 2087 return control_flow_insn_deleted; 2088 } 2089 2090 /* Substitute hard regnums for any stack regs in INSN, which has 2091 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info 2092 before the insn, and is updated with changes made here. 2093 2094 There are several requirements and assumptions about the use of 2095 stack-like regs in asm statements. These rules are enforced by 2096 record_asm_stack_regs; see comments there for details. Any 2097 asm_operands left in the RTL at this point may be assume to meet the 2098 requirements, since record_asm_stack_regs removes any problem asm. */ 2099 2100 static void 2101 subst_asm_stack_regs (rtx_insn *insn, stack_ptr regstack) 2102 { 2103 rtx body = PATTERN (insn); 2104 2105 rtx *note_reg; /* Array of note contents */ 2106 rtx **note_loc; /* Address of REG field of each note */ 2107 enum reg_note *note_kind; /* The type of each note */ 2108 2109 rtx *clobber_reg = 0; 2110 rtx **clobber_loc = 0; 2111 2112 struct stack_def temp_stack; 2113 int n_notes; 2114 int n_clobbers; 2115 rtx note; 2116 int i; 2117 int n_inputs, n_outputs; 2118 2119 if (! check_asm_stack_operands (insn)) 2120 return; 2121 2122 /* Find out what the constraints required. If no constraint 2123 alternative matches, that is a compiler bug: we should have caught 2124 such an insn in check_asm_stack_operands. */ 2125 extract_constrain_insn (insn); 2126 2127 preprocess_constraints (insn); 2128 const operand_alternative *op_alt = which_op_alt (); 2129 2130 get_asm_operands_in_out (body, &n_outputs, &n_inputs); 2131 2132 /* Strip SUBREGs here to make the following code simpler. */ 2133 for (i = 0; i < recog_data.n_operands; i++) 2134 if (GET_CODE (recog_data.operand[i]) == SUBREG 2135 && REG_P (SUBREG_REG (recog_data.operand[i]))) 2136 { 2137 recog_data.operand_loc[i] = & SUBREG_REG (recog_data.operand[i]); 2138 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]); 2139 } 2140 2141 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */ 2142 2143 for (i = 0, note = REG_NOTES (insn); note; note = XEXP (note, 1)) 2144 i++; 2145 2146 note_reg = XALLOCAVEC (rtx, i); 2147 note_loc = XALLOCAVEC (rtx *, i); 2148 note_kind = XALLOCAVEC (enum reg_note, i); 2149 2150 n_notes = 0; 2151 for (note = REG_NOTES (insn); note; note = XEXP (note, 1)) 2152 { 2153 if (GET_CODE (note) != EXPR_LIST) 2154 continue; 2155 rtx reg = XEXP (note, 0); 2156 rtx *loc = & XEXP (note, 0); 2157 2158 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg))) 2159 { 2160 loc = & SUBREG_REG (reg); 2161 reg = SUBREG_REG (reg); 2162 } 2163 2164 if (STACK_REG_P (reg) 2165 && (REG_NOTE_KIND (note) == REG_DEAD 2166 || REG_NOTE_KIND (note) == REG_UNUSED)) 2167 { 2168 note_reg[n_notes] = reg; 2169 note_loc[n_notes] = loc; 2170 note_kind[n_notes] = REG_NOTE_KIND (note); 2171 n_notes++; 2172 } 2173 } 2174 2175 /* Set up CLOBBER_REG and CLOBBER_LOC. */ 2176 2177 n_clobbers = 0; 2178 2179 if (GET_CODE (body) == PARALLEL) 2180 { 2181 clobber_reg = XALLOCAVEC (rtx, XVECLEN (body, 0)); 2182 clobber_loc = XALLOCAVEC (rtx *, XVECLEN (body, 0)); 2183 2184 for (i = 0; i < XVECLEN (body, 0); i++) 2185 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER) 2186 { 2187 rtx clobber = XVECEXP (body, 0, i); 2188 rtx reg = XEXP (clobber, 0); 2189 rtx *loc = & XEXP (clobber, 0); 2190 2191 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg))) 2192 { 2193 loc = & SUBREG_REG (reg); 2194 reg = SUBREG_REG (reg); 2195 } 2196 2197 if (STACK_REG_P (reg)) 2198 { 2199 clobber_reg[n_clobbers] = reg; 2200 clobber_loc[n_clobbers] = loc; 2201 n_clobbers++; 2202 } 2203 } 2204 } 2205 2206 temp_stack = *regstack; 2207 2208 /* Put the input regs into the desired place in TEMP_STACK. */ 2209 2210 for (i = n_outputs; i < n_outputs + n_inputs; i++) 2211 if (STACK_REG_P (recog_data.operand[i]) 2212 && reg_class_subset_p (op_alt[i].cl, FLOAT_REGS) 2213 && op_alt[i].cl != FLOAT_REGS) 2214 { 2215 /* If an operand needs to be in a particular reg in 2216 FLOAT_REGS, the constraint was either 't' or 'u'. Since 2217 these constraints are for single register classes, and 2218 reload guaranteed that operand[i] is already in that class, 2219 we can just use REGNO (recog_data.operand[i]) to know which 2220 actual reg this operand needs to be in. */ 2221 2222 int regno = get_hard_regnum (&temp_stack, recog_data.operand[i]); 2223 2224 gcc_assert (regno >= 0); 2225 2226 if ((unsigned int) regno != REGNO (recog_data.operand[i])) 2227 { 2228 /* recog_data.operand[i] is not in the right place. Find 2229 it and swap it with whatever is already in I's place. 2230 K is where recog_data.operand[i] is now. J is where it 2231 should be. */ 2232 int j, k; 2233 2234 k = temp_stack.top - (regno - FIRST_STACK_REG); 2235 j = (temp_stack.top 2236 - (REGNO (recog_data.operand[i]) - FIRST_STACK_REG)); 2237 2238 std::swap (temp_stack.reg[j], temp_stack.reg[k]); 2239 } 2240 } 2241 2242 /* Emit insns before INSN to make sure the reg-stack is in the right 2243 order. */ 2244 2245 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE); 2246 2247 /* Make the needed input register substitutions. Do death notes and 2248 clobbers too, because these are for inputs, not outputs. */ 2249 2250 for (i = n_outputs; i < n_outputs + n_inputs; i++) 2251 if (STACK_REG_P (recog_data.operand[i])) 2252 { 2253 int regnum = get_hard_regnum (regstack, recog_data.operand[i]); 2254 2255 gcc_assert (regnum >= 0); 2256 2257 replace_reg (recog_data.operand_loc[i], regnum); 2258 } 2259 2260 for (i = 0; i < n_notes; i++) 2261 if (note_kind[i] == REG_DEAD) 2262 { 2263 int regnum = get_hard_regnum (regstack, note_reg[i]); 2264 2265 gcc_assert (regnum >= 0); 2266 2267 replace_reg (note_loc[i], regnum); 2268 } 2269 2270 for (i = 0; i < n_clobbers; i++) 2271 { 2272 /* It's OK for a CLOBBER to reference a reg that is not live. 2273 Don't try to replace it in that case. */ 2274 int regnum = get_hard_regnum (regstack, clobber_reg[i]); 2275 2276 if (regnum >= 0) 2277 { 2278 /* Sigh - clobbers always have QImode. But replace_reg knows 2279 that these regs can't be MODE_INT and will assert. Just put 2280 the right reg there without calling replace_reg. */ 2281 2282 *clobber_loc[i] = FP_MODE_REG (regnum, DFmode); 2283 } 2284 } 2285 2286 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */ 2287 2288 for (i = n_outputs; i < n_outputs + n_inputs; i++) 2289 if (STACK_REG_P (recog_data.operand[i])) 2290 { 2291 /* An input reg is implicitly popped if it is tied to an 2292 output, or if there is a CLOBBER for it. */ 2293 int j; 2294 2295 for (j = 0; j < n_clobbers; j++) 2296 if (operands_match_p (clobber_reg[j], recog_data.operand[i])) 2297 break; 2298 2299 if (j < n_clobbers || op_alt[i].matches >= 0) 2300 { 2301 /* recog_data.operand[i] might not be at the top of stack. 2302 But that's OK, because all we need to do is pop the 2303 right number of regs off of the top of the reg-stack. 2304 record_asm_stack_regs guaranteed that all implicitly 2305 popped regs were grouped at the top of the reg-stack. */ 2306 2307 CLEAR_HARD_REG_BIT (regstack->reg_set, 2308 regstack->reg[regstack->top]); 2309 regstack->top--; 2310 } 2311 } 2312 2313 /* Now add to REGSTACK any outputs that the asm implicitly pushed. 2314 Note that there isn't any need to substitute register numbers. 2315 ??? Explain why this is true. */ 2316 2317 for (i = LAST_STACK_REG; i >= FIRST_STACK_REG; i--) 2318 { 2319 /* See if there is an output for this hard reg. */ 2320 int j; 2321 2322 for (j = 0; j < n_outputs; j++) 2323 if (STACK_REG_P (recog_data.operand[j]) 2324 && REGNO (recog_data.operand[j]) == (unsigned) i) 2325 { 2326 regstack->reg[++regstack->top] = i; 2327 SET_HARD_REG_BIT (regstack->reg_set, i); 2328 break; 2329 } 2330 } 2331 2332 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD 2333 input that the asm didn't implicitly pop. If the asm didn't 2334 implicitly pop an input reg, that reg will still be live. 2335 2336 Note that we can't use find_regno_note here: the register numbers 2337 in the death notes have already been substituted. */ 2338 2339 for (i = 0; i < n_outputs; i++) 2340 if (STACK_REG_P (recog_data.operand[i])) 2341 { 2342 int j; 2343 2344 for (j = 0; j < n_notes; j++) 2345 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j]) 2346 && note_kind[j] == REG_UNUSED) 2347 { 2348 insn = emit_pop_insn (insn, regstack, recog_data.operand[i], 2349 EMIT_AFTER); 2350 break; 2351 } 2352 } 2353 2354 for (i = n_outputs; i < n_outputs + n_inputs; i++) 2355 if (STACK_REG_P (recog_data.operand[i])) 2356 { 2357 int j; 2358 2359 for (j = 0; j < n_notes; j++) 2360 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j]) 2361 && note_kind[j] == REG_DEAD 2362 && TEST_HARD_REG_BIT (regstack->reg_set, 2363 REGNO (recog_data.operand[i]))) 2364 { 2365 insn = emit_pop_insn (insn, regstack, recog_data.operand[i], 2366 EMIT_AFTER); 2367 break; 2368 } 2369 } 2370 } 2371 2372 /* Substitute stack hard reg numbers for stack virtual registers in 2373 INSN. Non-stack register numbers are not changed. REGSTACK is the 2374 current stack content. Insns may be emitted as needed to arrange the 2375 stack for the 387 based on the contents of the insn. Return whether 2376 a control flow insn was deleted in the process. */ 2377 2378 static bool 2379 subst_stack_regs (rtx_insn *insn, stack_ptr regstack) 2380 { 2381 rtx *note_link, note; 2382 bool control_flow_insn_deleted = false; 2383 int i; 2384 2385 if (CALL_P (insn)) 2386 { 2387 int top = regstack->top; 2388 2389 /* If there are any floating point parameters to be passed in 2390 registers for this call, make sure they are in the right 2391 order. */ 2392 2393 if (top >= 0) 2394 { 2395 straighten_stack (insn, regstack); 2396 2397 /* Now mark the arguments as dead after the call. */ 2398 2399 while (regstack->top >= 0) 2400 { 2401 CLEAR_HARD_REG_BIT (regstack->reg_set, FIRST_STACK_REG + regstack->top); 2402 regstack->top--; 2403 } 2404 } 2405 } 2406 2407 /* Do the actual substitution if any stack regs are mentioned. 2408 Since we only record whether entire insn mentions stack regs, and 2409 subst_stack_regs_pat only works for patterns that contain stack regs, 2410 we must check each pattern in a parallel here. A call_value_pop could 2411 fail otherwise. */ 2412 2413 if (stack_regs_mentioned (insn)) 2414 { 2415 int n_operands = asm_noperands (PATTERN (insn)); 2416 if (n_operands >= 0) 2417 { 2418 /* This insn is an `asm' with operands. Decode the operands, 2419 decide how many are inputs, and do register substitution. 2420 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */ 2421 2422 subst_asm_stack_regs (insn, regstack); 2423 return control_flow_insn_deleted; 2424 } 2425 2426 if (GET_CODE (PATTERN (insn)) == PARALLEL) 2427 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++) 2428 { 2429 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn), 0, i))) 2430 { 2431 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER) 2432 XVECEXP (PATTERN (insn), 0, i) 2433 = shallow_copy_rtx (XVECEXP (PATTERN (insn), 0, i)); 2434 control_flow_insn_deleted 2435 |= subst_stack_regs_pat (insn, regstack, 2436 XVECEXP (PATTERN (insn), 0, i)); 2437 } 2438 } 2439 else 2440 control_flow_insn_deleted 2441 |= subst_stack_regs_pat (insn, regstack, PATTERN (insn)); 2442 } 2443 2444 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any 2445 REG_UNUSED will already have been dealt with, so just return. */ 2446 2447 if (NOTE_P (insn) || insn->deleted ()) 2448 return control_flow_insn_deleted; 2449 2450 /* If this a noreturn call, we can't insert pop insns after it. 2451 Instead, reset the stack state to empty. */ 2452 if (CALL_P (insn) 2453 && find_reg_note (insn, REG_NORETURN, NULL)) 2454 { 2455 regstack->top = -1; 2456 CLEAR_HARD_REG_SET (regstack->reg_set); 2457 return control_flow_insn_deleted; 2458 } 2459 2460 /* If there is a REG_UNUSED note on a stack register on this insn, 2461 the indicated reg must be popped. The REG_UNUSED note is removed, 2462 since the form of the newly emitted pop insn references the reg, 2463 making it no longer `unset'. */ 2464 2465 note_link = ®_NOTES (insn); 2466 for (note = *note_link; note; note = XEXP (note, 1)) 2467 if (REG_NOTE_KIND (note) == REG_UNUSED && STACK_REG_P (XEXP (note, 0))) 2468 { 2469 *note_link = XEXP (note, 1); 2470 insn = emit_pop_insn (insn, regstack, XEXP (note, 0), EMIT_AFTER); 2471 } 2472 else 2473 note_link = &XEXP (note, 1); 2474 2475 return control_flow_insn_deleted; 2476 } 2477 2478 /* Change the organization of the stack so that it fits a new basic 2479 block. Some registers might have to be popped, but there can never be 2480 a register live in the new block that is not now live. 2481 2482 Insert any needed insns before or after INSN, as indicated by 2483 WHERE. OLD is the original stack layout, and NEW is the desired 2484 form. OLD is updated to reflect the code emitted, i.e., it will be 2485 the same as NEW upon return. 2486 2487 This function will not preserve block_end[]. But that information 2488 is no longer needed once this has executed. */ 2489 2490 static void 2491 change_stack (rtx_insn *insn, stack_ptr old, stack_ptr new_stack, 2492 enum emit_where where) 2493 { 2494 int reg; 2495 rtx_insn *update_end = NULL; 2496 int i; 2497 2498 /* Stack adjustments for the first insn in a block update the 2499 current_block's stack_in instead of inserting insns directly. 2500 compensate_edges will add the necessary code later. */ 2501 if (current_block 2502 && starting_stack_p 2503 && where == EMIT_BEFORE) 2504 { 2505 BLOCK_INFO (current_block)->stack_in = *new_stack; 2506 starting_stack_p = false; 2507 *old = *new_stack; 2508 return; 2509 } 2510 2511 /* We will be inserting new insns "backwards". If we are to insert 2512 after INSN, find the next insn, and insert before it. */ 2513 2514 if (where == EMIT_AFTER) 2515 { 2516 if (current_block && BB_END (current_block) == insn) 2517 update_end = insn; 2518 insn = NEXT_INSN (insn); 2519 } 2520 2521 /* Initialize partially dead variables. */ 2522 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++) 2523 if (TEST_HARD_REG_BIT (new_stack->reg_set, i) 2524 && !TEST_HARD_REG_BIT (old->reg_set, i)) 2525 { 2526 old->reg[++old->top] = i; 2527 SET_HARD_REG_BIT (old->reg_set, i); 2528 emit_insn_before (gen_rtx_SET (FP_MODE_REG (i, SFmode), not_a_num), 2529 insn); 2530 } 2531 2532 /* Pop any registers that are not needed in the new block. */ 2533 2534 /* If the destination block's stack already has a specified layout 2535 and contains two or more registers, use a more intelligent algorithm 2536 to pop registers that minimizes the number of fxchs below. */ 2537 if (new_stack->top > 0) 2538 { 2539 bool slots[REG_STACK_SIZE]; 2540 int pops[REG_STACK_SIZE]; 2541 int next, dest, topsrc; 2542 2543 /* First pass to determine the free slots. */ 2544 for (reg = 0; reg <= new_stack->top; reg++) 2545 slots[reg] = TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[reg]); 2546 2547 /* Second pass to allocate preferred slots. */ 2548 topsrc = -1; 2549 for (reg = old->top; reg > new_stack->top; reg--) 2550 if (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[reg])) 2551 { 2552 dest = -1; 2553 for (next = 0; next <= new_stack->top; next++) 2554 if (!slots[next] && new_stack->reg[next] == old->reg[reg]) 2555 { 2556 /* If this is a preference for the new top of stack, record 2557 the fact by remembering it's old->reg in topsrc. */ 2558 if (next == new_stack->top) 2559 topsrc = reg; 2560 slots[next] = true; 2561 dest = next; 2562 break; 2563 } 2564 pops[reg] = dest; 2565 } 2566 else 2567 pops[reg] = reg; 2568 2569 /* Intentionally, avoid placing the top of stack in it's correct 2570 location, if we still need to permute the stack below and we 2571 can usefully place it somewhere else. This is the case if any 2572 slot is still unallocated, in which case we should place the 2573 top of stack there. */ 2574 if (topsrc != -1) 2575 for (reg = 0; reg < new_stack->top; reg++) 2576 if (!slots[reg]) 2577 { 2578 pops[topsrc] = reg; 2579 slots[new_stack->top] = false; 2580 slots[reg] = true; 2581 break; 2582 } 2583 2584 /* Third pass allocates remaining slots and emits pop insns. */ 2585 next = new_stack->top; 2586 for (reg = old->top; reg > new_stack->top; reg--) 2587 { 2588 dest = pops[reg]; 2589 if (dest == -1) 2590 { 2591 /* Find next free slot. */ 2592 while (slots[next]) 2593 next--; 2594 dest = next--; 2595 } 2596 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[dest], DFmode), 2597 EMIT_BEFORE); 2598 } 2599 } 2600 else 2601 { 2602 /* The following loop attempts to maximize the number of times we 2603 pop the top of the stack, as this permits the use of the faster 2604 ffreep instruction on platforms that support it. */ 2605 int live, next; 2606 2607 live = 0; 2608 for (reg = 0; reg <= old->top; reg++) 2609 if (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[reg])) 2610 live++; 2611 2612 next = live; 2613 while (old->top >= live) 2614 if (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[old->top])) 2615 { 2616 while (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[next])) 2617 next--; 2618 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[next], DFmode), 2619 EMIT_BEFORE); 2620 } 2621 else 2622 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[old->top], DFmode), 2623 EMIT_BEFORE); 2624 } 2625 2626 if (new_stack->top == -2) 2627 { 2628 /* If the new block has never been processed, then it can inherit 2629 the old stack order. */ 2630 2631 new_stack->top = old->top; 2632 memcpy (new_stack->reg, old->reg, sizeof (new_stack->reg)); 2633 } 2634 else 2635 { 2636 /* This block has been entered before, and we must match the 2637 previously selected stack order. */ 2638 2639 /* By now, the only difference should be the order of the stack, 2640 not their depth or liveliness. */ 2641 2642 gcc_assert (hard_reg_set_equal_p (old->reg_set, new_stack->reg_set)); 2643 gcc_assert (old->top == new_stack->top); 2644 2645 /* If the stack is not empty (new_stack->top != -1), loop here emitting 2646 swaps until the stack is correct. 2647 2648 The worst case number of swaps emitted is N + 2, where N is the 2649 depth of the stack. In some cases, the reg at the top of 2650 stack may be correct, but swapped anyway in order to fix 2651 other regs. But since we never swap any other reg away from 2652 its correct slot, this algorithm will converge. */ 2653 2654 if (new_stack->top != -1) 2655 do 2656 { 2657 /* Swap the reg at top of stack into the position it is 2658 supposed to be in, until the correct top of stack appears. */ 2659 2660 while (old->reg[old->top] != new_stack->reg[new_stack->top]) 2661 { 2662 for (reg = new_stack->top; reg >= 0; reg--) 2663 if (new_stack->reg[reg] == old->reg[old->top]) 2664 break; 2665 2666 gcc_assert (reg != -1); 2667 2668 emit_swap_insn (insn, old, 2669 FP_MODE_REG (old->reg[reg], DFmode)); 2670 } 2671 2672 /* See if any regs remain incorrect. If so, bring an 2673 incorrect reg to the top of stack, and let the while loop 2674 above fix it. */ 2675 2676 for (reg = new_stack->top; reg >= 0; reg--) 2677 if (new_stack->reg[reg] != old->reg[reg]) 2678 { 2679 emit_swap_insn (insn, old, 2680 FP_MODE_REG (old->reg[reg], DFmode)); 2681 break; 2682 } 2683 } while (reg >= 0); 2684 2685 /* At this point there must be no differences. */ 2686 2687 for (reg = old->top; reg >= 0; reg--) 2688 gcc_assert (old->reg[reg] == new_stack->reg[reg]); 2689 } 2690 2691 if (update_end) 2692 { 2693 for (update_end = NEXT_INSN (update_end); update_end != insn; 2694 update_end = NEXT_INSN (update_end)) 2695 { 2696 set_block_for_insn (update_end, current_block); 2697 if (INSN_P (update_end)) 2698 df_insn_rescan (update_end); 2699 } 2700 BB_END (current_block) = PREV_INSN (insn); 2701 } 2702 } 2703 2704 /* Print stack configuration. */ 2705 2706 static void 2707 print_stack (FILE *file, stack_ptr s) 2708 { 2709 if (! file) 2710 return; 2711 2712 if (s->top == -2) 2713 fprintf (file, "uninitialized\n"); 2714 else if (s->top == -1) 2715 fprintf (file, "empty\n"); 2716 else 2717 { 2718 int i; 2719 fputs ("[ ", file); 2720 for (i = 0; i <= s->top; ++i) 2721 fprintf (file, "%d ", s->reg[i]); 2722 fputs ("]\n", file); 2723 } 2724 } 2725 2726 /* This function was doing life analysis. We now let the regular live 2727 code do it's job, so we only need to check some extra invariants 2728 that reg-stack expects. Primary among these being that all registers 2729 are initialized before use. 2730 2731 The function returns true when code was emitted to CFG edges and 2732 commit_edge_insertions needs to be called. */ 2733 2734 static int 2735 convert_regs_entry (void) 2736 { 2737 int inserted = 0; 2738 edge e; 2739 edge_iterator ei; 2740 2741 /* Load something into each stack register live at function entry. 2742 Such live registers can be caused by uninitialized variables or 2743 functions not returning values on all paths. In order to keep 2744 the push/pop code happy, and to not scrog the register stack, we 2745 must put something in these registers. Use a QNaN. 2746 2747 Note that we are inserting converted code here. This code is 2748 never seen by the convert_regs pass. */ 2749 2750 FOR_EACH_EDGE (e, ei, ENTRY_BLOCK_PTR_FOR_FN (cfun)->succs) 2751 { 2752 basic_block block = e->dest; 2753 block_info bi = BLOCK_INFO (block); 2754 int reg, top = -1; 2755 2756 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg) 2757 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg)) 2758 { 2759 rtx init; 2760 2761 bi->stack_in.reg[++top] = reg; 2762 2763 init = gen_rtx_SET (FP_MODE_REG (FIRST_STACK_REG, SFmode), 2764 not_a_num); 2765 insert_insn_on_edge (init, e); 2766 inserted = 1; 2767 } 2768 2769 bi->stack_in.top = top; 2770 } 2771 2772 return inserted; 2773 } 2774 2775 /* Construct the desired stack for function exit. This will either 2776 be `empty', or the function return value at top-of-stack. */ 2777 2778 static void 2779 convert_regs_exit (void) 2780 { 2781 int value_reg_low, value_reg_high; 2782 stack_ptr output_stack; 2783 rtx retvalue; 2784 2785 retvalue = stack_result (current_function_decl); 2786 value_reg_low = value_reg_high = -1; 2787 if (retvalue) 2788 { 2789 value_reg_low = REGNO (retvalue); 2790 value_reg_high = END_REGNO (retvalue) - 1; 2791 } 2792 2793 output_stack = &BLOCK_INFO (EXIT_BLOCK_PTR_FOR_FN (cfun))->stack_in; 2794 if (value_reg_low == -1) 2795 output_stack->top = -1; 2796 else 2797 { 2798 int reg; 2799 2800 output_stack->top = value_reg_high - value_reg_low; 2801 for (reg = value_reg_low; reg <= value_reg_high; ++reg) 2802 { 2803 output_stack->reg[value_reg_high - reg] = reg; 2804 SET_HARD_REG_BIT (output_stack->reg_set, reg); 2805 } 2806 } 2807 } 2808 2809 /* Copy the stack info from the end of edge E's source block to the 2810 start of E's destination block. */ 2811 2812 static void 2813 propagate_stack (edge e) 2814 { 2815 stack_ptr src_stack = &BLOCK_INFO (e->src)->stack_out; 2816 stack_ptr dest_stack = &BLOCK_INFO (e->dest)->stack_in; 2817 int reg; 2818 2819 /* Preserve the order of the original stack, but check whether 2820 any pops are needed. */ 2821 dest_stack->top = -1; 2822 for (reg = 0; reg <= src_stack->top; ++reg) 2823 if (TEST_HARD_REG_BIT (dest_stack->reg_set, src_stack->reg[reg])) 2824 dest_stack->reg[++dest_stack->top] = src_stack->reg[reg]; 2825 2826 /* Push in any partially dead values. */ 2827 for (reg = FIRST_STACK_REG; reg < LAST_STACK_REG + 1; reg++) 2828 if (TEST_HARD_REG_BIT (dest_stack->reg_set, reg) 2829 && !TEST_HARD_REG_BIT (src_stack->reg_set, reg)) 2830 dest_stack->reg[++dest_stack->top] = reg; 2831 } 2832 2833 2834 /* Adjust the stack of edge E's source block on exit to match the stack 2835 of it's target block upon input. The stack layouts of both blocks 2836 should have been defined by now. */ 2837 2838 static bool 2839 compensate_edge (edge e) 2840 { 2841 basic_block source = e->src, target = e->dest; 2842 stack_ptr target_stack = &BLOCK_INFO (target)->stack_in; 2843 stack_ptr source_stack = &BLOCK_INFO (source)->stack_out; 2844 struct stack_def regstack; 2845 int reg; 2846 2847 if (dump_file) 2848 fprintf (dump_file, "Edge %d->%d: ", source->index, target->index); 2849 2850 gcc_assert (target_stack->top != -2); 2851 2852 /* Check whether stacks are identical. */ 2853 if (target_stack->top == source_stack->top) 2854 { 2855 for (reg = target_stack->top; reg >= 0; --reg) 2856 if (target_stack->reg[reg] != source_stack->reg[reg]) 2857 break; 2858 2859 if (reg == -1) 2860 { 2861 if (dump_file) 2862 fprintf (dump_file, "no changes needed\n"); 2863 return false; 2864 } 2865 } 2866 2867 if (dump_file) 2868 { 2869 fprintf (dump_file, "correcting stack to "); 2870 print_stack (dump_file, target_stack); 2871 } 2872 2873 /* Abnormal calls may appear to have values live in st(0), but the 2874 abnormal return path will not have actually loaded the values. */ 2875 if (e->flags & EDGE_ABNORMAL_CALL) 2876 { 2877 /* Assert that the lifetimes are as we expect -- one value 2878 live at st(0) on the end of the source block, and no 2879 values live at the beginning of the destination block. 2880 For complex return values, we may have st(1) live as well. */ 2881 gcc_assert (source_stack->top == 0 || source_stack->top == 1); 2882 gcc_assert (target_stack->top == -1); 2883 return false; 2884 } 2885 2886 /* Handle non-call EH edges specially. The normal return path have 2887 values in registers. These will be popped en masse by the unwind 2888 library. */ 2889 if (e->flags & EDGE_EH) 2890 { 2891 gcc_assert (target_stack->top == -1); 2892 return false; 2893 } 2894 2895 /* We don't support abnormal edges. Global takes care to 2896 avoid any live register across them, so we should never 2897 have to insert instructions on such edges. */ 2898 gcc_assert (! (e->flags & EDGE_ABNORMAL)); 2899 2900 /* Make a copy of source_stack as change_stack is destructive. */ 2901 regstack = *source_stack; 2902 2903 /* It is better to output directly to the end of the block 2904 instead of to the edge, because emit_swap can do minimal 2905 insn scheduling. We can do this when there is only one 2906 edge out, and it is not abnormal. */ 2907 if (EDGE_COUNT (source->succs) == 1) 2908 { 2909 current_block = source; 2910 change_stack (BB_END (source), ®stack, target_stack, 2911 (JUMP_P (BB_END (source)) ? EMIT_BEFORE : EMIT_AFTER)); 2912 } 2913 else 2914 { 2915 rtx_insn *seq; 2916 rtx_note *after; 2917 2918 current_block = NULL; 2919 start_sequence (); 2920 2921 /* ??? change_stack needs some point to emit insns after. */ 2922 after = emit_note (NOTE_INSN_DELETED); 2923 2924 change_stack (after, ®stack, target_stack, EMIT_BEFORE); 2925 2926 seq = get_insns (); 2927 end_sequence (); 2928 2929 insert_insn_on_edge (seq, e); 2930 return true; 2931 } 2932 return false; 2933 } 2934 2935 /* Traverse all non-entry edges in the CFG, and emit the necessary 2936 edge compensation code to change the stack from stack_out of the 2937 source block to the stack_in of the destination block. */ 2938 2939 static bool 2940 compensate_edges (void) 2941 { 2942 bool inserted = false; 2943 basic_block bb; 2944 2945 starting_stack_p = false; 2946 2947 FOR_EACH_BB_FN (bb, cfun) 2948 if (bb != ENTRY_BLOCK_PTR_FOR_FN (cfun)) 2949 { 2950 edge e; 2951 edge_iterator ei; 2952 2953 FOR_EACH_EDGE (e, ei, bb->succs) 2954 inserted |= compensate_edge (e); 2955 } 2956 return inserted; 2957 } 2958 2959 /* Select the better of two edges E1 and E2 to use to determine the 2960 stack layout for their shared destination basic block. This is 2961 typically the more frequently executed. The edge E1 may be NULL 2962 (in which case E2 is returned), but E2 is always non-NULL. */ 2963 2964 static edge 2965 better_edge (edge e1, edge e2) 2966 { 2967 if (!e1) 2968 return e2; 2969 2970 if (e1->count () > e2->count ()) 2971 return e1; 2972 if (e1->count () < e2->count ()) 2973 return e2; 2974 2975 /* Prefer critical edges to minimize inserting compensation code on 2976 critical edges. */ 2977 2978 if (EDGE_CRITICAL_P (e1) != EDGE_CRITICAL_P (e2)) 2979 return EDGE_CRITICAL_P (e1) ? e1 : e2; 2980 2981 /* Avoid non-deterministic behavior. */ 2982 return (e1->src->index < e2->src->index) ? e1 : e2; 2983 } 2984 2985 /* Convert stack register references in one block. Return true if the CFG 2986 has been modified in the process. */ 2987 2988 static bool 2989 convert_regs_1 (basic_block block) 2990 { 2991 struct stack_def regstack; 2992 block_info bi = BLOCK_INFO (block); 2993 int reg; 2994 rtx_insn *insn, *next; 2995 bool control_flow_insn_deleted = false; 2996 bool cfg_altered = false; 2997 int debug_insns_with_starting_stack = 0; 2998 2999 any_malformed_asm = false; 3000 3001 /* Choose an initial stack layout, if one hasn't already been chosen. */ 3002 if (bi->stack_in.top == -2) 3003 { 3004 edge e, beste = NULL; 3005 edge_iterator ei; 3006 3007 /* Select the best incoming edge (typically the most frequent) to 3008 use as a template for this basic block. */ 3009 FOR_EACH_EDGE (e, ei, block->preds) 3010 if (BLOCK_INFO (e->src)->done) 3011 beste = better_edge (beste, e); 3012 3013 if (beste) 3014 propagate_stack (beste); 3015 else 3016 { 3017 /* No predecessors. Create an arbitrary input stack. */ 3018 bi->stack_in.top = -1; 3019 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg) 3020 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg)) 3021 bi->stack_in.reg[++bi->stack_in.top] = reg; 3022 } 3023 } 3024 3025 if (dump_file) 3026 { 3027 fprintf (dump_file, "\nBasic block %d\nInput stack: ", block->index); 3028 print_stack (dump_file, &bi->stack_in); 3029 } 3030 3031 /* Process all insns in this block. Keep track of NEXT so that we 3032 don't process insns emitted while substituting in INSN. */ 3033 current_block = block; 3034 next = BB_HEAD (block); 3035 regstack = bi->stack_in; 3036 starting_stack_p = true; 3037 3038 do 3039 { 3040 insn = next; 3041 next = NEXT_INSN (insn); 3042 3043 /* Ensure we have not missed a block boundary. */ 3044 gcc_assert (next); 3045 if (insn == BB_END (block)) 3046 next = NULL; 3047 3048 /* Don't bother processing unless there is a stack reg 3049 mentioned or if it's a CALL_INSN. */ 3050 if (DEBUG_BIND_INSN_P (insn)) 3051 { 3052 if (starting_stack_p) 3053 debug_insns_with_starting_stack++; 3054 else 3055 { 3056 subst_all_stack_regs_in_debug_insn (insn, ®stack); 3057 3058 /* Nothing must ever die at a debug insn. If something 3059 is referenced in it that becomes dead, it should have 3060 died before and the reference in the debug insn 3061 should have been removed so as to avoid changing code 3062 generation. */ 3063 gcc_assert (!find_reg_note (insn, REG_DEAD, NULL)); 3064 } 3065 } 3066 else if (stack_regs_mentioned (insn) 3067 || CALL_P (insn)) 3068 { 3069 if (dump_file) 3070 { 3071 fprintf (dump_file, " insn %d input stack: ", 3072 INSN_UID (insn)); 3073 print_stack (dump_file, ®stack); 3074 } 3075 control_flow_insn_deleted |= subst_stack_regs (insn, ®stack); 3076 starting_stack_p = false; 3077 } 3078 } 3079 while (next); 3080 3081 if (debug_insns_with_starting_stack) 3082 { 3083 /* Since it's the first non-debug instruction that determines 3084 the stack requirements of the current basic block, we refrain 3085 from updating debug insns before it in the loop above, and 3086 fix them up here. */ 3087 for (insn = BB_HEAD (block); debug_insns_with_starting_stack; 3088 insn = NEXT_INSN (insn)) 3089 { 3090 if (!DEBUG_BIND_INSN_P (insn)) 3091 continue; 3092 3093 debug_insns_with_starting_stack--; 3094 subst_all_stack_regs_in_debug_insn (insn, &bi->stack_in); 3095 } 3096 } 3097 3098 if (dump_file) 3099 { 3100 fprintf (dump_file, "Expected live registers ["); 3101 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg) 3102 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg)) 3103 fprintf (dump_file, " %d", reg); 3104 fprintf (dump_file, " ]\nOutput stack: "); 3105 print_stack (dump_file, ®stack); 3106 } 3107 3108 insn = BB_END (block); 3109 if (JUMP_P (insn)) 3110 insn = PREV_INSN (insn); 3111 3112 /* If the function is declared to return a value, but it returns one 3113 in only some cases, some registers might come live here. Emit 3114 necessary moves for them. */ 3115 3116 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg) 3117 { 3118 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg) 3119 && ! TEST_HARD_REG_BIT (regstack.reg_set, reg)) 3120 { 3121 rtx set; 3122 3123 if (dump_file) 3124 fprintf (dump_file, "Emitting insn initializing reg %d\n", reg); 3125 3126 set = gen_rtx_SET (FP_MODE_REG (reg, SFmode), not_a_num); 3127 insn = emit_insn_after (set, insn); 3128 control_flow_insn_deleted |= subst_stack_regs (insn, ®stack); 3129 } 3130 } 3131 3132 /* Amongst the insns possibly deleted during the substitution process above, 3133 might have been the only trapping insn in the block. We purge the now 3134 possibly dead EH edges here to avoid an ICE from fixup_abnormal_edges, 3135 called at the end of convert_regs. The order in which we process the 3136 blocks ensures that we never delete an already processed edge. 3137 3138 Note that, at this point, the CFG may have been damaged by the emission 3139 of instructions after an abnormal call, which moves the basic block end 3140 (and is the reason why we call fixup_abnormal_edges later). So we must 3141 be sure that the trapping insn has been deleted before trying to purge 3142 dead edges, otherwise we risk purging valid edges. 3143 3144 ??? We are normally supposed not to delete trapping insns, so we pretend 3145 that the insns deleted above don't actually trap. It would have been 3146 better to detect this earlier and avoid creating the EH edge in the first 3147 place, still, but we don't have enough information at that time. */ 3148 3149 if (control_flow_insn_deleted) 3150 cfg_altered |= purge_dead_edges (block); 3151 3152 /* Something failed if the stack lives don't match. If we had malformed 3153 asms, we zapped the instruction itself, but that didn't produce the 3154 same pattern of register kills as before. */ 3155 3156 gcc_assert (hard_reg_set_equal_p (regstack.reg_set, bi->out_reg_set) 3157 || any_malformed_asm); 3158 bi->stack_out = regstack; 3159 bi->done = true; 3160 3161 return cfg_altered; 3162 } 3163 3164 /* Convert registers in all blocks reachable from BLOCK. Return true if the 3165 CFG has been modified in the process. */ 3166 3167 static bool 3168 convert_regs_2 (basic_block block) 3169 { 3170 basic_block *stack, *sp; 3171 bool cfg_altered = false; 3172 3173 /* We process the blocks in a top-down manner, in a way such that one block 3174 is only processed after all its predecessors. The number of predecessors 3175 of every block has already been computed. */ 3176 3177 stack = XNEWVEC (basic_block, n_basic_blocks_for_fn (cfun)); 3178 sp = stack; 3179 3180 *sp++ = block; 3181 3182 do 3183 { 3184 edge e; 3185 edge_iterator ei; 3186 3187 block = *--sp; 3188 3189 /* Processing BLOCK is achieved by convert_regs_1, which may purge 3190 some dead EH outgoing edge after the deletion of the trapping 3191 insn inside the block. Since the number of predecessors of 3192 BLOCK's successors was computed based on the initial edge set, 3193 we check the necessity to process some of these successors 3194 before such an edge deletion may happen. However, there is 3195 a pitfall: if BLOCK is the only predecessor of a successor and 3196 the edge between them happens to be deleted, the successor 3197 becomes unreachable and should not be processed. The problem 3198 is that there is no way to preventively detect this case so we 3199 stack the successor in all cases and hand over the task of 3200 fixing up the discrepancy to convert_regs_1. */ 3201 3202 FOR_EACH_EDGE (e, ei, block->succs) 3203 if (! (e->flags & EDGE_DFS_BACK)) 3204 { 3205 BLOCK_INFO (e->dest)->predecessors--; 3206 if (!BLOCK_INFO (e->dest)->predecessors) 3207 *sp++ = e->dest; 3208 } 3209 3210 cfg_altered |= convert_regs_1 (block); 3211 } 3212 while (sp != stack); 3213 3214 free (stack); 3215 3216 return cfg_altered; 3217 } 3218 3219 /* Traverse all basic blocks in a function, converting the register 3220 references in each insn from the "flat" register file that gcc uses, 3221 to the stack-like registers the 387 uses. */ 3222 3223 static void 3224 convert_regs (void) 3225 { 3226 bool cfg_altered = false; 3227 int inserted; 3228 basic_block b; 3229 edge e; 3230 edge_iterator ei; 3231 3232 /* Initialize uninitialized registers on function entry. */ 3233 inserted = convert_regs_entry (); 3234 3235 /* Construct the desired stack for function exit. */ 3236 convert_regs_exit (); 3237 BLOCK_INFO (EXIT_BLOCK_PTR_FOR_FN (cfun))->done = 1; 3238 3239 /* ??? Future: process inner loops first, and give them arbitrary 3240 initial stacks which emit_swap_insn can modify. This ought to 3241 prevent double fxch that often appears at the head of a loop. */ 3242 3243 /* Process all blocks reachable from all entry points. */ 3244 FOR_EACH_EDGE (e, ei, ENTRY_BLOCK_PTR_FOR_FN (cfun)->succs) 3245 cfg_altered |= convert_regs_2 (e->dest); 3246 3247 /* ??? Process all unreachable blocks. Though there's no excuse 3248 for keeping these even when not optimizing. */ 3249 FOR_EACH_BB_FN (b, cfun) 3250 { 3251 block_info bi = BLOCK_INFO (b); 3252 3253 if (! bi->done) 3254 cfg_altered |= convert_regs_2 (b); 3255 } 3256 3257 /* We must fix up abnormal edges before inserting compensation code 3258 because both mechanisms insert insns on edges. */ 3259 inserted |= fixup_abnormal_edges (); 3260 3261 inserted |= compensate_edges (); 3262 3263 clear_aux_for_blocks (); 3264 3265 if (inserted) 3266 commit_edge_insertions (); 3267 3268 if (cfg_altered) 3269 cleanup_cfg (0); 3270 3271 if (dump_file) 3272 fputc ('\n', dump_file); 3273 } 3274 3275 /* Convert register usage from "flat" register file usage to a "stack 3276 register file. FILE is the dump file, if used. 3277 3278 Construct a CFG and run life analysis. Then convert each insn one 3279 by one. Run a last cleanup_cfg pass, if optimizing, to eliminate 3280 code duplication created when the converter inserts pop insns on 3281 the edges. */ 3282 3283 static bool 3284 reg_to_stack (void) 3285 { 3286 basic_block bb; 3287 int i; 3288 int max_uid; 3289 3290 /* Clean up previous run. */ 3291 stack_regs_mentioned_data.release (); 3292 3293 /* See if there is something to do. Flow analysis is quite 3294 expensive so we might save some compilation time. */ 3295 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++) 3296 if (df_regs_ever_live_p (i)) 3297 break; 3298 if (i > LAST_STACK_REG) 3299 return false; 3300 3301 df_note_add_problem (); 3302 df_analyze (); 3303 3304 mark_dfs_back_edges (); 3305 3306 /* Set up block info for each basic block. */ 3307 alloc_aux_for_blocks (sizeof (struct block_info_def)); 3308 FOR_EACH_BB_FN (bb, cfun) 3309 { 3310 block_info bi = BLOCK_INFO (bb); 3311 edge_iterator ei; 3312 edge e; 3313 int reg; 3314 3315 FOR_EACH_EDGE (e, ei, bb->preds) 3316 if (!(e->flags & EDGE_DFS_BACK) 3317 && e->src != ENTRY_BLOCK_PTR_FOR_FN (cfun)) 3318 bi->predecessors++; 3319 3320 /* Set current register status at last instruction `uninitialized'. */ 3321 bi->stack_in.top = -2; 3322 3323 /* Copy live_at_end and live_at_start into temporaries. */ 3324 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; reg++) 3325 { 3326 if (REGNO_REG_SET_P (DF_LR_OUT (bb), reg)) 3327 SET_HARD_REG_BIT (bi->out_reg_set, reg); 3328 if (REGNO_REG_SET_P (DF_LR_IN (bb), reg)) 3329 SET_HARD_REG_BIT (bi->stack_in.reg_set, reg); 3330 } 3331 } 3332 3333 /* Create the replacement registers up front. */ 3334 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++) 3335 { 3336 machine_mode mode; 3337 FOR_EACH_MODE_IN_CLASS (mode, MODE_FLOAT) 3338 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i); 3339 FOR_EACH_MODE_IN_CLASS (mode, MODE_COMPLEX_FLOAT) 3340 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i); 3341 } 3342 3343 ix86_flags_rtx = gen_rtx_REG (CCmode, FLAGS_REG); 3344 3345 /* A QNaN for initializing uninitialized variables. 3346 3347 ??? We can't load from constant memory in PIC mode, because 3348 we're inserting these instructions before the prologue and 3349 the PIC register hasn't been set up. In that case, fall back 3350 on zero, which we can get from `fldz'. */ 3351 3352 if ((flag_pic && !TARGET_64BIT) 3353 || ix86_cmodel == CM_LARGE || ix86_cmodel == CM_LARGE_PIC) 3354 not_a_num = CONST0_RTX (SFmode); 3355 else 3356 { 3357 REAL_VALUE_TYPE r; 3358 3359 real_nan (&r, "", 1, SFmode); 3360 not_a_num = const_double_from_real_value (r, SFmode); 3361 not_a_num = force_const_mem (SFmode, not_a_num); 3362 } 3363 3364 /* Allocate a cache for stack_regs_mentioned. */ 3365 max_uid = get_max_uid (); 3366 stack_regs_mentioned_data.create (max_uid + 1); 3367 memset (stack_regs_mentioned_data.address (), 3368 0, sizeof (char) * (max_uid + 1)); 3369 3370 convert_regs (); 3371 3372 free_aux_for_blocks (); 3373 return true; 3374 } 3375 #endif /* STACK_REGS */ 3376 3377 namespace { 3378 3379 const pass_data pass_data_stack_regs = 3380 { 3381 RTL_PASS, /* type */ 3382 "*stack_regs", /* name */ 3383 OPTGROUP_NONE, /* optinfo_flags */ 3384 TV_REG_STACK, /* tv_id */ 3385 0, /* properties_required */ 3386 0, /* properties_provided */ 3387 0, /* properties_destroyed */ 3388 0, /* todo_flags_start */ 3389 0, /* todo_flags_finish */ 3390 }; 3391 3392 class pass_stack_regs : public rtl_opt_pass 3393 { 3394 public: 3395 pass_stack_regs (gcc::context *ctxt) 3396 : rtl_opt_pass (pass_data_stack_regs, ctxt) 3397 {} 3398 3399 /* opt_pass methods: */ 3400 virtual bool gate (function *) 3401 { 3402 #ifdef STACK_REGS 3403 return true; 3404 #else 3405 return false; 3406 #endif 3407 } 3408 3409 }; // class pass_stack_regs 3410 3411 } // anon namespace 3412 3413 rtl_opt_pass * 3414 make_pass_stack_regs (gcc::context *ctxt) 3415 { 3416 return new pass_stack_regs (ctxt); 3417 } 3418 3419 /* Convert register usage from flat register file usage to a stack 3420 register file. */ 3421 static unsigned int 3422 rest_of_handle_stack_regs (void) 3423 { 3424 #ifdef STACK_REGS 3425 reg_to_stack (); 3426 regstack_completed = 1; 3427 #endif 3428 return 0; 3429 } 3430 3431 namespace { 3432 3433 const pass_data pass_data_stack_regs_run = 3434 { 3435 RTL_PASS, /* type */ 3436 "stack", /* name */ 3437 OPTGROUP_NONE, /* optinfo_flags */ 3438 TV_REG_STACK, /* tv_id */ 3439 0, /* properties_required */ 3440 0, /* properties_provided */ 3441 0, /* properties_destroyed */ 3442 0, /* todo_flags_start */ 3443 TODO_df_finish, /* todo_flags_finish */ 3444 }; 3445 3446 class pass_stack_regs_run : public rtl_opt_pass 3447 { 3448 public: 3449 pass_stack_regs_run (gcc::context *ctxt) 3450 : rtl_opt_pass (pass_data_stack_regs_run, ctxt) 3451 {} 3452 3453 /* opt_pass methods: */ 3454 virtual unsigned int execute (function *) 3455 { 3456 return rest_of_handle_stack_regs (); 3457 } 3458 3459 }; // class pass_stack_regs_run 3460 3461 } // anon namespace 3462 3463 rtl_opt_pass * 3464 make_pass_stack_regs_run (gcc::context *ctxt) 3465 { 3466 return new pass_stack_regs_run (ctxt); 3467 } 3468