1 /* Definitions for computing resource usage of specific insns. 2 Copyright (C) 1999-2018 Free Software Foundation, Inc. 3 4 This file is part of GCC. 5 6 GCC is free software; you can redistribute it and/or modify it under 7 the terms of the GNU General Public License as published by the Free 8 Software Foundation; either version 3, or (at your option) any later 9 version. 10 11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY 12 WARRANTY; without even the implied warranty of MERCHANTABILITY or 13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 14 for more details. 15 16 You should have received a copy of the GNU General Public License 17 along with GCC; see the file COPYING3. If not see 18 <http://www.gnu.org/licenses/>. */ 19 20 #include "config.h" 21 #include "system.h" 22 #include "coretypes.h" 23 #include "backend.h" 24 #include "rtl.h" 25 #include "df.h" 26 #include "memmodel.h" 27 #include "tm_p.h" 28 #include "regs.h" 29 #include "emit-rtl.h" 30 #include "resource.h" 31 #include "insn-attr.h" 32 #include "params.h" 33 34 /* This structure is used to record liveness information at the targets or 35 fallthrough insns of branches. We will most likely need the information 36 at targets again, so save them in a hash table rather than recomputing them 37 each time. */ 38 39 struct target_info 40 { 41 int uid; /* INSN_UID of target. */ 42 struct target_info *next; /* Next info for same hash bucket. */ 43 HARD_REG_SET live_regs; /* Registers live at target. */ 44 int block; /* Basic block number containing target. */ 45 int bb_tick; /* Generation count of basic block info. */ 46 }; 47 48 #define TARGET_HASH_PRIME 257 49 50 /* Indicates what resources are required at the beginning of the epilogue. */ 51 static struct resources start_of_epilogue_needs; 52 53 /* Indicates what resources are required at function end. */ 54 static struct resources end_of_function_needs; 55 56 /* Define the hash table itself. */ 57 static struct target_info **target_hash_table = NULL; 58 59 /* For each basic block, we maintain a generation number of its basic 60 block info, which is updated each time we move an insn from the 61 target of a jump. This is the generation number indexed by block 62 number. */ 63 64 static int *bb_ticks; 65 66 /* Marks registers possibly live at the current place being scanned by 67 mark_target_live_regs. Also used by update_live_status. */ 68 69 static HARD_REG_SET current_live_regs; 70 71 /* Marks registers for which we have seen a REG_DEAD note but no assignment. 72 Also only used by the next two functions. */ 73 74 static HARD_REG_SET pending_dead_regs; 75 76 static void update_live_status (rtx, const_rtx, void *); 77 static int find_basic_block (rtx_insn *, int); 78 static rtx_insn *next_insn_no_annul (rtx_insn *); 79 static rtx_insn *find_dead_or_set_registers (rtx_insn *, struct resources*, 80 rtx *, int, struct resources, 81 struct resources); 82 83 /* Utility function called from mark_target_live_regs via note_stores. 84 It deadens any CLOBBERed registers and livens any SET registers. */ 85 86 static void 87 update_live_status (rtx dest, const_rtx x, void *data ATTRIBUTE_UNUSED) 88 { 89 int first_regno, last_regno; 90 int i; 91 92 if (!REG_P (dest) 93 && (GET_CODE (dest) != SUBREG || !REG_P (SUBREG_REG (dest)))) 94 return; 95 96 if (GET_CODE (dest) == SUBREG) 97 { 98 first_regno = subreg_regno (dest); 99 last_regno = first_regno + subreg_nregs (dest); 100 101 } 102 else 103 { 104 first_regno = REGNO (dest); 105 last_regno = END_REGNO (dest); 106 } 107 108 if (GET_CODE (x) == CLOBBER) 109 for (i = first_regno; i < last_regno; i++) 110 CLEAR_HARD_REG_BIT (current_live_regs, i); 111 else 112 for (i = first_regno; i < last_regno; i++) 113 { 114 SET_HARD_REG_BIT (current_live_regs, i); 115 CLEAR_HARD_REG_BIT (pending_dead_regs, i); 116 } 117 } 118 119 /* Find the number of the basic block with correct live register 120 information that starts closest to INSN. Return -1 if we couldn't 121 find such a basic block or the beginning is more than 122 SEARCH_LIMIT instructions before INSN. Use SEARCH_LIMIT = -1 for 123 an unlimited search. 124 125 The delay slot filling code destroys the control-flow graph so, 126 instead of finding the basic block containing INSN, we search 127 backwards toward a BARRIER where the live register information is 128 correct. */ 129 130 static int 131 find_basic_block (rtx_insn *insn, int search_limit) 132 { 133 /* Scan backwards to the previous BARRIER. Then see if we can find a 134 label that starts a basic block. Return the basic block number. */ 135 for (insn = prev_nonnote_insn (insn); 136 insn && !BARRIER_P (insn) && search_limit != 0; 137 insn = prev_nonnote_insn (insn), --search_limit) 138 ; 139 140 /* The closest BARRIER is too far away. */ 141 if (search_limit == 0) 142 return -1; 143 144 /* The start of the function. */ 145 else if (insn == 0) 146 return ENTRY_BLOCK_PTR_FOR_FN (cfun)->next_bb->index; 147 148 /* See if any of the upcoming CODE_LABELs start a basic block. If we reach 149 anything other than a CODE_LABEL or note, we can't find this code. */ 150 for (insn = next_nonnote_insn (insn); 151 insn && LABEL_P (insn); 152 insn = next_nonnote_insn (insn)) 153 if (BLOCK_FOR_INSN (insn)) 154 return BLOCK_FOR_INSN (insn)->index; 155 156 return -1; 157 } 158 159 /* Similar to next_insn, but ignores insns in the delay slots of 160 an annulled branch. */ 161 162 static rtx_insn * 163 next_insn_no_annul (rtx_insn *insn) 164 { 165 if (insn) 166 { 167 /* If INSN is an annulled branch, skip any insns from the target 168 of the branch. */ 169 if (JUMP_P (insn) 170 && INSN_ANNULLED_BRANCH_P (insn) 171 && NEXT_INSN (PREV_INSN (insn)) != insn) 172 { 173 rtx_insn *next = NEXT_INSN (insn); 174 175 while ((NONJUMP_INSN_P (next) || JUMP_P (next) || CALL_P (next)) 176 && INSN_FROM_TARGET_P (next)) 177 { 178 insn = next; 179 next = NEXT_INSN (insn); 180 } 181 } 182 183 insn = NEXT_INSN (insn); 184 if (insn && NONJUMP_INSN_P (insn) 185 && GET_CODE (PATTERN (insn)) == SEQUENCE) 186 insn = as_a <rtx_sequence *> (PATTERN (insn))->insn (0); 187 } 188 189 return insn; 190 } 191 192 /* Given X, some rtl, and RES, a pointer to a `struct resource', mark 193 which resources are referenced by the insn. If INCLUDE_DELAYED_EFFECTS 194 is TRUE, resources used by the called routine will be included for 195 CALL_INSNs. */ 196 197 void 198 mark_referenced_resources (rtx x, struct resources *res, 199 bool include_delayed_effects) 200 { 201 enum rtx_code code = GET_CODE (x); 202 int i, j; 203 unsigned int r; 204 const char *format_ptr; 205 206 /* Handle leaf items for which we set resource flags. Also, special-case 207 CALL, SET and CLOBBER operators. */ 208 switch (code) 209 { 210 case CONST: 211 CASE_CONST_ANY: 212 case PC: 213 case SYMBOL_REF: 214 case LABEL_REF: 215 case DEBUG_INSN: 216 return; 217 218 case SUBREG: 219 if (!REG_P (SUBREG_REG (x))) 220 mark_referenced_resources (SUBREG_REG (x), res, false); 221 else 222 { 223 unsigned int regno = subreg_regno (x); 224 unsigned int last_regno = regno + subreg_nregs (x); 225 226 gcc_assert (last_regno <= FIRST_PSEUDO_REGISTER); 227 for (r = regno; r < last_regno; r++) 228 SET_HARD_REG_BIT (res->regs, r); 229 } 230 return; 231 232 case REG: 233 gcc_assert (HARD_REGISTER_P (x)); 234 add_to_hard_reg_set (&res->regs, GET_MODE (x), REGNO (x)); 235 return; 236 237 case MEM: 238 /* If this memory shouldn't change, it really isn't referencing 239 memory. */ 240 if (! MEM_READONLY_P (x)) 241 res->memory = 1; 242 res->volatil |= MEM_VOLATILE_P (x); 243 244 /* Mark registers used to access memory. */ 245 mark_referenced_resources (XEXP (x, 0), res, false); 246 return; 247 248 case CC0: 249 res->cc = 1; 250 return; 251 252 case UNSPEC_VOLATILE: 253 case TRAP_IF: 254 case ASM_INPUT: 255 /* Traditional asm's are always volatile. */ 256 res->volatil = 1; 257 break; 258 259 case ASM_OPERANDS: 260 res->volatil |= MEM_VOLATILE_P (x); 261 262 /* For all ASM_OPERANDS, we must traverse the vector of input operands. 263 We can not just fall through here since then we would be confused 264 by the ASM_INPUT rtx inside ASM_OPERANDS, which do not indicate 265 traditional asms unlike their normal usage. */ 266 267 for (i = 0; i < ASM_OPERANDS_INPUT_LENGTH (x); i++) 268 mark_referenced_resources (ASM_OPERANDS_INPUT (x, i), res, false); 269 return; 270 271 case CALL: 272 /* The first operand will be a (MEM (xxx)) but doesn't really reference 273 memory. The second operand may be referenced, though. */ 274 mark_referenced_resources (XEXP (XEXP (x, 0), 0), res, false); 275 mark_referenced_resources (XEXP (x, 1), res, false); 276 return; 277 278 case SET: 279 /* Usually, the first operand of SET is set, not referenced. But 280 registers used to access memory are referenced. SET_DEST is 281 also referenced if it is a ZERO_EXTRACT. */ 282 283 mark_referenced_resources (SET_SRC (x), res, false); 284 285 x = SET_DEST (x); 286 if (GET_CODE (x) == ZERO_EXTRACT 287 || GET_CODE (x) == STRICT_LOW_PART) 288 mark_referenced_resources (x, res, false); 289 else if (GET_CODE (x) == SUBREG) 290 x = SUBREG_REG (x); 291 if (MEM_P (x)) 292 mark_referenced_resources (XEXP (x, 0), res, false); 293 return; 294 295 case CLOBBER: 296 return; 297 298 case CALL_INSN: 299 if (include_delayed_effects) 300 { 301 /* A CALL references memory, the frame pointer if it exists, the 302 stack pointer, any global registers and any registers given in 303 USE insns immediately in front of the CALL. 304 305 However, we may have moved some of the parameter loading insns 306 into the delay slot of this CALL. If so, the USE's for them 307 don't count and should be skipped. */ 308 rtx_insn *insn = PREV_INSN (as_a <rtx_insn *> (x)); 309 rtx_sequence *sequence = 0; 310 int seq_size = 0; 311 int i; 312 313 /* If we are part of a delay slot sequence, point at the SEQUENCE. */ 314 if (NEXT_INSN (insn) != x) 315 { 316 sequence = as_a <rtx_sequence *> (PATTERN (NEXT_INSN (insn))); 317 seq_size = sequence->len (); 318 gcc_assert (GET_CODE (sequence) == SEQUENCE); 319 } 320 321 res->memory = 1; 322 SET_HARD_REG_BIT (res->regs, STACK_POINTER_REGNUM); 323 if (frame_pointer_needed) 324 { 325 SET_HARD_REG_BIT (res->regs, FRAME_POINTER_REGNUM); 326 if (!HARD_FRAME_POINTER_IS_FRAME_POINTER) 327 SET_HARD_REG_BIT (res->regs, HARD_FRAME_POINTER_REGNUM); 328 } 329 330 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 331 if (global_regs[i]) 332 SET_HARD_REG_BIT (res->regs, i); 333 334 /* Check for a REG_SETJMP. If it exists, then we must 335 assume that this call can need any register. 336 337 This is done to be more conservative about how we handle setjmp. 338 We assume that they both use and set all registers. Using all 339 registers ensures that a register will not be considered dead 340 just because it crosses a setjmp call. A register should be 341 considered dead only if the setjmp call returns nonzero. */ 342 if (find_reg_note (x, REG_SETJMP, NULL)) 343 SET_HARD_REG_SET (res->regs); 344 345 { 346 rtx link; 347 348 for (link = CALL_INSN_FUNCTION_USAGE (x); 349 link; 350 link = XEXP (link, 1)) 351 if (GET_CODE (XEXP (link, 0)) == USE) 352 { 353 for (i = 1; i < seq_size; i++) 354 { 355 rtx slot_pat = PATTERN (sequence->element (i)); 356 if (GET_CODE (slot_pat) == SET 357 && rtx_equal_p (SET_DEST (slot_pat), 358 XEXP (XEXP (link, 0), 0))) 359 break; 360 } 361 if (i >= seq_size) 362 mark_referenced_resources (XEXP (XEXP (link, 0), 0), 363 res, false); 364 } 365 } 366 } 367 368 /* ... fall through to other INSN processing ... */ 369 gcc_fallthrough (); 370 371 case INSN: 372 case JUMP_INSN: 373 374 if (GET_CODE (PATTERN (x)) == COND_EXEC) 375 /* In addition to the usual references, also consider all outputs 376 as referenced, to compensate for mark_set_resources treating 377 them as killed. This is similar to ZERO_EXTRACT / STRICT_LOW_PART 378 handling, execpt that we got a partial incidence instead of a partial 379 width. */ 380 mark_set_resources (x, res, 0, 381 include_delayed_effects 382 ? MARK_SRC_DEST_CALL : MARK_SRC_DEST); 383 384 if (! include_delayed_effects 385 && INSN_REFERENCES_ARE_DELAYED (as_a <rtx_insn *> (x))) 386 return; 387 388 /* No special processing, just speed up. */ 389 mark_referenced_resources (PATTERN (x), res, include_delayed_effects); 390 return; 391 392 default: 393 break; 394 } 395 396 /* Process each sub-expression and flag what it needs. */ 397 format_ptr = GET_RTX_FORMAT (code); 398 for (i = 0; i < GET_RTX_LENGTH (code); i++) 399 switch (*format_ptr++) 400 { 401 case 'e': 402 mark_referenced_resources (XEXP (x, i), res, include_delayed_effects); 403 break; 404 405 case 'E': 406 for (j = 0; j < XVECLEN (x, i); j++) 407 mark_referenced_resources (XVECEXP (x, i, j), res, 408 include_delayed_effects); 409 break; 410 } 411 } 412 413 /* A subroutine of mark_target_live_regs. Search forward from TARGET 414 looking for registers that are set before they are used. These are dead. 415 Stop after passing a few conditional jumps, and/or a small 416 number of unconditional branches. */ 417 418 static rtx_insn * 419 find_dead_or_set_registers (rtx_insn *target, struct resources *res, 420 rtx *jump_target, int jump_count, 421 struct resources set, struct resources needed) 422 { 423 HARD_REG_SET scratch; 424 rtx_insn *insn; 425 rtx_insn *next_insn; 426 rtx_insn *jump_insn = 0; 427 int i; 428 429 for (insn = target; insn; insn = next_insn) 430 { 431 rtx_insn *this_insn = insn; 432 433 next_insn = NEXT_INSN (insn); 434 435 /* If this instruction can throw an exception, then we don't 436 know where we might end up next. That means that we have to 437 assume that whatever we have already marked as live really is 438 live. */ 439 if (can_throw_internal (insn)) 440 break; 441 442 switch (GET_CODE (insn)) 443 { 444 case CODE_LABEL: 445 /* After a label, any pending dead registers that weren't yet 446 used can be made dead. */ 447 AND_COMPL_HARD_REG_SET (pending_dead_regs, needed.regs); 448 AND_COMPL_HARD_REG_SET (res->regs, pending_dead_regs); 449 CLEAR_HARD_REG_SET (pending_dead_regs); 450 451 continue; 452 453 case BARRIER: 454 case NOTE: 455 case DEBUG_INSN: 456 continue; 457 458 case INSN: 459 if (GET_CODE (PATTERN (insn)) == USE) 460 { 461 /* If INSN is a USE made by update_block, we care about the 462 underlying insn. Any registers set by the underlying insn 463 are live since the insn is being done somewhere else. */ 464 if (INSN_P (XEXP (PATTERN (insn), 0))) 465 mark_set_resources (XEXP (PATTERN (insn), 0), res, 0, 466 MARK_SRC_DEST_CALL); 467 468 /* All other USE insns are to be ignored. */ 469 continue; 470 } 471 else if (GET_CODE (PATTERN (insn)) == CLOBBER) 472 continue; 473 else if (rtx_sequence *seq = 474 dyn_cast <rtx_sequence *> (PATTERN (insn))) 475 { 476 /* An unconditional jump can be used to fill the delay slot 477 of a call, so search for a JUMP_INSN in any position. */ 478 for (i = 0; i < seq->len (); i++) 479 { 480 this_insn = seq->insn (i); 481 if (JUMP_P (this_insn)) 482 break; 483 } 484 } 485 486 default: 487 break; 488 } 489 490 if (rtx_jump_insn *this_jump_insn = 491 dyn_cast <rtx_jump_insn *> (this_insn)) 492 { 493 if (jump_count++ < 10) 494 { 495 if (any_uncondjump_p (this_jump_insn) 496 || ANY_RETURN_P (PATTERN (this_jump_insn))) 497 { 498 rtx lab_or_return = this_jump_insn->jump_label (); 499 if (ANY_RETURN_P (lab_or_return)) 500 next_insn = NULL; 501 else 502 next_insn = as_a <rtx_insn *> (lab_or_return); 503 if (jump_insn == 0) 504 { 505 jump_insn = insn; 506 if (jump_target) 507 *jump_target = JUMP_LABEL (this_jump_insn); 508 } 509 } 510 else if (any_condjump_p (this_jump_insn)) 511 { 512 struct resources target_set, target_res; 513 struct resources fallthrough_res; 514 515 /* We can handle conditional branches here by following 516 both paths, and then IOR the results of the two paths 517 together, which will give us registers that are dead 518 on both paths. Since this is expensive, we give it 519 a much higher cost than unconditional branches. The 520 cost was chosen so that we will follow at most 1 521 conditional branch. */ 522 523 jump_count += 4; 524 if (jump_count >= 10) 525 break; 526 527 mark_referenced_resources (insn, &needed, true); 528 529 /* For an annulled branch, mark_set_resources ignores slots 530 filled by instructions from the target. This is correct 531 if the branch is not taken. Since we are following both 532 paths from the branch, we must also compute correct info 533 if the branch is taken. We do this by inverting all of 534 the INSN_FROM_TARGET_P bits, calling mark_set_resources, 535 and then inverting the INSN_FROM_TARGET_P bits again. */ 536 537 if (GET_CODE (PATTERN (insn)) == SEQUENCE 538 && INSN_ANNULLED_BRANCH_P (this_jump_insn)) 539 { 540 rtx_sequence *seq = as_a <rtx_sequence *> (PATTERN (insn)); 541 for (i = 1; i < seq->len (); i++) 542 INSN_FROM_TARGET_P (seq->element (i)) 543 = ! INSN_FROM_TARGET_P (seq->element (i)); 544 545 target_set = set; 546 mark_set_resources (insn, &target_set, 0, 547 MARK_SRC_DEST_CALL); 548 549 for (i = 1; i < seq->len (); i++) 550 INSN_FROM_TARGET_P (seq->element (i)) 551 = ! INSN_FROM_TARGET_P (seq->element (i)); 552 553 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL); 554 } 555 else 556 { 557 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL); 558 target_set = set; 559 } 560 561 target_res = *res; 562 COPY_HARD_REG_SET (scratch, target_set.regs); 563 AND_COMPL_HARD_REG_SET (scratch, needed.regs); 564 AND_COMPL_HARD_REG_SET (target_res.regs, scratch); 565 566 fallthrough_res = *res; 567 COPY_HARD_REG_SET (scratch, set.regs); 568 AND_COMPL_HARD_REG_SET (scratch, needed.regs); 569 AND_COMPL_HARD_REG_SET (fallthrough_res.regs, scratch); 570 571 if (!ANY_RETURN_P (this_jump_insn->jump_label ())) 572 find_dead_or_set_registers 573 (this_jump_insn->jump_target (), 574 &target_res, 0, jump_count, target_set, needed); 575 find_dead_or_set_registers (next_insn, 576 &fallthrough_res, 0, jump_count, 577 set, needed); 578 IOR_HARD_REG_SET (fallthrough_res.regs, target_res.regs); 579 AND_HARD_REG_SET (res->regs, fallthrough_res.regs); 580 break; 581 } 582 else 583 break; 584 } 585 else 586 { 587 /* Don't try this optimization if we expired our jump count 588 above, since that would mean there may be an infinite loop 589 in the function being compiled. */ 590 jump_insn = 0; 591 break; 592 } 593 } 594 595 mark_referenced_resources (insn, &needed, true); 596 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL); 597 598 COPY_HARD_REG_SET (scratch, set.regs); 599 AND_COMPL_HARD_REG_SET (scratch, needed.regs); 600 AND_COMPL_HARD_REG_SET (res->regs, scratch); 601 } 602 603 return jump_insn; 604 } 605 606 /* Given X, a part of an insn, and a pointer to a `struct resource', 607 RES, indicate which resources are modified by the insn. If 608 MARK_TYPE is MARK_SRC_DEST_CALL, also mark resources potentially 609 set by the called routine. 610 611 If IN_DEST is nonzero, it means we are inside a SET. Otherwise, 612 objects are being referenced instead of set. 613 614 We never mark the insn as modifying the condition code unless it explicitly 615 SETs CC0 even though this is not totally correct. The reason for this is 616 that we require a SET of CC0 to immediately precede the reference to CC0. 617 So if some other insn sets CC0 as a side-effect, we know it cannot affect 618 our computation and thus may be placed in a delay slot. */ 619 620 void 621 mark_set_resources (rtx x, struct resources *res, int in_dest, 622 enum mark_resource_type mark_type) 623 { 624 enum rtx_code code; 625 int i, j; 626 unsigned int r; 627 const char *format_ptr; 628 629 restart: 630 631 code = GET_CODE (x); 632 633 switch (code) 634 { 635 case NOTE: 636 case BARRIER: 637 case CODE_LABEL: 638 case USE: 639 CASE_CONST_ANY: 640 case LABEL_REF: 641 case SYMBOL_REF: 642 case CONST: 643 case PC: 644 case DEBUG_INSN: 645 /* These don't set any resources. */ 646 return; 647 648 case CC0: 649 if (in_dest) 650 res->cc = 1; 651 return; 652 653 case CALL_INSN: 654 /* Called routine modifies the condition code, memory, any registers 655 that aren't saved across calls, global registers and anything 656 explicitly CLOBBERed immediately after the CALL_INSN. */ 657 658 if (mark_type == MARK_SRC_DEST_CALL) 659 { 660 rtx_call_insn *call_insn = as_a <rtx_call_insn *> (x); 661 rtx link; 662 HARD_REG_SET regs; 663 664 res->cc = res->memory = 1; 665 666 get_call_reg_set_usage (call_insn, ®s, regs_invalidated_by_call); 667 IOR_HARD_REG_SET (res->regs, regs); 668 669 for (link = CALL_INSN_FUNCTION_USAGE (call_insn); 670 link; link = XEXP (link, 1)) 671 if (GET_CODE (XEXP (link, 0)) == CLOBBER) 672 mark_set_resources (SET_DEST (XEXP (link, 0)), res, 1, 673 MARK_SRC_DEST); 674 675 /* Check for a REG_SETJMP. If it exists, then we must 676 assume that this call can clobber any register. */ 677 if (find_reg_note (call_insn, REG_SETJMP, NULL)) 678 SET_HARD_REG_SET (res->regs); 679 } 680 681 /* ... and also what its RTL says it modifies, if anything. */ 682 gcc_fallthrough (); 683 684 case JUMP_INSN: 685 case INSN: 686 687 /* An insn consisting of just a CLOBBER (or USE) is just for flow 688 and doesn't actually do anything, so we ignore it. */ 689 690 if (mark_type != MARK_SRC_DEST_CALL 691 && INSN_SETS_ARE_DELAYED (as_a <rtx_insn *> (x))) 692 return; 693 694 x = PATTERN (x); 695 if (GET_CODE (x) != USE && GET_CODE (x) != CLOBBER) 696 goto restart; 697 return; 698 699 case SET: 700 /* If the source of a SET is a CALL, this is actually done by 701 the called routine. So only include it if we are to include the 702 effects of the calling routine. */ 703 704 mark_set_resources (SET_DEST (x), res, 705 (mark_type == MARK_SRC_DEST_CALL 706 || GET_CODE (SET_SRC (x)) != CALL), 707 mark_type); 708 709 mark_set_resources (SET_SRC (x), res, 0, MARK_SRC_DEST); 710 return; 711 712 case CLOBBER: 713 mark_set_resources (XEXP (x, 0), res, 1, MARK_SRC_DEST); 714 return; 715 716 case SEQUENCE: 717 { 718 rtx_sequence *seq = as_a <rtx_sequence *> (x); 719 rtx control = seq->element (0); 720 bool annul_p = JUMP_P (control) && INSN_ANNULLED_BRANCH_P (control); 721 722 mark_set_resources (control, res, 0, mark_type); 723 for (i = seq->len () - 1; i >= 0; --i) 724 { 725 rtx elt = seq->element (i); 726 if (!annul_p && INSN_FROM_TARGET_P (elt)) 727 mark_set_resources (elt, res, 0, mark_type); 728 } 729 } 730 return; 731 732 case POST_INC: 733 case PRE_INC: 734 case POST_DEC: 735 case PRE_DEC: 736 mark_set_resources (XEXP (x, 0), res, 1, MARK_SRC_DEST); 737 return; 738 739 case PRE_MODIFY: 740 case POST_MODIFY: 741 mark_set_resources (XEXP (x, 0), res, 1, MARK_SRC_DEST); 742 mark_set_resources (XEXP (XEXP (x, 1), 0), res, 0, MARK_SRC_DEST); 743 mark_set_resources (XEXP (XEXP (x, 1), 1), res, 0, MARK_SRC_DEST); 744 return; 745 746 case SIGN_EXTRACT: 747 case ZERO_EXTRACT: 748 mark_set_resources (XEXP (x, 0), res, in_dest, MARK_SRC_DEST); 749 mark_set_resources (XEXP (x, 1), res, 0, MARK_SRC_DEST); 750 mark_set_resources (XEXP (x, 2), res, 0, MARK_SRC_DEST); 751 return; 752 753 case MEM: 754 if (in_dest) 755 { 756 res->memory = 1; 757 res->volatil |= MEM_VOLATILE_P (x); 758 } 759 760 mark_set_resources (XEXP (x, 0), res, 0, MARK_SRC_DEST); 761 return; 762 763 case SUBREG: 764 if (in_dest) 765 { 766 if (!REG_P (SUBREG_REG (x))) 767 mark_set_resources (SUBREG_REG (x), res, in_dest, mark_type); 768 else 769 { 770 unsigned int regno = subreg_regno (x); 771 unsigned int last_regno = regno + subreg_nregs (x); 772 773 gcc_assert (last_regno <= FIRST_PSEUDO_REGISTER); 774 for (r = regno; r < last_regno; r++) 775 SET_HARD_REG_BIT (res->regs, r); 776 } 777 } 778 return; 779 780 case REG: 781 if (in_dest) 782 { 783 gcc_assert (HARD_REGISTER_P (x)); 784 add_to_hard_reg_set (&res->regs, GET_MODE (x), REGNO (x)); 785 } 786 return; 787 788 case UNSPEC_VOLATILE: 789 case ASM_INPUT: 790 /* Traditional asm's are always volatile. */ 791 res->volatil = 1; 792 return; 793 794 case TRAP_IF: 795 res->volatil = 1; 796 break; 797 798 case ASM_OPERANDS: 799 res->volatil |= MEM_VOLATILE_P (x); 800 801 /* For all ASM_OPERANDS, we must traverse the vector of input operands. 802 We can not just fall through here since then we would be confused 803 by the ASM_INPUT rtx inside ASM_OPERANDS, which do not indicate 804 traditional asms unlike their normal usage. */ 805 806 for (i = 0; i < ASM_OPERANDS_INPUT_LENGTH (x); i++) 807 mark_set_resources (ASM_OPERANDS_INPUT (x, i), res, in_dest, 808 MARK_SRC_DEST); 809 return; 810 811 default: 812 break; 813 } 814 815 /* Process each sub-expression and flag what it needs. */ 816 format_ptr = GET_RTX_FORMAT (code); 817 for (i = 0; i < GET_RTX_LENGTH (code); i++) 818 switch (*format_ptr++) 819 { 820 case 'e': 821 mark_set_resources (XEXP (x, i), res, in_dest, mark_type); 822 break; 823 824 case 'E': 825 for (j = 0; j < XVECLEN (x, i); j++) 826 mark_set_resources (XVECEXP (x, i, j), res, in_dest, mark_type); 827 break; 828 } 829 } 830 831 /* Return TRUE if INSN is a return, possibly with a filled delay slot. */ 832 833 static bool 834 return_insn_p (const_rtx insn) 835 { 836 if (JUMP_P (insn) && ANY_RETURN_P (PATTERN (insn))) 837 return true; 838 839 if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE) 840 return return_insn_p (XVECEXP (PATTERN (insn), 0, 0)); 841 842 return false; 843 } 844 845 /* Set the resources that are live at TARGET. 846 847 If TARGET is zero, we refer to the end of the current function and can 848 return our precomputed value. 849 850 Otherwise, we try to find out what is live by consulting the basic block 851 information. This is tricky, because we must consider the actions of 852 reload and jump optimization, which occur after the basic block information 853 has been computed. 854 855 Accordingly, we proceed as follows:: 856 857 We find the previous BARRIER and look at all immediately following labels 858 (with no intervening active insns) to see if any of them start a basic 859 block. If we hit the start of the function first, we use block 0. 860 861 Once we have found a basic block and a corresponding first insn, we can 862 accurately compute the live status (by starting at a label following a 863 BARRIER, we are immune to actions taken by reload and jump.) Then we 864 scan all insns between that point and our target. For each CLOBBER (or 865 for call-clobbered regs when we pass a CALL_INSN), mark the appropriate 866 registers are dead. For a SET, mark them as live. 867 868 We have to be careful when using REG_DEAD notes because they are not 869 updated by such things as find_equiv_reg. So keep track of registers 870 marked as dead that haven't been assigned to, and mark them dead at the 871 next CODE_LABEL since reload and jump won't propagate values across labels. 872 873 If we cannot find the start of a basic block (should be a very rare 874 case, if it can happen at all), mark everything as potentially live. 875 876 Next, scan forward from TARGET looking for things set or clobbered 877 before they are used. These are not live. 878 879 Because we can be called many times on the same target, save our results 880 in a hash table indexed by INSN_UID. This is only done if the function 881 init_resource_info () was invoked before we are called. */ 882 883 void 884 mark_target_live_regs (rtx_insn *insns, rtx target_maybe_return, struct resources *res) 885 { 886 int b = -1; 887 unsigned int i; 888 struct target_info *tinfo = NULL; 889 rtx_insn *insn; 890 rtx jump_target; 891 HARD_REG_SET scratch; 892 struct resources set, needed; 893 894 /* Handle end of function. */ 895 if (target_maybe_return == 0 || ANY_RETURN_P (target_maybe_return)) 896 { 897 *res = end_of_function_needs; 898 return; 899 } 900 901 /* We've handled the case of RETURN/SIMPLE_RETURN; we should now have an 902 instruction. */ 903 rtx_insn *target = as_a <rtx_insn *> (target_maybe_return); 904 905 /* Handle return insn. */ 906 if (return_insn_p (target)) 907 { 908 *res = end_of_function_needs; 909 mark_referenced_resources (target, res, false); 910 return; 911 } 912 913 /* We have to assume memory is needed, but the CC isn't. */ 914 res->memory = 1; 915 res->volatil = 0; 916 res->cc = 0; 917 918 /* See if we have computed this value already. */ 919 if (target_hash_table != NULL) 920 { 921 for (tinfo = target_hash_table[INSN_UID (target) % TARGET_HASH_PRIME]; 922 tinfo; tinfo = tinfo->next) 923 if (tinfo->uid == INSN_UID (target)) 924 break; 925 926 /* Start by getting the basic block number. If we have saved 927 information, we can get it from there unless the insn at the 928 start of the basic block has been deleted. */ 929 if (tinfo && tinfo->block != -1 930 && ! BB_HEAD (BASIC_BLOCK_FOR_FN (cfun, tinfo->block))->deleted ()) 931 b = tinfo->block; 932 } 933 934 if (b == -1) 935 b = find_basic_block (target, MAX_DELAY_SLOT_LIVE_SEARCH); 936 937 if (target_hash_table != NULL) 938 { 939 if (tinfo) 940 { 941 /* If the information is up-to-date, use it. Otherwise, we will 942 update it below. */ 943 if (b == tinfo->block && b != -1 && tinfo->bb_tick == bb_ticks[b]) 944 { 945 COPY_HARD_REG_SET (res->regs, tinfo->live_regs); 946 return; 947 } 948 } 949 else 950 { 951 /* Allocate a place to put our results and chain it into the 952 hash table. */ 953 tinfo = XNEW (struct target_info); 954 tinfo->uid = INSN_UID (target); 955 tinfo->block = b; 956 tinfo->next 957 = target_hash_table[INSN_UID (target) % TARGET_HASH_PRIME]; 958 target_hash_table[INSN_UID (target) % TARGET_HASH_PRIME] = tinfo; 959 } 960 } 961 962 CLEAR_HARD_REG_SET (pending_dead_regs); 963 964 /* If we found a basic block, get the live registers from it and update 965 them with anything set or killed between its start and the insn before 966 TARGET; this custom life analysis is really about registers so we need 967 to use the LR problem. Otherwise, we must assume everything is live. */ 968 if (b != -1) 969 { 970 regset regs_live = DF_LR_IN (BASIC_BLOCK_FOR_FN (cfun, b)); 971 rtx_insn *start_insn, *stop_insn; 972 973 /* Compute hard regs live at start of block. */ 974 REG_SET_TO_HARD_REG_SET (current_live_regs, regs_live); 975 976 /* Get starting and ending insn, handling the case where each might 977 be a SEQUENCE. */ 978 start_insn = (b == ENTRY_BLOCK_PTR_FOR_FN (cfun)->next_bb->index ? 979 insns : BB_HEAD (BASIC_BLOCK_FOR_FN (cfun, b))); 980 stop_insn = target; 981 982 if (NONJUMP_INSN_P (start_insn) 983 && GET_CODE (PATTERN (start_insn)) == SEQUENCE) 984 start_insn = as_a <rtx_sequence *> (PATTERN (start_insn))->insn (0); 985 986 if (NONJUMP_INSN_P (stop_insn) 987 && GET_CODE (PATTERN (stop_insn)) == SEQUENCE) 988 stop_insn = next_insn (PREV_INSN (stop_insn)); 989 990 for (insn = start_insn; insn != stop_insn; 991 insn = next_insn_no_annul (insn)) 992 { 993 rtx link; 994 rtx_insn *real_insn = insn; 995 enum rtx_code code = GET_CODE (insn); 996 997 if (DEBUG_INSN_P (insn)) 998 continue; 999 1000 /* If this insn is from the target of a branch, it isn't going to 1001 be used in the sequel. If it is used in both cases, this 1002 test will not be true. */ 1003 if ((code == INSN || code == JUMP_INSN || code == CALL_INSN) 1004 && INSN_FROM_TARGET_P (insn)) 1005 continue; 1006 1007 /* If this insn is a USE made by update_block, we care about the 1008 underlying insn. */ 1009 if (code == INSN 1010 && GET_CODE (PATTERN (insn)) == USE 1011 && INSN_P (XEXP (PATTERN (insn), 0))) 1012 real_insn = as_a <rtx_insn *> (XEXP (PATTERN (insn), 0)); 1013 1014 if (CALL_P (real_insn)) 1015 { 1016 /* Values in call-clobbered registers survive a COND_EXEC CALL 1017 if that is not executed; this matters for resoure use because 1018 they may be used by a complementarily (or more strictly) 1019 predicated instruction, or if the CALL is NORETURN. */ 1020 if (GET_CODE (PATTERN (real_insn)) != COND_EXEC) 1021 { 1022 HARD_REG_SET regs_invalidated_by_this_call; 1023 get_call_reg_set_usage (real_insn, 1024 ®s_invalidated_by_this_call, 1025 regs_invalidated_by_call); 1026 /* CALL clobbers all call-used regs that aren't fixed except 1027 sp, ap, and fp. Do this before setting the result of the 1028 call live. */ 1029 AND_COMPL_HARD_REG_SET (current_live_regs, 1030 regs_invalidated_by_this_call); 1031 } 1032 1033 /* A CALL_INSN sets any global register live, since it may 1034 have been modified by the call. */ 1035 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 1036 if (global_regs[i]) 1037 SET_HARD_REG_BIT (current_live_regs, i); 1038 } 1039 1040 /* Mark anything killed in an insn to be deadened at the next 1041 label. Ignore USE insns; the only REG_DEAD notes will be for 1042 parameters. But they might be early. A CALL_INSN will usually 1043 clobber registers used for parameters. It isn't worth bothering 1044 with the unlikely case when it won't. */ 1045 if ((NONJUMP_INSN_P (real_insn) 1046 && GET_CODE (PATTERN (real_insn)) != USE 1047 && GET_CODE (PATTERN (real_insn)) != CLOBBER) 1048 || JUMP_P (real_insn) 1049 || CALL_P (real_insn)) 1050 { 1051 for (link = REG_NOTES (real_insn); link; link = XEXP (link, 1)) 1052 if (REG_NOTE_KIND (link) == REG_DEAD 1053 && REG_P (XEXP (link, 0)) 1054 && REGNO (XEXP (link, 0)) < FIRST_PSEUDO_REGISTER) 1055 add_to_hard_reg_set (&pending_dead_regs, 1056 GET_MODE (XEXP (link, 0)), 1057 REGNO (XEXP (link, 0))); 1058 1059 note_stores (PATTERN (real_insn), update_live_status, NULL); 1060 1061 /* If any registers were unused after this insn, kill them. 1062 These notes will always be accurate. */ 1063 for (link = REG_NOTES (real_insn); link; link = XEXP (link, 1)) 1064 if (REG_NOTE_KIND (link) == REG_UNUSED 1065 && REG_P (XEXP (link, 0)) 1066 && REGNO (XEXP (link, 0)) < FIRST_PSEUDO_REGISTER) 1067 remove_from_hard_reg_set (¤t_live_regs, 1068 GET_MODE (XEXP (link, 0)), 1069 REGNO (XEXP (link, 0))); 1070 } 1071 1072 else if (LABEL_P (real_insn)) 1073 { 1074 basic_block bb; 1075 1076 /* A label clobbers the pending dead registers since neither 1077 reload nor jump will propagate a value across a label. */ 1078 AND_COMPL_HARD_REG_SET (current_live_regs, pending_dead_regs); 1079 CLEAR_HARD_REG_SET (pending_dead_regs); 1080 1081 /* We must conservatively assume that all registers that used 1082 to be live here still are. The fallthrough edge may have 1083 left a live register uninitialized. */ 1084 bb = BLOCK_FOR_INSN (real_insn); 1085 if (bb) 1086 { 1087 HARD_REG_SET extra_live; 1088 1089 REG_SET_TO_HARD_REG_SET (extra_live, DF_LR_IN (bb)); 1090 IOR_HARD_REG_SET (current_live_regs, extra_live); 1091 } 1092 } 1093 1094 /* The beginning of the epilogue corresponds to the end of the 1095 RTL chain when there are no epilogue insns. Certain resources 1096 are implicitly required at that point. */ 1097 else if (NOTE_P (real_insn) 1098 && NOTE_KIND (real_insn) == NOTE_INSN_EPILOGUE_BEG) 1099 IOR_HARD_REG_SET (current_live_regs, start_of_epilogue_needs.regs); 1100 } 1101 1102 COPY_HARD_REG_SET (res->regs, current_live_regs); 1103 if (tinfo != NULL) 1104 { 1105 tinfo->block = b; 1106 tinfo->bb_tick = bb_ticks[b]; 1107 } 1108 } 1109 else 1110 /* We didn't find the start of a basic block. Assume everything 1111 in use. This should happen only extremely rarely. */ 1112 SET_HARD_REG_SET (res->regs); 1113 1114 CLEAR_RESOURCE (&set); 1115 CLEAR_RESOURCE (&needed); 1116 1117 rtx_insn *jump_insn = find_dead_or_set_registers (target, res, &jump_target, 1118 0, set, needed); 1119 1120 /* If we hit an unconditional branch, we have another way of finding out 1121 what is live: we can see what is live at the branch target and include 1122 anything used but not set before the branch. We add the live 1123 resources found using the test below to those found until now. */ 1124 1125 if (jump_insn) 1126 { 1127 struct resources new_resources; 1128 rtx_insn *stop_insn = next_active_insn (jump_insn); 1129 1130 if (!ANY_RETURN_P (jump_target)) 1131 jump_target = next_active_insn (as_a<rtx_insn *> (jump_target)); 1132 mark_target_live_regs (insns, jump_target, &new_resources); 1133 CLEAR_RESOURCE (&set); 1134 CLEAR_RESOURCE (&needed); 1135 1136 /* Include JUMP_INSN in the needed registers. */ 1137 for (insn = target; insn != stop_insn; insn = next_active_insn (insn)) 1138 { 1139 mark_referenced_resources (insn, &needed, true); 1140 1141 COPY_HARD_REG_SET (scratch, needed.regs); 1142 AND_COMPL_HARD_REG_SET (scratch, set.regs); 1143 IOR_HARD_REG_SET (new_resources.regs, scratch); 1144 1145 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL); 1146 } 1147 1148 IOR_HARD_REG_SET (res->regs, new_resources.regs); 1149 } 1150 1151 if (tinfo != NULL) 1152 { 1153 COPY_HARD_REG_SET (tinfo->live_regs, res->regs); 1154 } 1155 } 1156 1157 /* Initialize the resources required by mark_target_live_regs (). 1158 This should be invoked before the first call to mark_target_live_regs. */ 1159 1160 void 1161 init_resource_info (rtx_insn *epilogue_insn) 1162 { 1163 int i; 1164 basic_block bb; 1165 1166 /* Indicate what resources are required to be valid at the end of the current 1167 function. The condition code never is and memory always is. 1168 The stack pointer is needed unless EXIT_IGNORE_STACK is true 1169 and there is an epilogue that restores the original stack pointer 1170 from the frame pointer. Registers used to return the function value 1171 are needed. Registers holding global variables are needed. */ 1172 1173 end_of_function_needs.cc = 0; 1174 end_of_function_needs.memory = 1; 1175 CLEAR_HARD_REG_SET (end_of_function_needs.regs); 1176 1177 if (frame_pointer_needed) 1178 { 1179 SET_HARD_REG_BIT (end_of_function_needs.regs, FRAME_POINTER_REGNUM); 1180 if (!HARD_FRAME_POINTER_IS_FRAME_POINTER) 1181 SET_HARD_REG_BIT (end_of_function_needs.regs, 1182 HARD_FRAME_POINTER_REGNUM); 1183 } 1184 if (!(frame_pointer_needed 1185 && EXIT_IGNORE_STACK 1186 && epilogue_insn 1187 && !crtl->sp_is_unchanging)) 1188 SET_HARD_REG_BIT (end_of_function_needs.regs, STACK_POINTER_REGNUM); 1189 1190 if (crtl->return_rtx != 0) 1191 mark_referenced_resources (crtl->return_rtx, 1192 &end_of_function_needs, true); 1193 1194 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 1195 if (global_regs[i] || EPILOGUE_USES (i)) 1196 SET_HARD_REG_BIT (end_of_function_needs.regs, i); 1197 1198 /* The registers required to be live at the end of the function are 1199 represented in the flow information as being dead just prior to 1200 reaching the end of the function. For example, the return of a value 1201 might be represented by a USE of the return register immediately 1202 followed by an unconditional jump to the return label where the 1203 return label is the end of the RTL chain. The end of the RTL chain 1204 is then taken to mean that the return register is live. 1205 1206 This sequence is no longer maintained when epilogue instructions are 1207 added to the RTL chain. To reconstruct the original meaning, the 1208 start of the epilogue (NOTE_INSN_EPILOGUE_BEG) is regarded as the 1209 point where these registers become live (start_of_epilogue_needs). 1210 If epilogue instructions are present, the registers set by those 1211 instructions won't have been processed by flow. Thus, those 1212 registers are additionally required at the end of the RTL chain 1213 (end_of_function_needs). */ 1214 1215 start_of_epilogue_needs = end_of_function_needs; 1216 1217 while ((epilogue_insn = next_nonnote_insn (epilogue_insn))) 1218 { 1219 mark_set_resources (epilogue_insn, &end_of_function_needs, 0, 1220 MARK_SRC_DEST_CALL); 1221 if (return_insn_p (epilogue_insn)) 1222 break; 1223 } 1224 1225 /* Allocate and initialize the tables used by mark_target_live_regs. */ 1226 target_hash_table = XCNEWVEC (struct target_info *, TARGET_HASH_PRIME); 1227 bb_ticks = XCNEWVEC (int, last_basic_block_for_fn (cfun)); 1228 1229 /* Set the BLOCK_FOR_INSN of each label that starts a basic block. */ 1230 FOR_EACH_BB_FN (bb, cfun) 1231 if (LABEL_P (BB_HEAD (bb))) 1232 BLOCK_FOR_INSN (BB_HEAD (bb)) = bb; 1233 } 1234 1235 /* Free up the resources allocated to mark_target_live_regs (). This 1236 should be invoked after the last call to mark_target_live_regs (). */ 1237 1238 void 1239 free_resource_info (void) 1240 { 1241 basic_block bb; 1242 1243 if (target_hash_table != NULL) 1244 { 1245 int i; 1246 1247 for (i = 0; i < TARGET_HASH_PRIME; ++i) 1248 { 1249 struct target_info *ti = target_hash_table[i]; 1250 1251 while (ti) 1252 { 1253 struct target_info *next = ti->next; 1254 free (ti); 1255 ti = next; 1256 } 1257 } 1258 1259 free (target_hash_table); 1260 target_hash_table = NULL; 1261 } 1262 1263 if (bb_ticks != NULL) 1264 { 1265 free (bb_ticks); 1266 bb_ticks = NULL; 1267 } 1268 1269 FOR_EACH_BB_FN (bb, cfun) 1270 if (LABEL_P (BB_HEAD (bb))) 1271 BLOCK_FOR_INSN (BB_HEAD (bb)) = NULL; 1272 } 1273 1274 /* Clear any hashed information that we have stored for INSN. */ 1275 1276 void 1277 clear_hashed_info_for_insn (rtx_insn *insn) 1278 { 1279 struct target_info *tinfo; 1280 1281 if (target_hash_table != NULL) 1282 { 1283 for (tinfo = target_hash_table[INSN_UID (insn) % TARGET_HASH_PRIME]; 1284 tinfo; tinfo = tinfo->next) 1285 if (tinfo->uid == INSN_UID (insn)) 1286 break; 1287 1288 if (tinfo) 1289 tinfo->block = -1; 1290 } 1291 } 1292 1293 /* Increment the tick count for the basic block that contains INSN. */ 1294 1295 void 1296 incr_ticks_for_insn (rtx_insn *insn) 1297 { 1298 int b = find_basic_block (insn, MAX_DELAY_SLOT_LIVE_SEARCH); 1299 1300 if (b != -1) 1301 bb_ticks[b]++; 1302 } 1303 1304 /* Add TRIAL to the set of resources used at the end of the current 1305 function. */ 1306 void 1307 mark_end_of_function_resources (rtx trial, bool include_delayed_effects) 1308 { 1309 mark_referenced_resources (trial, &end_of_function_needs, 1310 include_delayed_effects); 1311 } 1312