1 /* Intel 387 floating point stuff. 2 3 Copyright (C) 1988-1989, 1991-1994, 1998-2005, 2007-2012 Free 4 Software Foundation, Inc. 5 6 This file is part of GDB. 7 8 This program is free software; you can redistribute it and/or modify 9 it under the terms of the GNU General Public License as published by 10 the Free Software Foundation; either version 3 of the License, or 11 (at your option) any later version. 12 13 This program is distributed in the hope that it will be useful, 14 but WITHOUT ANY WARRANTY; without even the implied warranty of 15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 GNU General Public License for more details. 17 18 You should have received a copy of the GNU General Public License 19 along with this program. If not, see <http://www.gnu.org/licenses/>. */ 20 21 #include "defs.h" 22 #include "doublest.h" 23 #include "floatformat.h" 24 #include "frame.h" 25 #include "gdbcore.h" 26 #include "inferior.h" 27 #include "language.h" 28 #include "regcache.h" 29 #include "value.h" 30 31 #include "gdb_assert.h" 32 #include "gdb_string.h" 33 34 #include "i386-tdep.h" 35 #include "i387-tdep.h" 36 #include "i386-xstate.h" 37 38 /* Print the floating point number specified by RAW. */ 39 40 static void 41 print_i387_value (struct gdbarch *gdbarch, 42 const gdb_byte *raw, struct ui_file *file) 43 { 44 DOUBLEST value; 45 46 /* Using extract_typed_floating here might affect the representation 47 of certain numbers such as NaNs, even if GDB is running natively. 48 This is fine since our caller already detects such special 49 numbers and we print the hexadecimal representation anyway. */ 50 value = extract_typed_floating (raw, i387_ext_type (gdbarch)); 51 52 /* We try to print 19 digits. The last digit may or may not contain 53 garbage, but we'd better print one too many. We need enough room 54 to print the value, 1 position for the sign, 1 for the decimal 55 point, 19 for the digits and 6 for the exponent adds up to 27. */ 56 #ifdef PRINTF_HAS_LONG_DOUBLE 57 fprintf_filtered (file, " %-+27.19Lg", (long double) value); 58 #else 59 fprintf_filtered (file, " %-+27.19g", (double) value); 60 #endif 61 } 62 63 /* Print the classification for the register contents RAW. */ 64 65 static void 66 print_i387_ext (struct gdbarch *gdbarch, 67 const gdb_byte *raw, struct ui_file *file) 68 { 69 int sign; 70 int integer; 71 unsigned int exponent; 72 unsigned long fraction[2]; 73 74 sign = raw[9] & 0x80; 75 integer = raw[7] & 0x80; 76 exponent = (((raw[9] & 0x7f) << 8) | raw[8]); 77 fraction[0] = ((raw[3] << 24) | (raw[2] << 16) | (raw[1] << 8) | raw[0]); 78 fraction[1] = (((raw[7] & 0x7f) << 24) | (raw[6] << 16) 79 | (raw[5] << 8) | raw[4]); 80 81 if (exponent == 0x7fff && integer) 82 { 83 if (fraction[0] == 0x00000000 && fraction[1] == 0x00000000) 84 /* Infinity. */ 85 fprintf_filtered (file, " %cInf", (sign ? '-' : '+')); 86 else if (sign && fraction[0] == 0x00000000 && fraction[1] == 0x40000000) 87 /* Real Indefinite (QNaN). */ 88 fputs_unfiltered (" Real Indefinite (QNaN)", file); 89 else if (fraction[1] & 0x40000000) 90 /* QNaN. */ 91 fputs_filtered (" QNaN", file); 92 else 93 /* SNaN. */ 94 fputs_filtered (" SNaN", file); 95 } 96 else if (exponent < 0x7fff && exponent > 0x0000 && integer) 97 /* Normal. */ 98 print_i387_value (gdbarch, raw, file); 99 else if (exponent == 0x0000) 100 { 101 /* Denormal or zero. */ 102 print_i387_value (gdbarch, raw, file); 103 104 if (integer) 105 /* Pseudo-denormal. */ 106 fputs_filtered (" Pseudo-denormal", file); 107 else if (fraction[0] || fraction[1]) 108 /* Denormal. */ 109 fputs_filtered (" Denormal", file); 110 } 111 else 112 /* Unsupported. */ 113 fputs_filtered (" Unsupported", file); 114 } 115 116 /* Print the status word STATUS. */ 117 118 static void 119 print_i387_status_word (unsigned int status, struct ui_file *file) 120 { 121 fprintf_filtered (file, "Status Word: %s", 122 hex_string_custom (status, 4)); 123 fputs_filtered (" ", file); 124 fprintf_filtered (file, " %s", (status & 0x0001) ? "IE" : " "); 125 fprintf_filtered (file, " %s", (status & 0x0002) ? "DE" : " "); 126 fprintf_filtered (file, " %s", (status & 0x0004) ? "ZE" : " "); 127 fprintf_filtered (file, " %s", (status & 0x0008) ? "OE" : " "); 128 fprintf_filtered (file, " %s", (status & 0x0010) ? "UE" : " "); 129 fprintf_filtered (file, " %s", (status & 0x0020) ? "PE" : " "); 130 fputs_filtered (" ", file); 131 fprintf_filtered (file, " %s", (status & 0x0080) ? "ES" : " "); 132 fputs_filtered (" ", file); 133 fprintf_filtered (file, " %s", (status & 0x0040) ? "SF" : " "); 134 fputs_filtered (" ", file); 135 fprintf_filtered (file, " %s", (status & 0x0100) ? "C0" : " "); 136 fprintf_filtered (file, " %s", (status & 0x0200) ? "C1" : " "); 137 fprintf_filtered (file, " %s", (status & 0x0400) ? "C2" : " "); 138 fprintf_filtered (file, " %s", (status & 0x4000) ? "C3" : " "); 139 140 fputs_filtered ("\n", file); 141 142 fprintf_filtered (file, 143 " TOP: %d\n", ((status >> 11) & 7)); 144 } 145 146 /* Print the control word CONTROL. */ 147 148 static void 149 print_i387_control_word (unsigned int control, struct ui_file *file) 150 { 151 fprintf_filtered (file, "Control Word: %s", 152 hex_string_custom (control, 4)); 153 fputs_filtered (" ", file); 154 fprintf_filtered (file, " %s", (control & 0x0001) ? "IM" : " "); 155 fprintf_filtered (file, " %s", (control & 0x0002) ? "DM" : " "); 156 fprintf_filtered (file, " %s", (control & 0x0004) ? "ZM" : " "); 157 fprintf_filtered (file, " %s", (control & 0x0008) ? "OM" : " "); 158 fprintf_filtered (file, " %s", (control & 0x0010) ? "UM" : " "); 159 fprintf_filtered (file, " %s", (control & 0x0020) ? "PM" : " "); 160 161 fputs_filtered ("\n", file); 162 163 fputs_filtered (" PC: ", file); 164 switch ((control >> 8) & 3) 165 { 166 case 0: 167 fputs_filtered ("Single Precision (24-bits)\n", file); 168 break; 169 case 1: 170 fputs_filtered ("Reserved\n", file); 171 break; 172 case 2: 173 fputs_filtered ("Double Precision (53-bits)\n", file); 174 break; 175 case 3: 176 fputs_filtered ("Extended Precision (64-bits)\n", file); 177 break; 178 } 179 180 fputs_filtered (" RC: ", file); 181 switch ((control >> 10) & 3) 182 { 183 case 0: 184 fputs_filtered ("Round to nearest\n", file); 185 break; 186 case 1: 187 fputs_filtered ("Round down\n", file); 188 break; 189 case 2: 190 fputs_filtered ("Round up\n", file); 191 break; 192 case 3: 193 fputs_filtered ("Round toward zero\n", file); 194 break; 195 } 196 } 197 198 /* Print out the i387 floating point state. Note that we ignore FRAME 199 in the code below. That's OK since floating-point registers are 200 never saved on the stack. */ 201 202 void 203 i387_print_float_info (struct gdbarch *gdbarch, struct ui_file *file, 204 struct frame_info *frame, const char *args) 205 { 206 struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (frame)); 207 ULONGEST fctrl; 208 ULONGEST fstat; 209 ULONGEST ftag; 210 ULONGEST fiseg; 211 ULONGEST fioff; 212 ULONGEST foseg; 213 ULONGEST fooff; 214 ULONGEST fop; 215 int fpreg; 216 int top; 217 218 gdb_assert (gdbarch == get_frame_arch (frame)); 219 220 fctrl = get_frame_register_unsigned (frame, I387_FCTRL_REGNUM (tdep)); 221 fstat = get_frame_register_unsigned (frame, I387_FSTAT_REGNUM (tdep)); 222 ftag = get_frame_register_unsigned (frame, I387_FTAG_REGNUM (tdep)); 223 fiseg = get_frame_register_unsigned (frame, I387_FISEG_REGNUM (tdep)); 224 fioff = get_frame_register_unsigned (frame, I387_FIOFF_REGNUM (tdep)); 225 foseg = get_frame_register_unsigned (frame, I387_FOSEG_REGNUM (tdep)); 226 fooff = get_frame_register_unsigned (frame, I387_FOOFF_REGNUM (tdep)); 227 fop = get_frame_register_unsigned (frame, I387_FOP_REGNUM (tdep)); 228 229 top = ((fstat >> 11) & 7); 230 231 for (fpreg = 7; fpreg >= 0; fpreg--) 232 { 233 gdb_byte raw[I386_MAX_REGISTER_SIZE]; 234 int tag = (ftag >> (fpreg * 2)) & 3; 235 int i; 236 237 fprintf_filtered (file, "%sR%d: ", fpreg == top ? "=>" : " ", fpreg); 238 239 switch (tag) 240 { 241 case 0: 242 fputs_filtered ("Valid ", file); 243 break; 244 case 1: 245 fputs_filtered ("Zero ", file); 246 break; 247 case 2: 248 fputs_filtered ("Special ", file); 249 break; 250 case 3: 251 fputs_filtered ("Empty ", file); 252 break; 253 } 254 255 get_frame_register (frame, 256 (fpreg + 8 - top) % 8 + I387_ST0_REGNUM (tdep), 257 raw); 258 259 fputs_filtered ("0x", file); 260 for (i = 9; i >= 0; i--) 261 fprintf_filtered (file, "%02x", raw[i]); 262 263 if (tag != 3) 264 print_i387_ext (gdbarch, raw, file); 265 266 fputs_filtered ("\n", file); 267 } 268 269 fputs_filtered ("\n", file); 270 271 print_i387_status_word (fstat, file); 272 print_i387_control_word (fctrl, file); 273 fprintf_filtered (file, "Tag Word: %s\n", 274 hex_string_custom (ftag, 4)); 275 fprintf_filtered (file, "Instruction Pointer: %s:", 276 hex_string_custom (fiseg, 2)); 277 fprintf_filtered (file, "%s\n", hex_string_custom (fioff, 8)); 278 fprintf_filtered (file, "Operand Pointer: %s:", 279 hex_string_custom (foseg, 2)); 280 fprintf_filtered (file, "%s\n", hex_string_custom (fooff, 8)); 281 fprintf_filtered (file, "Opcode: %s\n", 282 hex_string_custom (fop ? (fop | 0xd800) : 0, 4)); 283 } 284 285 286 /* Return nonzero if a value of type TYPE stored in register REGNUM 287 needs any special handling. */ 288 289 int 290 i387_convert_register_p (struct gdbarch *gdbarch, int regnum, 291 struct type *type) 292 { 293 if (i386_fp_regnum_p (gdbarch, regnum)) 294 { 295 /* Floating point registers must be converted unless we are 296 accessing them in their hardware type. */ 297 if (type == i387_ext_type (gdbarch)) 298 return 0; 299 else 300 return 1; 301 } 302 303 return 0; 304 } 305 306 /* Read a value of type TYPE from register REGNUM in frame FRAME, and 307 return its contents in TO. */ 308 309 int 310 i387_register_to_value (struct frame_info *frame, int regnum, 311 struct type *type, gdb_byte *to, 312 int *optimizedp, int *unavailablep) 313 { 314 struct gdbarch *gdbarch = get_frame_arch (frame); 315 gdb_byte from[I386_MAX_REGISTER_SIZE]; 316 317 gdb_assert (i386_fp_regnum_p (gdbarch, regnum)); 318 319 /* We only support floating-point values. */ 320 if (TYPE_CODE (type) != TYPE_CODE_FLT) 321 { 322 warning (_("Cannot convert floating-point register value " 323 "to non-floating-point type.")); 324 *optimizedp = *unavailablep = 0; 325 return 0; 326 } 327 328 /* Convert to TYPE. */ 329 if (!get_frame_register_bytes (frame, regnum, 0, TYPE_LENGTH (type), 330 from, optimizedp, unavailablep)) 331 return 0; 332 333 convert_typed_floating (from, i387_ext_type (gdbarch), to, type); 334 *optimizedp = *unavailablep = 0; 335 return 1; 336 } 337 338 /* Write the contents FROM of a value of type TYPE into register 339 REGNUM in frame FRAME. */ 340 341 void 342 i387_value_to_register (struct frame_info *frame, int regnum, 343 struct type *type, const gdb_byte *from) 344 { 345 struct gdbarch *gdbarch = get_frame_arch (frame); 346 gdb_byte to[I386_MAX_REGISTER_SIZE]; 347 348 gdb_assert (i386_fp_regnum_p (gdbarch, regnum)); 349 350 /* We only support floating-point values. */ 351 if (TYPE_CODE (type) != TYPE_CODE_FLT) 352 { 353 warning (_("Cannot convert non-floating-point type " 354 "to floating-point register value.")); 355 return; 356 } 357 358 /* Convert from TYPE. */ 359 convert_typed_floating (from, type, to, i387_ext_type (gdbarch)); 360 put_frame_register (frame, regnum, to); 361 } 362 363 364 /* Handle FSAVE and FXSAVE formats. */ 365 366 /* At fsave_offset[REGNUM] you'll find the offset to the location in 367 the data structure used by the "fsave" instruction where GDB 368 register REGNUM is stored. */ 369 370 static int fsave_offset[] = 371 { 372 28 + 0 * 10, /* %st(0) ... */ 373 28 + 1 * 10, 374 28 + 2 * 10, 375 28 + 3 * 10, 376 28 + 4 * 10, 377 28 + 5 * 10, 378 28 + 6 * 10, 379 28 + 7 * 10, /* ... %st(7). */ 380 0, /* `fctrl' (16 bits). */ 381 4, /* `fstat' (16 bits). */ 382 8, /* `ftag' (16 bits). */ 383 16, /* `fiseg' (16 bits). */ 384 12, /* `fioff'. */ 385 24, /* `foseg' (16 bits). */ 386 20, /* `fooff'. */ 387 18 /* `fop' (bottom 11 bits). */ 388 }; 389 390 #define FSAVE_ADDR(tdep, fsave, regnum) \ 391 (fsave + fsave_offset[regnum - I387_ST0_REGNUM (tdep)]) 392 393 394 /* Fill register REGNUM in REGCACHE with the appropriate value from 395 *FSAVE. This function masks off any of the reserved bits in 396 *FSAVE. */ 397 398 void 399 i387_supply_fsave (struct regcache *regcache, int regnum, const void *fsave) 400 { 401 struct gdbarch *gdbarch = get_regcache_arch (regcache); 402 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); 403 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); 404 const gdb_byte *regs = fsave; 405 int i; 406 407 gdb_assert (tdep->st0_regnum >= I386_ST0_REGNUM); 408 409 for (i = I387_ST0_REGNUM (tdep); i < I387_XMM0_REGNUM (tdep); i++) 410 if (regnum == -1 || regnum == i) 411 { 412 if (fsave == NULL) 413 { 414 regcache_raw_supply (regcache, i, NULL); 415 continue; 416 } 417 418 /* Most of the FPU control registers occupy only 16 bits in the 419 fsave area. Give those a special treatment. */ 420 if (i >= I387_FCTRL_REGNUM (tdep) 421 && i != I387_FIOFF_REGNUM (tdep) && i != I387_FOOFF_REGNUM (tdep)) 422 { 423 gdb_byte val[4]; 424 425 memcpy (val, FSAVE_ADDR (tdep, regs, i), 2); 426 val[2] = val[3] = 0; 427 if (i == I387_FOP_REGNUM (tdep)) 428 val[1] &= ((1 << 3) - 1); 429 regcache_raw_supply (regcache, i, val); 430 } 431 else 432 regcache_raw_supply (regcache, i, FSAVE_ADDR (tdep, regs, i)); 433 } 434 435 /* Provide dummy values for the SSE registers. */ 436 for (i = I387_XMM0_REGNUM (tdep); i < I387_MXCSR_REGNUM (tdep); i++) 437 if (regnum == -1 || regnum == i) 438 regcache_raw_supply (regcache, i, NULL); 439 if (regnum == -1 || regnum == I387_MXCSR_REGNUM (tdep)) 440 { 441 gdb_byte buf[4]; 442 443 store_unsigned_integer (buf, 4, byte_order, 0x1f80); 444 regcache_raw_supply (regcache, I387_MXCSR_REGNUM (tdep), buf); 445 } 446 } 447 448 /* Fill register REGNUM (if it is a floating-point register) in *FSAVE 449 with the value from REGCACHE. If REGNUM is -1, do this for all 450 registers. This function doesn't touch any of the reserved bits in 451 *FSAVE. */ 452 453 void 454 i387_collect_fsave (const struct regcache *regcache, int regnum, void *fsave) 455 { 456 struct gdbarch_tdep *tdep = gdbarch_tdep (get_regcache_arch (regcache)); 457 gdb_byte *regs = fsave; 458 int i; 459 460 gdb_assert (tdep->st0_regnum >= I386_ST0_REGNUM); 461 462 for (i = I387_ST0_REGNUM (tdep); i < I387_XMM0_REGNUM (tdep); i++) 463 if (regnum == -1 || regnum == i) 464 { 465 /* Most of the FPU control registers occupy only 16 bits in 466 the fsave area. Give those a special treatment. */ 467 if (i >= I387_FCTRL_REGNUM (tdep) 468 && i != I387_FIOFF_REGNUM (tdep) && i != I387_FOOFF_REGNUM (tdep)) 469 { 470 gdb_byte buf[4]; 471 472 regcache_raw_collect (regcache, i, buf); 473 474 if (i == I387_FOP_REGNUM (tdep)) 475 { 476 /* The opcode occupies only 11 bits. Make sure we 477 don't touch the other bits. */ 478 buf[1] &= ((1 << 3) - 1); 479 buf[1] |= ((FSAVE_ADDR (tdep, regs, i))[1] & ~((1 << 3) - 1)); 480 } 481 memcpy (FSAVE_ADDR (tdep, regs, i), buf, 2); 482 } 483 else 484 regcache_raw_collect (regcache, i, FSAVE_ADDR (tdep, regs, i)); 485 } 486 } 487 488 489 /* At fxsave_offset[REGNUM] you'll find the offset to the location in 490 the data structure used by the "fxsave" instruction where GDB 491 register REGNUM is stored. */ 492 493 static int fxsave_offset[] = 494 { 495 32, /* %st(0) through ... */ 496 48, 497 64, 498 80, 499 96, 500 112, 501 128, 502 144, /* ... %st(7) (80 bits each). */ 503 0, /* `fctrl' (16 bits). */ 504 2, /* `fstat' (16 bits). */ 505 4, /* `ftag' (16 bits). */ 506 12, /* `fiseg' (16 bits). */ 507 8, /* `fioff'. */ 508 20, /* `foseg' (16 bits). */ 509 16, /* `fooff'. */ 510 6, /* `fop' (bottom 11 bits). */ 511 160 + 0 * 16, /* %xmm0 through ... */ 512 160 + 1 * 16, 513 160 + 2 * 16, 514 160 + 3 * 16, 515 160 + 4 * 16, 516 160 + 5 * 16, 517 160 + 6 * 16, 518 160 + 7 * 16, 519 160 + 8 * 16, 520 160 + 9 * 16, 521 160 + 10 * 16, 522 160 + 11 * 16, 523 160 + 12 * 16, 524 160 + 13 * 16, 525 160 + 14 * 16, 526 160 + 15 * 16, /* ... %xmm15 (128 bits each). */ 527 }; 528 529 #define FXSAVE_ADDR(tdep, fxsave, regnum) \ 530 (fxsave + fxsave_offset[regnum - I387_ST0_REGNUM (tdep)]) 531 532 /* We made an unfortunate choice in putting %mxcsr after the SSE 533 registers %xmm0-%xmm7 instead of before, since it makes supporting 534 the registers %xmm8-%xmm15 on AMD64 a bit involved. Therefore we 535 don't include the offset for %mxcsr here above. */ 536 537 #define FXSAVE_MXCSR_ADDR(fxsave) (fxsave + 24) 538 539 static int i387_tag (const gdb_byte *raw); 540 541 542 /* Fill register REGNUM in REGCACHE with the appropriate 543 floating-point or SSE register value from *FXSAVE. This function 544 masks off any of the reserved bits in *FXSAVE. */ 545 546 void 547 i387_supply_fxsave (struct regcache *regcache, int regnum, const void *fxsave) 548 { 549 struct gdbarch_tdep *tdep = gdbarch_tdep (get_regcache_arch (regcache)); 550 const gdb_byte *regs = fxsave; 551 int i; 552 553 gdb_assert (tdep->st0_regnum >= I386_ST0_REGNUM); 554 gdb_assert (tdep->num_xmm_regs > 0); 555 556 for (i = I387_ST0_REGNUM (tdep); i < I387_MXCSR_REGNUM (tdep); i++) 557 if (regnum == -1 || regnum == i) 558 { 559 if (regs == NULL) 560 { 561 regcache_raw_supply (regcache, i, NULL); 562 continue; 563 } 564 565 /* Most of the FPU control registers occupy only 16 bits in 566 the fxsave area. Give those a special treatment. */ 567 if (i >= I387_FCTRL_REGNUM (tdep) && i < I387_XMM0_REGNUM (tdep) 568 && i != I387_FIOFF_REGNUM (tdep) && i != I387_FOOFF_REGNUM (tdep)) 569 { 570 gdb_byte val[4]; 571 572 memcpy (val, FXSAVE_ADDR (tdep, regs, i), 2); 573 val[2] = val[3] = 0; 574 if (i == I387_FOP_REGNUM (tdep)) 575 val[1] &= ((1 << 3) - 1); 576 else if (i== I387_FTAG_REGNUM (tdep)) 577 { 578 /* The fxsave area contains a simplified version of 579 the tag word. We have to look at the actual 80-bit 580 FP data to recreate the traditional i387 tag word. */ 581 582 unsigned long ftag = 0; 583 int fpreg; 584 int top; 585 586 top = ((FXSAVE_ADDR (tdep, regs, 587 I387_FSTAT_REGNUM (tdep)))[1] >> 3); 588 top &= 0x7; 589 590 for (fpreg = 7; fpreg >= 0; fpreg--) 591 { 592 int tag; 593 594 if (val[0] & (1 << fpreg)) 595 { 596 int thisreg = (fpreg + 8 - top) % 8 597 + I387_ST0_REGNUM (tdep); 598 tag = i387_tag (FXSAVE_ADDR (tdep, regs, thisreg)); 599 } 600 else 601 tag = 3; /* Empty */ 602 603 ftag |= tag << (2 * fpreg); 604 } 605 val[0] = ftag & 0xff; 606 val[1] = (ftag >> 8) & 0xff; 607 } 608 regcache_raw_supply (regcache, i, val); 609 } 610 else 611 regcache_raw_supply (regcache, i, FXSAVE_ADDR (tdep, regs, i)); 612 } 613 614 if (regnum == I387_MXCSR_REGNUM (tdep) || regnum == -1) 615 { 616 if (regs == NULL) 617 regcache_raw_supply (regcache, I387_MXCSR_REGNUM (tdep), NULL); 618 else 619 regcache_raw_supply (regcache, I387_MXCSR_REGNUM (tdep), 620 FXSAVE_MXCSR_ADDR (regs)); 621 } 622 } 623 624 /* Fill register REGNUM (if it is a floating-point or SSE register) in 625 *FXSAVE with the value from REGCACHE. If REGNUM is -1, do this for 626 all registers. This function doesn't touch any of the reserved 627 bits in *FXSAVE. */ 628 629 void 630 i387_collect_fxsave (const struct regcache *regcache, int regnum, void *fxsave) 631 { 632 struct gdbarch_tdep *tdep = gdbarch_tdep (get_regcache_arch (regcache)); 633 gdb_byte *regs = fxsave; 634 int i; 635 636 gdb_assert (tdep->st0_regnum >= I386_ST0_REGNUM); 637 gdb_assert (tdep->num_xmm_regs > 0); 638 639 for (i = I387_ST0_REGNUM (tdep); i < I387_MXCSR_REGNUM (tdep); i++) 640 if (regnum == -1 || regnum == i) 641 { 642 /* Most of the FPU control registers occupy only 16 bits in 643 the fxsave area. Give those a special treatment. */ 644 if (i >= I387_FCTRL_REGNUM (tdep) && i < I387_XMM0_REGNUM (tdep) 645 && i != I387_FIOFF_REGNUM (tdep) && i != I387_FOOFF_REGNUM (tdep)) 646 { 647 gdb_byte buf[4]; 648 649 regcache_raw_collect (regcache, i, buf); 650 651 if (i == I387_FOP_REGNUM (tdep)) 652 { 653 /* The opcode occupies only 11 bits. Make sure we 654 don't touch the other bits. */ 655 buf[1] &= ((1 << 3) - 1); 656 buf[1] |= ((FXSAVE_ADDR (tdep, regs, i))[1] & ~((1 << 3) - 1)); 657 } 658 else if (i == I387_FTAG_REGNUM (tdep)) 659 { 660 /* Converting back is much easier. */ 661 662 unsigned short ftag; 663 int fpreg; 664 665 ftag = (buf[1] << 8) | buf[0]; 666 buf[0] = 0; 667 buf[1] = 0; 668 669 for (fpreg = 7; fpreg >= 0; fpreg--) 670 { 671 int tag = (ftag >> (fpreg * 2)) & 3; 672 673 if (tag != 3) 674 buf[0] |= (1 << fpreg); 675 } 676 } 677 memcpy (FXSAVE_ADDR (tdep, regs, i), buf, 2); 678 } 679 else 680 regcache_raw_collect (regcache, i, FXSAVE_ADDR (tdep, regs, i)); 681 } 682 683 if (regnum == I387_MXCSR_REGNUM (tdep) || regnum == -1) 684 regcache_raw_collect (regcache, I387_MXCSR_REGNUM (tdep), 685 FXSAVE_MXCSR_ADDR (regs)); 686 } 687 688 /* `xstate_bv' is at byte offset 512. */ 689 #define XSAVE_XSTATE_BV_ADDR(xsave) (xsave + 512) 690 691 /* At xsave_avxh_offset[REGNUM] you'll find the offset to the location in 692 the upper 128bit of AVX register data structure used by the "xsave" 693 instruction where GDB register REGNUM is stored. */ 694 695 static int xsave_avxh_offset[] = 696 { 697 576 + 0 * 16, /* Upper 128bit of %ymm0 through ... */ 698 576 + 1 * 16, 699 576 + 2 * 16, 700 576 + 3 * 16, 701 576 + 4 * 16, 702 576 + 5 * 16, 703 576 + 6 * 16, 704 576 + 7 * 16, 705 576 + 8 * 16, 706 576 + 9 * 16, 707 576 + 10 * 16, 708 576 + 11 * 16, 709 576 + 12 * 16, 710 576 + 13 * 16, 711 576 + 14 * 16, 712 576 + 15 * 16 /* Upper 128bit of ... %ymm15 (128 bits each). */ 713 }; 714 715 #define XSAVE_AVXH_ADDR(tdep, xsave, regnum) \ 716 (xsave + xsave_avxh_offset[regnum - I387_YMM0H_REGNUM (tdep)]) 717 718 /* Similar to i387_supply_fxsave, but use XSAVE extended state. */ 719 720 void 721 i387_supply_xsave (struct regcache *regcache, int regnum, 722 const void *xsave) 723 { 724 struct gdbarch_tdep *tdep = gdbarch_tdep (get_regcache_arch (regcache)); 725 const gdb_byte *regs = xsave; 726 int i; 727 unsigned int clear_bv; 728 static const gdb_byte zero[MAX_REGISTER_SIZE] = { 0 }; 729 const gdb_byte *p; 730 enum 731 { 732 none = 0x0, 733 x87 = 0x1, 734 sse = 0x2, 735 avxh = 0x4, 736 all = x87 | sse | avxh 737 } regclass; 738 739 gdb_assert (tdep->st0_regnum >= I386_ST0_REGNUM); 740 gdb_assert (tdep->num_xmm_regs > 0); 741 742 if (regnum == -1) 743 regclass = all; 744 else if (regnum >= I387_YMM0H_REGNUM (tdep) 745 && regnum < I387_YMMENDH_REGNUM (tdep)) 746 regclass = avxh; 747 else if (regnum >= I387_XMM0_REGNUM(tdep) 748 && regnum < I387_MXCSR_REGNUM (tdep)) 749 regclass = sse; 750 else if (regnum >= I387_ST0_REGNUM (tdep) 751 && regnum < I387_FCTRL_REGNUM (tdep)) 752 regclass = x87; 753 else 754 regclass = none; 755 756 if (regs != NULL && regclass != none) 757 { 758 /* Get `xstat_bv'. */ 759 const gdb_byte *xstate_bv_p = XSAVE_XSTATE_BV_ADDR (regs); 760 761 /* The supported bits in `xstat_bv' are 1 byte. Clear part in 762 vector registers if its bit in xstat_bv is zero. */ 763 clear_bv = (~(*xstate_bv_p)) & tdep->xcr0; 764 } 765 else 766 clear_bv = I386_XSTATE_AVX_MASK; 767 768 /* With the delayed xsave mechanism, in between the program 769 starting, and the program accessing the vector registers for the 770 first time, the register's values are invalid. The kernel 771 initializes register states to zero when they are set the first 772 time in a program. This means that from the user-space programs' 773 perspective, it's the same as if the registers have always been 774 zero from the start of the program. Therefore, the debugger 775 should provide the same illusion to the user. 776 777 Note however, the case when REGS is NULL is a different case. 778 That case means we do not have access to the x87 states, so we 779 should mark the registers as unavailable (by supplying NULL). */ 780 781 switch (regclass) 782 { 783 case none: 784 break; 785 786 case avxh: 787 if ((clear_bv & I386_XSTATE_AVX)) 788 regcache_raw_supply (regcache, regnum, regs == NULL ? NULL : zero); 789 else 790 regcache_raw_supply (regcache, regnum, 791 XSAVE_AVXH_ADDR (tdep, regs, regnum)); 792 return; 793 794 case sse: 795 if ((clear_bv & I386_XSTATE_SSE)) 796 regcache_raw_supply (regcache, regnum, regs == NULL ? NULL : zero); 797 else 798 regcache_raw_supply (regcache, regnum, 799 FXSAVE_ADDR (tdep, regs, regnum)); 800 return; 801 802 case x87: 803 if ((clear_bv & I386_XSTATE_X87)) 804 regcache_raw_supply (regcache, regnum, regs == NULL ? NULL : zero); 805 else 806 regcache_raw_supply (regcache, regnum, 807 FXSAVE_ADDR (tdep, regs, regnum)); 808 return; 809 810 case all: 811 /* Handle the upper YMM registers. */ 812 if ((tdep->xcr0 & I386_XSTATE_AVX)) 813 { 814 if ((clear_bv & I386_XSTATE_AVX)) 815 { 816 for (i = I387_YMM0H_REGNUM (tdep); 817 i < I387_YMMENDH_REGNUM (tdep); 818 i++) 819 regcache_raw_supply (regcache, i, regs == NULL ? NULL : zero); 820 } 821 else 822 { 823 for (i = I387_YMM0H_REGNUM (tdep); 824 i < I387_YMMENDH_REGNUM (tdep); 825 i++) 826 regcache_raw_supply (regcache, i, 827 XSAVE_AVXH_ADDR (tdep, regs, i)); 828 } 829 } 830 831 /* Handle the XMM registers. */ 832 if ((tdep->xcr0 & I386_XSTATE_SSE)) 833 { 834 if ((clear_bv & I386_XSTATE_SSE)) 835 { 836 for (i = I387_XMM0_REGNUM (tdep); 837 i < I387_MXCSR_REGNUM (tdep); 838 i++) 839 regcache_raw_supply (regcache, i, regs == NULL ? NULL : zero); 840 } 841 else 842 { 843 for (i = I387_XMM0_REGNUM (tdep); 844 i < I387_MXCSR_REGNUM (tdep); i++) 845 regcache_raw_supply (regcache, i, 846 FXSAVE_ADDR (tdep, regs, i)); 847 } 848 } 849 850 /* Handle the x87 registers. */ 851 if ((tdep->xcr0 & I386_XSTATE_X87)) 852 { 853 if ((clear_bv & I386_XSTATE_X87)) 854 { 855 for (i = I387_ST0_REGNUM (tdep); 856 i < I387_FCTRL_REGNUM (tdep); 857 i++) 858 regcache_raw_supply (regcache, i, regs == NULL ? NULL : zero); 859 } 860 else 861 { 862 for (i = I387_ST0_REGNUM (tdep); 863 i < I387_FCTRL_REGNUM (tdep); 864 i++) 865 regcache_raw_supply (regcache, i, FXSAVE_ADDR (tdep, regs, i)); 866 } 867 } 868 break; 869 } 870 871 /* Only handle x87 control registers. */ 872 for (i = I387_FCTRL_REGNUM (tdep); i < I387_XMM0_REGNUM (tdep); i++) 873 if (regnum == -1 || regnum == i) 874 { 875 if (regs == NULL) 876 { 877 regcache_raw_supply (regcache, i, NULL); 878 continue; 879 } 880 881 /* Most of the FPU control registers occupy only 16 bits in 882 the xsave extended state. Give those a special treatment. */ 883 if (i != I387_FIOFF_REGNUM (tdep) 884 && i != I387_FOOFF_REGNUM (tdep)) 885 { 886 gdb_byte val[4]; 887 888 memcpy (val, FXSAVE_ADDR (tdep, regs, i), 2); 889 val[2] = val[3] = 0; 890 if (i == I387_FOP_REGNUM (tdep)) 891 val[1] &= ((1 << 3) - 1); 892 else if (i== I387_FTAG_REGNUM (tdep)) 893 { 894 /* The fxsave area contains a simplified version of 895 the tag word. We have to look at the actual 80-bit 896 FP data to recreate the traditional i387 tag word. */ 897 898 unsigned long ftag = 0; 899 int fpreg; 900 int top; 901 902 top = ((FXSAVE_ADDR (tdep, regs, 903 I387_FSTAT_REGNUM (tdep)))[1] >> 3); 904 top &= 0x7; 905 906 for (fpreg = 7; fpreg >= 0; fpreg--) 907 { 908 int tag; 909 910 if (val[0] & (1 << fpreg)) 911 { 912 int thisreg = (fpreg + 8 - top) % 8 913 + I387_ST0_REGNUM (tdep); 914 tag = i387_tag (FXSAVE_ADDR (tdep, regs, thisreg)); 915 } 916 else 917 tag = 3; /* Empty */ 918 919 ftag |= tag << (2 * fpreg); 920 } 921 val[0] = ftag & 0xff; 922 val[1] = (ftag >> 8) & 0xff; 923 } 924 regcache_raw_supply (regcache, i, val); 925 } 926 else 927 regcache_raw_supply (regcache, i, FXSAVE_ADDR (tdep, regs, i)); 928 } 929 930 if (regnum == I387_MXCSR_REGNUM (tdep) || regnum == -1) 931 { 932 p = regs == NULL ? NULL : FXSAVE_MXCSR_ADDR (regs); 933 regcache_raw_supply (regcache, I387_MXCSR_REGNUM (tdep), p); 934 } 935 } 936 937 /* Similar to i387_collect_fxsave, but use XSAVE extended state. */ 938 939 void 940 i387_collect_xsave (const struct regcache *regcache, int regnum, 941 void *xsave, int gcore) 942 { 943 struct gdbarch_tdep *tdep = gdbarch_tdep (get_regcache_arch (regcache)); 944 gdb_byte *regs = xsave; 945 int i; 946 enum 947 { 948 none = 0x0, 949 check = 0x1, 950 x87 = 0x2 | check, 951 sse = 0x4 | check, 952 avxh = 0x8 | check, 953 all = x87 | sse | avxh 954 } regclass; 955 956 gdb_assert (tdep->st0_regnum >= I386_ST0_REGNUM); 957 gdb_assert (tdep->num_xmm_regs > 0); 958 959 if (regnum == -1) 960 regclass = all; 961 else if (regnum >= I387_YMM0H_REGNUM (tdep) 962 && regnum < I387_YMMENDH_REGNUM (tdep)) 963 regclass = avxh; 964 else if (regnum >= I387_XMM0_REGNUM(tdep) 965 && regnum < I387_MXCSR_REGNUM (tdep)) 966 regclass = sse; 967 else if (regnum >= I387_ST0_REGNUM (tdep) 968 && regnum < I387_FCTRL_REGNUM (tdep)) 969 regclass = x87; 970 else 971 regclass = none; 972 973 if (gcore) 974 { 975 /* Clear XSAVE extended state. */ 976 memset (regs, 0, I386_XSTATE_SIZE (tdep->xcr0)); 977 978 /* Update XCR0 and `xstate_bv' with XCR0 for gcore. */ 979 if (tdep->xsave_xcr0_offset != -1) 980 memcpy (regs + tdep->xsave_xcr0_offset, &tdep->xcr0, 8); 981 memcpy (XSAVE_XSTATE_BV_ADDR (regs), &tdep->xcr0, 8); 982 } 983 984 if ((regclass & check)) 985 { 986 gdb_byte raw[I386_MAX_REGISTER_SIZE]; 987 gdb_byte *xstate_bv_p = XSAVE_XSTATE_BV_ADDR (regs); 988 unsigned int xstate_bv = 0; 989 /* The supported bits in `xstat_bv' are 1 byte. */ 990 unsigned int clear_bv = (~(*xstate_bv_p)) & tdep->xcr0; 991 gdb_byte *p; 992 993 /* Clear register set if its bit in xstat_bv is zero. */ 994 if (clear_bv) 995 { 996 if ((clear_bv & I386_XSTATE_AVX)) 997 for (i = I387_YMM0H_REGNUM (tdep); 998 i < I387_YMMENDH_REGNUM (tdep); i++) 999 memset (XSAVE_AVXH_ADDR (tdep, regs, i), 0, 16); 1000 1001 if ((clear_bv & I386_XSTATE_SSE)) 1002 for (i = I387_XMM0_REGNUM (tdep); 1003 i < I387_MXCSR_REGNUM (tdep); i++) 1004 memset (FXSAVE_ADDR (tdep, regs, i), 0, 16); 1005 1006 if ((clear_bv & I386_XSTATE_X87)) 1007 for (i = I387_ST0_REGNUM (tdep); 1008 i < I387_FCTRL_REGNUM (tdep); i++) 1009 memset (FXSAVE_ADDR (tdep, regs, i), 0, 10); 1010 } 1011 1012 if (regclass == all) 1013 { 1014 /* Check if any upper YMM registers are changed. */ 1015 if ((tdep->xcr0 & I386_XSTATE_AVX)) 1016 for (i = I387_YMM0H_REGNUM (tdep); 1017 i < I387_YMMENDH_REGNUM (tdep); i++) 1018 { 1019 regcache_raw_collect (regcache, i, raw); 1020 p = XSAVE_AVXH_ADDR (tdep, regs, i); 1021 if (memcmp (raw, p, 16)) 1022 { 1023 xstate_bv |= I386_XSTATE_AVX; 1024 memcpy (p, raw, 16); 1025 } 1026 } 1027 1028 /* Check if any SSE registers are changed. */ 1029 if ((tdep->xcr0 & I386_XSTATE_SSE)) 1030 for (i = I387_XMM0_REGNUM (tdep); 1031 i < I387_MXCSR_REGNUM (tdep); i++) 1032 { 1033 regcache_raw_collect (regcache, i, raw); 1034 p = FXSAVE_ADDR (tdep, regs, i); 1035 if (memcmp (raw, p, 16)) 1036 { 1037 xstate_bv |= I386_XSTATE_SSE; 1038 memcpy (p, raw, 16); 1039 } 1040 } 1041 1042 /* Check if any X87 registers are changed. */ 1043 if ((tdep->xcr0 & I386_XSTATE_X87)) 1044 for (i = I387_ST0_REGNUM (tdep); 1045 i < I387_FCTRL_REGNUM (tdep); i++) 1046 { 1047 regcache_raw_collect (regcache, i, raw); 1048 p = FXSAVE_ADDR (tdep, regs, i); 1049 if (memcmp (raw, p, 10)) 1050 { 1051 xstate_bv |= I386_XSTATE_X87; 1052 memcpy (p, raw, 10); 1053 } 1054 } 1055 } 1056 else 1057 { 1058 /* Check if REGNUM is changed. */ 1059 regcache_raw_collect (regcache, regnum, raw); 1060 1061 switch (regclass) 1062 { 1063 default: 1064 internal_error (__FILE__, __LINE__, 1065 _("invalid i387 regclass")); 1066 1067 case avxh: 1068 /* This is an upper YMM register. */ 1069 p = XSAVE_AVXH_ADDR (tdep, regs, regnum); 1070 if (memcmp (raw, p, 16)) 1071 { 1072 xstate_bv |= I386_XSTATE_AVX; 1073 memcpy (p, raw, 16); 1074 } 1075 break; 1076 1077 case sse: 1078 /* This is an SSE register. */ 1079 p = FXSAVE_ADDR (tdep, regs, regnum); 1080 if (memcmp (raw, p, 16)) 1081 { 1082 xstate_bv |= I386_XSTATE_SSE; 1083 memcpy (p, raw, 16); 1084 } 1085 break; 1086 1087 case x87: 1088 /* This is an x87 register. */ 1089 p = FXSAVE_ADDR (tdep, regs, regnum); 1090 if (memcmp (raw, p, 10)) 1091 { 1092 xstate_bv |= I386_XSTATE_X87; 1093 memcpy (p, raw, 10); 1094 } 1095 break; 1096 } 1097 } 1098 1099 /* Update the corresponding bits in `xstate_bv' if any SSE/AVX 1100 registers are changed. */ 1101 if (xstate_bv) 1102 { 1103 /* The supported bits in `xstat_bv' are 1 byte. */ 1104 *xstate_bv_p |= (gdb_byte) xstate_bv; 1105 1106 switch (regclass) 1107 { 1108 default: 1109 internal_error (__FILE__, __LINE__, 1110 _("invalid i387 regclass")); 1111 1112 case all: 1113 break; 1114 1115 case x87: 1116 case sse: 1117 case avxh: 1118 /* Register REGNUM has been updated. Return. */ 1119 return; 1120 } 1121 } 1122 else 1123 { 1124 /* Return if REGNUM isn't changed. */ 1125 if (regclass != all) 1126 return; 1127 } 1128 } 1129 1130 /* Only handle x87 control registers. */ 1131 for (i = I387_FCTRL_REGNUM (tdep); i < I387_XMM0_REGNUM (tdep); i++) 1132 if (regnum == -1 || regnum == i) 1133 { 1134 /* Most of the FPU control registers occupy only 16 bits in 1135 the xsave extended state. Give those a special treatment. */ 1136 if (i != I387_FIOFF_REGNUM (tdep) 1137 && i != I387_FOOFF_REGNUM (tdep)) 1138 { 1139 gdb_byte buf[4]; 1140 1141 regcache_raw_collect (regcache, i, buf); 1142 1143 if (i == I387_FOP_REGNUM (tdep)) 1144 { 1145 /* The opcode occupies only 11 bits. Make sure we 1146 don't touch the other bits. */ 1147 buf[1] &= ((1 << 3) - 1); 1148 buf[1] |= ((FXSAVE_ADDR (tdep, regs, i))[1] & ~((1 << 3) - 1)); 1149 } 1150 else if (i == I387_FTAG_REGNUM (tdep)) 1151 { 1152 /* Converting back is much easier. */ 1153 1154 unsigned short ftag; 1155 int fpreg; 1156 1157 ftag = (buf[1] << 8) | buf[0]; 1158 buf[0] = 0; 1159 buf[1] = 0; 1160 1161 for (fpreg = 7; fpreg >= 0; fpreg--) 1162 { 1163 int tag = (ftag >> (fpreg * 2)) & 3; 1164 1165 if (tag != 3) 1166 buf[0] |= (1 << fpreg); 1167 } 1168 } 1169 memcpy (FXSAVE_ADDR (tdep, regs, i), buf, 2); 1170 } 1171 else 1172 regcache_raw_collect (regcache, i, FXSAVE_ADDR (tdep, regs, i)); 1173 } 1174 1175 if (regnum == I387_MXCSR_REGNUM (tdep) || regnum == -1) 1176 regcache_raw_collect (regcache, I387_MXCSR_REGNUM (tdep), 1177 FXSAVE_MXCSR_ADDR (regs)); 1178 } 1179 1180 /* Recreate the FTW (tag word) valid bits from the 80-bit FP data in 1181 *RAW. */ 1182 1183 static int 1184 i387_tag (const gdb_byte *raw) 1185 { 1186 int integer; 1187 unsigned int exponent; 1188 unsigned long fraction[2]; 1189 1190 integer = raw[7] & 0x80; 1191 exponent = (((raw[9] & 0x7f) << 8) | raw[8]); 1192 fraction[0] = ((raw[3] << 24) | (raw[2] << 16) | (raw[1] << 8) | raw[0]); 1193 fraction[1] = (((raw[7] & 0x7f) << 24) | (raw[6] << 16) 1194 | (raw[5] << 8) | raw[4]); 1195 1196 if (exponent == 0x7fff) 1197 { 1198 /* Special. */ 1199 return (2); 1200 } 1201 else if (exponent == 0x0000) 1202 { 1203 if (fraction[0] == 0x0000 && fraction[1] == 0x0000 && !integer) 1204 { 1205 /* Zero. */ 1206 return (1); 1207 } 1208 else 1209 { 1210 /* Special. */ 1211 return (2); 1212 } 1213 } 1214 else 1215 { 1216 if (integer) 1217 { 1218 /* Valid. */ 1219 return (0); 1220 } 1221 else 1222 { 1223 /* Special. */ 1224 return (2); 1225 } 1226 } 1227 } 1228 1229 /* Prepare the FPU stack in REGCACHE for a function return. */ 1230 1231 void 1232 i387_return_value (struct gdbarch *gdbarch, struct regcache *regcache) 1233 { 1234 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); 1235 ULONGEST fstat; 1236 1237 /* Set the top of the floating-point register stack to 7. The 1238 actual value doesn't really matter, but 7 is what a normal 1239 function return would end up with if the program started out with 1240 a freshly initialized FPU. */ 1241 regcache_raw_read_unsigned (regcache, I387_FSTAT_REGNUM (tdep), &fstat); 1242 fstat |= (7 << 11); 1243 regcache_raw_write_unsigned (regcache, I387_FSTAT_REGNUM (tdep), fstat); 1244 1245 /* Mark %st(1) through %st(7) as empty. Since we set the top of the 1246 floating-point register stack to 7, the appropriate value for the 1247 tag word is 0x3fff. */ 1248 regcache_raw_write_unsigned (regcache, I387_FTAG_REGNUM (tdep), 0x3fff); 1249 1250 } 1251