1 /* Ravenscar SPARC target support. 2 3 Copyright (C) 2004-2013 Free Software Foundation, Inc. 4 5 This file is part of GDB. 6 7 This program is free software; you can redistribute it and/or modify 8 it under the terms of the GNU General Public License as published by 9 the Free Software Foundation; either version 3 of the License, or 10 (at your option) any later version. 11 12 This program is distributed in the hope that it will be useful, 13 but WITHOUT ANY WARRANTY; without even the implied warranty of 14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 GNU General Public License for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with this program. If not, see <http://www.gnu.org/licenses/>. */ 19 20 #include "defs.h" 21 #include "gdbcore.h" 22 #include "regcache.h" 23 #include "sparc-tdep.h" 24 #include "inferior.h" 25 #include "ravenscar-thread.h" 26 #include "sparc-ravenscar-thread.h" 27 28 static void sparc_ravenscar_fetch_registers (struct regcache *regcache, 29 int regnum); 30 static void sparc_ravenscar_store_registers (struct regcache *regcache, 31 int regnum); 32 static void sparc_ravenscar_prepare_to_store (struct regcache *regcache); 33 34 /* Register offsets from a referenced address (exempli gratia the 35 Thread_Descriptor). The referenced address depends on the register 36 number. The Thread_Descriptor layout and the stack layout are documented 37 in the GNAT sources, in sparc-bb.h. */ 38 39 static const int sparc_register_offsets[] = 40 { 41 /* G0 - G7 */ 42 -1, 0x24, 0x28, 0x2C, 0x30, 0x34, 0x38, 0x3C, 43 /* O0 - O7 */ 44 0x00, 0x04, 0x08, 0x0C, 0x10, 0x14, 0x18, 0x1C, 45 /* L0 - L7 */ 46 0x00, 0x04, 0x08, 0x0C, 0x10, 0x14, 0x18, 0x1C, 47 /* I0 - I7 */ 48 0x20, 0x24, 0x28, 0x2C, 0x30, 0x34, 0x38, 0x3C, 49 /* F0 - F31 */ 50 0x50, 0x54, 0x58, 0x5C, 0x60, 0x64, 0x68, 0x6C, 51 0x70, 0x74, 0x78, 0x7C, 0x80, 0x84, 0x88, 0x8C, 52 0x90, 0x94, 0x99, 0x9C, 0xA0, 0xA4, 0xA8, 0xAC, 53 0xB0, 0xB4, 0xBB, 0xBC, 0xC0, 0xC4, 0xC8, 0xCC, 54 /* Y PSR WIM TBR PC NPC FPSR CPSR */ 55 0x40, 0x20, 0x44, -1, 0x1C, -1, 0x4C, -1 56 }; 57 58 /* supply register REGNUM, which has been saved on REGISTER_ADDR, to the 59 regcache. */ 60 61 static void 62 supply_register_at_address (struct regcache *regcache, int regnum, 63 CORE_ADDR register_addr) 64 { 65 struct gdbarch *gdbarch = get_regcache_arch (regcache); 66 int buf_size = register_size (gdbarch, regnum); 67 char *buf; 68 69 buf = (char *) alloca (buf_size); 70 read_memory (register_addr, buf, buf_size); 71 regcache_raw_supply (regcache, regnum, buf); 72 } 73 74 /* Return true if, for a non-running thread, REGNUM has been saved on the 75 stack. */ 76 77 static int 78 register_on_stack_p (int regnum) 79 { 80 return (regnum >= SPARC_L0_REGNUM && regnum <= SPARC_L7_REGNUM) 81 || (regnum >= SPARC_I0_REGNUM && regnum <= SPARC_I7_REGNUM); 82 } 83 84 /* Return true if, for a non-running thread, REGNUM has been saved on the 85 Thread_Descriptor. */ 86 87 static int 88 register_in_thread_descriptor_p (int regnum) 89 { 90 return (regnum >= SPARC_O0_REGNUM && regnum <= SPARC_O7_REGNUM) 91 || (regnum == SPARC32_PSR_REGNUM) 92 || (regnum >= SPARC_G1_REGNUM && regnum <= SPARC_G7_REGNUM) 93 || (regnum == SPARC32_Y_REGNUM) 94 || (regnum == SPARC32_WIM_REGNUM) 95 || (regnum == SPARC32_FSR_REGNUM) 96 || (regnum >= SPARC_F0_REGNUM && regnum <= SPARC_F0_REGNUM + 31) 97 || (regnum == SPARC32_PC_REGNUM); 98 } 99 100 /* to_fetch_registers when inferior_ptid is different from the running 101 thread. */ 102 103 static void 104 sparc_ravenscar_fetch_registers (struct regcache *regcache, int regnum) 105 { 106 struct gdbarch *gdbarch = get_regcache_arch (regcache); 107 const int sp_regnum = gdbarch_sp_regnum (gdbarch); 108 const int num_regs = gdbarch_num_regs (gdbarch); 109 int current_regnum; 110 CORE_ADDR current_address; 111 CORE_ADDR thread_descriptor_address; 112 ULONGEST stack_address; 113 114 /* The tid is the thread_id field, which is a pointer to the thread. */ 115 thread_descriptor_address = (CORE_ADDR) ptid_get_tid (inferior_ptid); 116 117 /* Read the saved SP in the context buffer. */ 118 current_address = thread_descriptor_address 119 + sparc_register_offsets [sp_regnum]; 120 supply_register_at_address (regcache, sp_regnum, current_address); 121 regcache_cooked_read_unsigned (regcache, sp_regnum, &stack_address); 122 123 /* Read registers. */ 124 for (current_regnum = 0; current_regnum < num_regs; current_regnum ++) 125 { 126 if (register_in_thread_descriptor_p (current_regnum)) 127 { 128 current_address = thread_descriptor_address 129 + sparc_register_offsets [current_regnum]; 130 supply_register_at_address (regcache, current_regnum, 131 current_address); 132 } 133 else if (register_on_stack_p (current_regnum)) 134 { 135 current_address = stack_address 136 + sparc_register_offsets [current_regnum]; 137 supply_register_at_address (regcache, current_regnum, 138 current_address); 139 } 140 } 141 } 142 143 /* to_prepare_to_store when inferior_ptid is different from the running 144 thread. */ 145 146 static void 147 sparc_ravenscar_prepare_to_store (struct regcache *regcache) 148 { 149 /* Nothing to do. */ 150 } 151 152 /* to_store_registers when inferior_ptid is different from the running 153 thread. */ 154 155 static void 156 sparc_ravenscar_store_registers (struct regcache *regcache, int regnum) 157 { 158 struct gdbarch *gdbarch = get_regcache_arch (regcache); 159 int buf_size = register_size (gdbarch, regnum); 160 char buf [buf_size]; 161 ULONGEST register_address; 162 163 if (register_in_thread_descriptor_p (regnum)) 164 register_address = 165 ptid_get_tid (inferior_ptid) + sparc_register_offsets [regnum]; 166 else if (register_on_stack_p (regnum)) 167 { 168 regcache_cooked_read_unsigned (regcache, SPARC_SP_REGNUM, 169 ®ister_address); 170 register_address += sparc_register_offsets [regnum]; 171 } 172 else 173 return; 174 175 regcache_raw_collect (regcache, regnum, buf); 176 write_memory (register_address, 177 buf, 178 buf_size); 179 } 180 181 static struct ravenscar_arch_ops sparc_ravenscar_ops = 182 { 183 sparc_ravenscar_fetch_registers, 184 sparc_ravenscar_store_registers, 185 sparc_ravenscar_prepare_to_store 186 }; 187 188 /* Register ravenscar_arch_ops in GDBARCH. */ 189 190 void 191 register_sparc_ravenscar_ops (struct gdbarch *gdbarch) 192 { 193 set_gdbarch_ravenscar_ops (gdbarch, &sparc_ravenscar_ops); 194 } 195