1 /*	$OpenBSD: fenv.c,v 1.4 2014/04/18 15:09:52 guenther Exp $	*/
2 /*	$NetBSD: fenv.c,v 1.1 2010/07/31 21:47:53 joerg Exp $	*/
3 
4 /*-
5  * Copyright (c) 2004-2005 David Schultz <das (at) FreeBSD.ORG>
6  * All rights reserved.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  *
17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27  * SUCH DAMAGE.
28  */
29 
30 #include <fenv.h>
31 #include <machine/npx.h>
32 
33 /*
34  * The following constant represents the default floating-point environment
35  * (that is, the one installed at program startup) and has type pointer to
36  * const-qualified fenv_t.
37  *
38  * It can be used as an argument to the functions within the <fenv.h> header
39  * that manage the floating-point environment, namely fesetenv() and
40  * feupdateenv().
41  *
42  * x87 fpu registers are 16bit wide. The upper bits, 31-16, are marked as
43  * RESERVED.
44  */
45 fenv_t __fe_dfl_env = {
46 	{
47 		0xffff0000 | __INITIAL_FPUCW__,	/* Control word register */
48 		0xffff0000,			/* Status word register */
49 		0xffffffff,			/* Tag word register */
50 		{
51 			0x00000000,
52 			0x00000000,
53 			0x00000000,
54 			0xffff0000
55 		}
56 	},
57 	__INITIAL_MXCSR__			/* MXCSR register */
58 };
59 
60 
61 /*
62  * The feclearexcept() function clears the supported floating-point exceptions
63  * represented by `excepts'.
64  */
65 int
66 feclearexcept(int excepts)
67 {
68 	fenv_t fenv;
69 	unsigned int mxcsr;
70 
71 	excepts &= FE_ALL_EXCEPT;
72 
73 	/* Store the current x87 floating-point environment */
74 	__asm__ volatile ("fnstenv %0" : "=m" (fenv));
75 
76 	/* Clear the requested floating-point exceptions */
77 	fenv.__x87.__status &= ~excepts;
78 
79 	/* Load the x87 floating-point environent */
80 	__asm__ volatile ("fldenv %0" : : "m" (fenv));
81 
82 	/* Same for SSE environment */
83 	__asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
84 	mxcsr &= ~excepts;
85 	__asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr));
86 
87 	return (0);
88 }
89 
90 /*
91  * The fegetexceptflag() function stores an implementation-defined
92  * representation of the states of the floating-point status flags indicated by
93  * the argument excepts in the object pointed to by the argument flagp.
94  */
95 int
96 fegetexceptflag(fexcept_t *flagp, int excepts)
97 {
98 	unsigned short status;
99 	unsigned int mxcsr;
100 
101 	excepts &= FE_ALL_EXCEPT;
102 
103 	/* Store the current x87 status register */
104 	__asm__ volatile ("fnstsw %0" : "=am" (status));
105 
106 	/* Store the MXCSR register */
107 	__asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
108 
109 	/* Store the results in flagp */
110 	*flagp = (status | mxcsr) & excepts;
111 
112 	return (0);
113 }
114 
115 /*
116  * The feraiseexcept() function raises the supported floating-point exceptions
117  * represented by the argument `excepts'.
118  *
119  * The standard explicitly allows us to execute an instruction that has the
120  * exception as a side effect, but we choose to manipulate the status register
121  * directly.
122  *
123  * The validation of input is being deferred to fesetexceptflag().
124  */
125 int
126 feraiseexcept(int excepts)
127 {
128 	excepts &= FE_ALL_EXCEPT;
129 
130 	fesetexceptflag((fexcept_t *)&excepts, excepts);
131 	__asm__ volatile ("fwait");
132 
133 	return (0);
134 }
135 
136 /*
137  * This function sets the floating-point status flags indicated by the argument
138  * `excepts' to the states stored in the object pointed to by `flagp'. It does
139  * NOT raise any floating-point exceptions, but only sets the state of the flags.
140  */
141 int
142 fesetexceptflag(const fexcept_t *flagp, int excepts)
143 {
144 	fenv_t fenv;
145 	unsigned int mxcsr;
146 
147 	excepts &= FE_ALL_EXCEPT;
148 
149 	/* Store the current x87 floating-point environment */
150 	__asm__ volatile ("fnstenv %0" : "=m" (fenv));
151 
152 	/* Set the requested status flags */
153 	fenv.__x87.__status &= ~excepts;
154 	fenv.__x87.__status |= *flagp & excepts;
155 
156 	/* Load the x87 floating-point environent */
157 	__asm__ volatile ("fldenv %0" : : "m" (fenv));
158 
159 	/* Same for SSE environment */
160 	__asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
161 	mxcsr &= ~excepts;
162 	mxcsr |= *flagp & excepts;
163 	__asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr));
164 
165 	return (0);
166 }
167 
168 /*
169  * The fetestexcept() function determines which of a specified subset of the
170  * floating-point exception flags are currently set. The `excepts' argument
171  * specifies the floating-point status flags to be queried.
172  */
173 int
174 fetestexcept(int excepts)
175 {
176 	unsigned short status;
177 	unsigned int mxcsr;
178 
179 	excepts &= FE_ALL_EXCEPT;
180 
181 	/* Store the current x87 status register */
182 	__asm__ volatile ("fnstsw %0" : "=am" (status));
183 
184 	/* Store the MXCSR register state */
185 	__asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
186 
187 	return ((status | mxcsr) & excepts);
188 }
189 
190 /*
191  * The fegetround() function gets the current rounding direction.
192  */
193 int
194 fegetround(void)
195 {
196 	unsigned short control;
197 
198 	/*
199 	 * We assume that the x87 and the SSE unit agree on the
200 	 * rounding mode.  Reading the control word on the x87 turns
201 	 * out to be about 5 times faster than reading it on the SSE
202 	 * unit on an Opteron 244.
203 	 */
204 	__asm__ volatile ("fnstcw %0" : "=m" (control));
205 
206 	return (control & _X87_ROUND_MASK);
207 }
208 
209 /*
210  * The fesetround() function establishes the rounding direction represented by
211  * its argument `round'. If the argument is not equal to the value of a rounding
212  * direction macro, the rounding direction is not changed.
213  */
214 int
215 fesetround(int round)
216 {
217 	unsigned short control;
218 	unsigned int mxcsr;
219 
220 	/* Check whether requested rounding direction is supported */
221 	if (round & ~_X87_ROUND_MASK)
222 		return (-1);
223 
224 	/* Store the current x87 control word register */
225 	__asm__ volatile ("fnstcw %0" : "=m" (control));
226 
227 	/* Set the rounding direction */
228 	control &= ~_X87_ROUND_MASK;
229 	control |= round;
230 
231 	/* Load the x87 control word register */
232 	__asm__ volatile ("fldcw %0" : : "m" (control));
233 
234 	/* Same for the SSE environment */
235 	__asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
236 	mxcsr &= ~(_X87_ROUND_MASK << _SSE_ROUND_SHIFT);
237 	mxcsr |= round << _SSE_ROUND_SHIFT;
238 	__asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr));
239 
240 	return (0);
241 }
242 
243 /*
244  * The fegetenv() function attempts to store the current floating-point
245  * environment in the object pointed to by envp.
246  */
247 int
248 fegetenv(fenv_t *envp)
249 {
250 	/* Store the current x87 floating-point environment */
251 	__asm__ volatile ("fnstenv %0" : "=m" (*envp));
252 
253 	/* Store the MXCSR register state */
254 	__asm__ volatile ("stmxcsr %0" : "=m" (envp->__mxcsr));
255 
256 	/*
257 	 * When an FNSTENV instruction is executed, all pending exceptions are
258 	 * essentially lost (either the x87 FPU status register is cleared or
259 	 * all exceptions are masked).
260 	 *
261 	 * 8.6 X87 FPU EXCEPTION SYNCHRONIZATION -
262 	 * Intel(R) 64 and IA-32 Architectures Softare Developer's Manual - Vol1
263 	 */
264 	__asm__ volatile ("fldcw %0" : : "m" (envp->__x87.__control));
265 
266 	return (0);
267 }
268 
269 /*
270  * The feholdexcept() function saves the current floating-point environment
271  * in the object pointed to by envp, clears the floating-point status flags, and
272  * then installs a non-stop (continue on floating-point exceptions) mode, if
273  * available, for all floating-point exceptions.
274  */
275 int
276 feholdexcept(fenv_t *envp)
277 {
278 	unsigned int mxcsr;
279 
280 	/* Store the current x87 floating-point environment */
281 	__asm__ volatile ("fnstenv %0" : "=m" (*envp));
282 
283 	/* Clear all exception flags in FPU */
284 	__asm__ volatile ("fnclex");
285 
286 	/* Store the MXCSR register state */
287 	__asm__ volatile ("stmxcsr %0" : "=m" (envp->__mxcsr));
288 
289 	/* Clear exception flags in MXCSR */
290 	mxcsr = envp->__mxcsr;
291 	mxcsr &= ~FE_ALL_EXCEPT;
292 
293 	/* Mask all exceptions */
294 	mxcsr |= FE_ALL_EXCEPT << _SSE_MASK_SHIFT;
295 
296 	/* Store the MXCSR register */
297 	__asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr));
298 
299 	return (0);
300 }
301 
302 /*
303  * The fesetenv() function attempts to establish the floating-point environment
304  * represented by the object pointed to by envp. The argument `envp' points
305  * to an object set by a call to fegetenv() or feholdexcept(), or equal a
306  * floating-point environment macro. The fesetenv() function does not raise
307  * floating-point exceptions, but only installs the state of the floating-point
308  * status flags represented through its argument.
309  */
310 int
311 fesetenv(const fenv_t *envp)
312 {
313 	/* Load the x87 floating-point environent */
314 	__asm__ volatile ("fldenv %0" : : "m" (*envp));
315 
316 	/* Store the MXCSR register */
317 	__asm__ volatile ("ldmxcsr %0" : : "m" (envp->__mxcsr));
318 
319 	return (0);
320 }
321 
322 /*
323  * The feupdateenv() function saves the currently raised floating-point
324  * exceptions in its automatic storage, installs the floating-point environment
325  * represented by the object pointed to by `envp', and then raises the saved
326  * floating-point exceptions. The argument `envp' shall point to an object set
327  * by a call to feholdexcept() or fegetenv(), or equal a floating-point
328  * environment macro.
329  */
330 int
331 feupdateenv(const fenv_t *envp)
332 {
333 	unsigned short status;
334 	unsigned int mxcsr;
335 
336 	/* Store the x87 status register */
337 	__asm__ volatile ("fnstsw %0" : "=am" (status));
338 
339 	/* Store the MXCSR register */
340 	__asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
341 
342 	/* Install new floating-point environment */
343 	fesetenv(envp);
344 
345 	/* Raise any previously accumulated exceptions */
346 	feraiseexcept(status | mxcsr);
347 
348 	return (0);
349 }
350 
351 /*
352  * The following functions are extentions to the standard
353  */
354 int
355 feenableexcept(int mask)
356 {
357 	unsigned int mxcsr, omask;
358 	unsigned short control;
359 
360 	mask &= FE_ALL_EXCEPT;
361 
362 	__asm__ volatile ("fnstcw %0" : "=m" (control));
363 	__asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
364 
365 	omask = ~(control | (mxcsr >> _SSE_MASK_SHIFT)) & FE_ALL_EXCEPT;
366 	control &= ~mask;
367 	__asm__ volatile ("fldcw %0" : : "m" (control));
368 
369 	mxcsr &= ~(mask << _SSE_MASK_SHIFT);
370 	__asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr));
371 
372 	return (omask);
373 }
374 
375 int
376 fedisableexcept(int mask)
377 {
378 	unsigned int mxcsr, omask;
379 	unsigned short control;
380 
381 	mask &= FE_ALL_EXCEPT;
382 
383 	__asm__ volatile ("fnstcw %0" : "=m" (control));
384 	__asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
385 
386 	omask = ~(control | (mxcsr >> _SSE_MASK_SHIFT)) & FE_ALL_EXCEPT;
387 	control |= mask;
388 	__asm__ volatile ("fldcw %0" : : "m" (control));
389 
390 	mxcsr |= mask << _SSE_MASK_SHIFT;
391 	__asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr));
392 
393 	return (omask);
394 }
395 
396 int
397 fegetexcept(void)
398 {
399 	unsigned short control;
400 
401 	/*
402 	 * We assume that the masks for the x87 and the SSE unit are
403 	 * the same.
404 	 */
405 	__asm__ volatile ("fnstcw %0" : "=m" (control));
406 
407 	return (~control & FE_ALL_EXCEPT);
408 }
409