1.\" 2.\" Copyright (c) 2012 The DragonFly Project. All rights reserved. 3.\" 4.\" Redistribution and use in source and binary forms, with or without 5.\" modification, are permitted provided that the following conditions 6.\" are met: 7.\" 8.\" 1. Redistributions of source code must retain the above copyright 9.\" notice, this list of conditions and the following disclaimer. 10.\" 2. Redistributions in binary form must reproduce the above copyright 11.\" notice, this list of conditions and the following disclaimer in 12.\" the documentation and/or other materials provided with the 13.\" distribution. 14.\" 3. Neither the name of The DragonFly Project nor the names of its 15.\" contributors may be used to endorse or promote products derived 16.\" from this software without specific, prior written permission. 17.\" 18.\" THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 19.\" ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 20.\" LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 21.\" FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 22.\" COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 23.\" INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING, 24.\" BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 25.\" LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 26.\" AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 27.\" OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 28.\" OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29.\" SUCH DAMAGE. 30.\" 31.Dd June 16, 2013 32.Dt BNX 4 33.Os 34.Sh NAME 35.Nm bnx 36.Nd "Broadcom BCM57785/BCM5718 families 10/100/Gigabit Ethernet device" 37.Sh SYNOPSIS 38.Cd "device miibus" 39.Cd "device bnx" 40.Pp 41Alternatively, to load the driver as a module at boot time, place the 42following line in 43.Pa /boot/loader.conf : 44.Bd -literal -offset indent 45if_bnx_load="YES" 46.Ed 47.Sh DESCRIPTION 48The 49.Nm 50driver supports the PCIe Ethernet adapters based on 51Broadcom BCM57785/BCM5718 families chips. 52.Pp 53The following features are supported in the 54.Nm 55driver: 56.Pp 57.Bl -item -offset indent -compact 58.It 59IP/TCP/UDP checksum offloading 60.It 61TCP segmentation offloading (TSO) 62.It 63VLAN tag stripping and inserting 64.It 65Interrupt coalescing 66.It 67Receive Side Scaling (RSS), 68up to 4 reception queues 69.It 70Multiple vector MSI-X 71.It 72Multiple transmission queues 73(BCM5719 and BCM5720 only), 74up to 4 transmission queues 75.El 76.Pp 77By default, 78the 79.Nm 80driver will try enabling as many reception queues as are allowed 81by the number of CPUs in the system. 82For BCM5719 and BCM5720, 83in addition to the reception queues, 84by default, 85the 86.Nm 87driver will try enabling as many transmission queues as are allowed 88by the number of CPUs in the system 89and the number of enabled reception queues. 90.Pp 91The 92.Nm 93driver supports the following 94.Ar media 95types: 96.Pp 97.Bl -tag -width 10baseT/UTP -compact 98.It Cm autoselect 99Enable autoselection of the media types and options 100.Pp 101.It Cm 10baseT/UTP 102Set 10Mbps operation. 103The 104.Ar mediaopt 105option can also be used to select either 106.Ar full-duplex 107or 108.Ar half-duplex 109modes. 110.Pp 111.It Cm 100baseTX 112Set 100Mbps (Fast Ethernet) operation. 113The 114.Ar mediaopt 115option can also be used to select either 116.Ar full-duplex 117or 118.Ar half-duplex 119modes. 120.Pp 121.It Cm 1000baseT 122Set 1000Mbps (Gigabit Ethernet) operation. 123The 124.Ar mediaopt 125option can only be set 126.Ar full-duplex 127mode. 128.El 129.Pp 130The 131.Nm 132driver supports the following 133.Ar media 134options: 135.Pp 136.Bl -tag -width full-duplex -compact 137.It Cm full-duplex 138Force full duplex operation. 139.Pp 140.It Cm half-duplex 141Force half duplex operation. 142.El 143.Pp 144Note that the 1000baseT media type is only available 145if it is supported by the adapter. 146For more information on configuring this device, 147see 148.Xr ifconfig 8 . 149The 150.Nm 151driver supports 152.Xr polling 4 . 153.Sh TUNABLES 154.Em X 155is the device unit number. 156.Bl -tag -width ".Va hw.bnxX.npoll.offset" 157.It Va hw.bnx.rx_rings Va hw.bnxX.rx_rings 158If MSI-X is used, 159this tunable specifies the number of reception queues to be enabled. 160Maximum allowed value for these tunables is 4 and 161it must be power of 2 aligned. 162Setting these tunables to 0 allows the driver to enable as many reception queues 163as allowed by the number of CPUs. 164.It Va hw.bnx.tx_rings Va hw.bnxX.tx_rings 165For BCM5719 and BCM5720, 166if MSI-X is used, 167this tunable specifies the number of transmission queues to be enabled. 168Maximum allowed value for these tunables is 4, 169it must be power of 2 aligned 170and it must be less than or equal to the number of reception queues enabled. 171Setting these tunables to 0 allows the driver to enable as many transmission queues 172as allowed by the number of CPUs and number reception queues enabled. 173.It Va hw.bnx.msix.enable Va hw.bnxX.msix.enable 174By default, 175the driver will use MSI-X 176if it is supported. 177This behaviour can be turned off by setting this tunable to 0. 178.It Va hw.bnxX.msix.offset 179For BCM5719 and BCM5720, 180if more than 1 reception queues 181and more than 1 transmission queues are enabled, 182this tunable specifies the leading target CPU for transmission 183and reception queues processing. 184The value specificed must be aligned to the number of reception queues 185enabled and must be less than the power of 2 number of CPUs. 186.It Va hw.bnxX.msix.txoff 187If more than 1 reception queues are enabled 188and only 1 transmission queue is enabled, 189this tunable specifies the target CPU for transmission queue processing. 190The value specificed must be less than the power of 2 number of CPUs. 191.It Va hw.bnxX.msix.rxoff 192If more than 1 reception queues are enabled 193and only 1 transmission queue is enabled, 194this tunable specifies the leading target CPU for reception queues processing. 195The value specificed must be aligned to the number of reception queues 196enabled and must be less than the power of 2 number of CPUs. 197.It Va hw.bnx.msi.enable Va hw.bnxX.msi.enable 198If MSI-X is disabled and MSI is supported, 199the driver will use MSI. 200This behavior can be turned off by setting this tunable to 0. 201.It Va hw.bnxX.msi.cpu 202If MSI is used, it specifies the MSI's target CPU. 203.It Va hw.bnxX.npoll.offset 204If only 1 reception queue and only 1 transmission queue are enabled 205or more than 1 reception queues and more than 1 transmission queues are enabled, 206this tunable specifies the leading target CPU for transmission and reception 207queues 208.Xr polling 4 209processing. 210The value specificed must be aligned to the number of reception queues 211enabled and must be less than the power of 2 number of CPUs. 212.It Va hw.bnxX.npoll.txoff 213If more than 1 reception queues are enabled 214and only 1 transmission queue is enabled, 215this tunable specifies the target CPU for transmission queue 216.Xr polling 4 217processing. 218The value specificed must be less than the power of 2 number of CPUs. 219.It Va hw.bnxX.npoll.rxoff 220If more than 1 reception queues are enabled 221and only 1 transmission queue is enabled, 222this tunable specifies the leading target CPU for reception queue 223.Xr polling 4 224processing. 225The value specificed must be aligned to the number of reception queues 226enabled and must be less than the power of 2 number of CPUs. 227.El 228.Sh MIB Variables 229A number of per-interface variables are implemented in the 230.Va hw.bnx Ns Em X 231branch of the 232.Xr sysctl 3 233MIB. 234.Bl -tag -width "rx_coal_bds_poll" 235.It Va rx_rings 236Number of reception queues enabled (read-only). 237Use the tunable 238.Va hw.bnx.rx_rings 239or 240.Va hw.bnxX.rx_rings 241to configure it. 242.It Va tx_rings 243Number of transmission queues enabled (read-only). 244Use the tunable 245.Va hw.bnx.tx_rings 246or 247.Va hw.bnxX.tx_rings 248to configure it. 249.It Va rx_coal_ticks 250How often status block should be updated and interrupt should be generated 251by the device, 252due to receiving packets. 253It is used together with 254.Va rx_coal_bds 255to achieve RX interrupt moderation. 256Default value is 150 (microseconds). 257.It Va tx_coal_ticks 258How often status block should be updated and interrupt should be generated 259by the device, 260due to sending packets. 261It is used together with 262.Va tx_coal_bds 263to achieve TX interrupt moderation. 264Default value is 1023 (microseconds). 265.It Va rx_coal_bds 266Maximum number of BDs which must be received by the device 267before the device updates the status block and generates interrupt. 268It is used together with 269.Va rx_coal_ticks 270to achieve RX interrupt moderation. 271Default value is 0 (disabled). 272.It Va rx_coal_bds_poll 273Maximum number of BDs which must be received by the device 274before the device updates the status block during 275.Xr polling 4 . 276It is used together with 277.Va rx_coal_ticks 278to reduce the frequency of status block updating due to RX. 279Default value is 32. 280.It Va tx_coal_bds 281Maximum number of sending BDs which must be processed by the device 282before the device updates the status block and generates interrupt. 283It is used together with 284.Va tx_coal_ticks 285to achieve TX interrupt moderation. 286Default value is 128. 287.It Va tx_coal_bds_poll 288Maximum number of sending BDs which must be processed by the device 289before the device updates the status block during 290.Xr polling 4 . 291It is used together with 292.Va tx_coal_ticks 293to reduce the frequency of status block updating due to TX. 294Default value is 64. 295.It Va force_defrag 296Force defragment the sending mbuf chains, 297if the mbuf chain is not a TSO segment and contains more than 1 mbufs. 298This improves transmission performance on certain low end chips, 299however, 300this also increases CPU load. 301Default value is 0 (disabled). 302.It Va tx_wreg 303The number of transmission descriptors should be setup before the hardware 304register is written. 305Setting this value too high will have negative effect 306on transmission timeliness. 307Setting this value too low will hurt overall transmission performance 308due to the frequent hardware register writing. 309Default value is 8. 310.It Va std_refill 311Number of packets should be received 312before the standard reception producer ring is refilled. 313Setting this value too low will cause extra thread scheduling cost. 314Setting this value too high will make chip drop incoming packets. 315Default value is 128 / number of reception queues. 316.It Va rx_coal_bds_int 317Maximum number of BDs which must be received by the device 318before the device updates the status block 319during host interrupt processing. 320Default value is 80. 321.It Va tx_coal_bds_int 322Maximum number of sending BDs which must be processed by the device 323before the device updates the status block 324during host interrupt processing. 325Default value is 64. 326.It Va npoll_offset 327See the tunable 328.Va hw.bnxX.npoll.offset . 329The set value will take effect the next time 330.Xr polling 4 331is enabled on the device. 332.It Va npoll_txoff 333See the tunable 334.Va hw.bnxX.npoll.txoff . 335The set value will take effect the next time 336.Xr polling 4 337is enabled on the device. 338.It Va npoll_rxoff 339See the tunable 340.Va hw.bnxX.npoll.rxoff . 341The set value will take effect the next time 342.Xr polling 4 343is enabled on the device. 344.It Va norxbds 345Number of times the standard reception producer ring is short 346of reception BDs. 347If this value grows fast, 348it is usually an indication that 349.Va std_refill 350is set too high. 351.It Va errors 352Number of errors, both critical and non-critical, happened. 353.El 354.Sh SEE ALSO 355.Xr arp 4 , 356.Xr bge 4 , 357.Xr ifmedia 4 , 358.Xr miibus 4 , 359.Xr netintro 4 , 360.Xr ng_ether 4 , 361.Xr polling 4 , 362.Xr vlan 4 , 363.Xr ifconfig 8 364.Sh HISTORY 365The 366.Nm 367device driver first appeared in 368.Dx 3.1 . 369.Sh AUTHORS 370.An -nosplit 371The 372.Nm 373driver was based on 374.Xr bge 4 375written by 376.An Bill Paul 377.Aq wpaul@windriver.com . 378Sepherosa Ziehau added receive side scaling, 379multiple transmission queues 380and multiple MSI-X support to 381.Dx . 382