1.\" Copyright (c) 2001-2003, Intel Corporation 2.\" All rights reserved. 3.\" 4.\" Redistribution and use in source and binary forms, with or without 5.\" modification, are permitted provided that the following conditions are met: 6.\" 7.\" 1. Redistributions of source code must retain the above copyright notice, 8.\" this list of conditions and the following disclaimer. 9.\" 10.\" 2. Redistributions in binary form must reproduce the above copyright 11.\" notice, this list of conditions and the following disclaimer in the 12.\" documentation and/or other materials provided with the distribution. 13.\" 14.\" 3. Neither the name of the Intel Corporation nor the names of its 15.\" contributors may be used to endorse or promote products derived from 16.\" this software without specific prior written permission. 17.\" 18.\" THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19.\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21.\" ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 22.\" LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23.\" CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24.\" SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25.\" INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26.\" CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28.\" POSSIBILITY OF SUCH DAMAGE. 29.\" 30.\" * Other names and brands may be claimed as the property of others. 31.\" 32.\" $FreeBSD: src/share/man/man4/igb.4,v 1.2 2010/05/14 20:11:30 marius Exp $ 33.\" 34.Dd December 21, 2015 35.Dt IGB 4 36.Os 37.Sh NAME 38.Nm igb 39.Nd "Intel(R) PRO/1000 PCI Express Gigabit Ethernet adapter driver" 40.Sh SYNOPSIS 41To compile this driver into the kernel, 42place the following line in your 43kernel configuration file: 44.Bd -ragged -offset indent 45.Cd "device ig_hal" 46.Cd "device igb" 47.Ed 48.Pp 49Alternatively, to load the driver as a 50module at boot time, place the following line in 51.Xr loader.conf 5 : 52.Bd -literal -offset indent 53ig_hal_load="YES" 54if_igb_load="YES" 55.Ed 56.Sh DESCRIPTION 57The 58.Nm 59driver provides support for PCI Express Gigabit Ethernet adapters based on 60the Intel 6182575, 6282576, 6382580, 64I210, 65I211, 66I350 and I354 67Ethernet controller chips. 68The 69.Nm 70driver supports: 71.Pp 72.Bl -item -offset indent -compact 73.It 74Transmit/Receive checksum offload for IP/UDP/TCP. 75.\"Jumbo Frames. 76.It 77Interrupt moderation 78.It 79TCP segmentation offload (TSO) 80.It 81Receive side scaling (RSS) 82.It 83Multiple tranmission queues 84.It 85Multiple vector MSI-X 86.It 87VLAN tag stripping and inserting 88.El 89.Pp 90If 91.Xr polling 4 92or MSI-X is used, 93by default, 94the 95.Nm 96driver will try enabling as many reception queues and transmission queues 97as are allowed by the number of CPUs in the system. 98.Pp 99If multiple transmission queues are used, 100the round-robin arbitration is performed among the transmission queues. 101It should be noted that 102if both TSO and multiple transmission queues are used, 103for 82575, the round-robin arbitration between transmission queues is done 104at the TSO packet boundary; 105for the reset of the hardware, the round-robin arbitration 106between transmission queues is done at the TCP segment boundary after 107the hardware segmentation is performed. 108.Pp 10982575 supports 4 reception queues and 4 transmission queues. 110MSI-X is not enabled due to hardware errata. 111Under MSI or legacy interrupt mode, 1122 reception queues are enabled for hardware RSS hash 113and only 1 transmission queue is enable. 114.Pp 11582576 supports 16 reception queues and 16 transmission queues. 116MSI-X is enable by default. 117However, 118due to the number of MSI-X vectors is 10, 119at most 8 reception queues and 8 transmission queues will be enabled 120under MSI-X mode. 121When 122.Xr polling 4 123is enabled on the devices, 124at most 16 reception queues and 16 transmission queues will be enabled. 125.Pp 12682580, 127I350 and I354 support 8 reception queues and 8 transmission queues. 128MSI-X is enabled by default. 129.Pp 130I210 supports 4 reception queues and 4 transmission queues. 131MSI-X is enabled by default. 132.Pp 133I211 supports 2 reception queues and 2 transmission queues. 134MSI-X is enabled by default. 135.Pp 136.\"For questions related to hardware requirements, refer to the 137.\"documentation supplied with your Intel PRO/1000 adapter. 138.\"All hardware requirements listed apply to use with 139.\".Dx . 140.\".Pp 141.\"Support for Jumbo Frames is provided via the interface MTU setting. 142.\"Selecting an MTU larger than 1500 bytes with the 143.\".Xr ifconfig 8 144.\"utility configures the adapter to receive and transmit Jumbo Frames. 145.\"The maximum MTU size for Jumbo Frames is 9216. 146.\".Pp 147The 148.Nm 149driver supports the following media types: 150.Bl -tag -width ".Cm 10baseT/UTP" 151.It Cm autoselect 152Enables auto-negotiation for speed and duplex. 153.It Cm 10baseT/UTP 154Sets 10Mbps operation. 155Use the 156.Cm mediaopt 157option to select 158.Cm full-duplex 159mode. 160.It Cm 100baseTX 161Sets 100Mbps operation. 162Use the 163.Cm mediaopt 164option to select 165.Cm full-duplex 166mode. 167.It Cm 1000baseSX 168Sets 1000Mbps operation. 169Only 170.Cm full-duplex 171mode is supported at this speed. 172.It Cm 1000baseT 173Sets 1000Mbps operation. 174Only 175.Cm full-duplex 176mode is supported at this speed. 177.El 178.Pp 179The 180.Nm 181driver supports the following media options: 182.Bl -tag -width ".Cm full-duplex" 183.It Cm full-duplex 184Forces full-duplex operation 185.It Cm half-duplex 186Forces half-duplex operation. 187.It Cm rxpause 188Enable flow control PAUSE reception. 189This is only supported by 190.Cm autoselect 191and 192.Cm full-duplex 193mode. 194.It Cm txpause 195Enable flow control PAUSE transmission. 196This is only supported by 197.Cm autoselect 198and 199.Cm full-duplex 200mode. 201.It Cm forcepause 202Force flow control PAUSE operation as configured by 203.Cm rxpause 204and 205.Cm txpause 206media options. 207.El 208.Pp 209Only use 210.Cm mediaopt 211to set the driver to 212.Cm full-duplex . 213If 214.Cm mediaopt 215is not specified, the driver defaults to 216.Cm half-duplex . 217.Pp 218For more information on configuring this device, see 219.Xr ifconfig 8 . 220The 221.Nm 222driver supports 223.Xr polling 4 . 224.Sh HARDWARE 225The 226.Nm 227driver supports Gigabit Ethernet adapters based on the Intel 22882575, 22982576, 23082580, 231I210, 232I211, 233I350 and I354 234controller chips: 235.Pp 236.Bl -bullet -compact 237.It 238Intel 82576EB Gigabit Ethernet Controller 239.It 240Intel 82576NS Gigabit Ethernet Controller 241.It 242Intel 82580EB Gigabit Ethernet Controller 243.It 244Intel Ethernet Server Adapter I340-F4 245.It 246Intel Ethernet Server Adapter I340-T4 247.It 248Intel Gigabit ET2 Quad Port Server Adapter 249.It 250Intel Gigabit VT Quad Port Server Adapter 251.It 252Intel 82575EB Gigabit Ethernet Controller 253.It 254Intel Gigabit EF Dual Port Server Adapter 255.It 256Intel Gigabit ET Dual Port Server Adapter 257.It 258Intel Gigabit ET Quad Port Server Adapter 259.It 260Intel Ethernet Controller I350-AM4 261.It 262Intel Ethernet Controller I350-BT2 263.It 264Intel Ethernet Controller I350-AM2 265.It 266Intel Ethernet Server Adapter I350-T2 267.It 268Intel Ethernet Server Adapter I350-T4 269.It 270Intel Ethernet Server Adapter I350-F2 271.It 272Intel Ethernet Server Adapter I350-F4 273.It 274Intel Ethernet Controller I210-AT 275.It 276Intel Ethernet Controller I210-IS 277.It 278Intel Ethernet Controller I210-IT 279.It 280Intel Ethernet Controller I211-AT 281.It 282Intel Ethernet Server Adapter I210-T1 283.It 284Intel Ethernet Controller I210-AS 285.It 286Intel Ethernet Controller I210-CS 287.El 288.Sh TUNABLES 289Tunables can be set at the 290.Xr loader 8 291prompt before booting the kernel or stored in 292.Xr loader.conf 5 . 293.Em X 294is the device unit number. 295.Bl -tag -width ".Va hw.igbX.irq.unshared" 296.It Va hw.igb.rxd Va hw.igbX.rxd 297Number of receive descriptors allocated by the driver. 298The default value is 512. 299The minimum is 256, 300and the maximum is 4096. 301.It Va hw.igb.txd Va hw.igbX.txd 302Number of transmit descriptors allocated by the driver. 303The default value is 1024. 304The minimum is 256, 305and the maximum is 4096. 306.It Va hw.igb.rxr Va hw.igbX.rxr 307This tunable specifies the number of reception queues could be enabled. 308Maximum allowed value for these tunables is device specific 309and it must be power of 2 aligned. 310Setting these tunables to 0 allows the driver to make 311as many reception queues ready-for-use as allowed by the number of CPUs. 312.It Va hw.igb.txr Va hw.igbX.txr 313This tunable specifies the number of transmission queues could be enabled. 314Maximum allowed value for these tunables is device specific 315and it must be power of 2 aligned. 316Setting these tunables to 0 allows the driver to make 317as many transmission queues ready-for-use as allowed by the number of CPUs. 318.It Va hw.igb.msix.enable Va hw.igbX.msix.enable 319By default, 320the driver will use MSI-X if it is supported. 321This behaviour can be turned off by setting this tunable to 0. 322.It Va hw.igb.msix.agg_rxtx Va hw.igbX.msix.agg_rxtx 323If MSI-X is used, 324the driver aggregates transmission queue and reception queue processing 325by default. 326This behaviour could be turned off by setting this tunable to 0. 327If the number of MSI-X vectors is not enough to 328put transmission queue processing and reception queue processing 329onto independent MSI-X vector, 330then transmission queue and reception queue processing are always 331aggregated. 332.It Va hw.igbX.msix.off 333If MSI-X is used, 334and transmission queue and reception queue processing are aggregated, 335this tunable specifies the leading target CPU for 336transmission and reception queues processing. 337The value specificed must be aligned to the maximum of 338the number of reception queues 339and the number of transmission queues enabled, 340and must be less than the power of 2 number of CPUs. 341.It Va hw.igbX.msix.rxoff 342If MSI-X is used, 343and transmission queue and reception queue processing are not aggregated, 344this tunable specifies the leading target CPU for reception queues processing. 345The value specificed must be aligned to the number of reception queues enabled 346and must be less than the power of 2 number of CPUs. 347.It Va hw.igbX.msix.txoff 348If MSI-X is used, 349and transmission queue and reception queue processing are not aggregated, 350this tunable specifies the leading target CPU 351for transmission queues processing. 352The value specificed must be aligned to 353the number of transmission queues enabled 354and must be less than the power of 2 number of CPUs. 355.It Va hw.igb.msi.enable Va hw.igbX.msi.enable 356If MSI-X is disabled and MSI is supported, 357the driver will use MSI. 358This behavior can be turned off by setting this tunable to 0. 359.It Va hw.igbX.msi.cpu 360If MSI is used, 361it specifies the MSI's target CPU. 362.It Va hw.igbX.irq.unshared 363If legacy interrupt is used, 364by default, 365the driver assumes the interrupt could be shared. 366Setting this tunable to 1 allows the driver to perform certain 367optimization based on the knowledge that the interrupt is not shared. 368.It Va hw.igbX.npoll.txoff 369This tunable specifies the leading target CPU for 370transmission queue 371.Xr polling 4 372processing. 373The value specificed must be aligned to the number of transmission queues 374enabled and must be less than the power of 2 number of CPUs. 375.It Va hw.igbX.npoll.rxoff 376This tunable specifies the leading target CPU for 377reception queue 378.Xr polling 4 379processing. 380The value specificed must be aligned to the number of reception queues 381enabled and must be less than the power of 2 number of CPUs. 382.It Va hw.igb.flow_ctrl Va hw.igbX.flow_ctrl 383The default flow control settings. 384Supported values are: 385rxpause (only enable PAUSE reception), 386txpause (only enable PAUSE transmission), 387full (enable PAUSE reception and transmission), 388none (disable flow control PAUSE operation), 389force-rxpause (force PAUSE reception), 390force-txpause (force PAUSE transmission), 391force-full (forcefully enable PAUSE reception and transmission), 392force-none (forcefully disable flow control PAUSE operation). 393Default is rxpause. 394.El 395.Sh MIB Variables 396A number of per-interface variables are implemented in the 397.Va dev.igb. Ns Em X 398branch of the 399.Xr sysctl 3 400MIB. 401.Bl -tag -width "rxtx_intr_rate" 402.It Va rxr 403Number of reception queues could be enabled (read-only). 404Use the tunable 405.Va hw.igb.rxr 406or 407.Va hw.igbX.rxr 408to configure it. 409.It Va rxr_inuse 410Number of reception queues being used (read-only). 411.It Va txr 412Number of transmission queues could be enabled (read-only). 413Use the tunable 414.Va hw.igb.txr 415or 416.Va hw.igbX.txr 417to configure it. 418.It Va txr_inuse 419Number of transmission queues being used (read-only). 420.It Va rxd 421Number of descriptors per reception queue (read-only). 422Use the tunable 423.Va hw.igb.rxd 424or 425.Va hw.igbX.rxd 426to configure it. 427.It Va txd 428Number of descriptors per transmission queue (read-only). 429Use the tunable 430.Va hw.igb.txd 431or 432.Va hw.igbX.txd 433to configure it. 434.It Va rxtx_intr_rate 435If MSI or legacy interrupt is used, 436this sysctl controls the highest possible frequency 437that interrupt could be generated by the device. 438If MSI-X is used, 439this sysctl controls the highest possible frequency 440that interrupt could be generated by the MSI-X vectors, 441which aggregate transmission queue and reception queue procecssing. 442It is 6000 by default (~150us). 443.It Va rx_intr_rate 444If MSI-X is used, 445this sysctl controls the highest possible frequency 446that interrupt could be generated by the MSI-X vectors, 447which only process reception queue. 448It is 6000 by default (~150us). 449.It Va tx_intr_rate 450If MSI-X is used, 451this sysctl controls the highest possible frequency 452that interrupt could be generated by the MSI-X vectors, 453which only process transmission queue. 454It is 4000 by default (250us). 455.It Va sts_intr_rate 456If MSI-X is used, 457this sysctl controls the highest possible frequency 458that interrupt could be generated by the MSI-X vectors, 459which only process chip status changes. 460It is 6000 by default (~150us). 461.It Va tx_intr_nsegs 462Transmission interrupt is asked to be generated upon every 463.Va tx_intr_nsegs 464transmission descritors having been setup. 465The default value is 1/16 of the number of transmission descriptors per queue. 466.It Va tx_wreg_nsegs 467The number of transmission descriptors should be setup 468before the hardware register is written. 469Setting this value too high will have negative effect 470on transmission timeliness. 471Setting this value too low will hurt overall transmission performance 472due to the frequent hardware register writing. 473The default value is 8. 474.It Va rx_wreg_nsegs 475The number of reception descriptors should be setup 476before the hardware register is written. 477Setting this value too high will make device drop incoming packets. 478Setting this value too low will hurt overall reception performance 479due to the frequent hardware register writing. 480The default value is 32. 481.It Va npoll_rxoff 482See the tunable 483.Va hw.igbX.npoll.rxoff . 484The set value will take effect the next time 485.Xr polling 4 486is enabled on the device. 487.It Va npoll_txoff 488See the tunable 489.Va hw.igbX.npoll.txoff . 490The set value will take effect the next time 491.Xr polling 4 492is enabled on the device. 493.El 494.\".Sh SUPPORT 495.\"For general information and support, 496.\"go to the Intel support website at: 497.\".Pa http://support.intel.com . 498.\".Pp 499.\"If an issue is identified with the released source code on the supported kernel 500.\"with a supported adapter, email the specific information related to the 501.\"issue to 502.\".Aq Mt freebsdnic@mailbox.intel.com . 503.Sh SEE ALSO 504.Xr altq 4 , 505.Xr arp 4 , 506.Xr ifmedia 4 , 507.Xr netintro 4 , 508.Xr ng_ether 4 , 509.Xr polling 4 , 510.Xr vlan 4 , 511.Xr ifconfig 8 512.Sh HISTORY 513The 514.Nm 515device driver first appeared in 516.Fx 7.1 . 517.Sh AUTHORS 518The 519.Nm 520driver was written by 521.An Intel Corporation Aq Mt freebsdnic@mailbox.intel.com . 522