1.\" Copyright (c) 2001-2008, Intel Corporation 2.\" All rights reserved. 3.\" 4.\" Redistribution and use in source and binary forms, with or without 5.\" modification, are permitted provided that the following conditions are met: 6.\" 7.\" 1. Redistributions of source code must retain the above copyright notice, 8.\" this list of conditions and the following disclaimer. 9.\" 10.\" 2. Redistributions in binary form must reproduce the above copyright 11.\" notice, this list of conditions and the following disclaimer in the 12.\" documentation and/or other materials provided with the distribution. 13.\" 14.\" 3. Neither the name of the Intel Corporation nor the names of its 15.\" contributors may be used to endorse or promote products derived from 16.\" this software without specific prior written permission. 17.\" 18.\" THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19.\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21.\" ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 22.\" LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23.\" CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24.\" SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25.\" INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26.\" CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28.\" POSSIBILITY OF SUCH DAMAGE. 29.\" 30.\" * Other names and brands may be claimed as the property of others. 31.\" 32.\" $FreeBSD: src/share/man/man4/ixgbe.4,v 1.2 2008/06/17 21:14:02 brueffer Exp $ 33.\" 34.Dd May 8, 2017 35.Dt IX 4 36.Os 37.Sh NAME 38.Nm ix 39.Nd "Intel(R) 10Gb Ethernet driver" 40.Sh SYNOPSIS 41To compile this driver into the kernel, 42place the following line in your 43kernel configuration file: 44.Bd -ragged -offset indent 45.Cd "device ix" 46.Ed 47.Pp 48Alternatively, to load the driver as a 49module at boot time, place the following line in 50.Xr loader.conf 5 : 51.Bd -literal -offset indent 52if_ix_load="YES" 53.Ed 54.Sh DESCRIPTION 55The 56.Nm 57driver provides support for PCI Express 10Gb Ethernet adapters based on 58the Intel 5982598, 6082599, 61and 62X540 63Ethernet controller chips. 64The 65.Nm 66driver supports: 67.Pp 68.Bl -item -offset indent -compact 69.It 70Transmit/Receive checksum offload for IP/UDP/TCP. 71.\"Jumbo Frames. 72.It 73Interrupt moderation 74.It 75TCP segmentation offload (TSO) 76.It 77Receive side scaling (RSS) 78.It 79Multiple tranmission queues 80.It 81Multiple vector MSI-X 82.It 83VLAN tag stripping and inserting 84.El 85.Pp 86If 87.Xr polling 4 88or MSI-X is used, 89by default, 90the 91.Nm 92driver will try enabling as many reception queues and transmission queues 93as are allowed by the number of CPUs in the system. 94.Pp 95If multiple transmission queues are used, 96the round-robin arbitration is performed among the transmission queues. 97And if both TSO and multiple tranmission queues are used, 98the round-robin arbitration between transmission queues is done at the 99TCP segment boundary after the hardware segmentation is performed. 100.Pp 10182598 supports 16 reception queues and 32 transmission queues. 102MSI-X is not enabled due to hardware errata. 103Under MSI or legacy interrupt mode, 1042 reception queues are enabled for hardware RSS hash 105and only 1 transmission queue is enable. 106.Pp 10782599 and X540 supports 16 reception queues and 64 transmission queues. 108MSI-X is enable by default. 109However, 110due to the number of MSI-X vectors is 64, 111at most 16 reception queues and 32 transmission queues will be enabled 112under MSI-X mode. 113.Pp 114The 115.Nm 116driver supports the following media types: 117.Bl -tag -width ".Cm autoselect" 118.It Cm autoselect 119Enables auto-negotiation for speed and duplex. 120.El 121.Pp 122The 123.Nm 124driver supports the following media options: 125.Bl -tag -width ".Cm forcepause" 126.It Cm rxpause 127Enable flow control PAUSE reception. 128.It Cm txpause 129Enable flow control PAUSE transmission. 130.It Cm forcepause 131Force flow control PAUSE operation as configured by 132.Cm rxpause 133and 134.Cm txpause 135media options. 136.El 137.Pp 138For more information on configuring this device, see 139.Xr ifconfig 8 . 140The 141.Nm 142driver supports 143.Xr polling 4 . 144.Sh HARDWARE 145The 146.Nm 147driver supports Gigabit Ethernet adapters based on the Intel 14882598, 14982599, 150and 151X540 152controller chips: 153.Pp 154.Bl -bullet -compact 155.It 156Intel 82599EB 10 Gigabit Ethernet Controller 157.It 158Intel 82598EB 10 Gigabit Ethernet Controller 159.It 160Intel Ethernet Converged Network Adapter X520-SR1 161.It 162Intel Ethernet Converged Network Adapter X520-SR2 163.It 164Intel Ethernet Converged Network Adapter X520-DA2 165.It 166Intel Ethernet Converged Network Adapter X520-LR1 167.It 168Intel 82599ES 10 Gigabit Ethernet Controller 169.It 170Intel 10 Gigabit AF DA Dual Port Server Adapter 171.It 172Intel 10 Gigabit AT Server Adapter 173.It 174Intel 10 Gigabit AT2 Server Adapter 175.It 176Intel 10 Gigabit CX4 Dual Port Server Adapter 177.It 178Intel 10 Gigabit XF LR Server Adapter 179.It 180Intel 10 Gigabit XF SR Dual Port Server Adapter 181.It 182Intel 10 Gigabit XF SR Server Adapter 183.It 184Intel Ethernet Converged Network Adapter X540-T1 185.It 186Intel Ethernet Converged Network Adapter X540-T2 187.It 188Intel Ethernet Controller X540-AT2 189.It 190Intel 82599EN 10 Gigabit Ethernet Controller 191.It 192Intel Ethernet Converged Network Adapter X520-DA1 193.It 194Intel Ethernet Converged Network Adapter X520-DA4 195.It 196Intel Ethernet Converged Network Adapter X520-QDA1 197.It 198Intel Ethernet Converged Network Adapter X520-T2 199.It 200Intel Ethernet Controller X710-AM2 201.It 202Intel Ethernet Converged Network Adapter X710-DA2 203.It 204Intel Ethernet Converged Network Adapter X710-DA4 205.El 206.Sh TUNABLES 207Tunables can be set at the 208.Xr loader 8 209prompt before booting the kernel or stored in 210.Xr loader.conf 5 . 211.Em Y 212is the device unit number. 213.Bl -tag -width ".Va hw.ixY.unsupported_sfp" 214.It Va hw.ix.rxd Va hw.ixY.rxd 215Number of receive descriptors allocated by the driver. 216The default value is 2048. 217The minimum is 64, 218and the maximum is 4096. 219.It Va hw.ix.txd Va hw.ixY.txd 220Number of transmit descriptors allocated by the driver. 221The default value is 2048. 222The minimum is 64, 223and the maximum is 4096. 224.It Va hw.ix.rxr Va hw.ixY.rxr 225This tunable specifies the number of reception queues could be enabled. 226Maximum allowed value for these tunables is device specific 227and it must be power of 2 aligned. 228Setting these tunables to 0 allows the driver to make 229as many reception queues ready-for-use as allowed by the number of CPUs. 230.It Va hw.ix.txr Va hw.ixY.txr 231This tunable specifies the number of transmission queues could be enabled. 232Maximum allowed value for these tunables is device specific 233and it must be power of 2 aligned. 234Setting these tunables to 0 allows the driver to make 235as many transmission queues ready-for-use as allowed by the number of CPUs. 236.It Va hw.ix.msix.enable Va hw.ixY.msix.enable 237By default, 238the driver will use MSI-X if it is supported. 239This behaviour can be turned off by setting this tunable to 0. 240.It Va hw.ix.msi.enable Va hw.ixY.msi.enable 241If MSI-X is disabled and MSI is supported, 242the driver will use MSI. 243This behavior can be turned off by setting this tunable to 0. 244.It Va hw.ixY.msi.cpu 245If MSI is used, 246it specifies the MSI's target CPU. 247.It Va hw.ix.unsupported_sfp 248By default, 249this driver does not allow "unsupported" SFP modules. 250This behavior can be changed by setting this tunable to 1. 251.It Va hw.ix.flow_ctrl Va hw.ixY.flow_ctrl 252The default flow control settings. 253Supported values are: 254rxpause (only enable PAUSE reception), 255txpause (only enable PAUSE transmission), 256full (enable PAUSE reception and transmission), 257none (disable flow control PAUSE operation), 258force-rxpause (force PAUSE reception), 259force-txpause (force PAUSE transmission), 260force-full (forcefully enable PAUSE reception and transmission), 261force-none (forcefully disable flow control PAUSE operation). 262Default is full. 263.El 264.Sh MIB Variables 265A number of per-interface variables are implemented in the 266.Va dev.ix. Ns Em Y 267branch of the 268.Xr sysctl 3 269MIB. 270.Bl -tag -width "rxtx_intr_rate" 271.It Va rxr 272Number of reception queues could be enabled (read-only). 273Use the tunable 274.Va hw.ix.rxr 275or 276.Va hw.ixY.rxr 277to configure it. 278.It Va rxr_inuse 279Number of reception queues being used (read-only). 280.It Va txr 281Number of transmission queues could be enabled (read-only). 282Use the tunable 283.Va hw.ix.txr 284or 285.Va hw.ixY.txr 286to configure it. 287.It Va txr_inuse 288Number of transmission queues being used (read-only). 289.It Va rxd 290Number of descriptors per reception queue (read-only). 291Use the tunable 292.Va hw.ix.rxd 293or 294.Va hw.ixY.rxd 295to configure it. 296.It Va txd 297Number of descriptors per transmission queue (read-only). 298Use the tunable 299.Va hw.ix.txd 300or 301.Va hw.ixY.txd 302to configure it. 303.It Va rxtx_intr_rate 304If MSI or legacy interrupt is used, 305this sysctl controls the highest possible frequency 306that interrupt could be generated by the device. 307If MSI-X is used, 308this sysctl controls the highest possible frequency 309that interrupt could be generated by the MSI-X vectors, 310which aggregate transmission queue and reception queue procecssing. 311It is 8000 by default (125us). 312.It Va rx_intr_rate 313If MSI-X is used, 314this sysctl controls the highest possible frequency 315that interrupt could be generated by the MSI-X vectors, 316which only process reception queue. 317It is 8000 by default (125us). 318.It Va tx_intr_rate 319If MSI-X is used, 320this sysctl controls the highest possible frequency 321that interrupt could be generated by the MSI-X vectors, 322which only process transmission queue. 323It is 6000 by default (~150us). 324.It Va sts_intr_rate 325If MSI-X is used, 326this sysctl controls the highest possible frequency 327that interrupt could be generated by the MSI-X vectors, 328which only process chip status changes. 329It is 8000 by default (125us). 330.It Va tx_intr_nsegs 331Transmission interrupt is asked to be generated upon every 332.Va tx_intr_nsegs 333transmission descritors having been setup. 334The default value is 1/16 of the number of transmission descriptors per queue. 335.It Va tx_wreg_nsegs 336The number of transmission descriptors should be setup 337before the hardware register is written. 338Setting this value too high will have negative effect 339on transmission timeliness. 340Setting this value too low will hurt overall transmission performance 341due to the frequent hardware register writing. 342The default value is 8. 343.It Va rx_wreg_nsegs 344The number of reception descriptors should be setup 345before the hardware register is written. 346Setting this value too high will make device drop incoming packets. 347Setting this value too low will hurt overall reception performance 348due to the frequent hardware register writing. 349The default value is 32. 350.El 351.Sh SEE ALSO 352.Xr altq 4 , 353.Xr arp 4 , 354.Xr ifmedia 4 , 355.Xr netintro 4 , 356.Xr ng_ether 4 , 357.Xr polling 4 , 358.Xr vlan 4 , 359.Xr ifconfig 8 360.Sh HISTORY 361The 362.Nm 363device driver first appeared in 364.Dx 3.1 . 365.Sh AUTHORS 366The 367.Nm 368driver was written by 369.An Intel Corporation Aq Mt freebsdnic@mailbox.intel.com . 370