xref: /dragonfly/share/man/man4/mxge.4 (revision 0ca59c34)
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32.\" $FreeBSD: src/share/man/man4/mxge.4,v 1.7.4.2.4.1 2009/04/15 03:14:26 kensmith Exp $
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34.Dd November 28, 2014
35.Dt MXGE 4
36.Os
37.Sh NAME
38.Nm mxge
39.Nd "Myricom Myri10GE 10 Gigabit Ethernet adapter driver"
40.Sh SYNOPSIS
41To compile this driver into the kernel,
42place the following lines in your
43kernel configuration file:
44.Bd -ragged -offset indent
45.Cd "device mxge"
46.Ed
47.Pp
48Alternatively, to load the driver as a
49module at boot time, place the following line in
50.Xr loader.conf 5 :
51.Bd -literal -offset indent
52if_mxge_load="YES"
53.Ed
54.Sh DESCRIPTION
55The
56.Nm
57driver provides support for PCI Express 10 Gigabit Ethernet adapters based on
58the Myricom LANai Z8E chip.
59The driver supports Transmit/Receive checksum offload,
60TCP Segmentation Offload (TSO),
61multiple reception queues,
62multiple tranmission queues and
63multiple vector MSI-X.
64.\"Support for Jumbo frames is not yet implemented, while support for
65.\"as well as Large Receive Offload (LRO) is not
66.\"implemented in
67Using multiple vector MSI-X requires that Myri10GE NIC be capable of MSI-X.
68Older Myri10GE NICs can be field upgraded to add MSI-X using the
69"Myri-10G Network Adapter Toolkit" for FreeBSD or Linux
70which is available from
71.Pa https://www.myricom.com/support/downloads/tools/myri-10g-toolkit.html .
72.Pp
73For questions related to hardware requirements,
74refer to the documentation supplied with your Myri10GE adapter.
75All hardware requirements listed apply to use with
76.Dx .
77For further hardware information, see
78.Pa http://www.myricom.com .
79.Pp
80For more information on configuring this device, see
81.Xr ifconfig 8 .
82The
83.Nm
84driver supports
85.Xr polling 4 .
86.Sh HARDWARE
87The
88.Nm
89driver supports 10 Gigabit Ethernet adapters based on the
90Myricom LANai Z8E chips:
91.Pp
92.Bl -bullet -compact
93.It
94Myricom 10GBase-CX4 (10G-PCIE-8A-C, 10G-PCIE-8AL-C)
95.It
96Myricom 10GBase-R (10G-PCIE-8A-R, 10G-PCIE-8AL-R)
97.It
98Myricom 10G XAUI over ribbon fiber (10G-PCIE-8A-Q, 10G-PCIE-8AL-Q)
99.El
100.Sh TUNABLES
101.Em X
102is the device unit number.
103.Bl -tag -width indent
104.It Va hw.mxge.msix.enable Va hw.mxgeX.msix.enable
105By default,
106the driver will use MSI-X
107if it is supported.
108This behaviour can be turned off by setting this tunable to 0.
109.It Va hw.mxgeX.msix.offset
110If more than 1 slices are enabled,
111this tunable specifies the leading target CPU for slice's
112transmission and reception queues processing.
113The value specificed must be aligned to the number of slices enabled and
114must be less than the power of 2 number of CPUs.
115.It Va hw.mxge.msi.enable Va hw.mxgeX.msi.enable
116If MSI-X is disabled and MSI is supported,
117the driver will use MSI.
118This behavior can be turned off by setting this tunable to 0.
119.It Va hw.mxgeX.msi.cpu
120If MSI is used, it specifies the MSI's target CPU.
121.It Va hw.mxge.num_slices Va hw.mxgeX.num_slices
122If MSI-X is used,
123this value determines the maximum number of slices the driver
124will attempt to use.
125Setting this value to 0 allows driver to enable as many slices
126as allowed by the number of CPUs.
127Each slice is comprised of one reception queue and one transmission
128queue.
129The transmission queue of each slice,
130except the first slice,
131could be disabled.
132The default value is 0.
133.It Va hw.mxge.multi_tx Va hw.mxgeX.multi_tx
134If more then 1 slices are enabled,
135this tunable controls whether the tranmission queue of each
136slice should be enabled.
137Setting this tunable to 0 will only enable the transmission queue
138on the first slice.
139The default value is 1.
140.It Va hw.mxge.use_rss
141This tunable controls whether standard RSS input hash function or
142chip private input hash function should be used.
143Using standard RSS input hash function degenerates reception
144performance significantly.
145The default value is 0.
146.It Va hw.mxge.intr_coal_delay
147This value delays the generation of all interrupts in units of
1481 microsecond.
149The default value is 150.
150.It Va hw.mxge.flow_control_enabled
151Whether or not hardware flow control is enabled on the adapter.
152The default value is 1.
153.El
154.Sh MIB Variables
155A number of per-interface variables are implemented in the
156.Va dev.mxge. Ns Em X
157branch of the
158.Xr sysctl 3
159MIB.
160.Bl -tag -width "flow_control_enabled"
161.It Va firmware_version
162The version string of firmware that is currently loaded by the driver.
163It is read-only.
164.It Va use_rss
165See tunable
166.Va hw.mxge.use_rss .
167Flipping its value will cause chip reinitialization.
168.It Va intr_coal_delay
169See tunable
170.Va hw.mxge.intr_coal_delay .
171.It Va flow_control_enabled
172See tunable
173.Va hw.mxge.flow_control_enabled .
174.El
175.Sh SUPPORT
176For general information and support,
177go to the Myricom support website at:
178.Pa https://www.myricom.com/support.html .
179.Sh SEE ALSO
180.Xr altq 4 ,
181.Xr arp 4 ,
182.Xr ifmedia 4 ,
183.Xr netintro 4 ,
184.Xr ng_ether 4 ,
185.Xr ifconfig 8 ,
186.Xr firmware 9
187.Sh HISTORY
188The
189.Nm
190device driver first appeared in
191.Fx 6.3 .
192It was first ported to
193.Dx 2.3 .
194.Sh AUTHORS
195The
196.Nm
197driver was written by
198.An Andrew Gallatin Aq Mt gallatin@FreeBSD.org .
199