xref: /dragonfly/share/man/man4/rl.4 (revision 27f48495)
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34.Dd November 4, 1998
35.Dt RL 4
36.Os
37.Sh NAME
38.Nm rl
39.Nd RealTek 8129/8139 fast ethernet device driver
40.Sh SYNOPSIS
41.Cd "device rl"
42.Sh DESCRIPTION
43The
44.Nm
45driver provides support for PCI ethernet adapters and embedded
46controllers based on the RealTek 8129 and 8139 fast ethernet controller
47chips.
48This includes the Allied Telesyn AT2550, Farallon NetLINE 10/100 PCI,
49Genius GF100TXR,
50NDC Communications NE100TX-E, OvisLink LEF-8129TX, OvisLink LEF-8139TX,
51Netronix Inc. EA-1210 NetEther 10/100, KTX-9130TX 10/100 Fast Ethernet,
52Encore ENL832-TX 10/100 M PCI, Longshine LCS-8038TX-R, the
53SMC EZ Card 10/100 PCI 1211-TX, and various other cheap adapters.
54It also supports the Accton EN1207D which has a
55chip labeled MPX5030 (or MPX5038) which appears to be a RealTek workalike.
56.Pp
57The RealTek controllers use bus master DMA but do not use a
58descriptor-based data transfer mechanism.
59The receiver uses a
60single fixed size ring buffer from which packets must be copied
61into mbufs.
62For transmission, there are only four outbound packet
63address registers which require all outgoing packets to be stored
64as contiguous buffers.
65Furthermore, outbound packet buffers must
66be longword aligned or else transmission will fail.
67.Pp
68The 8129 differs from the 8139 in that the 8139 has an internal
69PHY which is controlled through special direct access registers
70whereas the 8129 uses an external PHY via an MII bus.
71The 8139
72supports both 10 and 100Mbps speeds in either full or half duplex.
73The 8129 can support the same speeds and modes given an appropriate
74PHY chip.
75.Pp
76The
77.Nm
78driver supports the following media types:
79.Pp
80.Bl -tag -width xxxxxxxxxxxxxxxxxxxx
81.It autoselect
82Enable autoselection of the media type and options.
83This is only
84supported if the PHY chip attached to the RealTek controller
85supports NWAY autonegotiation.
86The user can manually override
87the autoselected mode by adding media options to the
88.Pa /etc/rc.conf
89file.
90.It 10baseT/UTP
91Set 10Mbps operation.
92The
93.Ar mediaopt
94option can also be used to select either
95.Ar full-duplex
96or
97.Ar half-duplex
98modes.
99.It 100baseTX
100Set 100Mbps (fast ethernet) operation.
101The
102.Ar mediaopt
103option can also be used to select either
104.Ar full-duplex
105or
106.Ar half-duplex
107modes.
108.El
109.Pp
110The
111.Nm
112driver supports the following media options:
113.Pp
114.Bl -tag -width xxxxxxxxxxxxxxxxxxxx
115.It full-duplex
116Force full duplex operation
117.It half-duplex
118Force half duplex operation.
119.El
120.Pp
121Note that the 100baseTX media type is only available if supported
122by the adapter.
123For more information on configuring this device, see
124.Xr ifconfig 8 .
125.Sh DIAGNOSTICS
126.Bl -diag
127.It "rl%d: couldn't map memory"
128A fatal initialization error has occurred.
129.It "rl%d: couldn't map interrupt"
130A fatal initialization error has occurred.
131.It "rl%d: watchdog timeout"
132The device has stopped responding to the network, or there is a problem with
133the network connection (cable).
134.It "rl%d: no memory for rx list"
135The driver failed to allocate an mbuf for the receiver ring.
136.It "rl%d: no memory for tx list"
137The driver failed to allocate an mbuf for the transmitter ring when
138allocating a pad buffer or collapsing an mbuf chain into a cluster.
139.It "rl%d: chip is in D3 power state -- setting to D0"
140This message applies only to adapters which support power
141management.
142Some operating systems place the controller in low power
143mode when shutting down, and some PCI BIOSes fail to bring the chip
144out of this state before configuring it.
145The controller loses all of
146its PCI configuration in the D3 state, so if the BIOS does not set
147it back to full power mode in time, it won't be able to configure it
148correctly.
149The driver tries to detect this condition and bring
150the adapter back to the D0 (full power) state, but this may not be
151enough to return the driver to a fully operational condition.
152If
153you see this message at boot time and the driver fails to attach
154the device as a network interface, you will have to perform second
155warm boot to have the device properly configured.
156.Pp
157Note that this condition only occurs when warm booting from another
158operating system.
159If you power down your system prior to booting
160.Dx ,
161the card should be configured correctly.
162.El
163.Sh SEE ALSO
164.Xr arp 4 ,
165.Xr miibus 4 ,
166.Xr netintro 4 ,
167.Xr ng_ether 4 ,
168.Xr ifconfig 8
169.Rs
170.%B The RealTek 8129 and 8139 datasheets
171.%O ftp.realtek.com.tw:/lancard/data sheet
172.Re
173.Sh HISTORY
174The
175.Nm
176device driver first appeared in
177.Fx 3.0 .
178.Sh AUTHORS
179The
180.Nm
181driver was written by
182.An Bill Paul Aq wpaul@ctr.columbia.edu .
183.Sh BUGS
184Since outbound packets must be longword aligned, the transmit
185routine has to copy an unaligned packet into an mbuf cluster buffer
186before transmission.
187The driver abuses the fact that the cluster buffer
188pool is allocated at system startup time in a contiguous region starting
189at a page boundary.
190Since cluster buffers are 2048 bytes, they are
191longword aligned by definition.
192The driver probably should not be
193depending on this characteristic.
194.Pp
195The RealTek data sheets are of especially poor quality,
196and there is a lot of information missing
197particularly concerning the receiver operation.
198One particularly
199important fact that the data sheets fail to mention relates to the
200way in which the chip fills in the receive buffer.
201When an interrupt
202is posted to signal that a frame has been received, it is possible that
203another frame might be in the process of being copied into the receive
204buffer while the driver is busy handling the first one.
205If the driver
206manages to finish processing the first frame before the chip is done
207DMAing the rest of the next frame, the driver may attempt to process
208the next frame in the buffer before the chip has had a chance to finish
209DMAing all of it.
210.Pp
211The driver can check for an incomplete frame by inspecting the frame
212length in the header preceding the actual packet data: an incomplete
213frame will have the magic length of 0xFFF0.
214When the driver encounters
215this value, it knows that it has finished processing all currently
216available packets.
217Neither this magic value nor its significance are
218documented anywhere in the RealTek data sheets.
219