xref: /dragonfly/share/man/man4/rl.4 (revision e2f5ccfb)
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34.Dd November 4, 1998
35.Dt RL 4
36.Os
37.Sh NAME
38.Nm rl
39.Nd RealTek 8129/8139 fast ethernet device driver
40.Sh SYNOPSIS
41.Cd "device miibus"
42.Cd "device rl"
43.Sh DESCRIPTION
44The
45.Nm
46driver provides support for PCI ethernet adapters and embedded
47controllers based on the RealTek 8129 and 8139 fast ethernet controller
48chips.
49This includes the Allied Telesyn AT2550, Farallon NetLINE 10/100 PCI,
50Genius GF100TXR,
51NDC Communications NE100TX-E, OvisLink LEF-8129TX, OvisLink LEF-8139TX,
52Netronix Inc. EA-1210 NetEther 10/100, KTX-9130TX 10/100 Fast Ethernet,
53Encore ENL832-TX 10/100 M PCI, Longshine LCS-8038TX-R, the
54SMC EZ Card 10/100 PCI 1211-TX, and various other cheap adapters.
55It also supports the Accton EN1207D which has a
56chip labeled MPX5030 (or MPX5038) which appears to be a RealTek workalike.
57.Pp
58The RealTek controllers use bus master DMA but do not use a
59descriptor-based data transfer mechanism.
60The receiver uses a
61single fixed size ring buffer from which packets must be copied
62into mbufs.
63For transmission, there are only four outbound packet
64address registers which require all outgoing packets to be stored
65as contiguous buffers.
66Furthermore, outbound packet buffers must
67be longword aligned or else transmission will fail.
68.Pp
69The 8129 differs from the 8139 in that the 8139 has an internal
70PHY which is controlled through special direct access registers
71whereas the 8129 uses an external PHY via an MII bus.
72The 8139
73supports both 10 and 100Mbps speeds in either full or half duplex.
74The 8129 can support the same speeds and modes given an appropriate
75PHY chip.
76.Pp
77The
78.Nm
79driver supports the following media types:
80.Bl -tag -width xxxxxxxxxxxxxxxxxxxx
81.It autoselect
82Enable autoselection of the media type and options.
83This is only
84supported if the PHY chip attached to the RealTek controller
85supports NWAY autonegotiation.
86The user can manually override
87the autoselected mode by adding media options to the
88.Pa /etc/rc.conf
89file.
90.It 10baseT/UTP
91Set 10Mbps operation.
92The
93.Ar mediaopt
94option can also be used to select either
95.Ar full-duplex
96or
97.Ar half-duplex
98modes.
99.It 100baseTX
100Set 100Mbps (fast ethernet) operation.
101The
102.Ar mediaopt
103option can also be used to select either
104.Ar full-duplex
105or
106.Ar half-duplex
107modes.
108.El
109.Pp
110The
111.Nm
112driver supports the following media options:
113.Bl -tag -width xxxxxxxxxxxxxxxxxxxx
114.It full-duplex
115Force full duplex operation
116.It half-duplex
117Force half duplex operation.
118.El
119.Pp
120Note that the 100baseTX media type is only available if supported
121by the adapter.
122For more information on configuring this device, see
123.Xr ifconfig 8 .
124.Sh DIAGNOSTICS
125.Bl -diag
126.It "rl%d: couldn't map memory"
127A fatal initialization error has occurred.
128.It "rl%d: couldn't map interrupt"
129A fatal initialization error has occurred.
130.It "rl%d: watchdog timeout"
131The device has stopped responding to the network, or there is a problem with
132the network connection (cable).
133.It "rl%d: no memory for rx list"
134The driver failed to allocate an mbuf for the receiver ring.
135.It "rl%d: no memory for tx list"
136The driver failed to allocate an mbuf for the transmitter ring when
137allocating a pad buffer or collapsing an mbuf chain into a cluster.
138.It "rl%d: chip is in D3 power state -- setting to D0"
139This message applies only to adapters which support power
140management.
141Some operating systems place the controller in low power
142mode when shutting down, and some PCI BIOSes fail to bring the chip
143out of this state before configuring it.
144The controller loses all of
145its PCI configuration in the D3 state, so if the BIOS does not set
146it back to full power mode in time, it won't be able to configure it
147correctly.
148The driver tries to detect this condition and bring
149the adapter back to the D0 (full power) state, but this may not be
150enough to return the driver to a fully operational condition.
151If
152you see this message at boot time and the driver fails to attach
153the device as a network interface, you will have to perform second
154warm boot to have the device properly configured.
155.Pp
156Note that this condition only occurs when warm booting from another
157operating system.
158If you power down your system prior to booting
159.Dx ,
160the card should be configured correctly.
161.El
162.Sh SEE ALSO
163.Xr arp 4 ,
164.Xr ifmedia 4 ,
165.Xr miibus 4 ,
166.Xr netintro 4 ,
167.Xr ng_ether 4 ,
168.Xr polling 4 ,
169.Xr ifconfig 8
170.Rs
171.%B The RealTek 8129 and 8139 datasheets
172.%O ftp.realtek.com.tw:/lancard/data sheet
173.Re
174.Sh HISTORY
175The
176.Nm
177device driver first appeared in
178.Fx 3.0 .
179.Sh AUTHORS
180The
181.Nm
182driver was written by
183.An Bill Paul Aq wpaul@ctr.columbia.edu .
184.Sh BUGS
185Since outbound packets must be longword aligned, the transmit
186routine has to copy an unaligned packet into an mbuf cluster buffer
187before transmission.
188The driver abuses the fact that the cluster buffer
189pool is allocated at system startup time in a contiguous region starting
190at a page boundary.
191Since cluster buffers are 2048 bytes, they are
192longword aligned by definition.
193The driver probably should not be
194depending on this characteristic.
195.Pp
196The RealTek data sheets are of especially poor quality,
197and there is a lot of information missing
198particularly concerning the receiver operation.
199One particularly
200important fact that the data sheets fail to mention relates to the
201way in which the chip fills in the receive buffer.
202When an interrupt
203is posted to signal that a frame has been received, it is possible that
204another frame might be in the process of being copied into the receive
205buffer while the driver is busy handling the first one.
206If the driver
207manages to finish processing the first frame before the chip is done
208DMAing the rest of the next frame, the driver may attempt to process
209the next frame in the buffer before the chip has had a chance to finish
210DMAing all of it.
211.Pp
212The driver can check for an incomplete frame by inspecting the frame
213length in the header preceding the actual packet data: an incomplete
214frame will have the magic length of 0xFFF0.
215When the driver encounters
216this value, it knows that it has finished processing all currently
217available packets.
218Neither this magic value nor its significance are
219documented anywhere in the RealTek data sheets.
220