xref: /dragonfly/share/man/man9/microseq.9 (revision 0bb9290e)
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28.Dd June 6, 1998
29.Dt MICROSEQ 9
30.Os
31.Sh NAME
32.Nm microseq
33.Nd ppbus microsequencer developer's guide
34.Sh SYNOPSIS
35.In sys/types.h
36.In dev/ppbus/ppbconf.h
37.In dev/ppbus/ppb_msq.h
38.Sh DESCRIPTION
39See
40.Xr ppbus 4
41for ppbus description and general info about the microsequencer.
42.Pp
43The purpose of this document is to encourage developers to use the
44microsequencer mechanism in order to have:
45.Bl -enum -offset indent
46.It
47a uniform programming model
48.It
49efficient code
50.El
51.Pp
52Before using microsequences, you are encouraged to look at
53.Xr ppc 4
54microsequencer implementation and an example of how using it in
55.Xr vpo 4 .
56.Sh PPBUS register model
57.Ss Background
58The parallel port model chosen for ppbus is the PC parallel port model.
59Thus, any register described later has the same semantic than its counterpart
60in a PC parallel port.
61For more info about ISA/ECP programming, get the
62Microsoft standard referenced as "Extended Capabilities Port Protocol and
63ISA interface Standard". Registers described later are standard parallel port
64registers.
65.Pp
66Mask macros are defined in the standard ppbus include files for each valid
67bit of parallel port registers.
68.Ss Data register
69In compatible or nibble mode, writing to this register will drive data to the
70parallel port data lines.
71In any other mode, drivers may be tri-stated by
72setting the direction bit (PCD) in the control register.
73Reads to this register
74return the value on the data lines.
75.Ss Device status register
76This read-only register reflects the inputs on the parallel port interface.
77.Pp
78.Bl -column "Bit" "Name" "Description" -compact
79.It Em Bit Ta Em Name Ta Em Description
80.It 7 Ta nBUSY Ta "inverted version of parallel port Busy signal"
81.It 6 Ta nACK Ta "version of parallel port nAck signal"
82.It 5 Ta PERROR Ta "version of parallel port PERROR signal"
83.It 4 Ta SELECT Ta "version of parallel port Select signal"
84.It 3 Ta nFAULT Ta "version of parallel port nFault signal"
85.El
86.Pp
87Others are reserved and return undefined result when read.
88.Ss Device control register
89This register directly controls several output signals as well as enabling
90some functions.
91.Pp
92.Bl -column "Bit" "Name    " "Description" -compact
93.It Em Bit Ta Em Name Ta Em Description
94.It 5 Ta PCD Ta "direction bit in extended modes"
95.It 4 Ta IRQENABLE Ta "1 enables an interrupt on the rising edge of nAck"
96.It 3 Ta SELECTIN Ta "inverted and driven as parallel port nSelectin signal"
97.It 2 Ta nINIT Ta "driven as parallel port nInit signal"
98.It 1 Ta AUTOFEED Ta "inverted and driven as parallel port nAutoFd signal"
99.It 0 Ta STROBE Ta "inverted and driven as parallel port nStrobe signal"
100.El
101.Sh MICROINSTRUCTIONS
102.Ss Description
103.Em Microinstructions
104are either parallel port accesses, program iterations, submicrosequence or
105C calls.
106The parallel port must be considered as the logical model described in
107.Xr ppbus 4 .
108.Pp
109Available microinstructions are:
110.Bd -literal
111#define MS_OP_GET       0	/* get <ptr>, <len>			*/
112#define MS_OP_PUT       1	/* put <ptr>, <len>			*/
113#define MS_OP_RFETCH	2	/* rfetch <reg>, <mask>, <ptr>		*/
114#define MS_OP_RSET	3	/* rset <reg>, <mask>, <mask>		*/
115#define MS_OP_RASSERT	4	/* rassert <reg>, <mask>		*/
116#define MS_OP_DELAY     5	/* delay <val>				*/
117#define MS_OP_SET       6	/* set <val>				*/
118#define MS_OP_DBRA      7	/* dbra <offset>			*/
119#define MS_OP_BRSET     8	/* brset <mask>, <offset>		*/
120#define MS_OP_BRCLEAR   9	/* brclear <mask>, <offset>		*/
121#define MS_OP_RET       10	/* ret <retcode>			*/
122#define MS_OP_C_CALL	11	/* c_call <function>, <parameter>	*/
123#define MS_OP_PTR	12	/* ptr <pointer>			*/
124#define MS_OP_ADELAY	13	/* adelay <val>				*/
125#define MS_OP_BRSTAT	14	/* brstat <mask>, <mask>, <offset>	*/
126#define MS_OP_SUBRET	15	/* subret <code>			*/
127#define MS_OP_CALL	16	/* call <microsequence>			*/
128#define MS_OP_RASSERT_P	17	/* rassert_p <iter>, <reg>		*/
129#define MS_OP_RFETCH_P	18	/* rfetch_p <iter>, <reg>, <mask>	*/
130#define MS_OP_TRIG	19	/* trigger <reg>, <len>, <array>	*/
131.Ed
132.Ss Execution context
133The
134.Em execution context
135of microinstructions is:
136.Bl -bullet -offset indent
137.It
138the
139.Em program counter
140which points to the next microinstruction to execute either in the main
141microsequence or in a subcall
142.It
143the current value of
144.Em ptr
145which points to the next char to send/receive
146.It
147the current value of the internal
148.Em branch register
149.El
150.Pp
151This data is modified by some of the microinstructions, not all.
152.Ss MS_OP_GET and MS_OP_PUT
153are microinstructions used to do either predefined standard IEEE1284-1994
154transfers or programmed non-standard io.
155.Ss MS_OP_RFETCH - Register FETCH
156is used to retrieve the current value of a parallel port register, apply a
157mask and save it in a buffer.
158.Pp
159Parameters:
160.Bl -enum -offset indent
161.It
162register
163.It
164character mask
165.It
166pointer to the buffer
167.El
168.Pp
169Predefined macro: MS_RFETCH(reg,mask,ptr)
170.Ss MS_OP_RSET - Register SET
171is used to assert/clear some bits of a particular parallel port register,
172two masks are applied.
173.Pp
174Parameters:
175.Bl -enum -offset indent
176.It
177register
178.It
179mask of bits to assert
180.It
181mask of bits to clear
182.El
183.Pp
184Predefined macro: MS_RSET(reg,assert,clear)
185.Ss MS_OP_RASSERT - Register ASSERT
186is used to assert all bits of a particular parallel port register.
187.Pp
188Parameters:
189.Bl -enum -offset indent
190.It
191register
192.It
193byte to assert
194.El
195.Pp
196Predefined macro: MS_RASSERT(reg,byte)
197.Ss MS_OP_DELAY - microsecond DELAY
198is used to delay the execution of the microsequence.
199.Pp
200Parameter:
201.Bl -enum -offset indent
202.It
203delay in microseconds
204.El
205.Pp
206Predefined macro: MS_DELAY(delay)
207.Ss MS_OP_SET - SET internal branch register
208is used to set the value of the internal branch register.
209.Pp
210Parameter:
211.Bl -enum -offset indent
212.It
213integer value
214.El
215.Pp
216Predefined macro: MS_SET(accum)
217.Ss MS_OP_DBRA - \&Do BRAnch
218is used to branch if internal branch register decremented by one result value
219is positive.
220.Pp
221Parameter:
222.Bl -enum -offset indent
223.It
224integer offset in the current executed (sub)microsequence.
225Offset is added to
226the index of the next microinstruction to execute.
227.El
228.Pp
229Predefined macro: MS_DBRA(offset)
230.Ss MS_OP_BRSET - BRanch on SET
231is used to branch if some of the status register bits of the parallel port
232are set.
233.Pp
234Parameter:
235.Bl -enum -offset indent
236.It
237bits of the status register
238.It
239integer offset in the current executed (sub)microsequence.
240Offset is added to
241the index of the next microinstruction to execute.
242.El
243.Pp
244Predefined macro: MS_BRSET(mask,offset)
245.Ss MS_OP_BRCLEAR - BRanch on CLEAR
246is used to branch if some of the status register bits of the parallel port
247are cleared.
248.Pp
249Parameter:
250.Bl -enum -offset indent
251.It
252bits of the status register
253.It
254integer offset in the current executed (sub)microsequence.
255Offset is added to
256the index of the next microinstruction to execute.
257.El
258.Pp
259Predefined macro: MS_BRCLEAR(mask,offset)
260.Ss MS_OP_RET - RETurn
261is used to return from a microsequence.
262This instruction is mandatory.
263This
264is the only way for the microsequencer to detect the end of the microsequence.
265The return code is returned in the integer pointed by the (int *) parameter
266of the ppb_MS_microseq().
267.Pp
268Parameter:
269.Bl -enum -offset indent
270.It
271integer return code
272.El
273.Pp
274Predefined macro: MS_RET(code)
275.Ss MS_OP_C_CALL - C function CALL
276is used to call C functions from microsequence execution.
277This may be useful
278when a non-standard i/o is performed to retrieve a data character from the
279parallel port.
280.Pp
281Parameter:
282.Bl -enum -offset indent
283.It
284the C function to call
285.It
286the parameter to pass to the function call
287.El
288.Pp
289The C function shall be declared as a
290.Ft int(*)(void *p, char *ptr) .
291The ptr parameter is the current position in the buffer currently scanned.
292.Pp
293Predefined macro: MS_C_CALL(func,param)
294.Ss MS_OP_PTR - initialize internal PTR
295is used to initialize the internal pointer to the currently scanned buffer.
296This pointer is passed to any C call (see above).
297.Pp
298Parameter:
299.Bl -enum -offset indent
300.It
301pointer to the buffer that shall be accessed by xxx_P() microsequence calls.
302Note that this pointer is automatically incremented during xxx_P() calls
303.El
304.Pp
305Predefined macro: MS_PTR(ptr)
306.Ss MS_OP_ADELAY - do an Asynchronous DELAY
307is used to make a tsleep() during microsequence execution.
308The tsleep is
309executed at PPBPRI level.
310.Pp
311Parameter:
312.Bl -enum -offset indent
313.It
314delay in ms
315.El
316.Pp
317Predefined macro: MS_ADELAY(delay)
318.Ss MS_OP_BRSTAT - BRanch on STATe
319is used to branch on status register state condition.
320.Pp
321Parameter:
322.Bl -enum -offset indent
323.It
324mask of asserted bits.
325Bits that shall be asserted in the status register
326are set in the mask
327.It
328mask of cleared bits.
329Bits that shall be cleared in the status register
330are set in the mask
331.It
332integer offset in the current executed (sub)microsequence.
333Offset is added
334to the index of the next microinstruction to execute.
335.El
336.Pp
337Predefined macro: MS_BRSTAT(asserted_bits,clear_bits,offset)
338.Ss MS_OP_SUBRET - SUBmicrosequence RETurn
339is used to return from the submicrosequence call.
340This action is mandatory
341before a RET call.
342Some microinstructions (PUT, GET) may not be callable
343within a submicrosequence.
344.Pp
345No parameter.
346.Pp
347Predefined macro: MS_SUBRET()
348.Ss MS_OP_CALL - submicrosequence CALL
349is used to call a submicrosequence.
350A submicrosequence is a microsequence with
351a SUBRET call.
352Parameter:
353.Bl -enum -offset indent
354.It
355the submicrosequence to execute
356.El
357.Pp
358Predefined macro: MS_CALL(microseq)
359.Ss MS_OP_RASSERT_P - Register ASSERT from internal PTR
360is used to assert a register with data currently pointed by the internal PTR
361pointer.
362Parameter:
363.Bl -enum -offset indent
364.It
365amount of data to write to the register
366.It
367register
368.El
369.Pp
370Predefined macro: MS_RASSERT_P(iter,reg)
371.Ss MS_OP_RFETCH_P - Register FETCH to internal PTR
372is used to fetch data from a register.
373Data is stored in the buffer currently
374pointed by the internal PTR pointer.
375Parameter:
376.Bl -enum -offset indent
377.It
378amount of data to read from the register
379.It
380register
381.It
382mask applied to fetched data
383.El
384.Pp
385Predefined macro: MS_RFETCH_P(iter,reg,mask)
386.Ss MS_OP_TRIG - TRIG register
387is used to trigger the parallel port.
388This microinstruction is intended to
389provide a very efficient control of the parallel port.
390Triggering a register
391is writing data, wait a while, write data, wait a while...
392This allows to
393write magic sequences to the port.
394Parameter:
395.Bl -enum -offset indent
396.It
397amount of data to read from the register
398.It
399register
400.It
401size of the array
402.It
403array of unsigned chars.
404Each couple of u_chars define the data to write to
405the register and the delay in us to wait.
406The delay is limited to 255 us to
407simplify and reduce the size of the array.
408.El
409.Pp
410Predefined macro: MS_TRIG(reg,len,array)
411.Sh MICROSEQUENCES
412.Ss C structures
413.Bd -literal
414union ppb_insarg {
415     int     i;
416     char    c;
417     void    *p;
418     int     (* f)(void *, char *);
419};
420
421struct ppb_microseq {
422     int                     opcode;         /* microins. opcode */
423     union ppb_insarg        arg[PPB_MS_MAXARGS];    /* arguments */
424};
425.Ed
426.Ss Using microsequences
427To instantiate a microsequence, just declare an array of ppb_microseq
428structures and initialize it as needed.
429You may either use predefined macros
430or code directly your microinstructions according to the ppb_microseq
431definition.
432For example,
433.Bd -literal
434     struct ppb_microseq select_microseq[] = {
435
436	     /* parameter list
437	      */
438	     #define SELECT_TARGET    MS_PARAM(0, 1, MS_TYP_INT)
439	     #define SELECT_INITIATOR MS_PARAM(3, 1, MS_TYP_INT)
440
441	     /* send the select command to the drive */
442	     MS_DASS(MS_UNKNOWN),
443	     MS_CASS(H_nAUTO | H_nSELIN |  H_INIT | H_STROBE),
444	     MS_CASS( H_AUTO | H_nSELIN |  H_INIT | H_STROBE),
445	     MS_DASS(MS_UNKNOWN),
446	     MS_CASS( H_AUTO | H_nSELIN | H_nINIT | H_STROBE),
447
448	     /* now, wait until the drive is ready */
449	     MS_SET(VP0_SELTMO),
450/* loop: */     MS_BRSET(H_ACK, 2 /* ready */),
451	     MS_DBRA(-2 /* loop */),
452/* error: */    MS_RET(1),
453/* ready: */    MS_RET(0)
454     };
455.Ed
456.Pp
457Here, some parameters are undefined and must be filled before executing
458the microsequence.
459In order to initialize each microsequence, one
460should use the ppb_MS_init_msq() function like this:
461.Bd -literal
462     ppb_MS_init_msq(select_microseq, 2,
463		     SELECT_TARGET, 1 << target,
464		     SELECT_INITIATOR, 1 << initiator);
465.Ed
466.Pp
467and then execute the microsequence.
468.Ss The microsequencer
469The microsequencer is executed either at ppbus or adapter level (see
470.Xr ppbus 4
471for info about ppbus system layers). Most of the microsequencer is executed
472at ppc level to avoid ppbus to adapter function call overhead.
473But some
474actions like deciding whereas the transfer is IEEE1284-1994 compliant are
475executed at ppbus layer.
476.Sh SEE ALSO
477.Xr ppbus 4 ,
478.Xr ppc 4 ,
479.Xr vpo 4
480.Sh HISTORY
481The
482.Nm
483manual page first appeared in
484.Fx 3.0 .
485.Sh AUTHORS
486This
487manual page was written by
488.An Nicolas Souchu .
489.Sh BUGS
490Only one level of submicrosequences is allowed.
491.Pp
492When triggering the port, maximum delay allowed is 255 us.
493