1.\" 2.\" Copyright (c) 2005 Bruce M Simpson <bms@FreeBSD.org> 3.\" All rights reserved. 4.\" 5.\" Redistribution and use in source and binary forms, with or without 6.\" modification, are permitted provided that the following conditions 7.\" are met: 8.\" 1. Redistributions of source code must retain the above copyright 9.\" notice, this list of conditions and the following disclaimer. 10.\" 2. Redistributions in binary form must reproduce the above copyright 11.\" notice, this list of conditions and the following disclaimer in the 12.\" documentation and/or other materials provided with the distribution. 13.\" 14.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24.\" SUCH DAMAGE. 25.\" 26.\" $FreeBSD: src/share/man/man9/pci.9,v 1.11 2008/02/15 23:56:33 danger Exp $ 27.\" 28.Dd November 9, 2014 29.Dt PCI 9 30.Os 31.Sh NAME 32.Nm pci , 33.Nm pci_read_config , 34.Nm pci_write_config , 35.Nm pci_enable_busmaster , 36.Nm pci_disable_busmaster , 37.Nm pci_enable_io , 38.Nm pci_disable_io , 39.Nm pci_set_powerstate , 40.Nm pci_get_powerstate , 41.Nm pci_find_bsf , 42.Nm pci_find_dbsf , 43.Nm pci_find_device , 44.Nm pci_find_extcap 45.Nd PCI bus interface 46.Sh SYNOPSIS 47.In sys/bus.h 48.In bus/pci/pcivar.h 49.In bus/pci/pcireg.h 50.In bus/pci/pci_cfgreg.h 51.Ft void 52.Fn pci_write_config "device_t dev" "int reg" "uint32_t val" "int width" 53.Ft int 54.Fn pci_enable_busmaster "device_t dev" 55.Ft int 56.Fn pci_disable_busmaster "device_t dev" 57.Ft int 58.Fn pci_enable_io "device_t dev" "int space" 59.Ft int 60.Fn pci_disable_io "device_t dev" "int space" 61.Ft int 62.Fn pci_set_powerstate "device_t dev" "int state" 63.Ft int 64.Fn pci_get_powerstate "device_t dev" 65.Ft uint32_t 66.Fn pci_read_config "device_t dev" "int reg" "int width" 67.Ft device_t 68.Fn pci_find_bsf "uint8_t bus" "uint8_t slot" "uint8_t func" 69.Ft device_t 70.Fn pci_find_dbsf "uint32_t domain" "uint8_t bus" "uint8_t slot" "uint8_t func" 71.Ft device_t 72.Fn pci_find_device "uint16_t vendor" "uint16_t device" 73.Ft int 74.Fn pci_find_extcap "device_t dev" "int capability" "int *capreg" 75.Sh DESCRIPTION 76The 77.Nm 78set of functions are used for managing PCI devices. 79.Pp 80The 81.Fn pci_read_config 82function is used to read data from the PCI configuration 83space of the device 84.Fa dev , 85at offset 86.Fa reg , 87with 88.Fa width 89specifying the size of the access. 90.Pp 91The 92.Fn pci_write_config 93function is used to write the value 94.Fa val 95to the PCI configuration 96space of the device 97.Fa dev , 98at offset 99.Fa reg , 100with 101.Fa width 102specifying the size of the access. 103.Pp 104The 105.Fn pci_enable_busmaster 106function enables PCI bus mastering for the device 107.Fa dev , 108by setting the 109.Dv PCIM_CMD_BUSMASTEREN 110bit in the 111.Dv PCIR_COMMAND 112register. 113The 114.Fn pci_disable_busmaster 115function clears this bit. 116.Pp 117The 118.Fn pci_enable_io 119function enables memory or I/O port address decoding for the device 120.Fa dev , 121by setting the 122.Dv PCIM_CMD_MEMEN 123or 124.Dv PCIM_CMD_PORTEN 125bit in the 126.Dv PCIR_COMMAND 127register appropriately. 128The 129.Fn pci_disable_io 130function clears the appropriate bit. 131The 132.Fa space 133argument specifies which resource is affected; this can be either 134.Dv SYS_RES_MEMORY 135or 136.Dv SYS_RES_IOPORT 137as appropriate. 138.Pp 139.Em NOTE : 140These functions should be used in preference to manually manipulating 141the configuration space. 142.Pp 143The 144.Fn pci_get_powerstate 145function returns the current ACPI power state of the device 146.Fa dev . 147If the device does not support power management capabilities, then the default 148state of 149.Dv PCI_POWERSTATE_D0 150is returned. 151The following power states are defined by ACPI: 152.Bl -hang -width ".Dv PCI_POWERSTATE_UNKNOWN" 153.It Dv PCI_POWERSTATE_D0 154State in which device is on and running. 155It is receiving full power from the system and delivering 156full functionality to the user. 157.It Dv PCI_POWERSTATE_D1 158Class-specific low-power state in which device context may or 159may not be lost. 160Busses in this state cannot do anything to the bus, to 161force devices to lose context. 162.It Dv PCI_POWERSTATE_D2 163Class-specific low-power state in which device context may or 164may not be lost. 165Attains greater power savings than 166.Dv PCI_POWERSTATE_D1 . 167Busses in this state can cause devices to lose some context. 168Devices 169.Em must 170be prepared for the bus to be in this state or higher. 171.It Dv PCI_POWERSTATE_D3 172State in which the device is off and not running. 173Device context is lost, and power from the device can 174be removed. 175.It Dv PCI_POWERSTATE_UNKNOWN 176State of the device is unknown. 177.El 178.Pp 179The 180.Fn pci_set_powerstate 181function is used to transition the device 182.Fa dev 183to the ACPI power state 184.Fa state . 185It checks to see if the device is PCI 2.2 compliant. 186If so, it checks the 187capabilities pointer to determine which power states the device supports. 188If the device does not have power management capabilities, the default state 189of 190.Dv PCI_POWERSTATE_D0 191is set. 192.Pp 193The 194.Fn pci_find_bsf 195function looks up the 196.Vt device_t 197of a PCI device, given its 198.Fa bus , 199.Fa slot , 200and 201.Fa func . 202The 203.Fa slot 204number actually refers to the number of the device on the bus, 205which does not necessarily indicate its geographic location 206in terms of a physical slot. 207Note that in case the system has multiple PCI domains, 208the 209.Fn pci_find_bsf 210function only searches the first one. 211Actually, it is equivalent to: 212.Bd -literal -offset indent 213pci_find_dbsf(0, bus, slot, func); 214.Ed 215.Pp 216The 217.Fn pci_find_dbsf 218function looks up the 219.Vt device_t 220of a PCI device, given its 221.Fa domain , 222.Fa bus , 223.Fa slot , 224and 225.Fa func . 226The 227.Fa slot 228number actually refers to the number of the device on the bus, 229which does not necessarily indicate its geographic location 230in terms of a physical slot. 231.Pp 232The 233.Fn pci_find_device 234function looks up the 235.Vt device_t 236of a PCI device, given its 237.Fa vendor 238and 239.Fa device 240IDs. 241Note that there can be multiple matches for this search; this function 242only returns the first matching device. 243.Pp 244The 245.Fn pci_find_extcap 246function is used to locate the first instance of a PCI-express 247extended capability register set for the device 248.Fa dev . 249The extended capability to locate is specified by ID via 250.Fa capability . 251Constant macros of the form 252.Dv PCIZ_xxx 253for standard extended capability IDs are defined in 254.In bus/pci/pcireg.h . 255If the extended capability is found, then 256.Fa *capreg 257is set to the offset in configuration space of the extended capability 258register set, and 259.Fn pci_find_extcap 260Return the offset in configuration space of the requested extended 261capability entry or 0 if the specified capability was not found. 262.Sh IMPLEMENTATION NOTES 263The 264.Vt pci_addr_t 265type varies according to the size of the PCI bus address 266space on the target architecture. 267.Sh SEE ALSO 268.Xr pci 4 , 269.Xr pciconf 8 , 270.Xr bus_alloc_resource 9 , 271.Xr bus_dma 9 , 272.Xr bus_release_resource 9 , 273.Xr bus_setup_intr 9 , 274.Xr bus_teardown_intr 9 , 275.Xr devclass 9 , 276.Xr device 9 , 277.Xr driver 9 , 278.Xr rman 9 279.Rs 280.%B FreeBSD Developers' Handbook 281.%T NewBus 282.%U http://www.FreeBSD.org/doc/en_US.ISO8859-1/books/developers-handbook/ 283.Re 284.Rs 285.%A Shanley 286.%A Anderson 287.%B PCI System Architecture 288.%N 2nd Edition 289.%I Addison-Wesley 290.%U ISBN 0-201-30974-2 291.Re 292.Sh AUTHORS 293This manual page was written by 294.An Bruce M Simpson Aq Mt bms@FreeBSD.org . 295.Sh BUGS 296The kernel PCI code has a number of references to 297.Dq "slot numbers" . 298These do not refer to the geographic location of PCI devices, 299but to the device number assigned by the combination of the PCI IDSEL 300mechanism and the platform firmware. 301This should be taken note of when working with the kernel PCI code. 302