1 /*- 2 * Copyright (c) 1998 Doug Rabson 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD: src/sys/i386/isa/isa.c,v 1.132.2.5 2002/03/03 05:42:50 nyan Exp $ 27 */ 28 29 /* 30 * Modifications for Intel architecture by Garrett A. Wollman. 31 * Copyright 1998 Massachusetts Institute of Technology 32 * 33 * Permission to use, copy, modify, and distribute this software and 34 * its documentation for any purpose and without fee is hereby 35 * granted, provided that both the above copyright notice and this 36 * permission notice appear in all copies, that both the above 37 * copyright notice and this permission notice appear in all 38 * supporting documentation, and that the name of M.I.T. not be used 39 * in advertising or publicity pertaining to distribution of the 40 * software without specific, written prior permission. M.I.T. makes 41 * no representations about the suitability of this software for any 42 * purpose. It is provided "as is" without express or implied 43 * warranty. 44 * 45 * THIS SOFTWARE IS PROVIDED BY M.I.T. ``AS IS''. M.I.T. DISCLAIMS 46 * ALL EXPRESS OR IMPLIED WARRANTIES WITH REGARD TO THIS SOFTWARE, 47 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 48 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT 49 * SHALL M.I.T. BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 50 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 51 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 52 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 53 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 54 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 55 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 56 * SUCH DAMAGE. 57 */ 58 59 #include <sys/param.h> 60 #include <sys/bus.h> 61 #include <sys/malloc.h> 62 #include <sys/rman.h> 63 #include <sys/machintr.h> 64 65 #include "../isavar.h" 66 #include "../isa_common.h" 67 68 void 69 isa_init(void) 70 { 71 } 72 73 /* 74 * This implementation simply passes the request up to the parent 75 * bus, which in our case is the special i386 nexus, substituting any 76 * configured values if the caller defaulted. We can get away with 77 * this because there is no special mapping for ISA resources on an Intel 78 * platform. When porting this code to another architecture, it may be 79 * necessary to interpose a mapping layer here. 80 */ 81 struct resource * 82 isa_alloc_resource(device_t bus, device_t child, int type, int *rid, 83 u_long start, u_long end, u_long count, u_int flags, int cpuid) 84 { 85 /* 86 * Consider adding a resource definition. We allow rid 0-1 for 87 * irq and drq, 0-3 for memory and 0-7 for ports which is 88 * sufficient for isapnp. 89 */ 90 int passthrough = (device_get_parent(child) != bus); 91 int isdefault = (start == 0UL && end == ~0UL); 92 struct isa_device* idev = DEVTOISA(child); 93 struct resource_list *rl = &idev->id_resources; 94 struct resource_list_entry *rle; 95 96 if (!passthrough && !isdefault) { 97 rle = resource_list_find(rl, type, *rid); 98 if (!rle) { 99 if (*rid < 0) 100 return 0; 101 switch (type) { 102 case SYS_RES_IRQ: 103 if (*rid >= ISA_NIRQ) 104 return 0; 105 cpuid = machintr_intr_cpuid(start); 106 break; 107 case SYS_RES_DRQ: 108 if (*rid >= ISA_NDRQ) 109 return 0; 110 break; 111 case SYS_RES_MEMORY: 112 if (*rid >= ISA_NMEM) 113 return 0; 114 break; 115 case SYS_RES_IOPORT: 116 if (*rid >= ISA_NPORT) 117 return 0; 118 break; 119 default: 120 return 0; 121 } 122 resource_list_add(rl, type, *rid, start, end, 123 count, cpuid); 124 } 125 } 126 127 return resource_list_alloc(rl, bus, child, type, rid, 128 start, end, count, flags, cpuid); 129 } 130 131 int 132 isa_release_resource(device_t bus, device_t child, int type, int rid, 133 struct resource *r) 134 { 135 struct isa_device* idev = DEVTOISA(child); 136 struct resource_list *rl = &idev->id_resources; 137 138 return resource_list_release(rl, bus, child, type, rid, r); 139 } 140 141 /* 142 * We can't use the bus_generic_* versions of these methods because those 143 * methods always pass the bus param as the requesting device, and we need 144 * to pass the child (the i386 nexus knows about this and is prepared to 145 * deal). 146 */ 147 int 148 isa_setup_intr(device_t bus, device_t child, struct resource *r, int flags, 149 void (*ihand)(void *), void *arg, 150 void **cookiep, lwkt_serialize_t serializer) 151 { 152 return (BUS_SETUP_INTR(device_get_parent(bus), child, r, flags, 153 ihand, arg, cookiep, serializer)); 154 } 155 156 int 157 isa_teardown_intr(device_t bus, device_t child, struct resource *r, 158 void *cookie) 159 { 160 return (BUS_TEARDOWN_INTR(device_get_parent(bus), child, r, cookie)); 161 } 162