xref: /dragonfly/sys/bus/isa/x86_64/isa.h (revision c66c7e2f)
1 /*-
2  * Copyright (c) 1990 The Regents of the University of California.
3  * All rights reserved.
4  *
5  * This code is derived from software contributed to Berkeley by
6  * William Jolitz.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  * 3. Neither the name of the University nor the names of its contributors
17  *    may be used to endorse or promote products derived from this software
18  *    without specific prior written permission.
19  *
20  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
21  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
24  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30  * SUCH DAMAGE.
31  *
32  *	from: @(#)isa.h	5.7 (Berkeley) 5/9/91
33  * $FreeBSD: src/sys/i386/isa/isa.h,v 1.23 1999/08/28 00:44:54 peter Exp $
34  */
35 
36 #ifndef _BUS_ISA_ARCH_ISA_H_
37 #define	_BUS_ISA_ARCH_ISA_H_
38 
39 /* BEWARE:  Included in both assembler and C code */
40 
41 /*
42  * ISA Bus conventions
43  */
44 
45 /*
46  * Input / Output Port Assignments
47  */
48 #ifndef IO_ISABEGIN
49 #define	IO_ISABEGIN	0x000		/* 0x000 - Beginning of I/O Registers */
50 
51 		/* CPU Board */
52 #define	IO_DMA1		0x000		/* 8237A DMA Controller #1 */
53 #define	IO_ICU1		0x020		/* 8259A Interrupt Controller #1 */
54 #define	IO_PMP1		0x026		/* 82347 Power Management Peripheral */
55 #define	IO_TIMER1	0x040		/* 8253 Timer #1 */
56 #define	IO_TIMER2	0x048		/* 8253 Timer #2 */
57 #define	IO_KBD		0x060		/* 8042 Keyboard */
58 #define	IO_PPI		0x061		/* Programmable Peripheral Interface */
59 #define	IO_RTC		0x070		/* RTC */
60 #define	IO_NMI		IO_RTC		/* NMI Control */
61 #define	IO_DMAPG	0x080		/* DMA Page Registers */
62 #define	IO_ICU2		0x0A0		/* 8259A Interrupt Controller #2 */
63 #define	IO_DMA2		0x0C0		/* 8237A DMA Controller #2 */
64 #define	IO_NPX		0x0F0		/* Numeric Coprocessor */
65 
66 		/* Cards */
67 					/* 0x100 - 0x16F Open */
68 
69 #define	IO_WD2		0x170		/* Secondary Fixed Disk Controller */
70 
71 #define	IO_PMP2		0x178		/* 82347 Power Management Peripheral */
72 
73 					/* 0x17A - 0x1EF Open */
74 
75 #define	IO_WD1		0x1F0		/* Primary Fixed Disk Controller */
76 #define	IO_GAME		0x201		/* Game Controller */
77 
78 					/* 0x202 - 0x22A Open */
79 
80 #define	IO_ASC2		0x22B		/* AmiScan addr.grp. 2 */
81 
82 					/* 0x230 - 0x26A Open */
83 
84 #define	IO_ASC3		0x26B		/* AmiScan addr.grp. 3 */
85 #define	IO_GSC1		0x270 /* -- 0x27B! GeniScan GS-4500 addr.grp. 1 */
86 #define	IO_LPT2		0x278		/* Parallel Port #2 */
87 
88 					/* 0x280 - 0x2AA Open */
89 
90 #define	IO_ASC4		0x2AB		/* AmiScan addr.grp. 4 */
91 
92 					/* 0x2B0 - 0x2DF Open */
93 
94 #define	IO_GSC2		0x2E0		/* GeniScan GS-4500 addr.grp. 2 */
95 #define	IO_COM4		0x2E8		/* COM4 i/o address */
96 #define	IO_ASC5		0x2EB		/* AmiScan addr.grp. 5 */
97 
98 					/* 0x2F0 - 0x2F7 Open */
99 
100 #define	IO_COM2		0x2F8		/* COM2 i/o address */
101 
102 					/* 0x300 - 0x32A Open */
103 
104 #define	IO_ASC6		0x32B		/* AmiScan addr.grp. 6 */
105 #define	IO_AHA0		0x330		/* adaptec 1542 default addr. */
106 #define	IO_BT0		0x330		/* bustek 742a default addr. */
107 #define	IO_UHA0		0x330		/* ultrastore 14f default addr. */
108 #define	IO_AHA1		0x334		/* adaptec 1542 default addr. */
109 #define	IO_BT1		0x334		/* bustek 742a default addr. */
110 
111 					/* 0x340 - 0x36A Open */
112 
113 #define	IO_ASC7		0x36B		/* AmiScan addr.grp. 7 */
114 #define	IO_GSC3		0x370		/* GeniScan GS-4500 addr.grp. 3 */
115 #define	IO_FD2		0x370		/* secondary base i/o address */
116 #define	IO_LPT1		0x378		/* Parallel Port #1 */
117 
118 					/* 0x380 - 0x3AA Open */
119 
120 #define	IO_ASC8		0x3AB		/* AmiScan addr.grp. 8 */
121 #define	IO_MDA		0x3B0		/* Monochome Adapter */
122 #define	IO_LPT3		0x3BC		/* Monochome Adapter Printer Port */
123 #define	IO_VGA		0x3C0		/* E/VGA Ports */
124 #define	IO_CGA		0x3D0		/* CGA Ports */
125 #define	IO_GSC4		0x3E0		/* GeniScan GS-4500 addr.grp. 4 */
126 #define	IO_COM3		0x3E8		/* COM3 i/o address */
127 #define	IO_ASC1		0x3EB		/* AmiScan addr.grp. 1 */
128 #define	IO_FD1		0x3F0		/* primary base i/o address */
129 #define	IO_COM1		0x3F8		/* COM1 i/o address */
130 
131 #define	IO_ISAEND	0x3FF		/* End (actually Max) of I/O Regs */
132 #endif /* !IO_ISABEGIN */
133 
134 /*
135  * Input / Output Port Sizes - these are from several sources, and tend
136  * to be the larger of what was found.
137  */
138 #ifndef	IO_ISASIZES
139 #define	IO_ISASIZES
140 
141 #define	IO_ASCSIZE	5		/* AmiScan GI1904-based hand scanner */
142 #define	IO_CGASIZE	12		/* CGA controllers */
143 #define	IO_COMSIZE	8		/* 8250, 16x50 com controllers */
144 #define	IO_DMASIZE	16		/* 8237 DMA controllers */
145 #define	IO_DPGSIZE	32		/* 74LS612 DMA page registers */
146 #define	IO_EISASIZE	256		/* EISA controllers */
147 #define	IO_FDCSIZE	8		/* Nec765 floppy controllers */
148 #define	IO_GAMSIZE	16		/* AT compatible game controllers */
149 #define	IO_GSCSIZE	8		/* GeniScan GS-4500G hand scanner */
150 #define	IO_ICUSIZE	16		/* 8259A interrupt controllers */
151 #define	IO_KBDSIZE	16		/* 8042 Keyboard controllers */
152 #define	IO_LPTSIZE	8		/* LPT controllers, some use only 4 */
153 #define	IO_MDASIZE	12		/* Monochrome display controllers */
154 #define	IO_NPXSIZE	16		/* 80387/80487 NPX registers */
155 #define	IO_PMPSIZE	2		/* 82347 power management peripheral */
156 #define	IO_PSMSIZE	5		/* 8042 Keyboard controllers */
157 #define	IO_RTCSIZE	16		/* CMOS real time clock, NMI control */
158 #define	IO_TMRSIZE	16		/* 8253 programmable timers */
159 #define	IO_VGASIZE	16		/* VGA controllers */
160 #define	IO_WDCSIZE	8		/* WD compatible disk controllers */
161 
162 #endif /* !IO_ISASIZES */
163 
164 /*
165  * Input / Output Memory Physical Addresses
166  */
167 #ifndef	IOM_BEGIN
168 #define	IOM_BEGIN	0x0A0000	/* Start of I/O Memory "hole" */
169 #define	IOM_END		0x100000	/* End of I/O Memory "hole" */
170 #define	IOM_SIZE	(IOM_END - IOM_BEGIN)
171 #endif /* !IOM_BEGIN */
172 
173 /*
174  * RAM Physical Address Space (ignoring the above mentioned "hole")
175  */
176 #ifndef	RAM_BEGIN
177 #define	RAM_BEGIN	0x0000000	/* Start of RAM Memory */
178 #define	RAM_END		0x1000000	/* End of RAM Memory */
179 #define	RAM_SIZE	(RAM_END - RAM_BEGIN)
180 #endif /* !RAM_BEGIN */
181 
182 /*
183  * Oddball Physical Memory Addresses
184  */
185 #ifndef	COMPAQ_RAMRELOC
186 #define	COMPAQ_RAMRELOC	0x80C00000	/* Compaq RAM relocation/diag */
187 #define	COMPAQ_RAMSETUP	0x80C00002	/* Compaq RAM setup */
188 #define	WEITEK_FPU	0xC0000000	/* WTL 2167 */
189 #define	CYRIX_EMC	0xC0000000	/* Cyrix EMC */
190 #endif /* !COMPAQ_RAMRELOC */
191 
192 #endif /* !_BUS_ISA_ARCH_ISA_H_ */
193