1 /*- 2 * Copyright (c) 2006 Bernd Walter. All rights reserved. 3 * Copyright (c) 2006 M. Warner Losh. All rights reserved. 4 * Copyright (c) 2017 Marius Strobl <marius@FreeBSD.org> 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 * 26 * Portions of this software may have been developed with reference to 27 * the SD Simplified Specification. The following disclaimer may apply: 28 * 29 * The following conditions apply to the release of the simplified 30 * specification ("Simplified Specification") by the SD Card Association and 31 * the SD Group. The Simplified Specification is a subset of the complete SD 32 * Specification which is owned by the SD Card Association and the SD 33 * Group. This Simplified Specification is provided on a non-confidential 34 * basis subject to the disclaimers below. Any implementation of the 35 * Simplified Specification may require a license from the SD Card 36 * Association, SD Group, SD-3C LLC or other third parties. 37 * 38 * Disclaimers: 39 * 40 * The information contained in the Simplified Specification is presented only 41 * as a standard specification for SD Cards and SD Host/Ancillary products and 42 * is provided "AS-IS" without any representations or warranties of any 43 * kind. No responsibility is assumed by the SD Group, SD-3C LLC or the SD 44 * Card Association for any damages, any infringements of patents or other 45 * right of the SD Group, SD-3C LLC, the SD Card Association or any third 46 * parties, which may result from its use. No license is granted by 47 * implication, estoppel or otherwise under any patent or other rights of the 48 * SD Group, SD-3C LLC, the SD Card Association or any third party. Nothing 49 * herein shall be construed as an obligation by the SD Group, the SD-3C LLC 50 * or the SD Card Association to disclose or distribute any technical 51 * information, know-how or other confidential information to any third party. 52 * 53 * $FreeBSD: src/sys/dev/mmc/mmc.c,v 1.38 2009/08/20 19:17:53 jhb Exp $ 54 */ 55 56 #include <sys/param.h> 57 #include <sys/systm.h> 58 #include <sys/kernel.h> 59 #include <sys/malloc.h> 60 #include <sys/lock.h> 61 #include <sys/module.h> 62 #include <sys/spinlock.h> 63 #include <sys/bus.h> 64 #include <sys/endian.h> 65 #include <sys/sysctl.h> 66 #include <sys/time.h> 67 68 #include <bus/mmc/bridge.h> 69 #include <bus/mmc/mmc_private.h> 70 #include <bus/mmc/mmc_subr.h> 71 #include <bus/mmc/mmcreg.h> 72 #include <bus/mmc/mmcbrvar.h> 73 #include <bus/mmc/mmcvar.h> 74 #include "mmcbr_if.h" 75 #include "mmcbus_if.h" 76 77 CTASSERT(bus_timing_max <= sizeof(uint32_t) * NBBY); 78 79 /* 80 * Per-card data 81 */ 82 struct mmc_ivars { 83 uint32_t raw_cid[4]; /* Raw bits of the CID */ 84 uint32_t raw_csd[4]; /* Raw bits of the CSD */ 85 uint32_t raw_scr[2]; /* Raw bits of the SCR */ 86 uint8_t raw_ext_csd[MMC_EXTCSD_SIZE]; /* Raw bits of the EXT_CSD */ 87 uint32_t raw_sd_status[16]; /* Raw bits of the SD_STATUS */ 88 uint16_t rca; 89 enum mmc_card_mode mode; 90 struct mmc_cid cid; /* cid decoded */ 91 struct mmc_csd csd; /* csd decoded */ 92 struct mmc_scr scr; /* scr decoded */ 93 struct mmc_sd_status sd_status; /* SD_STATUS decoded */ 94 u_char read_only; /* True when the device is read-only */ 95 u_char bus_width; /* Bus width to use */ 96 u_char high_cap; /* High Capacity card (block addressed) */ 97 uint32_t sec_count; /* Card capacity in 512byte blocks */ 98 uint32_t timings; /* Mask of bus timings supported */ 99 uint32_t vccq_120; /* Mask of bus timings at VCCQ of 1.2 V */ 100 uint32_t vccq_180; /* Mask of bus timings at VCCQ of 1.8 V */ 101 uint32_t tran_speed; /* Max speed in normal mode */ 102 uint32_t hs_tran_speed; /* Max speed in high speed mode */ 103 uint32_t erase_sector; /* Card native erase sector size */ 104 uint32_t cmd6_time; /* Generic switch timeout [us] */ 105 char card_id_string[64];/* Formatted CID info (serial, MFG, etc) */ 106 char card_sn_string[16];/* Formatted serial # for disk->d_ident */ 107 }; 108 109 #define CMD_RETRIES 3 110 111 SYSCTL_NODE(_hw, OID_AUTO, mmc, CTLFLAG_RD, NULL, "mmc driver"); 112 113 static int mmc_debug; 114 SYSCTL_INT(_hw_mmc, OID_AUTO, debug, CTLFLAG_RW, &mmc_debug, 0, "Debug level"); 115 116 /* bus entry points */ 117 static int mmc_acquire_bus(device_t busdev, device_t dev); 118 static int mmc_attach(device_t dev); 119 static int mmc_child_location_str(device_t dev, device_t child, char *buf, 120 size_t buflen); 121 static int mmc_detach(device_t dev); 122 static int mmc_probe(device_t dev); 123 static int mmc_read_ivar(device_t bus, device_t child, int which, 124 uintptr_t *result); 125 static int mmc_release_bus(device_t busdev, device_t dev); 126 static int mmc_resume(device_t dev); 127 static int mmc_suspend(device_t dev); 128 static int mmc_wait_for_request(device_t brdev, device_t reqdev, 129 struct mmc_request *req); 130 static int mmc_write_ivar(device_t bus, device_t child, int which, 131 uintptr_t value); 132 133 #define MMC_LOCK(_sc) lockmgr(&(_sc)->sc_lock, LK_EXCLUSIVE) 134 #define MMC_UNLOCK(_sc) lockmgr(&(_sc)->sc_lock, LK_RELEASE) 135 #define MMC_LOCK_INIT(_sc) lockinit(&(_sc)->sc_lock, "mmc", 0, LK_CANRECURSE) 136 #define MMC_LOCK_DESTROY(_sc) lockuninit(&(_sc)->sc_lock); 137 #define MMC_ASSERT_LOCKED(_sc) KKASSERT(lockstatus(&(_sc)->sc_lock, curthread) != 0); 138 #define MMC_ASSERT_UNLOCKED(_sc) KKASSERT(lockstatus(&(_sc)->sc_lock, curthread) == 0); 139 140 static int mmc_all_send_cid(struct mmc_softc *sc, uint32_t *rawcid); 141 static void mmc_app_decode_scr(uint32_t *raw_scr, struct mmc_scr *scr); 142 static void mmc_app_decode_sd_status(uint32_t *raw_sd_status, 143 struct mmc_sd_status *sd_status); 144 static int mmc_app_sd_status(struct mmc_softc *sc, uint16_t rca, 145 uint32_t *rawsdstatus); 146 static int mmc_app_send_scr(struct mmc_softc *sc, uint16_t rca, 147 uint32_t *rawscr); 148 static int mmc_calculate_clock(struct mmc_softc *sc); 149 static void mmc_decode_cid_mmc(uint32_t *raw_cid, struct mmc_cid *cid, 150 bool is_4_41p); 151 static void mmc_decode_cid_sd(uint32_t *raw_cid, struct mmc_cid *cid); 152 static void mmc_decode_csd_mmc(uint32_t *raw_csd, struct mmc_csd *csd); 153 static void mmc_decode_csd_sd(uint32_t *raw_csd, struct mmc_csd *csd); 154 static void mmc_delayed_attach(void *xsc); 155 static int mmc_delete_cards(struct mmc_softc *sc); 156 static void mmc_discover_cards(struct mmc_softc *sc); 157 static void mmc_format_card_id_string(struct mmc_ivars *ivar); 158 static void mmc_go_discovery(struct mmc_softc *sc); 159 static uint32_t mmc_get_bits(uint32_t *bits, int bit_len, int start, 160 int size); 161 static int mmc_highest_voltage(uint32_t ocr); 162 static void mmc_idle_cards(struct mmc_softc *sc); 163 static void mmc_ms_delay(int ms); 164 static void mmc_log_card(device_t dev, struct mmc_ivars *ivar, int newcard); 165 static void mmc_power_down(struct mmc_softc *sc); 166 static void mmc_power_up(struct mmc_softc *sc); 167 static void mmc_rescan_cards(struct mmc_softc *sc); 168 static void mmc_scan(struct mmc_softc *sc); 169 static int mmc_sd_switch(struct mmc_softc *sc, uint8_t mode, uint8_t grp, 170 uint8_t value, uint8_t *res); 171 static int mmc_select_card(struct mmc_softc *sc, uint16_t rca); 172 static uint32_t mmc_select_vdd(struct mmc_softc *sc, uint32_t ocr); 173 static int mmc_send_app_op_cond(struct mmc_softc *sc, uint32_t ocr, 174 uint32_t *rocr); 175 static int mmc_send_csd(struct mmc_softc *sc, uint16_t rca, uint32_t *rawcsd); 176 static int mmc_send_if_cond(struct mmc_softc *sc, uint8_t vhs); 177 static int mmc_send_op_cond(struct mmc_softc *sc, uint32_t ocr, 178 uint32_t *rocr); 179 static int mmc_send_relative_addr(struct mmc_softc *sc, uint32_t *resp); 180 static int mmc_set_blocklen(struct mmc_softc *sc, uint32_t len); 181 static int mmc_set_card_bus_width(struct mmc_softc *sc, struct mmc_ivars *ivar); 182 static int mmc_set_power_class(struct mmc_softc *sc, struct mmc_ivars *ivar); 183 static int mmc_set_relative_addr(struct mmc_softc *sc, uint16_t resp); 184 static int mmc_set_timing(struct mmc_softc *sc, struct mmc_ivars *ivar, 185 enum mmc_bus_timing timing); 186 static int mmc_test_bus_width(struct mmc_softc *sc); 187 static uint32_t mmc_timing_to_dtr(struct mmc_ivars *ivar, 188 enum mmc_bus_timing timing); 189 static const char *mmc_timing_to_string(enum mmc_bus_timing timing); 190 static int mmc_wait_for_command(struct mmc_softc *sc, uint32_t opcode, 191 uint32_t arg, uint32_t flags, uint32_t *resp, int retries); 192 static int mmc_wait_for_req(struct mmc_softc *sc, struct mmc_request *req); 193 static void mmc_wakeup(struct mmc_request *req); 194 195 static void 196 mmc_ms_delay(int ms) 197 { 198 int timo; 199 int dummy; 200 201 timo = ms * hz / 1000; 202 if (timo > 0) 203 tsleep(&dummy, 0, "mmcslp", timo); 204 else 205 DELAY(1000 * ms); 206 } 207 208 static int 209 mmc_probe(device_t dev) 210 { 211 212 device_set_desc(dev, "MMC/SD bus"); 213 return (0); 214 } 215 216 static int 217 mmc_attach(device_t dev) 218 { 219 struct mmc_softc *sc; 220 221 sc = device_get_softc(dev); 222 sc->dev = dev; 223 sc->retries = 1000; /* 10 seconds worth */ 224 MMC_LOCK_INIT(sc); 225 226 /* We'll probe and attach our children later, but before / mount */ 227 sc->config_intrhook.ich_func = mmc_delayed_attach; 228 sc->config_intrhook.ich_arg = sc; 229 sc->config_intrhook.ich_desc = "mmc"; 230 if (config_intrhook_establish(&sc->config_intrhook) != 0) 231 device_printf(dev, "config_intrhook_establish failed\n"); 232 return (0); 233 } 234 235 static int 236 mmc_detach(device_t dev) 237 { 238 struct mmc_softc *sc = device_get_softc(dev); 239 int err; 240 241 if ((err = mmc_delete_cards(sc)) != 0) 242 return (err); 243 mmc_power_down(sc); 244 MMC_LOCK_DESTROY(sc); 245 246 return (0); 247 } 248 249 static int 250 mmc_suspend(device_t dev) 251 { 252 struct mmc_softc *sc = device_get_softc(dev); 253 int err; 254 255 err = bus_generic_suspend(dev); 256 if (err) 257 return (err); 258 mmc_power_down(sc); 259 return (0); 260 } 261 262 static int 263 mmc_resume(device_t dev) 264 { 265 struct mmc_softc *sc = device_get_softc(dev); 266 267 mmc_scan(sc); 268 return (bus_generic_resume(dev)); 269 } 270 271 static int 272 mmc_acquire_bus(device_t busdev, device_t dev) 273 { 274 struct mmc_softc *sc; 275 struct mmc_ivars *ivar; 276 int err, rca; 277 enum mmc_bus_timing timing; 278 279 err = MMCBR_ACQUIRE_HOST(device_get_parent(busdev), busdev); 280 if (err) 281 return (err); 282 sc = device_get_softc(busdev); 283 MMC_LOCK(sc); 284 if (sc->owner) 285 panic("mmc: host bridge didn't serialize us."); 286 sc->owner = dev; 287 MMC_UNLOCK(sc); 288 289 if (busdev != dev) { 290 /* 291 * Keep track of the last rca that we've selected. If 292 * we're asked to do it again, don't. We never 293 * unselect unless the bus code itself wants the mmc 294 * bus, and constantly reselecting causes problems. 295 */ 296 ivar = device_get_ivars(dev); 297 rca = ivar->rca; 298 if (sc->last_rca != rca) { 299 if (mmc_select_card(sc, rca) != MMC_ERR_NONE) { 300 device_printf(sc->dev, "Card at relative " 301 "address %d failed to select.\n", rca); 302 return (ENXIO); 303 } 304 sc->last_rca = rca; 305 timing = mmcbr_get_timing(busdev); 306 /* Prepare bus width for the new card. */ 307 if (bootverbose || mmc_debug) { 308 device_printf(busdev, 309 "setting bus width to %d bits %s timing\n", 310 (ivar->bus_width == bus_width_4) ? 4 : 311 (ivar->bus_width == bus_width_8) ? 8 : 1, 312 mmc_timing_to_string(timing)); 313 } 314 if (mmc_set_card_bus_width(sc, ivar) != MMC_ERR_NONE) { 315 device_printf(sc->dev, "Card at relative " 316 "address %d failed to set bus width.\n", 317 rca); 318 return (ENXIO); 319 } 320 if (isset(&ivar->vccq_120, timing)) 321 mmcbr_set_vccq(busdev, vccq_120); 322 else if (isset(&ivar->vccq_180, timing)) 323 mmcbr_set_vccq(busdev, vccq_180); 324 else 325 mmcbr_set_vccq(busdev, vccq_330); 326 if (mmcbr_switch_vccq(busdev) != 0) { 327 device_printf(sc->dev, "Failed to set VCCQ " 328 "for card at relative address %d.\n", rca); 329 return (ENXIO); 330 } 331 if (mmc_set_power_class(sc, ivar) != MMC_ERR_NONE) { 332 device_printf(sc->dev, "Card at relative " 333 "address %d failed to set power class.\n", 334 rca); 335 return (ENXIO); 336 } 337 mmcbr_set_bus_width(busdev, ivar->bus_width); 338 mmcbr_update_ios(busdev); 339 } 340 } else { 341 /* 342 * If there's a card selected, stand down. 343 */ 344 if (sc->last_rca != 0) { 345 mmc_select_card(sc, 0); 346 sc->last_rca = 0; 347 } 348 } 349 350 return (0); 351 } 352 353 static int 354 mmc_release_bus(device_t busdev, device_t dev) 355 { 356 struct mmc_softc *sc; 357 int err; 358 359 sc = device_get_softc(busdev); 360 361 MMC_LOCK(sc); 362 if (!sc->owner) 363 panic("mmc: releasing unowned bus."); 364 if (sc->owner != dev) 365 panic("mmc: you don't own the bus. game over."); 366 MMC_UNLOCK(sc); 367 err = MMCBR_RELEASE_HOST(device_get_parent(busdev), busdev); 368 if (err) 369 return (err); 370 MMC_LOCK(sc); 371 sc->owner = NULL; 372 MMC_UNLOCK(sc); 373 return (0); 374 } 375 376 static uint32_t 377 mmc_select_vdd(struct mmc_softc *sc, uint32_t ocr) 378 { 379 380 return (ocr & MMC_OCR_VOLTAGE); 381 } 382 383 static int 384 mmc_highest_voltage(uint32_t ocr) 385 { 386 int i; 387 388 for (i = MMC_OCR_MAX_VOLTAGE_SHIFT; 389 i >= MMC_OCR_MIN_VOLTAGE_SHIFT; i--) 390 if (ocr & (1 << i)) 391 return (i); 392 return (-1); 393 } 394 395 static void 396 mmc_wakeup(struct mmc_request *req) 397 { 398 struct mmc_softc *sc; 399 400 sc = (struct mmc_softc *)req->done_data; 401 MMC_LOCK(sc); 402 req->flags |= MMC_REQ_DONE; 403 MMC_UNLOCK(sc); 404 wakeup(req); 405 } 406 407 static int 408 mmc_wait_for_req(struct mmc_softc *sc, struct mmc_request *req) 409 { 410 411 req->done = mmc_wakeup; 412 req->done_data = sc; 413 if (mmc_debug > 1) { 414 device_printf(sc->dev, "REQUEST: CMD%d arg %#x flags %#x", 415 req->cmd->opcode, req->cmd->arg, req->cmd->flags); 416 if (req->cmd->data) { 417 kprintf(" data %d\n", (int)req->cmd->data->len); 418 } else 419 kprintf("\n"); 420 } 421 MMCBR_REQUEST(device_get_parent(sc->dev), sc->dev, req); 422 MMC_LOCK(sc); 423 while ((req->flags & MMC_REQ_DONE) == 0) 424 lksleep(req, &sc->sc_lock, 0, "mmcreq", 0); 425 MMC_UNLOCK(sc); 426 if (mmc_debug > 2 || (mmc_debug > 0 && req->cmd->error != MMC_ERR_NONE)) 427 device_printf(sc->dev, "CMD%d RESULT: %d\n", 428 req->cmd->opcode, req->cmd->error); 429 return (0); 430 } 431 432 static int 433 mmc_wait_for_request(device_t brdev, device_t reqdev __unused, 434 struct mmc_request *req) 435 { 436 struct mmc_softc *sc = device_get_softc(brdev); 437 438 return (mmc_wait_for_req(sc, req)); 439 } 440 441 static int 442 mmc_wait_for_command(struct mmc_softc *sc, uint32_t opcode, 443 uint32_t arg, uint32_t flags, uint32_t *resp, int retries) 444 { 445 struct mmc_command cmd; 446 int err; 447 448 memset(&cmd, 0, sizeof(cmd)); 449 cmd.opcode = opcode; 450 cmd.arg = arg; 451 cmd.flags = flags; 452 cmd.data = NULL; 453 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, retries); 454 if (err) 455 return (err); 456 if (resp) { 457 if (flags & MMC_RSP_136) 458 memcpy(resp, cmd.resp, 4 * sizeof(uint32_t)); 459 else 460 *resp = cmd.resp[0]; 461 } 462 return (0); 463 } 464 465 static void 466 mmc_idle_cards(struct mmc_softc *sc) 467 { 468 device_t dev; 469 struct mmc_command cmd; 470 471 dev = sc->dev; 472 mmcbr_set_chip_select(dev, cs_high); 473 mmcbr_update_ios(dev); 474 mmc_ms_delay(1); 475 476 memset(&cmd, 0, sizeof(cmd)); 477 cmd.opcode = MMC_GO_IDLE_STATE; 478 cmd.arg = 0; 479 cmd.flags = MMC_RSP_NONE | MMC_CMD_BC; 480 cmd.data = NULL; 481 mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES); 482 mmc_ms_delay(1); 483 484 mmcbr_set_chip_select(dev, cs_dontcare); 485 mmcbr_update_ios(dev); 486 mmc_ms_delay(1); 487 } 488 489 static int 490 mmc_send_app_op_cond(struct mmc_softc *sc, uint32_t ocr, uint32_t *rocr) 491 { 492 struct mmc_command cmd; 493 int err = MMC_ERR_NONE, i; 494 495 memset(&cmd, 0, sizeof(cmd)); 496 cmd.opcode = ACMD_SD_SEND_OP_COND; 497 cmd.arg = ocr; 498 cmd.flags = MMC_RSP_R3 | MMC_CMD_BCR; 499 cmd.data = NULL; 500 501 for (i = 0; i < sc->retries; i++) { 502 err = mmc_wait_for_app_cmd(sc->dev, sc->dev, 0, &cmd, 503 CMD_RETRIES); 504 if (err != MMC_ERR_NONE) 505 break; 506 if ((cmd.resp[0] & MMC_OCR_CARD_BUSY) || 507 (ocr & MMC_OCR_VOLTAGE) == 0) 508 break; 509 err = MMC_ERR_TIMEOUT; 510 mmc_ms_delay(10); 511 } 512 513 if (rocr && err == MMC_ERR_NONE) 514 *rocr = cmd.resp[0]; 515 516 return (err); 517 } 518 519 static int 520 mmc_send_op_cond(struct mmc_softc *sc, uint32_t ocr, uint32_t *rocr) 521 { 522 struct mmc_command cmd; 523 int err = MMC_ERR_NONE, i; 524 525 memset(&cmd, 0, sizeof(cmd)); 526 cmd.opcode = MMC_SEND_OP_COND; 527 cmd.arg = ocr; 528 cmd.flags = MMC_RSP_R3 | MMC_CMD_BCR; 529 cmd.data = NULL; 530 531 for (i = 0; i < sc->retries; i++) { 532 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES); 533 if (err != MMC_ERR_NONE) 534 break; 535 if ((cmd.resp[0] & MMC_OCR_CARD_BUSY) || 536 (ocr & MMC_OCR_VOLTAGE) == 0) 537 break; 538 err = MMC_ERR_TIMEOUT; 539 mmc_ms_delay(10); 540 } 541 542 if (rocr && err == MMC_ERR_NONE) 543 *rocr = cmd.resp[0]; 544 545 return (err); 546 } 547 548 static int 549 mmc_send_if_cond(struct mmc_softc *sc, uint8_t vhs) 550 { 551 struct mmc_command cmd; 552 int err; 553 554 memset(&cmd, 0, sizeof(cmd)); 555 cmd.opcode = SD_SEND_IF_COND; 556 cmd.arg = (vhs << 8) + 0xAA; 557 cmd.flags = MMC_RSP_R7 | MMC_CMD_BCR; 558 cmd.data = NULL; 559 560 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, 5*CMD_RETRIES); 561 return (err); 562 } 563 564 static void 565 mmc_power_up(struct mmc_softc *sc) 566 { 567 device_t dev; 568 enum mmc_vccq vccq; 569 570 dev = sc->dev; 571 mmcbr_set_vdd(dev, mmc_highest_voltage(mmcbr_get_host_ocr(dev))); 572 mmcbr_set_bus_mode(dev, opendrain); 573 mmcbr_set_chip_select(dev, cs_dontcare); 574 mmcbr_set_bus_width(dev, bus_width_1); 575 mmcbr_set_power_mode(dev, power_up); 576 mmcbr_set_clock(dev, 0); 577 mmcbr_update_ios(dev); 578 for (vccq = vccq_330; ; vccq--) { 579 mmcbr_set_vccq(dev, vccq); 580 if (mmcbr_switch_vccq(dev) == 0 || vccq == vccq_120) 581 break; 582 } 583 mmc_ms_delay(1); 584 585 mmcbr_set_clock(dev, SD_MMC_CARD_ID_FREQUENCY); 586 mmcbr_set_timing(dev, bus_timing_normal); 587 mmcbr_set_power_mode(dev, power_on); 588 mmcbr_update_ios(dev); 589 mmc_ms_delay(2); 590 } 591 592 static void 593 mmc_power_down(struct mmc_softc *sc) 594 { 595 device_t dev = sc->dev; 596 597 mmcbr_set_bus_mode(dev, opendrain); 598 mmcbr_set_chip_select(dev, cs_dontcare); 599 mmcbr_set_bus_width(dev, bus_width_1); 600 mmcbr_set_power_mode(dev, power_off); 601 mmcbr_set_clock(dev, 0); 602 mmcbr_set_timing(dev, bus_timing_normal); 603 mmcbr_update_ios(dev); 604 } 605 606 static int 607 mmc_select_card(struct mmc_softc *sc, uint16_t rca) 608 { 609 int flags; 610 611 flags = (rca ? MMC_RSP_R1B : MMC_RSP_NONE) | MMC_CMD_AC; 612 return (mmc_wait_for_command(sc, MMC_SELECT_CARD, (uint32_t)rca << 16, 613 flags, NULL, CMD_RETRIES)); 614 } 615 616 static int 617 mmc_sd_switch(struct mmc_softc *sc, uint8_t mode, uint8_t grp, uint8_t value, 618 uint8_t *res) 619 { 620 int err; 621 struct mmc_command cmd; 622 struct mmc_data data; 623 624 memset(&cmd, 0, sizeof(cmd)); 625 memset(&data, 0, sizeof(data)); 626 memset(res, 0, 64); 627 628 cmd.opcode = SD_SWITCH_FUNC; 629 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 630 cmd.arg = mode << 31; /* 0 - check, 1 - set */ 631 cmd.arg |= 0x00FFFFFF; 632 cmd.arg &= ~(0xF << (grp * 4)); 633 cmd.arg |= value << (grp * 4); 634 cmd.data = &data; 635 636 data.data = res; 637 data.len = 64; 638 data.flags = MMC_DATA_READ; 639 640 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES); 641 return (err); 642 } 643 644 static int 645 mmc_set_card_bus_width(struct mmc_softc *sc, struct mmc_ivars *ivar) 646 { 647 struct mmc_command cmd; 648 int err; 649 uint8_t value; 650 651 if (mmcbr_get_mode(sc->dev) == mode_sd) { 652 memset(&cmd, 0, sizeof(cmd)); 653 cmd.opcode = ACMD_SET_CLR_CARD_DETECT; 654 cmd.flags = MMC_RSP_R1 | MMC_CMD_AC; 655 cmd.arg = SD_CLR_CARD_DETECT; 656 err = mmc_wait_for_app_cmd(sc->dev, sc->dev, ivar->rca, &cmd, 657 CMD_RETRIES); 658 if (err != 0) 659 return (err); 660 memset(&cmd, 0, sizeof(cmd)); 661 cmd.opcode = ACMD_SET_BUS_WIDTH; 662 cmd.flags = MMC_RSP_R1 | MMC_CMD_AC; 663 switch (ivar->bus_width) { 664 case bus_width_1: 665 cmd.arg = SD_BUS_WIDTH_1; 666 break; 667 case bus_width_4: 668 cmd.arg = SD_BUS_WIDTH_4; 669 break; 670 default: 671 return (MMC_ERR_INVALID); 672 } 673 err = mmc_wait_for_app_cmd(sc->dev, sc->dev, ivar->rca, &cmd, 674 CMD_RETRIES); 675 } else { 676 switch (ivar->bus_width) { 677 case bus_width_1: 678 value = EXT_CSD_BUS_WIDTH_1; 679 break; 680 case bus_width_4: 681 switch (mmcbr_get_timing(sc->dev)) { 682 case bus_timing_mmc_ddr52: 683 case bus_timing_mmc_hs200: 684 case bus_timing_mmc_hs400: 685 case bus_timing_mmc_hs400es: 686 value = EXT_CSD_BUS_WIDTH_4_DDR; 687 break; 688 default: 689 value = EXT_CSD_BUS_WIDTH_4; 690 break; 691 } 692 break; 693 case bus_width_8: 694 switch (mmcbr_get_timing(sc->dev)) { 695 case bus_timing_mmc_ddr52: 696 case bus_timing_mmc_hs200: 697 case bus_timing_mmc_hs400: 698 case bus_timing_mmc_hs400es: 699 value = EXT_CSD_BUS_WIDTH_8_DDR; 700 break; 701 default: 702 value = EXT_CSD_BUS_WIDTH_8; 703 break; 704 } 705 break; 706 default: 707 return (MMC_ERR_INVALID); 708 } 709 err = mmc_switch(sc->dev, sc->dev, ivar->rca, 710 EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BUS_WIDTH, value, 711 ivar->cmd6_time, true); 712 } 713 return (err); 714 } 715 716 static int 717 mmc_set_power_class(struct mmc_softc *sc, struct mmc_ivars *ivar) 718 { 719 device_t dev; 720 const uint8_t *ext_csd; 721 uint32_t clock; 722 uint8_t value; 723 724 dev = sc->dev; 725 if (mmcbr_get_mode(dev) != mode_mmc || ivar->csd.spec_vers < 4) 726 return (MMC_ERR_NONE); 727 728 value = 0; 729 ext_csd = ivar->raw_ext_csd; 730 clock = mmcbr_get_clock(dev); 731 switch (1 << mmcbr_get_vdd(dev)) { 732 case MMC_OCR_LOW_VOLTAGE: 733 if (clock <= MMC_TYPE_HS_26_MAX) { 734 value = ext_csd[EXT_CSD_PWR_CL_26_195]; 735 } else if (clock <= MMC_TYPE_HS_52_MAX) { 736 if (mmcbr_get_timing(dev) >= bus_timing_mmc_ddr52 && 737 ivar->bus_width >= bus_width_4) 738 value = ext_csd[EXT_CSD_PWR_CL_52_195_DDR]; 739 else 740 value = ext_csd[EXT_CSD_PWR_CL_52_195]; 741 } else if (clock <= MMC_TYPE_HS200_HS400ES_MAX) { 742 value = ext_csd[EXT_CSD_PWR_CL_200_195]; 743 } 744 break; 745 case MMC_OCR_270_280: 746 case MMC_OCR_280_290: 747 case MMC_OCR_290_300: 748 case MMC_OCR_300_310: 749 case MMC_OCR_310_320: 750 case MMC_OCR_320_330: 751 case MMC_OCR_330_340: 752 case MMC_OCR_340_350: 753 case MMC_OCR_350_360: 754 if (clock <= MMC_TYPE_HS_26_MAX) { 755 value = ext_csd[EXT_CSD_PWR_CL_26_360]; 756 } else if (clock <= MMC_TYPE_HS_52_MAX) { 757 if (mmcbr_get_timing(dev) == bus_timing_mmc_ddr52 && 758 ivar->bus_width >= bus_width_4) 759 value = ext_csd[EXT_CSD_PWR_CL_52_360_DDR]; 760 else 761 value = ext_csd[EXT_CSD_PWR_CL_52_360]; 762 } else if (clock <= MMC_TYPE_HS200_HS400ES_MAX) { 763 if (ivar->bus_width == bus_width_8) 764 value = ext_csd[EXT_CSD_PWR_CL_200_360_DDR]; 765 else 766 value = ext_csd[EXT_CSD_PWR_CL_200_360]; 767 } 768 break; 769 default: 770 device_printf(dev, "No power class support for VDD 0x%x\n", 771 1 << mmcbr_get_vdd(dev)); 772 return (MMC_ERR_INVALID); 773 } 774 775 if (ivar->bus_width == bus_width_8) 776 value = (value & EXT_CSD_POWER_CLASS_8BIT_MASK) >> 777 EXT_CSD_POWER_CLASS_8BIT_SHIFT; 778 else 779 value = (value & EXT_CSD_POWER_CLASS_4BIT_MASK) >> 780 EXT_CSD_POWER_CLASS_4BIT_SHIFT; 781 782 if (value == 0) 783 return (MMC_ERR_NONE); 784 785 return (mmc_switch(dev, dev, ivar->rca, EXT_CSD_CMD_SET_NORMAL, 786 EXT_CSD_POWER_CLASS, value, ivar->cmd6_time, true)); 787 } 788 789 static int 790 mmc_set_timing(struct mmc_softc *sc, struct mmc_ivars *ivar, 791 enum mmc_bus_timing timing) 792 { 793 u_char switch_res[64]; 794 uint8_t value; 795 int err; 796 797 if (mmcbr_get_mode(sc->dev) == mode_sd) { 798 switch (timing) { 799 case bus_timing_normal: 800 value = SD_SWITCH_NORMAL_MODE; 801 break; 802 case bus_timing_hs: 803 value = SD_SWITCH_HS_MODE; 804 break; 805 default: 806 return (MMC_ERR_INVALID); 807 } 808 err = mmc_sd_switch(sc, SD_SWITCH_MODE_SET, SD_SWITCH_GROUP1, 809 value, switch_res); 810 if (err != MMC_ERR_NONE) 811 return (err); 812 if ((switch_res[16] & 0xf) != value) 813 return (MMC_ERR_FAILED); 814 mmcbr_set_timing(sc->dev, timing); 815 mmcbr_update_ios(sc->dev); 816 } else { 817 switch (timing) { 818 case bus_timing_normal: 819 value = EXT_CSD_HS_TIMING_BC; 820 break; 821 case bus_timing_hs: 822 case bus_timing_mmc_ddr52: 823 value = EXT_CSD_HS_TIMING_HS; 824 break; 825 default: 826 return (MMC_ERR_INVALID); 827 } 828 err = mmc_switch(sc->dev, sc->dev, ivar->rca, 829 EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, value, 830 ivar->cmd6_time, false); 831 if (err != MMC_ERR_NONE) 832 return (err); 833 mmcbr_set_timing(sc->dev, timing); 834 mmcbr_update_ios(sc->dev); 835 err = mmc_switch_status(sc->dev, sc->dev, ivar->rca, 836 ivar->cmd6_time); 837 } 838 return (err); 839 } 840 841 static const uint8_t p8[8] = { 842 0x55, 0xAA, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 843 }; 844 845 static const uint8_t p8ok[8] = { 846 0xAA, 0x55, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 847 }; 848 849 static const uint8_t p4[4] = { 850 0x5A, 0x00, 0x00, 0x00 851 }; 852 853 static const uint8_t p4ok[4] = { 854 0xA5, 0x00, 0x00, 0x00 855 }; 856 857 static int 858 mmc_test_bus_width(struct mmc_softc *sc) 859 { 860 struct mmc_command cmd; 861 struct mmc_data data; 862 uint8_t buf[8]; 863 int err; 864 865 if (mmcbr_get_caps(sc->dev) & MMC_CAP_8_BIT_DATA) { 866 mmcbr_set_bus_width(sc->dev, bus_width_8); 867 mmcbr_update_ios(sc->dev); 868 869 sc->squelched++; /* Errors are expected, squelch reporting. */ 870 memset(&cmd, 0, sizeof(cmd)); 871 memset(&data, 0, sizeof(data)); 872 cmd.opcode = MMC_BUSTEST_W; 873 cmd.arg = 0; 874 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 875 cmd.data = &data; 876 877 data.data = __DECONST(void *, p8); 878 data.len = 8; 879 data.flags = MMC_DATA_WRITE; 880 mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, 0); 881 882 memset(&cmd, 0, sizeof(cmd)); 883 memset(&data, 0, sizeof(data)); 884 cmd.opcode = MMC_BUSTEST_R; 885 cmd.arg = 0; 886 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 887 cmd.data = &data; 888 889 data.data = buf; 890 data.len = 8; 891 data.flags = MMC_DATA_READ; 892 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, 0); 893 sc->squelched--; 894 895 mmcbr_set_bus_width(sc->dev, bus_width_1); 896 mmcbr_update_ios(sc->dev); 897 898 if (err == MMC_ERR_NONE && memcmp(buf, p8ok, 8) == 0) 899 return (bus_width_8); 900 } 901 902 if (mmcbr_get_caps(sc->dev) & MMC_CAP_4_BIT_DATA) { 903 mmcbr_set_bus_width(sc->dev, bus_width_4); 904 mmcbr_update_ios(sc->dev); 905 906 sc->squelched++; /* Errors are expected, squelch reporting. */ 907 memset(&cmd, 0, sizeof(cmd)); 908 memset(&data, 0, sizeof(data)); 909 cmd.opcode = MMC_BUSTEST_W; 910 cmd.arg = 0; 911 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 912 cmd.data = &data; 913 914 data.data = __DECONST(void *, p4); 915 data.len = 4; 916 data.flags = MMC_DATA_WRITE; 917 mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, 0); 918 919 memset(&cmd, 0, sizeof(cmd)); 920 memset(&data, 0, sizeof(data)); 921 cmd.opcode = MMC_BUSTEST_R; 922 cmd.arg = 0; 923 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 924 cmd.data = &data; 925 926 data.data = buf; 927 data.len = 4; 928 data.flags = MMC_DATA_READ; 929 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, 0); 930 sc->squelched--; 931 932 mmcbr_set_bus_width(sc->dev, bus_width_1); 933 mmcbr_update_ios(sc->dev); 934 935 if (err == MMC_ERR_NONE && memcmp(buf, p4ok, 4) == 0) 936 return (bus_width_4); 937 } 938 return (bus_width_1); 939 } 940 941 static uint32_t 942 mmc_get_bits(uint32_t *bits, int bit_len, int start, int size) 943 { 944 const int i = (bit_len / 32) - (start / 32) - 1; 945 const int shift = start & 31; 946 uint32_t retval = bits[i] >> shift; 947 948 if (size + shift > 32) 949 retval |= bits[i - 1] << (32 - shift); 950 return (retval & ((1llu << size) - 1)); 951 } 952 953 static void 954 mmc_decode_cid_sd(uint32_t *raw_cid, struct mmc_cid *cid) 955 { 956 int i; 957 958 /* There's no version info, so we take it on faith */ 959 memset(cid, 0, sizeof(*cid)); 960 cid->mid = mmc_get_bits(raw_cid, 128, 120, 8); 961 cid->oid = mmc_get_bits(raw_cid, 128, 104, 16); 962 for (i = 0; i < 5; i++) 963 cid->pnm[i] = mmc_get_bits(raw_cid, 128, 96 - i * 8, 8); 964 cid->pnm[5] = 0; 965 cid->prv = mmc_get_bits(raw_cid, 128, 56, 8); 966 cid->psn = mmc_get_bits(raw_cid, 128, 24, 32); 967 cid->mdt_year = mmc_get_bits(raw_cid, 128, 12, 8) + 2000; 968 cid->mdt_month = mmc_get_bits(raw_cid, 128, 8, 4); 969 } 970 971 static void 972 mmc_decode_cid_mmc(uint32_t *raw_cid, struct mmc_cid *cid, bool is_4_41p) 973 { 974 int i; 975 976 /* There's no version info, so we take it on faith */ 977 memset(cid, 0, sizeof(*cid)); 978 cid->mid = mmc_get_bits(raw_cid, 128, 120, 8); 979 cid->oid = mmc_get_bits(raw_cid, 128, 104, 8); 980 for (i = 0; i < 6; i++) 981 cid->pnm[i] = mmc_get_bits(raw_cid, 128, 96 - i * 8, 8); 982 cid->pnm[6] = 0; 983 cid->prv = mmc_get_bits(raw_cid, 128, 48, 8); 984 cid->psn = mmc_get_bits(raw_cid, 128, 16, 32); 985 cid->mdt_month = mmc_get_bits(raw_cid, 128, 12, 4); 986 cid->mdt_year = mmc_get_bits(raw_cid, 128, 8, 4); 987 if (is_4_41p) 988 cid->mdt_year += 2013; 989 else 990 cid->mdt_year += 1997; 991 } 992 993 static void 994 mmc_format_card_id_string(struct mmc_ivars *ivar) 995 { 996 char oidstr[8]; 997 uint8_t c1; 998 uint8_t c2; 999 1000 /* 1001 * Format a card ID string for use by the mmcsd driver, it's what 1002 * appears between the <> in the following: 1003 * mmcsd0: 968MB <SD SD01G 8.0 SN 2686905 Mfg 08/2008 by 3 TN> at mmc0 1004 * 22.5MHz/4bit/128-block 1005 * 1006 * Also format just the card serial number, which the mmcsd driver will 1007 * use as the disk->d_ident string. 1008 * 1009 * The card_id_string in mmc_ivars is currently allocated as 64 bytes, 1010 * and our max formatted length is currently 55 bytes if every field 1011 * contains the largest value. 1012 * 1013 * Sometimes the oid is two printable ascii chars; when it's not, 1014 * format it as 0xnnnn instead. 1015 */ 1016 c1 = (ivar->cid.oid >> 8) & 0x0ff; 1017 c2 = ivar->cid.oid & 0x0ff; 1018 if (c1 > 0x1f && c1 < 0x7f && c2 > 0x1f && c2 < 0x7f) 1019 ksnprintf(oidstr, sizeof(oidstr), "%c%c", c1, c2); 1020 else 1021 ksnprintf(oidstr, sizeof(oidstr), "0x%04x", ivar->cid.oid); 1022 ksnprintf(ivar->card_sn_string, sizeof(ivar->card_sn_string), 1023 "%08X", ivar->cid.psn); 1024 ksnprintf(ivar->card_id_string, sizeof(ivar->card_id_string), 1025 "%s%s %s %d.%d SN %08X MFG %02d/%04d by %d %s", 1026 ivar->mode == mode_sd ? "SD" : "MMC", ivar->high_cap ? "HC" : "", 1027 ivar->cid.pnm, ivar->cid.prv >> 4, ivar->cid.prv & 0x0f, 1028 ivar->cid.psn, ivar->cid.mdt_month, ivar->cid.mdt_year, 1029 ivar->cid.mid, oidstr); 1030 } 1031 1032 static const int exp[8] = { 1033 1, 10, 100, 1000, 10000, 100000, 1000000, 10000000 1034 }; 1035 1036 static const int mant[16] = { 1037 0, 10, 12, 13, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60, 70, 80 1038 }; 1039 1040 static const int cur_min[8] = { 1041 500, 1000, 5000, 10000, 25000, 35000, 60000, 100000 1042 }; 1043 1044 static const int cur_max[8] = { 1045 1000, 5000, 10000, 25000, 35000, 45000, 800000, 200000 1046 }; 1047 1048 static void 1049 mmc_decode_csd_sd(uint32_t *raw_csd, struct mmc_csd *csd) 1050 { 1051 int v; 1052 int m; 1053 int e; 1054 1055 memset(csd, 0, sizeof(*csd)); 1056 csd->csd_structure = v = mmc_get_bits(raw_csd, 128, 126, 2); 1057 if (v == 0) { 1058 m = mmc_get_bits(raw_csd, 128, 115, 4); 1059 e = mmc_get_bits(raw_csd, 128, 112, 3); 1060 csd->tacc = (exp[e] * mant[m] + 9) / 10; 1061 csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100; 1062 m = mmc_get_bits(raw_csd, 128, 99, 4); 1063 e = mmc_get_bits(raw_csd, 128, 96, 3); 1064 csd->tran_speed = exp[e] * 10000 * mant[m]; 1065 csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12); 1066 csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4); 1067 csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1); 1068 csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1); 1069 csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1); 1070 csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1); 1071 csd->vdd_r_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 59, 3)]; 1072 csd->vdd_r_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 56, 3)]; 1073 csd->vdd_w_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 53, 3)]; 1074 csd->vdd_w_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 50, 3)]; 1075 m = mmc_get_bits(raw_csd, 128, 62, 12); 1076 e = mmc_get_bits(raw_csd, 128, 47, 3); 1077 csd->capacity = ((1 + m) << (e + 2)) * csd->read_bl_len; 1078 csd->erase_blk_en = mmc_get_bits(raw_csd, 128, 46, 1); 1079 csd->erase_sector = mmc_get_bits(raw_csd, 128, 39, 7) + 1; 1080 csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 7); 1081 csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1); 1082 csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3); 1083 csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4); 1084 csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1); 1085 } else if (v == 1) { 1086 m = mmc_get_bits(raw_csd, 128, 115, 4); 1087 e = mmc_get_bits(raw_csd, 128, 112, 3); 1088 csd->tacc = (exp[e] * mant[m] + 9) / 10; 1089 csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100; 1090 m = mmc_get_bits(raw_csd, 128, 99, 4); 1091 e = mmc_get_bits(raw_csd, 128, 96, 3); 1092 csd->tran_speed = exp[e] * 10000 * mant[m]; 1093 csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12); 1094 csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4); 1095 csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1); 1096 csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1); 1097 csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1); 1098 csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1); 1099 csd->capacity = ((uint64_t)mmc_get_bits(raw_csd, 128, 48, 22) + 1) * 1100 512 * 1024; 1101 csd->erase_blk_en = mmc_get_bits(raw_csd, 128, 46, 1); 1102 csd->erase_sector = mmc_get_bits(raw_csd, 128, 39, 7) + 1; 1103 csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 7); 1104 csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1); 1105 csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3); 1106 csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4); 1107 csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1); 1108 } else 1109 panic("unknown SD CSD version"); 1110 } 1111 1112 static void 1113 mmc_decode_csd_mmc(uint32_t *raw_csd, struct mmc_csd *csd) 1114 { 1115 int m; 1116 int e; 1117 1118 memset(csd, 0, sizeof(*csd)); 1119 csd->csd_structure = mmc_get_bits(raw_csd, 128, 126, 2); 1120 csd->spec_vers = mmc_get_bits(raw_csd, 128, 122, 4); 1121 m = mmc_get_bits(raw_csd, 128, 115, 4); 1122 e = mmc_get_bits(raw_csd, 128, 112, 3); 1123 csd->tacc = exp[e] * mant[m] + 9 / 10; 1124 csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100; 1125 m = mmc_get_bits(raw_csd, 128, 99, 4); 1126 e = mmc_get_bits(raw_csd, 128, 96, 3); 1127 csd->tran_speed = exp[e] * 10000 * mant[m]; 1128 csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12); 1129 csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4); 1130 csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1); 1131 csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1); 1132 csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1); 1133 csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1); 1134 csd->vdd_r_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 59, 3)]; 1135 csd->vdd_r_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 56, 3)]; 1136 csd->vdd_w_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 53, 3)]; 1137 csd->vdd_w_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 50, 3)]; 1138 m = mmc_get_bits(raw_csd, 128, 62, 12); 1139 e = mmc_get_bits(raw_csd, 128, 47, 3); 1140 csd->capacity = ((1 + m) << (e + 2)) * csd->read_bl_len; 1141 csd->erase_blk_en = 0; 1142 csd->erase_sector = (mmc_get_bits(raw_csd, 128, 42, 5) + 1) * 1143 (mmc_get_bits(raw_csd, 128, 37, 5) + 1); 1144 csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 5); 1145 csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1); 1146 csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3); 1147 csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4); 1148 csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1); 1149 } 1150 1151 static void 1152 mmc_app_decode_scr(uint32_t *raw_scr, struct mmc_scr *scr) 1153 { 1154 unsigned int scr_struct; 1155 1156 memset(scr, 0, sizeof(*scr)); 1157 1158 scr_struct = mmc_get_bits(raw_scr, 64, 60, 4); 1159 if (scr_struct != 0) { 1160 kprintf("Unrecognised SCR structure version %d\n", 1161 scr_struct); 1162 return; 1163 } 1164 scr->sda_vsn = mmc_get_bits(raw_scr, 64, 56, 4); 1165 scr->bus_widths = mmc_get_bits(raw_scr, 64, 48, 4); 1166 } 1167 1168 static void 1169 mmc_app_decode_sd_status(uint32_t *raw_sd_status, 1170 struct mmc_sd_status *sd_status) 1171 { 1172 1173 memset(sd_status, 0, sizeof(*sd_status)); 1174 1175 sd_status->bus_width = mmc_get_bits(raw_sd_status, 512, 510, 2); 1176 sd_status->secured_mode = mmc_get_bits(raw_sd_status, 512, 509, 1); 1177 sd_status->card_type = mmc_get_bits(raw_sd_status, 512, 480, 16); 1178 sd_status->prot_area = mmc_get_bits(raw_sd_status, 512, 448, 12); 1179 sd_status->speed_class = mmc_get_bits(raw_sd_status, 512, 440, 8); 1180 sd_status->perf_move = mmc_get_bits(raw_sd_status, 512, 432, 8); 1181 sd_status->au_size = mmc_get_bits(raw_sd_status, 512, 428, 4); 1182 sd_status->erase_size = mmc_get_bits(raw_sd_status, 512, 408, 16); 1183 sd_status->erase_timeout = mmc_get_bits(raw_sd_status, 512, 402, 6); 1184 sd_status->erase_offset = mmc_get_bits(raw_sd_status, 512, 400, 2); 1185 } 1186 1187 static int 1188 mmc_all_send_cid(struct mmc_softc *sc, uint32_t *rawcid) 1189 { 1190 struct mmc_command cmd; 1191 int err; 1192 1193 memset(&cmd, 0, sizeof(cmd)); 1194 cmd.opcode = MMC_ALL_SEND_CID; 1195 cmd.arg = 0; 1196 cmd.flags = MMC_RSP_R2 | MMC_CMD_BCR; 1197 cmd.data = NULL; 1198 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES); 1199 memcpy(rawcid, cmd.resp, 4 * sizeof(uint32_t)); 1200 return (err); 1201 } 1202 1203 static int 1204 mmc_send_csd(struct mmc_softc *sc, uint16_t rca, uint32_t *rawcsd) 1205 { 1206 struct mmc_command cmd; 1207 int err; 1208 1209 memset(&cmd, 0, sizeof(cmd)); 1210 cmd.opcode = MMC_SEND_CSD; 1211 cmd.arg = rca << 16; 1212 cmd.flags = MMC_RSP_R2 | MMC_CMD_BCR; 1213 cmd.data = NULL; 1214 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES); 1215 memcpy(rawcsd, cmd.resp, 4 * sizeof(uint32_t)); 1216 return (err); 1217 } 1218 1219 static int 1220 mmc_app_send_scr(struct mmc_softc *sc, uint16_t rca, uint32_t *rawscr) 1221 { 1222 int err; 1223 struct mmc_command cmd; 1224 struct mmc_data data; 1225 1226 memset(&cmd, 0, sizeof(cmd)); 1227 memset(&data, 0, sizeof(data)); 1228 1229 memset(rawscr, 0, 8); 1230 cmd.opcode = ACMD_SEND_SCR; 1231 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 1232 cmd.arg = 0; 1233 cmd.data = &data; 1234 1235 data.data = rawscr; 1236 data.len = 8; 1237 data.flags = MMC_DATA_READ; 1238 1239 err = mmc_wait_for_app_cmd(sc->dev, sc->dev, rca, &cmd, CMD_RETRIES); 1240 rawscr[0] = be32toh(rawscr[0]); 1241 rawscr[1] = be32toh(rawscr[1]); 1242 return (err); 1243 } 1244 1245 static int 1246 mmc_app_sd_status(struct mmc_softc *sc, uint16_t rca, uint32_t *rawsdstatus) 1247 { 1248 int err, i; 1249 struct mmc_command cmd; 1250 struct mmc_data data; 1251 1252 memset(&cmd, 0, sizeof(cmd)); 1253 memset(&data, 0, sizeof(data)); 1254 1255 memset(rawsdstatus, 0, 64); 1256 cmd.opcode = ACMD_SD_STATUS; 1257 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 1258 cmd.arg = 0; 1259 cmd.data = &data; 1260 1261 data.data = rawsdstatus; 1262 data.len = 64; 1263 data.flags = MMC_DATA_READ; 1264 1265 err = mmc_wait_for_app_cmd(sc->dev, sc->dev, rca, &cmd, CMD_RETRIES); 1266 for (i = 0; i < 16; i++) 1267 rawsdstatus[i] = be32toh(rawsdstatus[i]); 1268 return (err); 1269 } 1270 1271 static int 1272 mmc_set_relative_addr(struct mmc_softc *sc, uint16_t resp) 1273 { 1274 struct mmc_command cmd; 1275 int err; 1276 1277 memset(&cmd, 0, sizeof(cmd)); 1278 cmd.opcode = MMC_SET_RELATIVE_ADDR; 1279 cmd.arg = resp << 16; 1280 cmd.flags = MMC_RSP_R6 | MMC_CMD_BCR; 1281 cmd.data = NULL; 1282 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES); 1283 return (err); 1284 } 1285 1286 static int 1287 mmc_send_relative_addr(struct mmc_softc *sc, uint32_t *resp) 1288 { 1289 struct mmc_command cmd; 1290 int err; 1291 1292 memset(&cmd, 0, sizeof(cmd)); 1293 cmd.opcode = SD_SEND_RELATIVE_ADDR; 1294 cmd.arg = 0; 1295 cmd.flags = MMC_RSP_R6 | MMC_CMD_BCR; 1296 cmd.data = NULL; 1297 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES); 1298 *resp = cmd.resp[0]; 1299 return (err); 1300 } 1301 1302 static int 1303 mmc_set_blocklen(struct mmc_softc *sc, uint32_t len) 1304 { 1305 struct mmc_command cmd; 1306 int err; 1307 1308 memset(&cmd, 0, sizeof(cmd)); 1309 cmd.opcode = MMC_SET_BLOCKLEN; 1310 cmd.arg = len; 1311 cmd.flags = MMC_RSP_R1 | MMC_CMD_AC; 1312 cmd.data = NULL; 1313 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES); 1314 return (err); 1315 } 1316 1317 static uint32_t 1318 mmc_timing_to_dtr(struct mmc_ivars *ivar, enum mmc_bus_timing timing) 1319 { 1320 1321 switch (timing) { 1322 case bus_timing_normal: 1323 return (ivar->tran_speed); 1324 case bus_timing_hs: 1325 return (ivar->hs_tran_speed); 1326 case bus_timing_uhs_sdr12: 1327 return (SD_SDR12_MAX); 1328 case bus_timing_uhs_sdr25: 1329 return (SD_SDR25_MAX); 1330 case bus_timing_uhs_ddr50: 1331 return (SD_DDR50_MAX); 1332 case bus_timing_uhs_sdr50: 1333 return (SD_SDR50_MAX); 1334 case bus_timing_uhs_sdr104: 1335 return (SD_SDR104_MAX); 1336 case bus_timing_mmc_ddr52: 1337 return (MMC_TYPE_DDR52_MAX); 1338 case bus_timing_mmc_hs200: 1339 case bus_timing_mmc_hs400: 1340 case bus_timing_mmc_hs400es: 1341 return (MMC_TYPE_HS200_HS400ES_MAX); 1342 } 1343 return (0); 1344 } 1345 1346 static const char * 1347 mmc_timing_to_string(enum mmc_bus_timing timing) 1348 { 1349 1350 switch (timing) { 1351 case bus_timing_normal: 1352 return ("normal speed"); 1353 case bus_timing_hs: 1354 return ("high speed"); 1355 case bus_timing_uhs_sdr12: 1356 case bus_timing_uhs_sdr25: 1357 case bus_timing_uhs_sdr50: 1358 case bus_timing_uhs_sdr104: 1359 return ("single data rate"); 1360 case bus_timing_uhs_ddr50: 1361 case bus_timing_mmc_ddr52: 1362 return ("dual data rate"); 1363 case bus_timing_mmc_hs200: 1364 return ("HS200"); 1365 case bus_timing_mmc_hs400: 1366 return ("HS400"); 1367 case bus_timing_mmc_hs400es: 1368 return ("HS400 with enhanced strobe"); 1369 } 1370 return (""); 1371 } 1372 1373 static void 1374 mmc_log_card(device_t dev, struct mmc_ivars *ivar, int newcard) 1375 { 1376 enum mmc_bus_timing max_timing, timing; 1377 1378 device_printf(dev, "Card at relative address 0x%04x%s:\n", 1379 ivar->rca, newcard ? " added" : ""); 1380 device_printf(dev, " card: %s\n", ivar->card_id_string); 1381 max_timing = bus_timing_normal; 1382 for (timing = bus_timing_max; timing > bus_timing_normal; timing--) { 1383 if (isset(&ivar->timings, timing)) { 1384 max_timing = timing; 1385 break; 1386 } 1387 } 1388 device_printf(dev, " bus: %ubit, %uMHz (%s timing)\n", 1389 (ivar->bus_width == bus_width_1 ? 1 : 1390 (ivar->bus_width == bus_width_4 ? 4 : 8)), 1391 mmc_timing_to_dtr(ivar, timing) / 1000000, 1392 mmc_timing_to_string(timing)); 1393 device_printf(dev, " memory: %u blocks, erase sector %u blocks%s\n", 1394 ivar->sec_count, ivar->erase_sector, 1395 ivar->read_only ? ", read-only" : ""); 1396 } 1397 1398 static void 1399 mmc_discover_cards(struct mmc_softc *sc) 1400 { 1401 u_char switch_res[64]; 1402 uint32_t raw_cid[4]; 1403 struct mmc_ivars *ivar = NULL; 1404 device_t *devlist; 1405 device_t child; 1406 int devcount, err, host_caps, i, newcard; 1407 uint32_t resp, sec_count, status; 1408 uint16_t rca = 2; 1409 1410 host_caps = mmcbr_get_caps(sc->dev); 1411 if (bootverbose || mmc_debug) 1412 device_printf(sc->dev, "Probing cards\n"); 1413 while (1) { 1414 sc->squelched++; /* Errors are expected, squelch reporting. */ 1415 err = mmc_all_send_cid(sc, raw_cid); 1416 sc->squelched--; 1417 if (err == MMC_ERR_TIMEOUT) 1418 break; 1419 if (err != MMC_ERR_NONE) { 1420 device_printf(sc->dev, "Error reading CID %d\n", err); 1421 break; 1422 } 1423 newcard = 1; 1424 if ((err = device_get_children(sc->dev, &devlist, &devcount)) != 0) 1425 return; 1426 for (i = 0; i < devcount; i++) { 1427 ivar = device_get_ivars(devlist[i]); 1428 if (memcmp(ivar->raw_cid, raw_cid, sizeof(raw_cid)) == 0) { 1429 newcard = 0; 1430 break; 1431 } 1432 } 1433 kfree(devlist, M_TEMP); 1434 if (bootverbose || mmc_debug) { 1435 device_printf(sc->dev, "%sard detected (CID %08x%08x%08x%08x)\n", 1436 newcard ? "New c" : "C", 1437 raw_cid[0], raw_cid[1], raw_cid[2], raw_cid[3]); 1438 } 1439 if (newcard) { 1440 ivar = kmalloc(sizeof(struct mmc_ivars), M_DEVBUF, 1441 M_WAITOK | M_ZERO); 1442 memcpy(ivar->raw_cid, raw_cid, sizeof(raw_cid)); 1443 } 1444 if (mmcbr_get_ro(sc->dev)) 1445 ivar->read_only = 1; 1446 ivar->bus_width = bus_width_1; 1447 setbit(&ivar->timings, bus_timing_normal); 1448 ivar->mode = mmcbr_get_mode(sc->dev); 1449 if (ivar->mode == mode_sd) { 1450 mmc_decode_cid_sd(ivar->raw_cid, &ivar->cid); 1451 err = mmc_send_relative_addr(sc, &resp); 1452 if (err != MMC_ERR_NONE) { 1453 device_printf(sc->dev, 1454 "Error getting RCA %d\n", err); 1455 break; 1456 } 1457 ivar->rca = resp >> 16; 1458 /* Get card CSD. */ 1459 err = mmc_send_csd(sc, ivar->rca, ivar->raw_csd); 1460 if (err != MMC_ERR_NONE) { 1461 device_printf(sc->dev, 1462 "Error getting CSD %d\n", err); 1463 break; 1464 } 1465 if (bootverbose || mmc_debug) 1466 device_printf(sc->dev, 1467 "%sard detected (CSD %08x%08x%08x%08x)\n", 1468 newcard ? "New c" : "C", ivar->raw_csd[0], 1469 ivar->raw_csd[1], ivar->raw_csd[2], 1470 ivar->raw_csd[3]); 1471 mmc_decode_csd_sd(ivar->raw_csd, &ivar->csd); 1472 ivar->sec_count = ivar->csd.capacity / MMC_SECTOR_SIZE; 1473 if (ivar->csd.csd_structure > 0) 1474 ivar->high_cap = 1; 1475 ivar->tran_speed = ivar->csd.tran_speed; 1476 ivar->erase_sector = ivar->csd.erase_sector * 1477 ivar->csd.write_bl_len / MMC_SECTOR_SIZE; 1478 1479 err = mmc_send_status(sc->dev, sc->dev, ivar->rca, 1480 &status); 1481 if (err != MMC_ERR_NONE) { 1482 device_printf(sc->dev, 1483 "Error reading card status %d\n", err); 1484 break; 1485 } 1486 if ((status & R1_CARD_IS_LOCKED) != 0) { 1487 device_printf(sc->dev, 1488 "Card is password protected, skipping.\n"); 1489 break; 1490 } 1491 1492 /* Get card SCR. Card must be selected to fetch it. */ 1493 err = mmc_select_card(sc, ivar->rca); 1494 if (err != MMC_ERR_NONE) { 1495 device_printf(sc->dev, 1496 "Error selecting card %d\n", err); 1497 break; 1498 } 1499 err = mmc_app_send_scr(sc, ivar->rca, ivar->raw_scr); 1500 if (err != MMC_ERR_NONE) { 1501 device_printf(sc->dev, 1502 "Error reading SCR %d\n", err); 1503 break; 1504 } 1505 1506 mmc_app_decode_scr(ivar->raw_scr, &ivar->scr); 1507 /* Get card switch capabilities (command class 10). */ 1508 if ((ivar->scr.sda_vsn >= 1) && 1509 (ivar->csd.ccc & (1<<10))) { 1510 err = mmc_sd_switch(sc, SD_SWITCH_MODE_CHECK, 1511 SD_SWITCH_GROUP1, SD_SWITCH_NOCHANGE, 1512 switch_res); 1513 if (err == MMC_ERR_NONE && 1514 switch_res[13] & (1 << SD_SWITCH_HS_MODE)) { 1515 setbit(&ivar->timings, bus_timing_hs); 1516 ivar->hs_tran_speed = SD_HS_MAX; 1517 } 1518 } 1519 1520 /* 1521 * We deselect then reselect the card here. Some cards 1522 * become unselected and timeout with the above two 1523 * commands, although the state tables / diagrams in the 1524 * standard suggest they go back to the transfer state. 1525 * Other cards don't become deselected, and if we 1526 * atttempt to blindly re-select them, we get timeout 1527 * errors from some controllers. So we deselect then 1528 * reselect to handle all situations. The only thing we 1529 * use from the sd_status is the erase sector size, but 1530 * it is still nice to get that right. 1531 */ 1532 mmc_select_card(sc, 0); 1533 (void)mmc_select_card(sc, ivar->rca); 1534 (void)mmc_app_sd_status(sc, ivar->rca, 1535 ivar->raw_sd_status); 1536 mmc_app_decode_sd_status(ivar->raw_sd_status, 1537 &ivar->sd_status); 1538 if (ivar->sd_status.au_size != 0) { 1539 ivar->erase_sector = 1540 16 << ivar->sd_status.au_size; 1541 } 1542 /* Find max supported bus width. */ 1543 if ((host_caps & MMC_CAP_4_BIT_DATA) && 1544 (ivar->scr.bus_widths & SD_SCR_BUS_WIDTH_4)) 1545 ivar->bus_width = bus_width_4; 1546 1547 /* 1548 * Some cards that report maximum I/O block sizes 1549 * greater than 512 require the block length to be 1550 * set to 512, even though that is supposed to be 1551 * the default. Example: 1552 * 1553 * Transcend 2GB SDSC card, CID: 1554 * mid=0x1b oid=0x534d pnm="00000" prv=1.0 mdt=00.2000 1555 */ 1556 if (ivar->csd.read_bl_len != MMC_SECTOR_SIZE || 1557 ivar->csd.write_bl_len != MMC_SECTOR_SIZE) 1558 mmc_set_blocklen(sc, MMC_SECTOR_SIZE); 1559 1560 mmc_format_card_id_string(ivar); 1561 1562 if (bootverbose || mmc_debug) 1563 mmc_log_card(sc->dev, ivar, newcard); 1564 if (newcard) { 1565 /* Add device. */ 1566 child = device_add_child(sc->dev, NULL, -1); 1567 device_set_ivars(child, ivar); 1568 } 1569 mmc_select_card(sc, 0); 1570 return; 1571 } 1572 ivar->rca = rca++; 1573 err = mmc_set_relative_addr(sc, ivar->rca); 1574 if (err != MMC_ERR_NONE) { 1575 device_printf(sc->dev, "Error setting RCA %d\n", err); 1576 break; 1577 } 1578 /* Get card CSD. */ 1579 mmc_send_csd(sc, ivar->rca, ivar->raw_csd); 1580 err = mmc_send_csd(sc, ivar->rca, ivar->raw_csd); 1581 if (err != MMC_ERR_NONE) { 1582 device_printf(sc->dev, "Error getting CSD %d\n", err); 1583 break; 1584 } 1585 if (bootverbose || mmc_debug) 1586 device_printf(sc->dev, 1587 "%sard detected (CSD %08x%08x%08x%08x)\n", 1588 newcard ? "New c" : "C", ivar->raw_csd[0], 1589 ivar->raw_csd[1], ivar->raw_csd[2], 1590 ivar->raw_csd[3]); 1591 1592 mmc_decode_csd_mmc(ivar->raw_csd, &ivar->csd); 1593 ivar->sec_count = ivar->csd.capacity / MMC_SECTOR_SIZE; 1594 ivar->tran_speed = ivar->csd.tran_speed; 1595 ivar->erase_sector = ivar->csd.erase_sector * 1596 ivar->csd.write_bl_len / MMC_SECTOR_SIZE; 1597 1598 err = mmc_send_status(sc->dev, sc->dev, ivar->rca, &status); 1599 if (err != MMC_ERR_NONE) { 1600 device_printf(sc->dev, 1601 "Error reading card status %d\n", err); 1602 break; 1603 } 1604 if ((status & R1_CARD_IS_LOCKED) != 0) { 1605 device_printf(sc->dev, 1606 "Card is password protected, skipping.\n"); 1607 break; 1608 } 1609 1610 err = mmc_select_card(sc, ivar->rca); 1611 if (err != MMC_ERR_NONE) { 1612 device_printf(sc->dev, "Error selecting card %d\n", 1613 err); 1614 break; 1615 } 1616 1617 /* Only MMC >= 4.x devices support EXT_CSD. */ 1618 if (ivar->csd.spec_vers >= 4) { 1619 err = mmc_send_ext_csd(sc->dev, sc->dev, 1620 ivar->raw_ext_csd); 1621 if (err != MMC_ERR_NONE) { 1622 device_printf(sc->dev, 1623 "Error reading EXT_CSD %d\n", err); 1624 break; 1625 } 1626 /* Handle extended capacity from EXT_CSD */ 1627 sec_count = ivar->raw_ext_csd[EXT_CSD_SEC_CNT] + 1628 (ivar->raw_ext_csd[EXT_CSD_SEC_CNT + 1] << 8) + 1629 (ivar->raw_ext_csd[EXT_CSD_SEC_CNT + 2] << 16) + 1630 (ivar->raw_ext_csd[EXT_CSD_SEC_CNT + 3] << 24); 1631 if (sec_count != 0) { 1632 ivar->sec_count = sec_count; 1633 ivar->high_cap = 1; 1634 } 1635 /* Get device speeds beyond normal mode. */ 1636 if ((ivar->raw_ext_csd[EXT_CSD_CARD_TYPE] & 1637 EXT_CSD_CARD_TYPE_HS_52) != 0) { 1638 setbit(&ivar->timings, bus_timing_hs); 1639 ivar->hs_tran_speed = MMC_TYPE_HS_52_MAX; 1640 } else if ((ivar->raw_ext_csd[EXT_CSD_CARD_TYPE] & 1641 EXT_CSD_CARD_TYPE_HS_26) != 0) { 1642 setbit(&ivar->timings, bus_timing_hs); 1643 ivar->hs_tran_speed = MMC_TYPE_HS_26_MAX; 1644 } 1645 if ((ivar->raw_ext_csd[EXT_CSD_CARD_TYPE] & 1646 EXT_CSD_CARD_TYPE_DDR_52_1_2V) != 0 && 1647 (host_caps & MMC_CAP_SIGNALING_120) != 0) { 1648 setbit(&ivar->timings, bus_timing_mmc_ddr52); 1649 setbit(&ivar->vccq_120, bus_timing_mmc_ddr52); 1650 } 1651 if ((ivar->raw_ext_csd[EXT_CSD_CARD_TYPE] & 1652 EXT_CSD_CARD_TYPE_DDR_52_1_8V) != 0 && 1653 (host_caps & MMC_CAP_SIGNALING_180) != 0) { 1654 setbit(&ivar->timings, bus_timing_mmc_ddr52); 1655 setbit(&ivar->vccq_180, bus_timing_mmc_ddr52); 1656 } 1657 /* 1658 * Determine generic switch timeout (provided in 1659 * units of 10 ms), defaulting to 500 ms. 1660 */ 1661 ivar->cmd6_time = 500 * 1000; 1662 if (ivar->csd.spec_vers >= 6) { 1663 ivar->cmd6_time = 10 * 1664 ivar->raw_ext_csd[EXT_CSD_GEN_CMD6_TIME]; 1665 } 1666 /* Find max supported bus width. */ 1667 ivar->bus_width = mmc_test_bus_width(sc); 1668 /* Handle HC erase sector size. */ 1669 if (ivar->raw_ext_csd[EXT_CSD_ERASE_GRP_SIZE] != 0) { 1670 ivar->erase_sector = 1024 * 1671 ivar->raw_ext_csd[EXT_CSD_ERASE_GRP_SIZE]; 1672 err = mmc_switch(sc->dev, sc->dev, ivar->rca, 1673 EXT_CSD_CMD_SET_NORMAL, 1674 EXT_CSD_ERASE_GRP_DEF, 1675 EXT_CSD_ERASE_GRP_DEF_EN, 1676 ivar->cmd6_time, true); 1677 if (err != MMC_ERR_NONE) { 1678 device_printf(sc->dev, 1679 "Error setting erase group %d\n", 1680 err); 1681 break; 1682 } 1683 } 1684 } 1685 1686 /* 1687 * Some cards that report maximum I/O block sizes greater 1688 * than 512 require the block length to be set to 512, even 1689 * though that is supposed to be the default. Example: 1690 * 1691 * Transcend 2GB SDSC card, CID: 1692 * mid=0x1b oid=0x534d pnm="00000" prv=1.0 mdt=00.2000 1693 */ 1694 if (ivar->csd.read_bl_len != MMC_SECTOR_SIZE || 1695 ivar->csd.write_bl_len != MMC_SECTOR_SIZE) 1696 mmc_set_blocklen(sc, MMC_SECTOR_SIZE); 1697 1698 mmc_decode_cid_mmc(ivar->raw_cid, &ivar->cid, 1699 ivar->raw_ext_csd[EXT_CSD_REV] >= 5); 1700 mmc_format_card_id_string(ivar); 1701 1702 if (bootverbose || mmc_debug) 1703 mmc_log_card(sc->dev, ivar, newcard); 1704 if (newcard) { 1705 /* Add device. */ 1706 child = device_add_child(sc->dev, NULL, -1); 1707 device_set_ivars(child, ivar); 1708 } 1709 mmc_select_card(sc, 0); 1710 } 1711 } 1712 1713 static void 1714 mmc_rescan_cards(struct mmc_softc *sc) 1715 { 1716 struct mmc_ivars *ivar = NULL; 1717 device_t *devlist; 1718 int err, i, devcount; 1719 1720 if ((err = device_get_children(sc->dev, &devlist, &devcount)) != 0) 1721 return; 1722 for (i = 0; i < devcount; i++) { 1723 ivar = device_get_ivars(devlist[i]); 1724 if (mmc_select_card(sc, ivar->rca) != MMC_ERR_NONE) { 1725 if (bootverbose || mmc_debug) 1726 device_printf(sc->dev, "Card at relative address %d lost.\n", 1727 ivar->rca); 1728 device_delete_child(sc->dev, devlist[i]); 1729 kfree(ivar, M_DEVBUF); 1730 } 1731 } 1732 kfree(devlist, M_TEMP); 1733 mmc_select_card(sc, 0); 1734 } 1735 1736 static int 1737 mmc_delete_cards(struct mmc_softc *sc) 1738 { 1739 struct mmc_ivars *ivar; 1740 device_t *devlist; 1741 int err, i, devcount; 1742 1743 if ((err = device_get_children(sc->dev, &devlist, &devcount)) != 0) 1744 return (err); 1745 for (i = 0; i < devcount; i++) { 1746 ivar = device_get_ivars(devlist[i]); 1747 if (bootverbose || mmc_debug) 1748 device_printf(sc->dev, "Card at relative address %d deleted.\n", 1749 ivar->rca); 1750 device_delete_child(sc->dev, devlist[i]); 1751 kfree(ivar, M_DEVBUF); 1752 } 1753 kfree(devlist, M_TEMP); 1754 return (0); 1755 } 1756 1757 static void 1758 mmc_go_discovery(struct mmc_softc *sc) 1759 { 1760 uint32_t ocr; 1761 device_t dev; 1762 int err; 1763 1764 dev = sc->dev; 1765 if (mmcbr_get_power_mode(dev) != power_on) { 1766 /* 1767 * First, try SD modes 1768 */ 1769 sc->squelched++; /* Errors are expected, squelch reporting. */ 1770 mmcbr_set_mode(dev, mode_sd); 1771 mmc_power_up(sc); 1772 mmcbr_set_bus_mode(dev, pushpull); 1773 if (bootverbose || mmc_debug) 1774 device_printf(sc->dev, "Probing bus\n"); 1775 mmc_idle_cards(sc); 1776 err = mmc_send_if_cond(sc, 1); 1777 if ((bootverbose || mmc_debug) && err == 0) 1778 device_printf(sc->dev, "SD 2.0 interface conditions: OK\n"); 1779 if (mmc_send_app_op_cond(sc, 0, &ocr) != MMC_ERR_NONE) { 1780 if (bootverbose || mmc_debug) 1781 device_printf(sc->dev, "SD probe: failed\n"); 1782 /* 1783 * Failed, try MMC 1784 */ 1785 mmcbr_set_mode(dev, mode_mmc); 1786 if (mmc_send_op_cond(sc, 0, &ocr) != MMC_ERR_NONE) { 1787 if (bootverbose || mmc_debug) 1788 device_printf(sc->dev, "MMC probe: failed\n"); 1789 ocr = 0; /* Failed both, powerdown. */ 1790 } else if (bootverbose || mmc_debug) 1791 device_printf(sc->dev, 1792 "MMC probe: OK (OCR: 0x%08x)\n", ocr); 1793 } else if (bootverbose || mmc_debug) 1794 device_printf(sc->dev, "SD probe: OK (OCR: 0x%08x)\n", ocr); 1795 sc->squelched--; 1796 1797 mmcbr_set_ocr(dev, mmc_select_vdd(sc, ocr)); 1798 if (mmcbr_get_ocr(dev) != 0) 1799 mmc_idle_cards(sc); 1800 } else { 1801 mmcbr_set_bus_mode(dev, opendrain); 1802 mmcbr_set_clock(dev, SD_MMC_CARD_ID_FREQUENCY); 1803 mmcbr_update_ios(dev); 1804 /* XXX recompute vdd based on new cards? */ 1805 } 1806 /* 1807 * Make sure that we have a mutually agreeable voltage to at least 1808 * one card on the bus. 1809 */ 1810 if (bootverbose || mmc_debug) 1811 device_printf(sc->dev, "Current OCR: 0x%08x\n", mmcbr_get_ocr(dev)); 1812 if (mmcbr_get_ocr(dev) == 0) { 1813 device_printf(sc->dev, "No compatible cards found on bus\n"); 1814 mmc_delete_cards(sc); 1815 mmc_power_down(sc); 1816 return; 1817 } 1818 /* 1819 * Reselect the cards after we've idled them above. 1820 */ 1821 if (mmcbr_get_mode(dev) == mode_sd) { 1822 err = mmc_send_if_cond(sc, 1); 1823 mmc_send_app_op_cond(sc, 1824 (err ? 0 : MMC_OCR_CCS) | mmcbr_get_ocr(dev), NULL); 1825 } else 1826 mmc_send_op_cond(sc, MMC_OCR_CCS | mmcbr_get_ocr(dev), NULL); 1827 mmc_discover_cards(sc); 1828 mmc_rescan_cards(sc); 1829 1830 mmcbr_set_bus_mode(dev, pushpull); 1831 mmcbr_update_ios(dev); 1832 mmc_calculate_clock(sc); 1833 } 1834 1835 static int 1836 mmc_calculate_clock(struct mmc_softc *sc) 1837 { 1838 device_t *kids; 1839 struct mmc_ivars *ivar; 1840 int host_caps, i, nkid; 1841 uint32_t dtr, max_dtr; 1842 enum mmc_bus_timing max_timing, timing; 1843 bool changed; 1844 1845 max_dtr = mmcbr_get_f_max(sc->dev); 1846 host_caps = mmcbr_get_caps(sc->dev); 1847 if ((host_caps & MMC_CAP_MMC_DDR52) != 0) 1848 max_timing = bus_timing_mmc_ddr52; 1849 else if ((host_caps & MMC_CAP_HSPEED) != 0) 1850 max_timing = bus_timing_hs; 1851 else 1852 max_timing = bus_timing_normal; 1853 if (device_get_children(sc->dev, &kids, &nkid) != 0) 1854 panic("can't get children"); 1855 do { 1856 changed = false; 1857 for (i = 0; i < nkid; i++) { 1858 ivar = device_get_ivars(kids[i]); 1859 if (isclr(&ivar->timings, max_timing)) { 1860 for (timing = max_timing; timing >= 1861 bus_timing_normal; timing--) { 1862 if (isset(&ivar->timings, timing)) { 1863 max_timing = timing; 1864 break; 1865 } 1866 } 1867 changed = true; 1868 } 1869 dtr = mmc_timing_to_dtr(ivar, max_timing); 1870 if (dtr < max_dtr) { 1871 max_dtr = dtr; 1872 changed = true; 1873 } 1874 } 1875 } while (changed == true); 1876 if (bootverbose || mmc_debug) { 1877 device_printf(sc->dev, 1878 "setting transfer rate to %d.%03dMHz (%s timing)\n", 1879 max_dtr / 1000000, (max_dtr / 1000) % 1000, 1880 mmc_timing_to_string(max_timing)); 1881 } 1882 for (i = 0; i < nkid; i++) { 1883 ivar = device_get_ivars(kids[i]); 1884 if ((ivar->timings & ~(1 << bus_timing_normal)) == 0) 1885 continue; 1886 if (mmc_select_card(sc, ivar->rca) != MMC_ERR_NONE || 1887 mmc_set_timing(sc, ivar, max_timing) != MMC_ERR_NONE) { 1888 device_printf(sc->dev, "Card at relative address %d " 1889 "failed to set timing.\n", ivar->rca); 1890 } 1891 } 1892 mmc_select_card(sc, 0); 1893 kfree(kids, M_TEMP); 1894 mmcbr_set_clock(sc->dev, max_dtr); 1895 mmcbr_update_ios(sc->dev); 1896 return (max_dtr); 1897 } 1898 1899 static void 1900 mmc_scan(struct mmc_softc *sc) 1901 { 1902 device_t dev = sc->dev; 1903 1904 mmc_acquire_bus(dev, dev); 1905 mmc_go_discovery(sc); 1906 mmc_release_bus(dev, dev); 1907 1908 bus_generic_attach(dev); 1909 } 1910 1911 static int 1912 mmc_read_ivar(device_t bus, device_t child, int which, uintptr_t *result) 1913 { 1914 struct mmc_ivars *ivar = device_get_ivars(child); 1915 1916 switch (which) { 1917 default: 1918 return (EINVAL); 1919 case MMC_IVAR_SPEC_VERS: 1920 *result = ivar->csd.spec_vers; 1921 break; 1922 case MMC_IVAR_DSR_IMP: 1923 *(int *)result = ivar->csd.dsr_imp; 1924 break; 1925 case MMC_IVAR_MEDIA_SIZE: 1926 *(off_t *)result = ivar->sec_count; 1927 break; 1928 case MMC_IVAR_RCA: 1929 *(int *)result = ivar->rca; 1930 break; 1931 case MMC_IVAR_SECTOR_SIZE: 1932 *(int *)result = MMC_SECTOR_SIZE; 1933 break; 1934 case MMC_IVAR_TRAN_SPEED: 1935 *(int *)result = mmcbr_get_clock(bus); 1936 break; 1937 case MMC_IVAR_READ_ONLY: 1938 *(int *)result = ivar->read_only; 1939 break; 1940 case MMC_IVAR_HIGH_CAP: 1941 *(int *)result = ivar->high_cap; 1942 break; 1943 case MMC_IVAR_CARD_TYPE: 1944 *(int *)result = ivar->mode; 1945 break; 1946 case MMC_IVAR_BUS_WIDTH: 1947 *(int *)result = ivar->bus_width; 1948 break; 1949 case MMC_IVAR_ERASE_SECTOR: 1950 *(int *)result = ivar->erase_sector; 1951 break; 1952 case MMC_IVAR_MAX_DATA: 1953 *(int *)result = mmcbr_get_max_data(bus); 1954 break; 1955 case MMC_IVAR_CARD_ID_STRING: 1956 *(char **)result = ivar->card_id_string; 1957 break; 1958 case MMC_IVAR_CARD_SN_STRING: 1959 *(char **)result = ivar->card_sn_string; 1960 break; 1961 } 1962 return (0); 1963 } 1964 1965 static int 1966 mmc_write_ivar(device_t bus, device_t child, int which, uintptr_t value) 1967 { 1968 /* 1969 * None are writable ATM 1970 */ 1971 return (EINVAL); 1972 } 1973 1974 1975 static void 1976 mmc_delayed_attach(void *xsc) 1977 { 1978 struct mmc_softc *sc = xsc; 1979 1980 mmc_scan(sc); 1981 config_intrhook_disestablish(&sc->config_intrhook); 1982 } 1983 1984 static int 1985 mmc_child_location_str(device_t dev, device_t child, char *buf, 1986 size_t buflen) 1987 { 1988 1989 ksnprintf(buf, buflen, "rca=0x%04x", mmc_get_rca(child)); 1990 return (0); 1991 } 1992 1993 static device_method_t mmc_methods[] = { 1994 /* device_if */ 1995 DEVMETHOD(device_probe, mmc_probe), 1996 DEVMETHOD(device_attach, mmc_attach), 1997 DEVMETHOD(device_detach, mmc_detach), 1998 DEVMETHOD(device_suspend, mmc_suspend), 1999 DEVMETHOD(device_resume, mmc_resume), 2000 2001 /* Bus interface */ 2002 DEVMETHOD(bus_read_ivar, mmc_read_ivar), 2003 DEVMETHOD(bus_write_ivar, mmc_write_ivar), 2004 DEVMETHOD(bus_child_location_str, mmc_child_location_str), 2005 2006 /* MMC Bus interface */ 2007 DEVMETHOD(mmcbus_wait_for_request, mmc_wait_for_request), 2008 DEVMETHOD(mmcbus_acquire_bus, mmc_acquire_bus), 2009 DEVMETHOD(mmcbus_release_bus, mmc_release_bus), 2010 2011 DEVMETHOD_END 2012 }; 2013 2014 static driver_t mmc_driver = { 2015 "mmc", 2016 mmc_methods, 2017 sizeof(struct mmc_softc), 2018 }; 2019 static devclass_t mmc_devclass; 2020 2021 2022 DRIVER_MODULE(mmc, sdhci_pci, mmc_driver, mmc_devclass, NULL, NULL); 2023 DRIVER_MODULE(mmc, sdhci_acpi, mmc_driver, mmc_devclass, NULL, NULL); 2024