1 /* 2 * Copyright (c) 1997, Stefan Esser <se@freebsd.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice unmodified, this list of conditions, and the following 10 * disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 * 26 * $FreeBSD: src/sys/dev/pci/hostb_pci.c,v 1.1.8.1 2009/04/15 03:14:26 kensmith Exp $ 27 */ 28 29 #include <sys/param.h> 30 #include <sys/bus.h> 31 #include <sys/kernel.h> 32 #include <sys/module.h> 33 34 #include <sys/types.h> 35 #include <sys/systm.h> 36 37 #include <bus/pci/pcivar.h> 38 #include <bus/pci/pcireg.h> 39 40 /* 41 * Provide a device to "eat" the host->pci bridge devices that show up 42 * on PCI busses and stop them showing up twice on the probes. This also 43 * stops them showing up as 'none' in pciconf -l. If the host bridge 44 * provides an AGP capability then we create a child agp device for the 45 * agp GART driver to attach to. 46 */ 47 static int 48 pci_hostb_probe(device_t dev) 49 { 50 u_int32_t id; 51 id = pci_get_devid(dev); 52 53 switch (id) { 54 55 /* VIA VT82C596 Power Managment Function */ 56 case 0x30501106: 57 return (ENXIO); 58 59 default: 60 break; 61 } 62 63 if (pci_get_class(dev) == PCIC_BRIDGE && 64 pci_get_subclass(dev) == PCIS_BRIDGE_HOST) { 65 device_set_desc(dev, "Host to PCI bridge"); 66 device_quiet(dev); 67 return (-10000); 68 } 69 return (ENXIO); 70 } 71 72 static int 73 pci_hostb_attach(device_t dev) 74 { 75 76 bus_generic_probe(dev); 77 78 /* 79 * If AGP capabilities are present on this device, then create 80 * an AGP child. 81 */ 82 if (pci_find_extcap(dev, PCIY_AGP, NULL) == 0) 83 device_add_child(dev, "agp", -1); 84 bus_generic_attach(dev); 85 return (0); 86 } 87 88 /* Bus interface. */ 89 90 static int 91 pci_hostb_read_ivar(device_t dev, device_t child, int which, uintptr_t *result) 92 { 93 94 return (BUS_READ_IVAR(device_get_parent(dev), dev, which, result)); 95 } 96 97 static int 98 pci_hostb_write_ivar(device_t dev, device_t child, int which, uintptr_t value) 99 { 100 101 return (EINVAL); 102 } 103 104 static struct resource * 105 pci_hostb_alloc_resource(device_t dev, device_t child, int type, int *rid, 106 u_long start, u_long end, u_long count, u_int flags, int cpuid __unused) 107 { 108 109 return (bus_alloc_resource(dev, type, rid, start, end, count, flags)); 110 } 111 112 static int 113 pci_hostb_release_resource(device_t dev, device_t child, int type, int rid, 114 struct resource *r) 115 { 116 117 return (bus_release_resource(dev, type, rid, r)); 118 } 119 120 /* PCI interface. */ 121 122 static uint32_t 123 pci_hostb_read_config(device_t dev, device_t child, int reg, int width) 124 { 125 126 return (pci_read_config(dev, reg, width)); 127 } 128 129 static void 130 pci_hostb_write_config(device_t dev, device_t child, int reg, 131 uint32_t val, int width) 132 { 133 134 pci_write_config(dev, reg, val, width); 135 } 136 137 static int 138 pci_hostb_enable_busmaster(device_t dev, device_t child) 139 { 140 141 device_printf(dev, "child %s requested pci_enable_busmaster\n", 142 device_get_nameunit(child)); 143 return (pci_enable_busmaster(dev)); 144 } 145 146 static int 147 pci_hostb_disable_busmaster(device_t dev, device_t child) 148 { 149 150 device_printf(dev, "child %s requested pci_disable_busmaster\n", 151 device_get_nameunit(child)); 152 return (pci_disable_busmaster(dev)); 153 } 154 155 static int 156 pci_hostb_enable_io(device_t dev, device_t child, int space) 157 { 158 159 device_printf(dev, "child %s requested pci_enable_io\n", 160 device_get_nameunit(child)); 161 return (pci_enable_io(dev, space)); 162 } 163 164 static int 165 pci_hostb_disable_io(device_t dev, device_t child, int space) 166 { 167 168 device_printf(dev, "child %s requested pci_disable_io\n", 169 device_get_nameunit(child)); 170 return (pci_disable_io(dev, space)); 171 } 172 173 static int 174 pci_hostb_set_powerstate(device_t dev, device_t child, int state) 175 { 176 177 device_printf(dev, "child %s requested pci_set_powerstate\n", 178 device_get_nameunit(child)); 179 return (pci_set_powerstate(dev, state)); 180 } 181 182 static int 183 pci_hostb_get_powerstate(device_t dev, device_t child) 184 { 185 186 device_printf(dev, "child %s requested pci_get_powerstate\n", 187 device_get_nameunit(child)); 188 return (pci_get_powerstate(dev)); 189 } 190 191 static int 192 pci_hostb_assign_interrupt(device_t dev, device_t child) 193 { 194 195 device_printf(dev, "child %s requested pci_assign_interrupt\n", 196 device_get_nameunit(child)); 197 return (PCI_ASSIGN_INTERRUPT(device_get_parent(dev), dev)); 198 } 199 200 static int 201 pci_hostb_find_extcap(device_t dev, device_t child, int capability, 202 int *capreg) 203 { 204 205 return (pci_find_extcap(dev, capability, capreg)); 206 } 207 208 static device_method_t pci_hostb_methods[] = { 209 /* Device interface */ 210 DEVMETHOD(device_probe, pci_hostb_probe), 211 DEVMETHOD(device_attach, pci_hostb_attach), 212 DEVMETHOD(device_shutdown, bus_generic_shutdown), 213 DEVMETHOD(device_suspend, bus_generic_suspend), 214 DEVMETHOD(device_resume, bus_generic_resume), 215 216 /* Bus interface */ 217 DEVMETHOD(bus_read_ivar, pci_hostb_read_ivar), 218 DEVMETHOD(bus_write_ivar, pci_hostb_write_ivar), 219 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), 220 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), 221 222 DEVMETHOD(bus_alloc_resource, pci_hostb_alloc_resource), 223 DEVMETHOD(bus_release_resource, pci_hostb_release_resource), 224 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), 225 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), 226 227 /* PCI interface */ 228 DEVMETHOD(pci_read_config, pci_hostb_read_config), 229 DEVMETHOD(pci_write_config, pci_hostb_write_config), 230 DEVMETHOD(pci_enable_busmaster, pci_hostb_enable_busmaster), 231 DEVMETHOD(pci_disable_busmaster, pci_hostb_disable_busmaster), 232 DEVMETHOD(pci_enable_io, pci_hostb_enable_io), 233 DEVMETHOD(pci_disable_io, pci_hostb_disable_io), 234 DEVMETHOD(pci_get_powerstate, pci_hostb_get_powerstate), 235 DEVMETHOD(pci_set_powerstate, pci_hostb_set_powerstate), 236 DEVMETHOD(pci_assign_interrupt, pci_hostb_assign_interrupt), 237 DEVMETHOD(pci_find_extcap, pci_hostb_find_extcap), 238 239 DEVMETHOD_END 240 }; 241 242 static driver_t pci_hostb_driver = { 243 "hostb", 244 pci_hostb_methods, 245 1, 246 }; 247 248 static devclass_t pci_hostb_devclass; 249 250 DRIVER_MODULE(hostb, pci, pci_hostb_driver, pci_hostb_devclass, NULL, NULL); 251