1 /* 2 * Copyright (c) 1997, Stefan Esser <se@freebsd.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice unmodified, this list of conditions, and the following 10 * disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 * 26 * $FreeBSD: src/sys/dev/pci/hostb_pci.c,v 1.1.8.1 2009/04/15 03:14:26 kensmith Exp $ 27 */ 28 29 #include <sys/param.h> 30 #include <sys/bus.h> 31 #include <sys/kernel.h> 32 #include <sys/module.h> 33 34 #include <sys/types.h> 35 #include <sys/systm.h> 36 37 #include <bus/pci/pcivar.h> 38 #include <bus/pci/pcireg.h> 39 40 /* 41 * Provide a device to "eat" the host->pci bridge devices that show up 42 * on PCI busses and stop them showing up twice on the probes. This also 43 * stops them showing up as 'none' in pciconf -l. If the host bridge 44 * provides an AGP capability then we create a child agp device for the 45 * agp GART driver to attach to. 46 */ 47 static int 48 pci_hostb_probe(device_t dev) 49 { 50 u_int32_t id; 51 id = pci_get_devid(dev); 52 53 switch (id) { 54 55 /* VIA VT82C596 Power Managment Function */ 56 case 0x30501106: 57 return (ENXIO); 58 59 default: 60 break; 61 } 62 63 if (pci_get_class(dev) == PCIC_BRIDGE && 64 pci_get_subclass(dev) == PCIS_BRIDGE_HOST) { 65 device_set_desc(dev, "Host to PCI bridge"); 66 device_quiet(dev); 67 return (-10000); 68 } 69 return (ENXIO); 70 } 71 72 static int 73 pci_hostb_attach(device_t dev) 74 { 75 76 bus_generic_probe(dev); 77 78 /* 79 * If AGP capabilities are present on this device, then create 80 * an AGP child. 81 */ 82 if (pci_find_extcap(dev, PCIY_AGP, NULL) == 0) 83 device_add_child(dev, "agp", -1); 84 device_add_child(dev, "ecc", -1); 85 bus_generic_attach(dev); 86 return (0); 87 } 88 89 /* Bus interface. */ 90 91 static int 92 pci_hostb_read_ivar(device_t dev, device_t child, int which, uintptr_t *result) 93 { 94 95 return (BUS_READ_IVAR(device_get_parent(dev), dev, which, result)); 96 } 97 98 static int 99 pci_hostb_write_ivar(device_t dev, device_t child, int which, uintptr_t value) 100 { 101 102 return (EINVAL); 103 } 104 105 static struct resource * 106 pci_hostb_alloc_resource(device_t dev, device_t child, int type, int *rid, 107 u_long start, u_long end, u_long count, u_int flags, int cpuid __unused) 108 { 109 110 return (bus_alloc_resource(dev, type, rid, start, end, count, flags)); 111 } 112 113 static int 114 pci_hostb_release_resource(device_t dev, device_t child, int type, int rid, 115 struct resource *r) 116 { 117 118 return (bus_release_resource(dev, type, rid, r)); 119 } 120 121 /* PCI interface. */ 122 123 static uint32_t 124 pci_hostb_read_config(device_t dev, device_t child, int reg, int width) 125 { 126 127 return (pci_read_config(dev, reg, width)); 128 } 129 130 static void 131 pci_hostb_write_config(device_t dev, device_t child, int reg, 132 uint32_t val, int width) 133 { 134 135 pci_write_config(dev, reg, val, width); 136 } 137 138 static int 139 pci_hostb_enable_busmaster(device_t dev, device_t child) 140 { 141 142 device_printf(dev, "child %s requested pci_enable_busmaster\n", 143 device_get_nameunit(child)); 144 return (pci_enable_busmaster(dev)); 145 } 146 147 static int 148 pci_hostb_disable_busmaster(device_t dev, device_t child) 149 { 150 151 device_printf(dev, "child %s requested pci_disable_busmaster\n", 152 device_get_nameunit(child)); 153 return (pci_disable_busmaster(dev)); 154 } 155 156 static int 157 pci_hostb_enable_io(device_t dev, device_t child, int space) 158 { 159 160 device_printf(dev, "child %s requested pci_enable_io\n", 161 device_get_nameunit(child)); 162 return (pci_enable_io(dev, space)); 163 } 164 165 static int 166 pci_hostb_disable_io(device_t dev, device_t child, int space) 167 { 168 169 device_printf(dev, "child %s requested pci_disable_io\n", 170 device_get_nameunit(child)); 171 return (pci_disable_io(dev, space)); 172 } 173 174 static int 175 pci_hostb_set_powerstate(device_t dev, device_t child, int state) 176 { 177 178 device_printf(dev, "child %s requested pci_set_powerstate\n", 179 device_get_nameunit(child)); 180 return (pci_set_powerstate(dev, state)); 181 } 182 183 static int 184 pci_hostb_get_powerstate(device_t dev, device_t child) 185 { 186 187 device_printf(dev, "child %s requested pci_get_powerstate\n", 188 device_get_nameunit(child)); 189 return (pci_get_powerstate(dev)); 190 } 191 192 static int 193 pci_hostb_assign_interrupt(device_t dev, device_t child) 194 { 195 196 device_printf(dev, "child %s requested pci_assign_interrupt\n", 197 device_get_nameunit(child)); 198 return (PCI_ASSIGN_INTERRUPT(device_get_parent(dev), dev)); 199 } 200 201 static int 202 pci_hostb_find_extcap(device_t dev, device_t child, int capability, 203 int *capreg) 204 { 205 206 return (pci_find_extcap(dev, capability, capreg)); 207 } 208 209 static device_method_t pci_hostb_methods[] = { 210 /* Device interface */ 211 DEVMETHOD(device_probe, pci_hostb_probe), 212 DEVMETHOD(device_attach, pci_hostb_attach), 213 DEVMETHOD(device_shutdown, bus_generic_shutdown), 214 DEVMETHOD(device_suspend, bus_generic_suspend), 215 DEVMETHOD(device_resume, bus_generic_resume), 216 217 /* Bus interface */ 218 DEVMETHOD(bus_read_ivar, pci_hostb_read_ivar), 219 DEVMETHOD(bus_write_ivar, pci_hostb_write_ivar), 220 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), 221 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), 222 223 DEVMETHOD(bus_alloc_resource, pci_hostb_alloc_resource), 224 DEVMETHOD(bus_release_resource, pci_hostb_release_resource), 225 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), 226 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), 227 228 /* PCI interface */ 229 DEVMETHOD(pci_read_config, pci_hostb_read_config), 230 DEVMETHOD(pci_write_config, pci_hostb_write_config), 231 DEVMETHOD(pci_enable_busmaster, pci_hostb_enable_busmaster), 232 DEVMETHOD(pci_disable_busmaster, pci_hostb_disable_busmaster), 233 DEVMETHOD(pci_enable_io, pci_hostb_enable_io), 234 DEVMETHOD(pci_disable_io, pci_hostb_disable_io), 235 DEVMETHOD(pci_get_powerstate, pci_hostb_get_powerstate), 236 DEVMETHOD(pci_set_powerstate, pci_hostb_set_powerstate), 237 DEVMETHOD(pci_assign_interrupt, pci_hostb_assign_interrupt), 238 DEVMETHOD(pci_find_extcap, pci_hostb_find_extcap), 239 240 { 0, 0 } 241 }; 242 243 static driver_t pci_hostb_driver = { 244 "hostb", 245 pci_hostb_methods, 246 1, 247 }; 248 249 static devclass_t pci_hostb_devclass; 250 251 DRIVER_MODULE(hostb, pci, pci_hostb_driver, pci_hostb_devclass, NULL, NULL); 252