xref: /dragonfly/sys/bus/pci/pci_private.h (revision cfd1aba3)
1 /*-
2  * Copyright (c) 1997, Stefan Esser <se@freebsd.org>
3  * Copyright (c) 2000, Michael Smith <msmith@freebsd.org>
4  * Copyright (c) 2000, BSDi
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice unmodified, this list of conditions, and the following
12  *    disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  *
17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27  *
28  * $FreeBSD: src/sys/dev/pci/pci_private.h,v 1.25.8.1 2009/04/15 03:14:26 kensmith Exp $
29  *
30  */
31 
32 #ifndef _PCI_PRIVATE_H_
33 #define	_PCI_PRIVATE_H_
34 
35 /*
36  * Export definitions of the pci bus so that we can more easily share
37  * it with "subclass" busses.
38  */
39 DECLARE_CLASS(pci_driver);
40 
41 void		pci_add_children(device_t dev, int domain, int busno,
42 		    size_t dinfo_size);
43 void		pci_add_child(device_t bus, struct pci_devinfo *dinfo);
44 void		pci_add_resources(device_t pcib, device_t bus, device_t dev, int force,
45 		    uint32_t prefetchmask);
46 void		pci_driver_added(device_t dev, driver_t *driver);
47 int		pci_print_child(device_t dev, device_t child);
48 void		pci_probe_nomatch(device_t dev, device_t child);
49 int		pci_read_ivar(device_t dev, device_t child, int which,
50 		    uintptr_t *result);
51 int		pci_write_ivar(device_t dev, device_t child, int which,
52 		    uintptr_t value);
53 int		pci_setup_intr(device_t dev, device_t child,
54 		    struct resource *irq, int flags,
55 		    driver_intr_t *intr, void *arg, void **cookiep,
56 		    lwkt_serialize_t serializer, const char *desc);
57 int		pci_teardown_intr(device_t dev, device_t child,
58 		    struct resource *irq, void *cookie);
59 int		pci_get_vpd_ident_method(device_t dev, device_t child,
60 		    const char **identptr);
61 int		pci_get_vpd_readonly_method(device_t dev, device_t child,
62 		    const char *kw, const char **vptr);
63 int		pci_set_powerstate_method(device_t dev, device_t child,
64 		    int state);
65 int		pci_get_powerstate_method(device_t dev, device_t child);
66 uint32_t	pci_read_config_method(device_t dev, device_t child,
67 		    int reg, int width);
68 void		pci_write_config_method(device_t dev, device_t child,
69 		    int reg, uint32_t val, int width);
70 int		pci_enable_busmaster_method(device_t dev, device_t child);
71 int		pci_disable_busmaster_method(device_t dev, device_t child);
72 int		pci_enable_io_method(device_t dev, device_t child, int space);
73 int		pci_disable_io_method(device_t dev, device_t child, int space);
74 int		pci_find_extcap_method(device_t dev, device_t child,
75 		    int capability, int *capreg);
76 int		pci_alloc_msi_method(device_t dev, device_t child, int *rid, int count, int cpuid);
77 int		pci_alloc_msix_vector_method(device_t dev, device_t child, u_int vector, int *rid, int cpuid);
78 int		pci_release_msi_method(device_t dev, device_t child);
79 int		pci_release_msix_vector_method(device_t dev, device_t child, int rid);
80 int		pci_msi_count_method(device_t dev, device_t child);
81 int		pci_msix_count_method(device_t dev, device_t child);
82 struct resource	*pci_alloc_resource(device_t dev, device_t child,
83 		    int type, int *rid, u_long start, u_long end, u_long count,
84 		    u_int flags, int cpuid);
85 void		pci_delete_resource(device_t dev, device_t child,
86 		    int type, int rid);
87 struct resource_list *pci_get_resource_list (device_t dev, device_t child);
88 struct pci_devinfo *pci_read_device(device_t pcib, int d, int b, int s, int f,
89 		    size_t size);
90 void		pci_print_verbose(struct pci_devinfo *dinfo);
91 int		pci_freecfg(struct pci_devinfo *dinfo);
92 int		pci_child_location_str_method(device_t cbdev, device_t child,
93 		    char *buf, size_t buflen);
94 int		pci_child_pnpinfo_str_method(device_t cbdev, device_t child,
95 		    char *buf, size_t buflen);
96 int		pci_assign_interrupt_method(device_t dev, device_t child);
97 int		pci_resume(device_t dev);
98 int		pci_suspend(device_t dev);
99 
100 /** Restore the config register state.  The state must be previously
101  * saved with pci_cfg_save.  However, the pci bus driver takes care of
102  * that.  This function will also return the device to PCI_POWERSTATE_D0
103  * if it is currently in a lower power mode.
104  */
105 void		pci_cfg_restore(device_t, struct pci_devinfo *);
106 
107 /** Save the config register state.  Optionally set the power state to D3
108  * if the third argument is non-zero.
109  */
110 void		pci_cfg_save(device_t, struct pci_devinfo *, int);
111 
112 #endif /* _PCI_PRIVATE_H_ */
113