xref: /dragonfly/sys/bus/pci/pcib_private.h (revision d8082429)
1 /*-
2  * Copyright (c) 1994,1995 Stefan Esser, Wolfgang StanglMeier
3  * Copyright (c) 2000 Michael Smith <msmith@freebsd.org>
4  * Copyright (c) 2000 BSDi
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  * 3. The name of the author may not be used to endorse or promote products
16  *    derived from this software without specific prior written permission.
17  *
18  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28  * SUCH DAMAGE.
29  *
30  * $FreeBSD: src/sys/dev/pci/pcib_private.h,v 1.13.8.1 2009/04/15 03:14:26 kensmith Exp $
31  */
32 
33 #ifndef __PCIB_PRIVATE_H__
34 #define	__PCIB_PRIVATE_H__
35 
36 /*
37  * Export portions of generic PCI:PCI bridge support so that it can be
38  * used by subclasses.
39  */
40 DECLARE_CLASS(pcib_driver);
41 
42 /*
43  * Bridge-specific data.
44  */
45 struct pcib_softc
46 {
47     device_t	dev;
48     uint32_t	flags;		/* flags */
49 #define	PCIB_SUBTRACTIVE	0x1
50 #define	PCIB_DISABLE_MSI	0x2
51     uint16_t	command;	/* command register */
52     uint32_t	domain;		/* domain number */
53     uint8_t	secbus;		/* secondary bus number */
54     uint8_t	subbus;		/* subordinate bus number */
55     pci_addr_t	pmembase;	/* base address of prefetchable memory */
56     pci_addr_t	pmemlimit;	/* topmost address of prefetchable memory */
57     pci_addr_t	membase;	/* base address of memory window */
58     pci_addr_t	memlimit;	/* topmost address of memory window */
59     uint32_t	iobase;		/* base address of port window */
60     uint32_t	iolimit;	/* topmost address of port window */
61     uint16_t	secstat;	/* secondary bus status register */
62     uint16_t	bridgectl;	/* bridge control register */
63     uint8_t	seclat;		/* secondary bus latency timer */
64 };
65 
66 typedef uint32_t pci_read_config_fn(int b, int s, int f, int reg, int width);
67 
68 int		host_pcib_get_busno(pci_read_config_fn read_config, int bus,
69     int slot, int func, uint8_t *busnum);
70 int		pcib_attach(device_t dev);
71 void		pcib_attach_common(device_t dev);
72 int		pcib_read_ivar(device_t dev, device_t child, int which, uintptr_t *result);
73 int		pcib_write_ivar(device_t dev, device_t child, int which, uintptr_t value);
74 struct resource *pcib_alloc_resource(device_t dev, device_t child, int type, int *rid,
75 		    u_long start, u_long end, u_long count, u_int flags, int cpuid);
76 int		pcib_maxslots(device_t dev);
77 uint32_t	pcib_read_config(device_t dev, int b, int s, int f, int reg, int width);
78 void		pcib_write_config(device_t dev, int b, int s, int f, int reg, uint32_t val, int width);
79 int		pcib_route_interrupt(device_t pcib, device_t dev, int pin);
80 int		pcib_alloc_msi(device_t pcib, device_t dev, int count, int maxcount, int *irqs, int cpuid);
81 int		pcib_release_msi(device_t pcib, device_t dev, int count, int *irqs, int cpuid);
82 int		pcib_alloc_msix(device_t pcib, device_t dev, int *irq, int cpuid);
83 int		pcib_release_msix(device_t pcib, device_t dev, int irq, int cpuid);
84 int		pcib_map_msi(device_t pcib, device_t dev, int irq, uint64_t *addr, uint32_t *data, int cpuid);
85 
86 #endif
87