1 /*- 2 * Copyright (c) 2003 John Baldwin <jhb@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 3. Neither the name of the author nor the names of any co-contributors 14 * may be used to endorse or promote products derived from this software 15 * without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 * $FreeBSD @169221 30 */ 31 32 /* 33 * Host to PCI and PCI to PCI bridge drivers that use the MP Table to route 34 * interrupts from PCI devices to I/O APICs. 35 */ 36 37 #include <sys/param.h> 38 #include <sys/systm.h> 39 #include <sys/bus.h> 40 #include <sys/kernel.h> 41 #include <sys/module.h> 42 43 #include <bus/pci/pcireg.h> 44 #include <bus/pci/pcivar.h> 45 #include <bus/pci/pcib_private.h> 46 47 #include <machine/smp.h> 48 49 #include "legacyvar.h" 50 #include "pci_cfgreg.h" 51 52 #include "pcib_if.h" 53 54 static int 55 mptable_pci_route_interrupt(device_t pcib, device_t dev, int pin) 56 { 57 int line, bus, slot; 58 59 bus = pci_get_bus(dev); 60 slot = pci_get_slot(dev); 61 62 line = pci_apic_irq(bus, slot, pin); 63 if (line >= 0) { 64 return line; 65 } else { 66 int irq = pci_get_irq(dev); 67 68 /* 69 * PCI interrupts might be redirected to the 70 * ISA bus according to some MP tables. Use the 71 * same methods as used by the ISA devices 72 * devices to find the proper IOAPIC int pin. 73 */ 74 kprintf("MPTable: Try routing through ISA bus for " 75 "bus %d slot %d INT%c irq %d\n", 76 bus, slot, 'A' + pin - 1, irq); 77 line = isa_apic_irq(irq); 78 if (line >= 0) 79 return line; 80 } 81 82 kprintf("MPTable: Unable to route for bus %d slot %d INT%c\n", 83 bus, slot, 'A' + pin - 1); 84 return PCI_INVALID_IRQ; 85 } 86 87 /* Host to PCI bridge driver. */ 88 89 static int 90 mptable_hostb_probe(device_t dev) 91 { 92 if (!apic_io_enable) 93 return (ENXIO); 94 95 if (pci_cfgregopen() == 0) 96 return (ENXIO); 97 #ifdef notyet 98 if (mptable_pci_probe_table(pcib_get_bus(dev)) != 0) 99 return (ENXIO); 100 #endif 101 device_set_desc(dev, "MPTable Host-PCI bridge"); 102 return (0); 103 } 104 105 static int 106 mptable_hostb_attach(device_t dev) 107 { 108 109 device_add_child(dev, "pci", pcib_get_bus(dev)); 110 return (bus_generic_attach(dev)); 111 } 112 113 /* Pass MSI requests up to the nexus. */ 114 static int 115 mptable_hostb_alloc_msi(device_t pcib, device_t dev, int count, int maxcount, 116 int *irqs) 117 { 118 device_t bus; 119 120 bus = device_get_parent(pcib); 121 return (PCIB_ALLOC_MSI(device_get_parent(bus), dev, count, maxcount, 122 irqs)); 123 } 124 125 static int 126 mptable_hostb_alloc_msix(device_t pcib, device_t dev, int *irq) 127 { 128 device_t bus; 129 130 bus = device_get_parent(pcib); 131 return (PCIB_ALLOC_MSIX(device_get_parent(bus), dev, irq)); 132 } 133 134 static int 135 mptable_hostb_map_msi(device_t pcib, device_t dev, int irq, uint64_t *addr, 136 uint32_t *data) 137 { 138 device_t bus; 139 140 bus = device_get_parent(pcib); 141 return (PCIB_MAP_MSI(device_get_parent(bus), dev, irq, addr, data)); 142 } 143 144 static device_method_t mptable_hostb_methods[] = { 145 /* Device interface */ 146 DEVMETHOD(device_probe, mptable_hostb_probe), 147 DEVMETHOD(device_attach, mptable_hostb_attach), 148 DEVMETHOD(device_shutdown, bus_generic_shutdown), 149 DEVMETHOD(device_suspend, bus_generic_suspend), 150 DEVMETHOD(device_resume, bus_generic_resume), 151 152 /* Bus interface */ 153 DEVMETHOD(bus_print_child, bus_generic_print_child), 154 DEVMETHOD(bus_read_ivar, legacy_pcib_read_ivar), 155 DEVMETHOD(bus_write_ivar, legacy_pcib_write_ivar), 156 DEVMETHOD(bus_alloc_resource, legacy_pcib_alloc_resource), 157 DEVMETHOD(bus_release_resource, bus_generic_release_resource), 158 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), 159 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), 160 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), 161 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), 162 163 /* pcib interface */ 164 DEVMETHOD(pcib_maxslots, legacy_pcib_maxslots), 165 DEVMETHOD(pcib_read_config, legacy_pcib_read_config), 166 DEVMETHOD(pcib_write_config, legacy_pcib_write_config), 167 DEVMETHOD(pcib_route_interrupt, mptable_pci_route_interrupt), 168 DEVMETHOD(pcib_alloc_msi, mptable_hostb_alloc_msi), 169 DEVMETHOD(pcib_release_msi, pcib_release_msi), 170 DEVMETHOD(pcib_alloc_msix, mptable_hostb_alloc_msix), 171 DEVMETHOD(pcib_release_msix, pcib_release_msix), 172 DEVMETHOD(pcib_map_msi, mptable_hostb_map_msi), 173 174 { 0, 0 } 175 }; 176 177 static devclass_t hostb_devclass; 178 179 DEFINE_CLASS_0(pcib, mptable_hostb_driver, mptable_hostb_methods, 1); 180 DRIVER_MODULE(mptable_pcib, legacy, mptable_hostb_driver, hostb_devclass, 0, 0); 181 182 /* PCI to PCI bridge driver. */ 183 184 static int 185 mptable_pcib_probe(device_t dev) 186 { 187 int bus; 188 189 if (!apic_io_enable) 190 return (ENXIO); 191 192 if ((pci_get_class(dev) != PCIC_BRIDGE) || 193 (pci_get_subclass(dev) != PCIS_BRIDGE_PCI)) 194 return (ENXIO); 195 bus = pci_read_config(dev, PCIR_SECBUS_1, 1); 196 if (bus == 0) 197 return (ENXIO); 198 #ifdef notyet 199 if (mptable_pci_probe_table(bus) != 0) 200 return (ENXIO); 201 #endif 202 device_set_desc(dev, "MPTable PCI-PCI bridge"); 203 return (-500); 204 } 205 206 static device_method_t mptable_pcib_pci_methods[] = { 207 /* Device interface */ 208 DEVMETHOD(device_probe, mptable_pcib_probe), 209 DEVMETHOD(device_attach, pcib_attach), 210 DEVMETHOD(device_shutdown, bus_generic_shutdown), 211 DEVMETHOD(device_suspend, bus_generic_suspend), 212 DEVMETHOD(device_resume, bus_generic_resume), 213 214 /* Bus interface */ 215 DEVMETHOD(bus_print_child, bus_generic_print_child), 216 DEVMETHOD(bus_read_ivar, pcib_read_ivar), 217 DEVMETHOD(bus_write_ivar, pcib_write_ivar), 218 DEVMETHOD(bus_alloc_resource, pcib_alloc_resource), 219 DEVMETHOD(bus_release_resource, bus_generic_release_resource), 220 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), 221 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), 222 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), 223 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), 224 225 /* pcib interface */ 226 DEVMETHOD(pcib_maxslots, pcib_maxslots), 227 DEVMETHOD(pcib_read_config, pcib_read_config), 228 DEVMETHOD(pcib_write_config, pcib_write_config), 229 DEVMETHOD(pcib_route_interrupt, mptable_pci_route_interrupt), 230 DEVMETHOD(pcib_alloc_msi, pcib_alloc_msi), 231 DEVMETHOD(pcib_release_msi, pcib_release_msi), 232 DEVMETHOD(pcib_alloc_msix, pcib_alloc_msix), 233 DEVMETHOD(pcib_release_msix, pcib_release_msix), 234 DEVMETHOD(pcib_map_msi, pcib_map_msi), 235 236 {0, 0} 237 }; 238 239 static devclass_t pcib_devclass; 240 241 DEFINE_CLASS_0(pcib, mptable_pcib_driver, mptable_pcib_pci_methods, 242 sizeof(struct pcib_softc)); 243 DRIVER_MODULE(mptable_pcib, pci, mptable_pcib_driver, pcib_devclass, 0, 0); 244