1b2b3ffcdSSimon Schubert /*-
2b2b3ffcdSSimon Schubert * Copyright (c) 1997, Stefan Esser <se@kfreebsd.org>
3b2b3ffcdSSimon Schubert * All rights reserved.
4b2b3ffcdSSimon Schubert *
5b2b3ffcdSSimon Schubert * Redistribution and use in source and binary forms, with or without
6b2b3ffcdSSimon Schubert * modification, are permitted provided that the following conditions
7b2b3ffcdSSimon Schubert * are met:
8b2b3ffcdSSimon Schubert * 1. Redistributions of source code must retain the above copyright
9b2b3ffcdSSimon Schubert * notice unmodified, this list of conditions, and the following
10b2b3ffcdSSimon Schubert * disclaimer.
11b2b3ffcdSSimon Schubert * 2. Redistributions in binary form must reproduce the above copyright
12b2b3ffcdSSimon Schubert * notice, this list of conditions and the following disclaimer in the
13b2b3ffcdSSimon Schubert * documentation and/or other materials provided with the distribution.
14b2b3ffcdSSimon Schubert *
15b2b3ffcdSSimon Schubert * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16b2b3ffcdSSimon Schubert * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17b2b3ffcdSSimon Schubert * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18b2b3ffcdSSimon Schubert * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19b2b3ffcdSSimon Schubert * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20b2b3ffcdSSimon Schubert * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21b2b3ffcdSSimon Schubert * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22b2b3ffcdSSimon Schubert * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23b2b3ffcdSSimon Schubert * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24b2b3ffcdSSimon Schubert * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25b2b3ffcdSSimon Schubert *
26b2b3ffcdSSimon Schubert * $FreeBSD: src/sys/i386/pci/pci_bus.c,v 1.128.8.1 2009/04/15 03:14:26 kensmith Exp $
27b2b3ffcdSSimon Schubert */
28b2b3ffcdSSimon Schubert
29b2b3ffcdSSimon Schubert #include <sys/param.h>
30b2b3ffcdSSimon Schubert #include <sys/systm.h>
31b2b3ffcdSSimon Schubert #include <sys/bus.h>
32b2b3ffcdSSimon Schubert #include <sys/kernel.h>
33b2b3ffcdSSimon Schubert #include <sys/malloc.h>
34b2b3ffcdSSimon Schubert #include <sys/module.h>
35b2b3ffcdSSimon Schubert #include <sys/sysctl.h>
36b2b3ffcdSSimon Schubert
37b2b3ffcdSSimon Schubert #include <bus/pci/pcivar.h>
38b2b3ffcdSSimon Schubert #include <bus/pci/pcireg.h>
39b2b3ffcdSSimon Schubert #include <bus/pci/pcib_private.h>
40b2b3ffcdSSimon Schubert #include <bus/isa/isavar.h>
41b2b3ffcdSSimon Schubert #include <machine/md_var.h>
42b2b3ffcdSSimon Schubert
43b2b3ffcdSSimon Schubert #include "legacyvar.h"
44b2b3ffcdSSimon Schubert #include "pci_cfgreg.h"
45b2b3ffcdSSimon Schubert
46b2b3ffcdSSimon Schubert #include "pcib_if.h"
47b2b3ffcdSSimon Schubert
48b2b3ffcdSSimon Schubert #ifdef notyet
49b2b3ffcdSSimon Schubert static int pcibios_pcib_route_interrupt(device_t pcib, device_t dev,
50b2b3ffcdSSimon Schubert int pin);
51b2b3ffcdSSimon Schubert #endif
52b2b3ffcdSSimon Schubert
53b2b3ffcdSSimon Schubert int
legacy_pcib_maxslots(device_t dev)54b2b3ffcdSSimon Schubert legacy_pcib_maxslots(device_t dev)
55b2b3ffcdSSimon Schubert {
56b2b3ffcdSSimon Schubert return 31;
57b2b3ffcdSSimon Schubert }
58b2b3ffcdSSimon Schubert
59b2b3ffcdSSimon Schubert /* read configuration space register */
60b2b3ffcdSSimon Schubert
61b2b3ffcdSSimon Schubert u_int32_t
legacy_pcib_read_config(device_t dev,int bus,int slot,int func,int reg,int bytes)62b2b3ffcdSSimon Schubert legacy_pcib_read_config(device_t dev, int bus, int slot, int func,
63b2b3ffcdSSimon Schubert int reg, int bytes)
64b2b3ffcdSSimon Schubert {
65b2b3ffcdSSimon Schubert return(pci_cfgregread(bus, slot, func, reg, bytes));
66b2b3ffcdSSimon Schubert }
67b2b3ffcdSSimon Schubert
68b2b3ffcdSSimon Schubert /* write configuration space register */
69b2b3ffcdSSimon Schubert
70b2b3ffcdSSimon Schubert void
legacy_pcib_write_config(device_t dev,int bus,int slot,int func,int reg,u_int32_t data,int bytes)71b2b3ffcdSSimon Schubert legacy_pcib_write_config(device_t dev, int bus, int slot, int func,
72b2b3ffcdSSimon Schubert int reg, u_int32_t data, int bytes)
73b2b3ffcdSSimon Schubert {
74b2b3ffcdSSimon Schubert pci_cfgregwrite(bus, slot, func, reg, data, bytes);
75b2b3ffcdSSimon Schubert }
76b2b3ffcdSSimon Schubert
77b2b3ffcdSSimon Schubert /* Pass MSI requests up to the nexus. */
78b2b3ffcdSSimon Schubert
79b2b3ffcdSSimon Schubert static int
legacy_pcib_alloc_msi(device_t pcib,device_t dev,int count,int maxcount,int * irqs,int cpuid)80b2b3ffcdSSimon Schubert legacy_pcib_alloc_msi(device_t pcib, device_t dev, int count, int maxcount,
81803a9933SSepherosa Ziehau int *irqs, int cpuid)
82b2b3ffcdSSimon Schubert {
83b2b3ffcdSSimon Schubert device_t bus;
84b2b3ffcdSSimon Schubert
85b2b3ffcdSSimon Schubert bus = device_get_parent(pcib);
86b2b3ffcdSSimon Schubert return (PCIB_ALLOC_MSI(device_get_parent(bus), dev, count, maxcount,
87803a9933SSepherosa Ziehau irqs, cpuid));
88b2b3ffcdSSimon Schubert }
89b2b3ffcdSSimon Schubert
90b2b3ffcdSSimon Schubert static int
legacy_pcib_alloc_msix(device_t pcib,device_t dev,int * irq,int cpuid)912a1f96b9SSepherosa Ziehau legacy_pcib_alloc_msix(device_t pcib, device_t dev, int *irq, int cpuid)
92b2b3ffcdSSimon Schubert {
93b2b3ffcdSSimon Schubert device_t bus;
94b2b3ffcdSSimon Schubert
95b2b3ffcdSSimon Schubert bus = device_get_parent(pcib);
962a1f96b9SSepherosa Ziehau return (PCIB_ALLOC_MSIX(device_get_parent(bus), dev, irq, cpuid));
97b2b3ffcdSSimon Schubert }
98b2b3ffcdSSimon Schubert
99b2b3ffcdSSimon Schubert static int
legacy_pcib_map_msi(device_t pcib,device_t dev,int irq,uint64_t * addr,uint32_t * data,int cpuid)100b2b3ffcdSSimon Schubert legacy_pcib_map_msi(device_t pcib, device_t dev, int irq, uint64_t *addr,
1010af900e1SSepherosa Ziehau uint32_t *data, int cpuid)
102b2b3ffcdSSimon Schubert {
103b2b3ffcdSSimon Schubert device_t bus;
104b2b3ffcdSSimon Schubert
105b2b3ffcdSSimon Schubert bus = device_get_parent(pcib);
1060af900e1SSepherosa Ziehau return (PCIB_MAP_MSI(device_get_parent(bus), dev, irq, addr, data,
1070af900e1SSepherosa Ziehau cpuid));
108b2b3ffcdSSimon Schubert }
109b2b3ffcdSSimon Schubert
110b2b3ffcdSSimon Schubert static const char *
legacy_pcib_is_host_bridge(int bus,int slot,int func,uint32_t id,uint8_t class,uint8_t subclass,uint8_t * busnum)111b2b3ffcdSSimon Schubert legacy_pcib_is_host_bridge(int bus, int slot, int func,
112b2b3ffcdSSimon Schubert uint32_t id, uint8_t class, uint8_t subclass,
113b2b3ffcdSSimon Schubert uint8_t *busnum)
114b2b3ffcdSSimon Schubert {
115b2b3ffcdSSimon Schubert const char *s = NULL;
116b2b3ffcdSSimon Schubert static uint8_t pxb[4]; /* hack for 450nx */
117b2b3ffcdSSimon Schubert
118b2b3ffcdSSimon Schubert *busnum = 0;
119b2b3ffcdSSimon Schubert
120b2b3ffcdSSimon Schubert switch (id) {
121b2b3ffcdSSimon Schubert case 0x12258086:
122b2b3ffcdSSimon Schubert s = "Intel 824?? host to PCI bridge";
123b2b3ffcdSSimon Schubert /* XXX This is a guess */
124b2b3ffcdSSimon Schubert /* *busnum = legacy_pcib_read_config(0, bus, slot, func, 0x41, 1); */
125b2b3ffcdSSimon Schubert *busnum = bus;
126b2b3ffcdSSimon Schubert break;
127b2b3ffcdSSimon Schubert case 0x71208086:
128b2b3ffcdSSimon Schubert s = "Intel 82810 (i810 GMCH) Host To Hub bridge";
129b2b3ffcdSSimon Schubert break;
130b2b3ffcdSSimon Schubert case 0x71228086:
131b2b3ffcdSSimon Schubert s = "Intel 82810-DC100 (i810-DC100 GMCH) Host To Hub bridge";
132b2b3ffcdSSimon Schubert break;
133b2b3ffcdSSimon Schubert case 0x71248086:
134b2b3ffcdSSimon Schubert s = "Intel 82810E (i810E GMCH) Host To Hub bridge";
135b2b3ffcdSSimon Schubert break;
136b2b3ffcdSSimon Schubert case 0x11308086:
137b2b3ffcdSSimon Schubert s = "Intel 82815 (i815 GMCH) Host To Hub bridge";
138b2b3ffcdSSimon Schubert break;
139b2b3ffcdSSimon Schubert case 0x71808086:
140b2b3ffcdSSimon Schubert s = "Intel 82443LX (440 LX) host to PCI bridge";
141b2b3ffcdSSimon Schubert break;
142b2b3ffcdSSimon Schubert case 0x71908086:
143b2b3ffcdSSimon Schubert s = "Intel 82443BX (440 BX) host to PCI bridge";
144b2b3ffcdSSimon Schubert break;
145b2b3ffcdSSimon Schubert case 0x71928086:
146b2b3ffcdSSimon Schubert s = "Intel 82443BX host to PCI bridge (AGP disabled)";
147b2b3ffcdSSimon Schubert break;
148b2b3ffcdSSimon Schubert case 0x71948086:
149b2b3ffcdSSimon Schubert s = "Intel 82443MX host to PCI bridge";
150b2b3ffcdSSimon Schubert break;
151b2b3ffcdSSimon Schubert case 0x71a08086:
152b2b3ffcdSSimon Schubert s = "Intel 82443GX host to PCI bridge";
153b2b3ffcdSSimon Schubert break;
154b2b3ffcdSSimon Schubert case 0x71a18086:
155b2b3ffcdSSimon Schubert s = "Intel 82443GX host to AGP bridge";
156b2b3ffcdSSimon Schubert break;
157b2b3ffcdSSimon Schubert case 0x71a28086:
158b2b3ffcdSSimon Schubert s = "Intel 82443GX host to PCI bridge (AGP disabled)";
159b2b3ffcdSSimon Schubert break;
160b2b3ffcdSSimon Schubert case 0x84c48086:
161b2b3ffcdSSimon Schubert s = "Intel 82454KX/GX (Orion) host to PCI bridge";
162b2b3ffcdSSimon Schubert *busnum = legacy_pcib_read_config(0, bus, slot, func, 0x4a, 1);
163b2b3ffcdSSimon Schubert break;
164b2b3ffcdSSimon Schubert case 0x84ca8086:
165b2b3ffcdSSimon Schubert /*
166b2b3ffcdSSimon Schubert * For the 450nx chipset, there is a whole bundle of
167b2b3ffcdSSimon Schubert * things pretending to be host bridges. The MIOC will
168b2b3ffcdSSimon Schubert * be seen first and isn't really a pci bridge (the
169b2b3ffcdSSimon Schubert * actual busses are attached to the PXB's). We need to
170b2b3ffcdSSimon Schubert * read the registers of the MIOC to figure out the
171b2b3ffcdSSimon Schubert * bus numbers for the PXB channels.
172b2b3ffcdSSimon Schubert *
173b2b3ffcdSSimon Schubert * Since the MIOC doesn't have a pci bus attached, we
174b2b3ffcdSSimon Schubert * pretend it wasn't there.
175b2b3ffcdSSimon Schubert */
176b2b3ffcdSSimon Schubert pxb[0] = legacy_pcib_read_config(0, bus, slot, func,
177b2b3ffcdSSimon Schubert 0xd0, 1); /* BUSNO[0] */
178b2b3ffcdSSimon Schubert pxb[1] = legacy_pcib_read_config(0, bus, slot, func,
179b2b3ffcdSSimon Schubert 0xd1, 1) + 1; /* SUBA[0]+1 */
180b2b3ffcdSSimon Schubert pxb[2] = legacy_pcib_read_config(0, bus, slot, func,
181b2b3ffcdSSimon Schubert 0xd3, 1); /* BUSNO[1] */
182b2b3ffcdSSimon Schubert pxb[3] = legacy_pcib_read_config(0, bus, slot, func,
183b2b3ffcdSSimon Schubert 0xd4, 1) + 1; /* SUBA[1]+1 */
184b2b3ffcdSSimon Schubert return NULL;
185b2b3ffcdSSimon Schubert case 0x84cb8086:
186b2b3ffcdSSimon Schubert switch (slot) {
187b2b3ffcdSSimon Schubert case 0x12:
188b2b3ffcdSSimon Schubert s = "Intel 82454NX PXB#0, Bus#A";
189b2b3ffcdSSimon Schubert *busnum = pxb[0];
190b2b3ffcdSSimon Schubert break;
191b2b3ffcdSSimon Schubert case 0x13:
192b2b3ffcdSSimon Schubert s = "Intel 82454NX PXB#0, Bus#B";
193b2b3ffcdSSimon Schubert *busnum = pxb[1];
194b2b3ffcdSSimon Schubert break;
195b2b3ffcdSSimon Schubert case 0x14:
196b2b3ffcdSSimon Schubert s = "Intel 82454NX PXB#1, Bus#A";
197b2b3ffcdSSimon Schubert *busnum = pxb[2];
198b2b3ffcdSSimon Schubert break;
199b2b3ffcdSSimon Schubert case 0x15:
200b2b3ffcdSSimon Schubert s = "Intel 82454NX PXB#1, Bus#B";
201b2b3ffcdSSimon Schubert *busnum = pxb[3];
202b2b3ffcdSSimon Schubert break;
203b2b3ffcdSSimon Schubert }
204b2b3ffcdSSimon Schubert break;
205b2b3ffcdSSimon Schubert
206b2b3ffcdSSimon Schubert /* AMD -- vendor 0x1022 */
207b2b3ffcdSSimon Schubert case 0x70061022:
208b2b3ffcdSSimon Schubert s = "AMD-751 host to PCI bridge";
209b2b3ffcdSSimon Schubert break;
210b2b3ffcdSSimon Schubert case 0x700e1022:
211b2b3ffcdSSimon Schubert s = "AMD-761 host to PCI bridge";
212b2b3ffcdSSimon Schubert break;
213b2b3ffcdSSimon Schubert
214b2b3ffcdSSimon Schubert /* SiS -- vendor 0x1039 */
215b2b3ffcdSSimon Schubert case 0x04961039:
216b2b3ffcdSSimon Schubert s = "SiS 85c496";
217b2b3ffcdSSimon Schubert break;
218b2b3ffcdSSimon Schubert case 0x04061039:
219b2b3ffcdSSimon Schubert s = "SiS 85c501";
220b2b3ffcdSSimon Schubert break;
221b2b3ffcdSSimon Schubert case 0x06011039:
222b2b3ffcdSSimon Schubert s = "SiS 85c601";
223b2b3ffcdSSimon Schubert break;
224b2b3ffcdSSimon Schubert case 0x55911039:
225b2b3ffcdSSimon Schubert s = "SiS 5591 host to PCI bridge";
226b2b3ffcdSSimon Schubert break;
227b2b3ffcdSSimon Schubert case 0x00011039:
228b2b3ffcdSSimon Schubert s = "SiS 5591 host to AGP bridge";
229b2b3ffcdSSimon Schubert break;
230b2b3ffcdSSimon Schubert
231b2b3ffcdSSimon Schubert /* VLSI -- vendor 0x1004 */
232b2b3ffcdSSimon Schubert case 0x00051004:
233b2b3ffcdSSimon Schubert s = "VLSI 82C592 Host to PCI bridge";
234b2b3ffcdSSimon Schubert break;
235b2b3ffcdSSimon Schubert
236b2b3ffcdSSimon Schubert /* XXX Here is MVP3, I got the datasheet but NO M/B to test it */
237b2b3ffcdSSimon Schubert /* totally. Please let me know if anything wrong. -F */
238b2b3ffcdSSimon Schubert /* XXX need info on the MVP3 -- any takers? */
239b2b3ffcdSSimon Schubert case 0x05981106:
240b2b3ffcdSSimon Schubert s = "VIA 82C598MVP (Apollo MVP3) host bridge";
241b2b3ffcdSSimon Schubert break;
242b2b3ffcdSSimon Schubert
243b2b3ffcdSSimon Schubert /* AcerLabs -- vendor 0x10b9 */
244b2b3ffcdSSimon Schubert /* Funny : The datasheet told me vendor id is "10b8",sub-vendor */
245b2b3ffcdSSimon Schubert /* id is '10b9" but the register always shows "10b9". -Foxfair */
246b2b3ffcdSSimon Schubert case 0x154110b9:
247b2b3ffcdSSimon Schubert s = "AcerLabs M1541 (Aladdin-V) PCI host bridge";
248b2b3ffcdSSimon Schubert break;
249b2b3ffcdSSimon Schubert
250b2b3ffcdSSimon Schubert /* OPTi -- vendor 0x1045 */
251b2b3ffcdSSimon Schubert case 0xc7011045:
252b2b3ffcdSSimon Schubert s = "OPTi 82C700 host to PCI bridge";
253b2b3ffcdSSimon Schubert break;
254b2b3ffcdSSimon Schubert case 0xc8221045:
255b2b3ffcdSSimon Schubert s = "OPTi 82C822 host to PCI Bridge";
256b2b3ffcdSSimon Schubert break;
257b2b3ffcdSSimon Schubert
258b2b3ffcdSSimon Schubert /* ServerWorks -- vendor 0x1166 */
259b2b3ffcdSSimon Schubert case 0x00051166:
260b2b3ffcdSSimon Schubert s = "ServerWorks NB6536 2.0HE host to PCI bridge";
261b2b3ffcdSSimon Schubert *busnum = legacy_pcib_read_config(0, bus, slot, func, 0x44, 1);
262b2b3ffcdSSimon Schubert break;
263b2b3ffcdSSimon Schubert
264b2b3ffcdSSimon Schubert case 0x00061166:
265b2b3ffcdSSimon Schubert /* FALLTHROUGH */
266b2b3ffcdSSimon Schubert case 0x00081166:
267b2b3ffcdSSimon Schubert /* FALLTHROUGH */
268b2b3ffcdSSimon Schubert case 0x02011166:
269b2b3ffcdSSimon Schubert /* FALLTHROUGH */
270b2b3ffcdSSimon Schubert case 0x010f1014: /* IBM re-badged ServerWorks chipset */
271b2b3ffcdSSimon Schubert s = "ServerWorks host to PCI bridge";
272b2b3ffcdSSimon Schubert *busnum = legacy_pcib_read_config(0, bus, slot, func, 0x44, 1);
273b2b3ffcdSSimon Schubert break;
274b2b3ffcdSSimon Schubert
275b2b3ffcdSSimon Schubert case 0x00091166:
276b2b3ffcdSSimon Schubert s = "ServerWorks NB6635 3.0LE host to PCI bridge";
277b2b3ffcdSSimon Schubert *busnum = legacy_pcib_read_config(0, bus, slot, func, 0x44, 1);
278b2b3ffcdSSimon Schubert break;
279b2b3ffcdSSimon Schubert
280b2b3ffcdSSimon Schubert case 0x00101166:
281b2b3ffcdSSimon Schubert s = "ServerWorks CIOB30 host to PCI bridge";
282b2b3ffcdSSimon Schubert *busnum = legacy_pcib_read_config(0, bus, slot, func, 0x44, 1);
283b2b3ffcdSSimon Schubert break;
284b2b3ffcdSSimon Schubert
285b2b3ffcdSSimon Schubert case 0x00111166:
286b2b3ffcdSSimon Schubert /* FALLTHROUGH */
287b2b3ffcdSSimon Schubert case 0x03021014: /* IBM re-badged ServerWorks chipset */
288b2b3ffcdSSimon Schubert s = "ServerWorks CMIC-HE host to PCI-X bridge";
289b2b3ffcdSSimon Schubert *busnum = legacy_pcib_read_config(0, bus, slot, func, 0x44, 1);
290b2b3ffcdSSimon Schubert break;
291b2b3ffcdSSimon Schubert
292b2b3ffcdSSimon Schubert /* XXX unknown chipset, but working */
293b2b3ffcdSSimon Schubert case 0x00171166:
294b2b3ffcdSSimon Schubert /* FALLTHROUGH */
295b2b3ffcdSSimon Schubert case 0x01011166:
296b2b3ffcdSSimon Schubert s = "ServerWorks host to PCI bridge(unknown chipset)";
297b2b3ffcdSSimon Schubert *busnum = legacy_pcib_read_config(0, bus, slot, func, 0x44, 1);
298b2b3ffcdSSimon Schubert break;
299b2b3ffcdSSimon Schubert
300b2b3ffcdSSimon Schubert /* Compaq/HP -- vendor 0x0e11 */
301b2b3ffcdSSimon Schubert case 0x60100e11:
302b2b3ffcdSSimon Schubert s = "Compaq/HP Model 6010 HotPlug PCI Bridge";
303b2b3ffcdSSimon Schubert *busnum = legacy_pcib_read_config(0, bus, slot, func, 0xc8, 1);
304b2b3ffcdSSimon Schubert break;
305b2b3ffcdSSimon Schubert
306b2b3ffcdSSimon Schubert /* Integrated Micro Solutions -- vendor 0x10e0 */
307b2b3ffcdSSimon Schubert case 0x884910e0:
308b2b3ffcdSSimon Schubert s = "Integrated Micro Solutions VL Bridge";
309b2b3ffcdSSimon Schubert break;
310b2b3ffcdSSimon Schubert
311b2b3ffcdSSimon Schubert default:
312b2b3ffcdSSimon Schubert if (class == PCIC_BRIDGE && subclass == PCIS_BRIDGE_HOST)
313b2b3ffcdSSimon Schubert s = "Host to PCI bridge";
314b2b3ffcdSSimon Schubert break;
315b2b3ffcdSSimon Schubert }
316b2b3ffcdSSimon Schubert
317b2b3ffcdSSimon Schubert return s;
318b2b3ffcdSSimon Schubert }
319b2b3ffcdSSimon Schubert
320b2b3ffcdSSimon Schubert /*
321b2b3ffcdSSimon Schubert * Scan the first pci bus for host-pci bridges and add pcib instances
322b2b3ffcdSSimon Schubert * to the nexus for each bridge.
323b2b3ffcdSSimon Schubert */
324b2b3ffcdSSimon Schubert static int
legacy_pcib_identify(driver_t * driver,device_t parent)325b2b3ffcdSSimon Schubert legacy_pcib_identify(driver_t *driver, device_t parent)
326b2b3ffcdSSimon Schubert {
327b2b3ffcdSSimon Schubert int bus, slot, func;
328b2b3ffcdSSimon Schubert u_int8_t hdrtype;
329b2b3ffcdSSimon Schubert int found = 0;
330b2b3ffcdSSimon Schubert int pcifunchigh;
331b2b3ffcdSSimon Schubert int found824xx = 0;
332b2b3ffcdSSimon Schubert int found_orion = 0;
333b2b3ffcdSSimon Schubert device_t child;
334b2b3ffcdSSimon Schubert devclass_t pci_devclass;
335b2b3ffcdSSimon Schubert
336b2b3ffcdSSimon Schubert if (pci_cfgregopen() == 0)
337b2b3ffcdSSimon Schubert return ENXIO;
338b2b3ffcdSSimon Schubert /*
339b2b3ffcdSSimon Schubert * Check to see if we haven't already had a PCI bus added
340b2b3ffcdSSimon Schubert * via some other means. If we have, bail since otherwise
341b2b3ffcdSSimon Schubert * we're going to end up duplicating it.
342b2b3ffcdSSimon Schubert */
343b2b3ffcdSSimon Schubert if ((pci_devclass = devclass_find("pci")) &&
344b2b3ffcdSSimon Schubert devclass_get_device(pci_devclass, 0))
345b2b3ffcdSSimon Schubert return ENXIO;
346b2b3ffcdSSimon Schubert
347b2b3ffcdSSimon Schubert bus = 0;
348b2b3ffcdSSimon Schubert retry:
349b2b3ffcdSSimon Schubert for (slot = 0; slot <= PCI_SLOTMAX; slot++) {
350b2b3ffcdSSimon Schubert func = 0;
351b2b3ffcdSSimon Schubert hdrtype = legacy_pcib_read_config(0, bus, slot, func,
352b2b3ffcdSSimon Schubert PCIR_HDRTYPE, 1);
353b2b3ffcdSSimon Schubert /*
354b2b3ffcdSSimon Schubert * When enumerating bus devices, the standard says that
355b2b3ffcdSSimon Schubert * one should check the header type and ignore the slots whose
356b2b3ffcdSSimon Schubert * header types that the software doesn't know about. We use
357b2b3ffcdSSimon Schubert * this to filter out devices.
358b2b3ffcdSSimon Schubert */
359b2b3ffcdSSimon Schubert if ((hdrtype & PCIM_HDRTYPE) > PCI_MAXHDRTYPE)
360b2b3ffcdSSimon Schubert continue;
361b2b3ffcdSSimon Schubert if ((hdrtype & PCIM_MFDEV) &&
362b2b3ffcdSSimon Schubert (!found_orion || hdrtype != 0xff))
363b2b3ffcdSSimon Schubert pcifunchigh = PCI_FUNCMAX;
364b2b3ffcdSSimon Schubert else
365b2b3ffcdSSimon Schubert pcifunchigh = 0;
366b2b3ffcdSSimon Schubert for (func = 0; func <= pcifunchigh; func++) {
367b2b3ffcdSSimon Schubert /*
368b2b3ffcdSSimon Schubert * Read the IDs and class from the device.
369b2b3ffcdSSimon Schubert */
370b2b3ffcdSSimon Schubert u_int32_t id;
371b2b3ffcdSSimon Schubert u_int8_t class, subclass, busnum;
372b2b3ffcdSSimon Schubert const char *s;
373b2b3ffcdSSimon Schubert device_t *devs;
374b2b3ffcdSSimon Schubert int ndevs, i;
375b2b3ffcdSSimon Schubert
376b2b3ffcdSSimon Schubert id = legacy_pcib_read_config(0, bus, slot, func,
377b2b3ffcdSSimon Schubert PCIR_DEVVENDOR, 4);
378b2b3ffcdSSimon Schubert if (id == -1)
379b2b3ffcdSSimon Schubert continue;
380b2b3ffcdSSimon Schubert class = legacy_pcib_read_config(0, bus, slot, func,
381b2b3ffcdSSimon Schubert PCIR_CLASS, 1);
382b2b3ffcdSSimon Schubert subclass = legacy_pcib_read_config(0, bus, slot, func,
383b2b3ffcdSSimon Schubert PCIR_SUBCLASS, 1);
384b2b3ffcdSSimon Schubert
385b2b3ffcdSSimon Schubert s = legacy_pcib_is_host_bridge(bus, slot, func,
386b2b3ffcdSSimon Schubert id, class, subclass,
387b2b3ffcdSSimon Schubert &busnum);
388b2b3ffcdSSimon Schubert if (s == NULL)
389b2b3ffcdSSimon Schubert continue;
390b2b3ffcdSSimon Schubert
391b2b3ffcdSSimon Schubert /*
392b2b3ffcdSSimon Schubert * Check to see if the physical bus has already
393b2b3ffcdSSimon Schubert * been seen. Eg: hybrid 32 and 64 bit host
394b2b3ffcdSSimon Schubert * bridges to the same logical bus.
395b2b3ffcdSSimon Schubert */
396b2b3ffcdSSimon Schubert if (device_get_children(parent, &devs, &ndevs) == 0) {
397b2b3ffcdSSimon Schubert for (i = 0; s != NULL && i < ndevs; i++) {
398b2b3ffcdSSimon Schubert if (strcmp(device_get_name(devs[i]),
399b2b3ffcdSSimon Schubert "pcib") != 0)
400b2b3ffcdSSimon Schubert continue;
401b2b3ffcdSSimon Schubert if (legacy_get_pcibus(devs[i]) == busnum)
402b2b3ffcdSSimon Schubert s = NULL;
403b2b3ffcdSSimon Schubert }
404b2b3ffcdSSimon Schubert kfree(devs, M_TEMP);
405b2b3ffcdSSimon Schubert }
406b2b3ffcdSSimon Schubert
407b2b3ffcdSSimon Schubert if (s == NULL)
408b2b3ffcdSSimon Schubert continue;
409b2b3ffcdSSimon Schubert
410b2b3ffcdSSimon Schubert /*
411b2b3ffcdSSimon Schubert * Add at priority 100 to make sure we
412b2b3ffcdSSimon Schubert * go after any motherboard resources
413b2b3ffcdSSimon Schubert */
414b2b3ffcdSSimon Schubert child = BUS_ADD_CHILD(parent, parent, 100 + busnum,
415b2b3ffcdSSimon Schubert "pcib", busnum);
416b2b3ffcdSSimon Schubert device_set_desc(child, s);
417b2b3ffcdSSimon Schubert legacy_set_pcibus(child, busnum);
418b2b3ffcdSSimon Schubert
419b2b3ffcdSSimon Schubert found = 1;
420b2b3ffcdSSimon Schubert if (id == 0x12258086)
421b2b3ffcdSSimon Schubert found824xx = 1;
422b2b3ffcdSSimon Schubert if (id == 0x84c48086)
423b2b3ffcdSSimon Schubert found_orion = 1;
424b2b3ffcdSSimon Schubert }
425b2b3ffcdSSimon Schubert }
426b2b3ffcdSSimon Schubert if (found824xx && bus == 0) {
427b2b3ffcdSSimon Schubert bus++;
428b2b3ffcdSSimon Schubert goto retry;
429b2b3ffcdSSimon Schubert }
430b2b3ffcdSSimon Schubert
431b2b3ffcdSSimon Schubert /*
432b2b3ffcdSSimon Schubert * Make sure we add at least one bridge since some old
433b2b3ffcdSSimon Schubert * hardware doesn't actually have a host-pci bridge device.
434b2b3ffcdSSimon Schubert * Note that pci_cfgregopen() thinks we have PCI devices..
435b2b3ffcdSSimon Schubert */
436b2b3ffcdSSimon Schubert if (!found) {
437b2b3ffcdSSimon Schubert if (bootverbose)
438b2b3ffcdSSimon Schubert kprintf(
439b2b3ffcdSSimon Schubert "legacy_pcib_identify: no bridge found, adding pcib0 anyway\n");
440b2b3ffcdSSimon Schubert child = BUS_ADD_CHILD(parent, parent, 100, "pcib", 0);
441b2b3ffcdSSimon Schubert legacy_set_pcibus(child, 0);
442b2b3ffcdSSimon Schubert }
443b2b3ffcdSSimon Schubert return 0;
444b2b3ffcdSSimon Schubert }
445b2b3ffcdSSimon Schubert
446b2b3ffcdSSimon Schubert static int
legacy_pcib_probe(device_t dev)447b2b3ffcdSSimon Schubert legacy_pcib_probe(device_t dev)
448b2b3ffcdSSimon Schubert {
449b2b3ffcdSSimon Schubert if (pci_cfgregopen() == 0)
450b2b3ffcdSSimon Schubert return ENXIO;
451b2b3ffcdSSimon Schubert return -100;
452b2b3ffcdSSimon Schubert }
453b2b3ffcdSSimon Schubert
454b2b3ffcdSSimon Schubert static int
legacy_pcib_attach(device_t dev)455b2b3ffcdSSimon Schubert legacy_pcib_attach(device_t dev)
456b2b3ffcdSSimon Schubert {
457b2b3ffcdSSimon Schubert #ifdef notyet
458b2b3ffcdSSimon Schubert device_t pir;
459b2b3ffcdSSimon Schubert #endif
460b2b3ffcdSSimon Schubert int bus;
461b2b3ffcdSSimon Schubert
462b2b3ffcdSSimon Schubert /*
463b2b3ffcdSSimon Schubert * Look for a PCI BIOS interrupt routing table as that will be
464b2b3ffcdSSimon Schubert * our method of routing interrupts if we have one.
465b2b3ffcdSSimon Schubert */
466b2b3ffcdSSimon Schubert bus = pcib_get_bus(dev);
467b2b3ffcdSSimon Schubert #ifdef notyet
468b2b3ffcdSSimon Schubert if (pci_pir_probe(bus, 0)) {
469b2b3ffcdSSimon Schubert pir = BUS_ADD_CHILD(device_get_parent(dev), device_get_parent(dev), 0, "pir", 0);
470b2b3ffcdSSimon Schubert if (pir != NULL)
471b2b3ffcdSSimon Schubert device_probe_and_attach(pir);
472b2b3ffcdSSimon Schubert }
473b2b3ffcdSSimon Schubert #endif
474b2b3ffcdSSimon Schubert device_add_child(dev, "pci", bus);
475b2b3ffcdSSimon Schubert return bus_generic_attach(dev);
476b2b3ffcdSSimon Schubert }
477b2b3ffcdSSimon Schubert
478b2b3ffcdSSimon Schubert int
legacy_pcib_read_ivar(device_t dev,device_t child,int which,uintptr_t * result)479b2b3ffcdSSimon Schubert legacy_pcib_read_ivar(device_t dev, device_t child, int which,
480b2b3ffcdSSimon Schubert uintptr_t *result)
481b2b3ffcdSSimon Schubert {
482b2b3ffcdSSimon Schubert
483b2b3ffcdSSimon Schubert switch (which) {
484b2b3ffcdSSimon Schubert case PCIB_IVAR_DOMAIN:
485b2b3ffcdSSimon Schubert *result = 0;
486b2b3ffcdSSimon Schubert return 0;
487b2b3ffcdSSimon Schubert case PCIB_IVAR_BUS:
488b2b3ffcdSSimon Schubert *result = legacy_get_pcibus(dev);
489b2b3ffcdSSimon Schubert return 0;
490b2b3ffcdSSimon Schubert }
491b2b3ffcdSSimon Schubert return ENOENT;
492b2b3ffcdSSimon Schubert }
493b2b3ffcdSSimon Schubert
494b2b3ffcdSSimon Schubert int
legacy_pcib_write_ivar(device_t dev,device_t child,int which,uintptr_t value)495b2b3ffcdSSimon Schubert legacy_pcib_write_ivar(device_t dev, device_t child, int which,
496b2b3ffcdSSimon Schubert uintptr_t value)
497b2b3ffcdSSimon Schubert {
498b2b3ffcdSSimon Schubert
499b2b3ffcdSSimon Schubert switch (which) {
500b2b3ffcdSSimon Schubert case PCIB_IVAR_DOMAIN:
501b2b3ffcdSSimon Schubert return EINVAL;
502b2b3ffcdSSimon Schubert case PCIB_IVAR_BUS:
503b2b3ffcdSSimon Schubert legacy_set_pcibus(dev, value);
504b2b3ffcdSSimon Schubert return 0;
505b2b3ffcdSSimon Schubert }
506b2b3ffcdSSimon Schubert return ENOENT;
507b2b3ffcdSSimon Schubert }
508b2b3ffcdSSimon Schubert
509b2b3ffcdSSimon Schubert SYSCTL_DECL(_hw_pci);
510b2b3ffcdSSimon Schubert
511b2b3ffcdSSimon Schubert static unsigned long legacy_host_mem_start = 0x80000000;
512*a7560c84SSascha Wildner TUNABLE_ULONG("hw.pci.host_mem_start", &legacy_host_mem_start);
513b2b3ffcdSSimon Schubert SYSCTL_ULONG(_hw_pci, OID_AUTO, host_mem_start, CTLFLAG_RD,
514b2b3ffcdSSimon Schubert &legacy_host_mem_start, 0x80000000,
515*a7560c84SSascha Wildner "Limit the host bridge memory to being above this address.");
516b2b3ffcdSSimon Schubert
517b2b3ffcdSSimon Schubert struct resource *
legacy_pcib_alloc_resource(device_t dev,device_t child,int type,int * rid,u_long start,u_long end,u_long count,u_int flags,int cpuid)518b2b3ffcdSSimon Schubert legacy_pcib_alloc_resource(device_t dev, device_t child, int type, int *rid,
5194f7fe8c7SSepherosa Ziehau u_long start, u_long end, u_long count, u_int flags, int cpuid)
520b2b3ffcdSSimon Schubert {
521b2b3ffcdSSimon Schubert /*
522b2b3ffcdSSimon Schubert * If no memory preference is given, use upper 32MB slot most
523b2b3ffcdSSimon Schubert * bioses use for their memory window. Typically other bridges
524b2b3ffcdSSimon Schubert * before us get in the way to assert their preferences on memory.
525b2b3ffcdSSimon Schubert * Hardcoding like this sucks, so a more MD/MI way needs to be
526b2b3ffcdSSimon Schubert * found to do it. This is typically only used on older laptops
527b2b3ffcdSSimon Schubert * that don't have pci busses behind pci bridge, so assuming > 32MB
528b2b3ffcdSSimon Schubert * is liekly OK.
529b2b3ffcdSSimon Schubert *
530b2b3ffcdSSimon Schubert * However, this can cause problems for other chipsets, so we make
531b2b3ffcdSSimon Schubert * this tunable by hw.pci.host_mem_start.
532b2b3ffcdSSimon Schubert */
533b2b3ffcdSSimon Schubert if (type == SYS_RES_MEMORY && start == 0UL && end == ~0UL)
534b2b3ffcdSSimon Schubert start = legacy_host_mem_start;
535b2b3ffcdSSimon Schubert if (type == SYS_RES_IOPORT && start == 0UL && end == ~0UL)
536b2b3ffcdSSimon Schubert start = 0x1000;
537b2b3ffcdSSimon Schubert return (bus_generic_alloc_resource(dev, child, type, rid, start, end,
5384f7fe8c7SSepherosa Ziehau count, flags, cpuid));
539b2b3ffcdSSimon Schubert }
540b2b3ffcdSSimon Schubert
541b2b3ffcdSSimon Schubert static device_method_t legacy_pcib_methods[] = {
542b2b3ffcdSSimon Schubert /* Device interface */
543b2b3ffcdSSimon Schubert DEVMETHOD(device_identify, legacy_pcib_identify),
544b2b3ffcdSSimon Schubert DEVMETHOD(device_probe, legacy_pcib_probe),
545b2b3ffcdSSimon Schubert DEVMETHOD(device_attach, legacy_pcib_attach),
546b2b3ffcdSSimon Schubert DEVMETHOD(device_shutdown, bus_generic_shutdown),
547b2b3ffcdSSimon Schubert DEVMETHOD(device_suspend, bus_generic_suspend),
548b2b3ffcdSSimon Schubert DEVMETHOD(device_resume, bus_generic_resume),
549b2b3ffcdSSimon Schubert
550b2b3ffcdSSimon Schubert /* Bus interface */
551b2b3ffcdSSimon Schubert DEVMETHOD(bus_print_child, bus_generic_print_child),
552b2b3ffcdSSimon Schubert DEVMETHOD(bus_read_ivar, legacy_pcib_read_ivar),
553b2b3ffcdSSimon Schubert DEVMETHOD(bus_write_ivar, legacy_pcib_write_ivar),
554b2b3ffcdSSimon Schubert DEVMETHOD(bus_alloc_resource, legacy_pcib_alloc_resource),
555b2b3ffcdSSimon Schubert DEVMETHOD(bus_release_resource, bus_generic_release_resource),
556b2b3ffcdSSimon Schubert DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
557b2b3ffcdSSimon Schubert DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
558b2b3ffcdSSimon Schubert DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
559b2b3ffcdSSimon Schubert DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
560b2b3ffcdSSimon Schubert
561b2b3ffcdSSimon Schubert /* pcib interface */
562b2b3ffcdSSimon Schubert DEVMETHOD(pcib_maxslots, legacy_pcib_maxslots),
563b2b3ffcdSSimon Schubert DEVMETHOD(pcib_read_config, legacy_pcib_read_config),
564b2b3ffcdSSimon Schubert DEVMETHOD(pcib_write_config, legacy_pcib_write_config),
565b2b3ffcdSSimon Schubert #ifdef notyet
566b2b3ffcdSSimon Schubert DEVMETHOD(pcib_route_interrupt, pcibios_pcib_route_interrupt),
567b2b3ffcdSSimon Schubert #else
568b2b3ffcdSSimon Schubert DEVMETHOD(pcib_route_interrupt, pcib_route_interrupt),
569b2b3ffcdSSimon Schubert #endif
570b2b3ffcdSSimon Schubert DEVMETHOD(pcib_alloc_msi, legacy_pcib_alloc_msi),
571b2b3ffcdSSimon Schubert DEVMETHOD(pcib_release_msi, pcib_release_msi),
572b2b3ffcdSSimon Schubert DEVMETHOD(pcib_alloc_msix, legacy_pcib_alloc_msix),
573b2b3ffcdSSimon Schubert DEVMETHOD(pcib_release_msix, pcib_release_msix),
574b2b3ffcdSSimon Schubert DEVMETHOD(pcib_map_msi, legacy_pcib_map_msi),
575d3c9c58eSSascha Wildner DEVMETHOD_END
576b2b3ffcdSSimon Schubert };
577b2b3ffcdSSimon Schubert
578b2b3ffcdSSimon Schubert static devclass_t hostb_devclass;
579b2b3ffcdSSimon Schubert
580b2b3ffcdSSimon Schubert DEFINE_CLASS_0(pcib, legacy_pcib_driver, legacy_pcib_methods, 1);
581aa2b9d05SSascha Wildner DRIVER_MODULE(pcib, legacy, legacy_pcib_driver, hostb_devclass, NULL, NULL);
582b2b3ffcdSSimon Schubert
583b2b3ffcdSSimon Schubert
584b2b3ffcdSSimon Schubert /*
585b2b3ffcdSSimon Schubert * Install placeholder to claim the resources owned by the
586b2b3ffcdSSimon Schubert * PCI bus interface. This could be used to extract the
587b2b3ffcdSSimon Schubert * config space registers in the extreme case where the PnP
588b2b3ffcdSSimon Schubert * ID is available and the PCI BIOS isn't, but for now we just
589b2b3ffcdSSimon Schubert * eat the PnP ID and do nothing else.
590b2b3ffcdSSimon Schubert *
591b2b3ffcdSSimon Schubert * XXX we should silence this probe, as it will generally confuse
592b2b3ffcdSSimon Schubert * people.
593b2b3ffcdSSimon Schubert */
594b2b3ffcdSSimon Schubert static struct isa_pnp_id pcibus_pnp_ids[] = {
595b2b3ffcdSSimon Schubert { 0x030ad041 /* PNP0A03 */, "PCI Bus" },
596f28a2894SSascha Wildner { 0x080ad041 /* PNP0A08 */, "PCIe Bus" },
597b2b3ffcdSSimon Schubert { 0 }
598b2b3ffcdSSimon Schubert };
599b2b3ffcdSSimon Schubert
600b2b3ffcdSSimon Schubert static int
pcibus_pnp_probe(device_t dev)601b2b3ffcdSSimon Schubert pcibus_pnp_probe(device_t dev)
602b2b3ffcdSSimon Schubert {
603b2b3ffcdSSimon Schubert int result;
604b2b3ffcdSSimon Schubert
605b2b3ffcdSSimon Schubert if ((result = ISA_PNP_PROBE(device_get_parent(dev), dev, pcibus_pnp_ids)) <= 0)
606b2b3ffcdSSimon Schubert device_quiet(dev);
607b2b3ffcdSSimon Schubert return(result);
608b2b3ffcdSSimon Schubert }
609b2b3ffcdSSimon Schubert
610b2b3ffcdSSimon Schubert static int
pcibus_pnp_attach(device_t dev)611b2b3ffcdSSimon Schubert pcibus_pnp_attach(device_t dev)
612b2b3ffcdSSimon Schubert {
613b2b3ffcdSSimon Schubert return(0);
614b2b3ffcdSSimon Schubert }
615b2b3ffcdSSimon Schubert
616b2b3ffcdSSimon Schubert static device_method_t pcibus_pnp_methods[] = {
617b2b3ffcdSSimon Schubert /* Device interface */
618b2b3ffcdSSimon Schubert DEVMETHOD(device_probe, pcibus_pnp_probe),
619b2b3ffcdSSimon Schubert DEVMETHOD(device_attach, pcibus_pnp_attach),
620b2b3ffcdSSimon Schubert DEVMETHOD(device_detach, bus_generic_detach),
621b2b3ffcdSSimon Schubert DEVMETHOD(device_shutdown, bus_generic_shutdown),
622b2b3ffcdSSimon Schubert DEVMETHOD(device_suspend, bus_generic_suspend),
623b2b3ffcdSSimon Schubert DEVMETHOD(device_resume, bus_generic_resume),
624d3c9c58eSSascha Wildner DEVMETHOD_END
625b2b3ffcdSSimon Schubert };
626b2b3ffcdSSimon Schubert
627b2b3ffcdSSimon Schubert static devclass_t pcibus_pnp_devclass;
628b2b3ffcdSSimon Schubert
629b2b3ffcdSSimon Schubert DEFINE_CLASS_0(pcibus_pnp, pcibus_pnp_driver, pcibus_pnp_methods, 1);
630aa2b9d05SSascha Wildner DRIVER_MODULE(pcibus_pnp, isa, pcibus_pnp_driver, pcibus_pnp_devclass, NULL, NULL);
631b2b3ffcdSSimon Schubert
632b2b3ffcdSSimon Schubert
633b2b3ffcdSSimon Schubert #ifdef notyet
634b2b3ffcdSSimon Schubert
635b2b3ffcdSSimon Schubert /*
636b2b3ffcdSSimon Schubert * Provide a PCI-PCI bridge driver for PCI busses behind PCI-PCI bridges
637b2b3ffcdSSimon Schubert * that appear in the PCIBIOS Interrupt Routing Table to use the routing
638b2b3ffcdSSimon Schubert * table for interrupt routing when possible.
639b2b3ffcdSSimon Schubert */
640b2b3ffcdSSimon Schubert static int pcibios_pcib_probe(device_t bus);
641b2b3ffcdSSimon Schubert
642b2b3ffcdSSimon Schubert static device_method_t pcibios_pcib_pci_methods[] = {
643b2b3ffcdSSimon Schubert /* Device interface */
644b2b3ffcdSSimon Schubert DEVMETHOD(device_probe, pcibios_pcib_probe),
645b2b3ffcdSSimon Schubert DEVMETHOD(device_attach, pcib_attach),
646b2b3ffcdSSimon Schubert DEVMETHOD(device_shutdown, bus_generic_shutdown),
647b2b3ffcdSSimon Schubert DEVMETHOD(device_suspend, bus_generic_suspend),
648b2b3ffcdSSimon Schubert DEVMETHOD(device_resume, bus_generic_resume),
649b2b3ffcdSSimon Schubert
650b2b3ffcdSSimon Schubert /* Bus interface */
651b2b3ffcdSSimon Schubert DEVMETHOD(bus_print_child, bus_generic_print_child),
652b2b3ffcdSSimon Schubert DEVMETHOD(bus_read_ivar, pcib_read_ivar),
653b2b3ffcdSSimon Schubert DEVMETHOD(bus_write_ivar, pcib_write_ivar),
654b2b3ffcdSSimon Schubert DEVMETHOD(bus_alloc_resource, pcib_alloc_resource),
655b2b3ffcdSSimon Schubert DEVMETHOD(bus_release_resource, bus_generic_release_resource),
656b2b3ffcdSSimon Schubert DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
657b2b3ffcdSSimon Schubert DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
658b2b3ffcdSSimon Schubert DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
659b2b3ffcdSSimon Schubert DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
660b2b3ffcdSSimon Schubert
661b2b3ffcdSSimon Schubert /* pcib interface */
662b2b3ffcdSSimon Schubert DEVMETHOD(pcib_maxslots, pcib_maxslots),
663b2b3ffcdSSimon Schubert DEVMETHOD(pcib_read_config, pcib_read_config),
664b2b3ffcdSSimon Schubert DEVMETHOD(pcib_write_config, pcib_write_config),
665b2b3ffcdSSimon Schubert DEVMETHOD(pcib_route_interrupt, pcibios_pcib_route_interrupt),
666b2b3ffcdSSimon Schubert DEVMETHOD(pcib_alloc_msi, pcib_alloc_msi),
667b2b3ffcdSSimon Schubert DEVMETHOD(pcib_release_msi, pcib_release_msi),
668b2b3ffcdSSimon Schubert DEVMETHOD(pcib_alloc_msix, pcib_alloc_msix),
669b2b3ffcdSSimon Schubert DEVMETHOD(pcib_release_msix, pcib_release_msix),
670b2b3ffcdSSimon Schubert DEVMETHOD(pcib_map_msi, pcib_map_msi),
671b2b3ffcdSSimon Schubert
672d3c9c58eSSascha Wildner DEVMETHOD_END
673b2b3ffcdSSimon Schubert };
674b2b3ffcdSSimon Schubert
675b2b3ffcdSSimon Schubert static devclass_t pcib_devclass;
676b2b3ffcdSSimon Schubert
677b2b3ffcdSSimon Schubert DEFINE_CLASS_0(pcib, pcibios_pcib_driver, pcibios_pcib_pci_methods,
678b2b3ffcdSSimon Schubert sizeof(struct pcib_softc));
679aa2b9d05SSascha Wildner DRIVER_MODULE(pcibios_pcib, pci, pcibios_pcib_driver, pcib_devclass, NULL, NULL);
680b2b3ffcdSSimon Schubert
681b2b3ffcdSSimon Schubert static int
pcibios_pcib_probe(device_t dev)682b2b3ffcdSSimon Schubert pcibios_pcib_probe(device_t dev)
683b2b3ffcdSSimon Schubert {
684b2b3ffcdSSimon Schubert int bus;
685b2b3ffcdSSimon Schubert
686b2b3ffcdSSimon Schubert if ((pci_get_class(dev) != PCIC_BRIDGE) ||
687b2b3ffcdSSimon Schubert (pci_get_subclass(dev) != PCIS_BRIDGE_PCI))
688b2b3ffcdSSimon Schubert return (ENXIO);
689b2b3ffcdSSimon Schubert bus = pci_read_config(dev, PCIR_SECBUS_1, 1);
690b2b3ffcdSSimon Schubert if (bus == 0)
691b2b3ffcdSSimon Schubert return (ENXIO);
692b2b3ffcdSSimon Schubert if (!pci_pir_probe(bus, 1))
693b2b3ffcdSSimon Schubert return (ENXIO);
694b2b3ffcdSSimon Schubert device_set_desc(dev, "PCIBIOS PCI-PCI bridge");
695b2b3ffcdSSimon Schubert return (-2000);
696b2b3ffcdSSimon Schubert }
697b2b3ffcdSSimon Schubert
698b2b3ffcdSSimon Schubert static int
pcibios_pcib_route_interrupt(device_t pcib,device_t dev,int pin)699b2b3ffcdSSimon Schubert pcibios_pcib_route_interrupt(device_t pcib, device_t dev, int pin)
700b2b3ffcdSSimon Schubert {
701b2b3ffcdSSimon Schubert return (pci_pir_route_interrupt(pci_get_bus(dev), pci_get_slot(dev),
702b2b3ffcdSSimon Schubert pci_get_function(dev), pin));
703b2b3ffcdSSimon Schubert }
704b2b3ffcdSSimon Schubert
705b2b3ffcdSSimon Schubert #endif /* notyet */
706