1 /* 2 * Copyright (c) 2014 The DragonFly Project. All rights reserved. 3 * 4 * This code is derived from software contributed to The DragonFly Project 5 * by Matthew Dillon <dillon@backplane.com> 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in 15 * the documentation and/or other materials provided with the 16 * distribution. 17 * 3. Neither the name of The DragonFly Project nor the names of its 18 * contributors may be used to endorse or promote products derived 19 * from this software without specific, prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 24 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 25 * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 26 * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING, 27 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 28 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 29 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 31 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 */ 34 /* 35 * Intel 4th generation mobile cpus integrated I2C device, smbus driver. 36 * 37 * See ig4_reg.h for datasheet reference and notes. 38 */ 39 40 #include <sys/param.h> 41 #include <sys/systm.h> 42 #include <sys/kernel.h> 43 #include <sys/module.h> 44 #include <sys/errno.h> 45 #include <sys/lock.h> 46 #include <sys/syslog.h> 47 #include <sys/bus.h> 48 49 #include <sys/rman.h> 50 51 #include "opt_acpi.h" 52 #include "acpi.h" 53 #include <dev/acpica/acpivar.h> 54 55 #include <bus/pci/pcivar.h> 56 57 #include <bus/smbus/smbconf.h> 58 59 #include "smbus_if.h" 60 61 #include "ig4_reg.h" 62 #include "ig4_var.h" 63 64 ACPI_MODULE_NAME("ig4iic"); 65 66 static int ig4iic_acpi_probe(device_t dev); 67 static int ig4iic_acpi_attach(device_t dev); 68 static int ig4iic_acpi_detach(device_t dev); 69 70 static char *ig4iic_ids[] = { 71 "INT33C2", 72 "INT33C3", 73 "INT3432", 74 "INT3433", 75 "80860F41", 76 "808622C1", 77 NULL 78 }; 79 80 static 81 int 82 ig4iic_acpi_probe(device_t dev) 83 { 84 85 if (acpi_disabled("ig4iic") || 86 ACPI_ID_PROBE(device_get_parent(dev), dev, ig4iic_ids) == NULL) 87 return (ENXIO); 88 89 device_set_desc(dev, "Intel SoC I2C Controller"); 90 91 return (BUS_PROBE_DEFAULT); 92 } 93 94 static 95 int 96 ig4iic_acpi_attach(device_t dev) 97 { 98 ig4iic_softc_t *sc = device_get_softc(dev); 99 int error; 100 101 bzero(sc, sizeof(*sc)); 102 103 lockinit(&sc->lk, "ig4iic", 0, LK_CANRECURSE); 104 105 sc->dev = dev; 106 /* All the HIDs matched are Atom SOCs. */ 107 sc->version = IG4_ATOM; 108 sc->regs_rid = 0; 109 sc->regs_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 110 &sc->regs_rid, RF_ACTIVE); 111 if (sc->regs_res == NULL) { 112 device_printf(dev, "unable to map registers"); 113 ig4iic_acpi_detach(dev); 114 return (ENXIO); 115 } 116 sc->intr_rid = 0; 117 sc->intr_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, 118 &sc->intr_rid, RF_ACTIVE); 119 if (sc->intr_res == NULL) { 120 device_printf(dev, "unable to map interrupt"); 121 ig4iic_acpi_detach(dev); 122 return (ENXIO); 123 } 124 sc->regs_t = rman_get_bustag(sc->regs_res); 125 sc->regs_h = rman_get_bushandle(sc->regs_res); 126 sc->pci_attached = 1; 127 128 /* power up the controller */ 129 pci_set_powerstate(dev, PCI_POWERSTATE_D0); 130 131 error = ig4iic_attach(sc); 132 if (error) 133 ig4iic_acpi_detach(dev); 134 135 return error; 136 } 137 138 static 139 int 140 ig4iic_acpi_detach(device_t dev) 141 { 142 ig4iic_softc_t *sc = device_get_softc(dev); 143 int error; 144 145 if (sc->pci_attached) { 146 error = ig4iic_detach(sc); 147 if (error) 148 return error; 149 sc->pci_attached = 0; 150 } 151 152 if (sc->intr_res) { 153 bus_release_resource(dev, SYS_RES_IRQ, 154 sc->intr_rid, sc->intr_res); 155 sc->intr_res = NULL; 156 } 157 if (sc->regs_res) { 158 bus_release_resource(dev, SYS_RES_MEMORY, 159 sc->regs_rid, sc->regs_res); 160 sc->regs_res = NULL; 161 } 162 sc->regs_t = 0; 163 sc->regs_h = 0; 164 lockuninit(&sc->lk); 165 166 pci_set_powerstate(dev, PCI_POWERSTATE_D3); 167 168 return 0; 169 } 170 171 static device_method_t ig4iic_acpi_methods[] = { 172 /* Device interface */ 173 DEVMETHOD(device_probe, ig4iic_acpi_probe), 174 DEVMETHOD(device_attach, ig4iic_acpi_attach), 175 DEVMETHOD(device_detach, ig4iic_acpi_detach), 176 177 /* Bus methods */ 178 DEVMETHOD(bus_print_child, bus_generic_print_child), 179 180 /* SMBus methods from ig4_smb.c */ 181 DEVMETHOD(smbus_callback, ig4iic_smb_callback), 182 DEVMETHOD(smbus_quick, ig4iic_smb_quick), 183 DEVMETHOD(smbus_sendb, ig4iic_smb_sendb), 184 DEVMETHOD(smbus_recvb, ig4iic_smb_recvb), 185 DEVMETHOD(smbus_writeb, ig4iic_smb_writeb), 186 DEVMETHOD(smbus_writew, ig4iic_smb_writew), 187 DEVMETHOD(smbus_readb, ig4iic_smb_readb), 188 DEVMETHOD(smbus_readw, ig4iic_smb_readw), 189 DEVMETHOD(smbus_pcall, ig4iic_smb_pcall), 190 DEVMETHOD(smbus_bwrite, ig4iic_smb_bwrite), 191 DEVMETHOD(smbus_bread, ig4iic_smb_bread), 192 DEVMETHOD(smbus_trans, ig4iic_smb_trans), 193 DEVMETHOD_END 194 }; 195 196 static driver_t ig4iic_acpi_driver = { 197 "ig4iic", 198 ig4iic_acpi_methods, 199 sizeof(struct ig4iic_softc), 200 .gpri = KOBJ_GPRI_ACPI+1 201 }; 202 203 static devclass_t ig4iic_acpi_devclass; 204 205 DRIVER_MODULE(ig4iic, acpi, ig4iic_acpi_driver, ig4iic_acpi_devclass, NULL, NULL); 206 MODULE_DEPEND(ig4iic, acpi, 1, 1, 1); 207 MODULE_DEPEND(ig4iic, smbacpi, 1, 1, 1); 208