1 /* 2 * Copyright (c) 2014 The DragonFly Project. All rights reserved. 3 * 4 * This code is derived from software contributed to The DragonFly Project 5 * by Matthew Dillon <dillon@backplane.com> 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in 15 * the documentation and/or other materials provided with the 16 * distribution. 17 * 3. Neither the name of The DragonFly Project nor the names of its 18 * contributors may be used to endorse or promote products derived 19 * from this software without specific, prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 24 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 25 * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 26 * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING, 27 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 28 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 29 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 31 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 */ 34 /* 35 * Intel 4th generation mobile cpus integrated I2C device, smbus driver. 36 * 37 * See ig4_reg.h for datasheet reference and notes. 38 */ 39 40 #include <sys/param.h> 41 #include <sys/systm.h> 42 #include <sys/kernel.h> 43 #include <sys/module.h> 44 #include <sys/errno.h> 45 #include <sys/serialize.h> 46 #include <sys/syslog.h> 47 #include <sys/bus.h> 48 49 #include <sys/rman.h> 50 51 #include "opt_acpi.h" 52 #include "acpi.h" 53 #include <dev/acpica/acpivar.h> 54 55 #include <bus/pci/pcivar.h> 56 57 #include <bus/smbus/smbconf.h> 58 59 #include "smbus_if.h" 60 61 #include "ig4_reg.h" 62 #include "ig4_var.h" 63 64 ACPI_MODULE_NAME("ig4iic"); 65 66 static int ig4iic_acpi_probe(device_t dev); 67 static int ig4iic_acpi_attach(device_t dev); 68 static int ig4iic_acpi_detach(device_t dev); 69 70 static char *ig4iic_ids[] = { 71 "INT33C2", 72 "INT33C3", 73 "INT3432", 74 "INT3433", 75 "80860F41", 76 "808622C1", 77 NULL 78 }; 79 80 static 81 int 82 ig4iic_acpi_probe(device_t dev) 83 { 84 85 if (acpi_disabled("ig4iic") || 86 ACPI_ID_PROBE(device_get_parent(dev), dev, ig4iic_ids) == NULL) 87 return (ENXIO); 88 89 device_set_desc(dev, "Intel SoC I2C Controller"); 90 91 return (BUS_PROBE_DEFAULT); 92 } 93 94 static 95 int 96 ig4iic_acpi_attach(device_t dev) 97 { 98 ig4iic_softc_t *sc = device_get_softc(dev); 99 int error; 100 101 lwkt_serialize_init(&sc->slz); 102 103 sc->dev = dev; 104 /* All the HIDs matched are Atom SOCs. */ 105 sc->version = IG4_ATOM; 106 sc->regs_rid = 0; 107 sc->regs_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 108 &sc->regs_rid, RF_ACTIVE); 109 if (sc->regs_res == NULL) { 110 device_printf(dev, "unable to map registers"); 111 ig4iic_acpi_detach(dev); 112 return (ENXIO); 113 } 114 sc->intr_rid = 0; 115 sc->intr_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, 116 &sc->intr_rid, RF_ACTIVE); 117 if (sc->intr_res == NULL) { 118 device_printf(dev, "unable to map interrupt"); 119 ig4iic_acpi_detach(dev); 120 return (ENXIO); 121 } 122 sc->regs_t = rman_get_bustag(sc->regs_res); 123 sc->regs_h = rman_get_bushandle(sc->regs_res); 124 sc->pci_attached = 1; 125 126 /* power up the controller */ 127 pci_set_powerstate(dev, PCI_POWERSTATE_D0); 128 129 error = ig4iic_attach(sc); 130 if (error) 131 ig4iic_acpi_detach(dev); 132 133 return error; 134 } 135 136 static 137 int 138 ig4iic_acpi_detach(device_t dev) 139 { 140 ig4iic_softc_t *sc = device_get_softc(dev); 141 int error; 142 143 if (sc->pci_attached) { 144 error = ig4iic_detach(sc); 145 if (error) 146 return error; 147 sc->pci_attached = 0; 148 } 149 150 if (sc->intr_res) { 151 bus_release_resource(dev, SYS_RES_IRQ, 152 sc->intr_rid, sc->intr_res); 153 sc->intr_res = NULL; 154 } 155 if (sc->regs_res) { 156 bus_release_resource(dev, SYS_RES_MEMORY, 157 sc->regs_rid, sc->regs_res); 158 sc->regs_res = NULL; 159 } 160 sc->regs_t = 0; 161 sc->regs_h = 0; 162 163 pci_set_powerstate(dev, PCI_POWERSTATE_D3); 164 165 return 0; 166 } 167 168 static device_method_t ig4iic_acpi_methods[] = { 169 /* Device interface */ 170 DEVMETHOD(device_probe, ig4iic_acpi_probe), 171 DEVMETHOD(device_attach, ig4iic_acpi_attach), 172 DEVMETHOD(device_detach, ig4iic_acpi_detach), 173 174 /* Bus methods */ 175 DEVMETHOD(bus_print_child, bus_generic_print_child), 176 177 /* SMBus methods from ig4_smb.c */ 178 DEVMETHOD(smbus_callback, ig4iic_smb_callback), 179 DEVMETHOD(smbus_quick, ig4iic_smb_quick), 180 DEVMETHOD(smbus_sendb, ig4iic_smb_sendb), 181 DEVMETHOD(smbus_recvb, ig4iic_smb_recvb), 182 DEVMETHOD(smbus_writeb, ig4iic_smb_writeb), 183 DEVMETHOD(smbus_writew, ig4iic_smb_writew), 184 DEVMETHOD(smbus_readb, ig4iic_smb_readb), 185 DEVMETHOD(smbus_readw, ig4iic_smb_readw), 186 DEVMETHOD(smbus_pcall, ig4iic_smb_pcall), 187 DEVMETHOD(smbus_bwrite, ig4iic_smb_bwrite), 188 DEVMETHOD(smbus_bread, ig4iic_smb_bread), 189 DEVMETHOD(smbus_trans, ig4iic_smb_trans), 190 DEVMETHOD_END 191 }; 192 193 static driver_t ig4iic_acpi_driver = { 194 "ig4iic", 195 ig4iic_acpi_methods, 196 sizeof(struct ig4iic_softc), 197 .gpri = KOBJ_GPRI_ACPI+1 198 }; 199 200 static devclass_t ig4iic_acpi_devclass; 201 202 DRIVER_MODULE(ig4iic, acpi, ig4iic_acpi_driver, ig4iic_acpi_devclass, NULL, NULL); 203 MODULE_DEPEND(ig4iic, acpi, 1, 1, 1); 204 MODULE_DEPEND(ig4iic, smbacpi, 1, 1, 1); 205