xref: /dragonfly/sys/bus/smbus/smbconf.c (revision 0bb9290e)
1 /*-
2  * Copyright (c) 1998 Nicolas Souchu
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  *    notice, this list of conditions and the following disclaimer in the
12  *    documentation and/or other materials provided with the distribution.
13  *
14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24  * SUCH DAMAGE.
25  *
26  * $FreeBSD: src/sys/dev/smbus/smbconf.c,v 1.9 1999/12/03 08:41:08 mdodd Exp $
27  * $DragonFly: src/sys/bus/smbus/smbconf.c,v 1.5 2005/06/02 20:40:38 dillon Exp $
28  *
29  */
30 #include <sys/param.h>
31 #include <sys/systm.h>
32 #include <sys/kernel.h>
33 #include <sys/malloc.h>
34 #include <sys/module.h>
35 #include <sys/bus.h>
36 #include <sys/thread2.h>
37 
38 #include "smbconf.h"
39 #include "smbus.h"
40 #include "smbus_if.h"
41 
42 /*
43  * smbus_intr()
44  */
45 void
46 smbus_intr(device_t bus, u_char devaddr, char low, char high, int error)
47 {
48 	struct smbus_softc *sc = (struct smbus_softc *)device_get_softc(bus);
49 
50 	/* call owner's intr routine */
51 	if (sc->owner)
52 		SMBUS_INTR(sc->owner, devaddr, low, high, error);
53 
54 	return;
55 }
56 
57 /*
58  * smbus_error()
59  *
60  * Converts an smbus error to a unix error.
61  */
62 int
63 smbus_error(int smb_error)
64 {
65 	int error = 0;
66 
67 	if (smb_error == SMB_ENOERR)
68 		return (0);
69 
70 	if (smb_error & (SMB_ENOTSUPP)) {
71 		error = ENODEV;
72 	} else if (smb_error & (SMB_ENOACK)) {
73 		error = ENXIO;
74 	} else if (smb_error & (SMB_ETIMEOUT)) {
75 		error = EWOULDBLOCK;
76 	} else if (smb_error & (SMB_EBUSY)) {
77 		error = EBUSY;
78 	} else {
79 		error = EINVAL;
80 	}
81 
82 	return (error);
83 }
84 
85 /*
86  * smbus_alloc_bus()
87  *
88  * Allocate a new bus connected to the given parent device
89  */
90 device_t
91 smbus_alloc_bus(device_t parent)
92 {
93 	device_t child;
94 
95 	/* add the bus to the parent */
96 	child = device_add_child(parent, "smbus", -1);
97 
98 	return (child);
99 }
100 
101 static int
102 smbus_poll(struct smbus_softc *sc, int how)
103 {
104 	int error;
105 
106 	switch (how) {
107 	case (SMB_WAIT | SMB_INTR):
108 		error = tsleep(sc, PCATCH, "smbreq", 0);
109 		break;
110 
111 	case (SMB_WAIT | SMB_NOINTR):
112 		error = tsleep(sc, 0, "smbreq", 0);
113 		break;
114 
115 	default:
116 		return (EWOULDBLOCK);
117 		break;
118 	}
119 
120 	return (error);
121 }
122 
123 /*
124  * smbus_request_bus()
125  *
126  * Allocate the device to perform transfers.
127  *
128  * how	: SMB_WAIT or SMB_DONTWAIT
129  */
130 int
131 smbus_request_bus(device_t bus, device_t dev, int how)
132 {
133 	struct smbus_softc *sc = (struct smbus_softc *)device_get_softc(bus);
134 	int error = 0;
135 
136 	/* first, ask the underlying layers if the request is ok */
137 	do {
138 		error = SMBUS_CALLBACK(device_get_parent(bus),
139 						SMB_REQUEST_BUS, (caddr_t)&how);
140 		if (error)
141 			error = smbus_poll(sc, how);
142 	} while (error == EWOULDBLOCK);
143 
144 	while (!error) {
145 		crit_enter();
146 		if (sc->owner && sc->owner != dev) {
147 			crit_exit();
148 			error = smbus_poll(sc, how);
149 		} else {
150 			sc->owner = dev;
151 			crit_exit();
152 			return (0);
153 		}
154 
155 		/* free any allocated resource */
156 		if (error)
157 			SMBUS_CALLBACK(device_get_parent(bus), SMB_RELEASE_BUS,
158 					(caddr_t)&how);
159 	}
160 
161 	return (error);
162 }
163 
164 /*
165  * smbus_release_bus()
166  *
167  * Release the device allocated with smbus_request_dev()
168  */
169 int
170 smbus_release_bus(device_t bus, device_t dev)
171 {
172 	struct smbus_softc *sc = (struct smbus_softc *)device_get_softc(bus);
173 	int error;
174 
175 	/* first, ask the underlying layers if the release is ok */
176 	error = SMBUS_CALLBACK(device_get_parent(bus), SMB_RELEASE_BUS, NULL);
177 
178 	if (error)
179 		return (error);
180 
181 	crit_enter();
182 	if (sc->owner != dev) {
183 		crit_exit();
184 		return (EACCES);
185 	}
186 	sc->owner = 0;
187 	crit_exit();
188 
189 	/* wakeup waiting processes */
190 	wakeup(sc);
191 
192 	return (0);
193 }
194 
195 /*
196  * smbus_get_addr()
197  *
198  * Get the I2C 7 bits address of the device
199  */
200 u_char
201 smbus_get_addr(device_t dev)
202 {
203 	uintptr_t addr;
204 	device_t parent = device_get_parent(dev);
205 
206 	BUS_READ_IVAR(parent, dev, SMBUS_IVAR_ADDR, &addr);
207 
208 	return ((u_char)addr);
209 }
210