1 /* $FreeBSD$ */ 2 /*- 3 * Copyright (c) 2001 The NetBSD Foundation, Inc. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to The NetBSD Foundation 7 * by Lennart Augustsson (lennart@augustsson.net). 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 19 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 20 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 21 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 22 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31 #ifndef _EHCI_H_ 32 #define _EHCI_H_ 33 34 #define EHCI_MAX_DEVICES MIN(USB_MAX_DEVICES, 128) 35 36 /* 37 * Alignment NOTE: structures must be aligned so that the hardware can index 38 * without performing addition. 39 */ 40 #define EHCI_FRAMELIST_ALIGN 0x1000 /* bytes */ 41 #define EHCI_FRAMELIST_COUNT 1024 /* units */ 42 #define EHCI_VIRTUAL_FRAMELIST_COUNT 128 /* units */ 43 44 #if ((8*EHCI_VIRTUAL_FRAMELIST_COUNT) < USB_MAX_HS_ISOC_FRAMES_PER_XFER) 45 #error "maximum number of high-speed isochronous frames is higher than supported!" 46 #endif 47 48 #if (EHCI_VIRTUAL_FRAMELIST_COUNT < USB_MAX_FS_ISOC_FRAMES_PER_XFER) 49 #error "maximum number of full-speed isochronous frames is higher than supported!" 50 #endif 51 52 /* Link types */ 53 #define EHCI_LINK_TERMINATE 0x00000001 54 #define EHCI_LINK_TYPE(x) ((x) & 0x00000006) 55 #define EHCI_LINK_ITD 0x0 56 #define EHCI_LINK_QH 0x2 57 #define EHCI_LINK_SITD 0x4 58 #define EHCI_LINK_FSTN 0x6 59 #define EHCI_LINK_ADDR(x) ((x) &~ 0x1f) 60 61 /* Structures alignment (bytes) */ 62 #define EHCI_ITD_ALIGN 128 63 #define EHCI_SITD_ALIGN 64 64 #define EHCI_QTD_ALIGN 64 65 #define EHCI_QH_ALIGN 128 66 #define EHCI_FSTN_ALIGN 32 67 /* Data buffers are divided into one or more pages */ 68 #define EHCI_PAGE_SIZE 0x1000 69 #if ((USB_PAGE_SIZE < EHCI_PAGE_SIZE) || (EHCI_PAGE_SIZE == 0) || \ 70 (USB_PAGE_SIZE < EHCI_ITD_ALIGN) || (EHCI_ITD_ALIGN == 0) || \ 71 (USB_PAGE_SIZE < EHCI_SITD_ALIGN) || (EHCI_SITD_ALIGN == 0) || \ 72 (USB_PAGE_SIZE < EHCI_QTD_ALIGN) || (EHCI_QTD_ALIGN == 0) || \ 73 (USB_PAGE_SIZE < EHCI_QH_ALIGN) || (EHCI_QH_ALIGN == 0) || \ 74 (USB_PAGE_SIZE < EHCI_FSTN_ALIGN) || (EHCI_FSTN_ALIGN == 0)) 75 #error "Invalid USB page size!" 76 #endif 77 78 79 /* 80 * Isochronous Transfer Descriptor. This descriptor is used for high speed 81 * transfers only. 82 */ 83 struct ehci_itd { 84 volatile uint32_t itd_next; 85 volatile uint32_t itd_status[8]; 86 #define EHCI_ITD_SET_LEN(x) ((x) << 16) 87 #define EHCI_ITD_GET_LEN(x) (((x) >> 16) & 0xFFF) 88 #define EHCI_ITD_IOC (1 << 15) 89 #define EHCI_ITD_SET_PG(x) ((x) << 12) 90 #define EHCI_ITD_GET_PG(x) (((x) >> 12) & 0x7) 91 #define EHCI_ITD_SET_OFFS(x) (x) 92 #define EHCI_ITD_GET_OFFS(x) (((x) >> 0) & 0xFFF) 93 #define EHCI_ITD_ACTIVE (1U << 31) 94 #define EHCI_ITD_DATABUFERR (1 << 30) 95 #define EHCI_ITD_BABBLE (1 << 29) 96 #define EHCI_ITD_XACTERR (1 << 28) 97 volatile uint32_t itd_bp[7]; 98 /* itd_bp[0] */ 99 #define EHCI_ITD_SET_ADDR(x) (x) 100 #define EHCI_ITD_GET_ADDR(x) (((x) >> 0) & 0x7F) 101 #define EHCI_ITD_SET_ENDPT(x) ((x) << 8) 102 #define EHCI_ITD_GET_ENDPT(x) (((x) >> 8) & 0xF) 103 /* itd_bp[1] */ 104 #define EHCI_ITD_SET_DIR_IN (1 << 11) 105 #define EHCI_ITD_SET_DIR_OUT (0 << 11) 106 #define EHCI_ITD_SET_MPL(x) (x) 107 #define EHCI_ITD_GET_MPL(x) (((x) >> 0) & 0x7FF) 108 volatile uint32_t itd_bp_hi[7]; 109 /* 110 * Extra information needed: 111 */ 112 uint32_t itd_self; 113 struct ehci_itd *next; 114 struct ehci_itd *prev; 115 struct ehci_itd *obj_next; 116 struct usb_page_cache *page_cache; 117 } __aligned(EHCI_ITD_ALIGN); 118 119 typedef struct ehci_itd ehci_itd_t; 120 121 /* 122 * Split Transaction Isochronous Transfer Descriptor. This descriptor is used 123 * for full speed transfers only. 124 */ 125 struct ehci_sitd { 126 volatile uint32_t sitd_next; 127 volatile uint32_t sitd_portaddr; 128 #define EHCI_SITD_SET_DIR_OUT (0 << 31) 129 #define EHCI_SITD_SET_DIR_IN (1U << 31) 130 #define EHCI_SITD_SET_ADDR(x) (x) 131 #define EHCI_SITD_GET_ADDR(x) ((x) & 0x7F) 132 #define EHCI_SITD_SET_ENDPT(x) ((x) << 8) 133 #define EHCI_SITD_GET_ENDPT(x) (((x) >> 8) & 0xF) 134 #define EHCI_SITD_GET_DIR(x) ((x) >> 31) 135 #define EHCI_SITD_SET_PORT(x) ((x) << 24) 136 #define EHCI_SITD_GET_PORT(x) (((x) >> 24) & 0x7F) 137 #define EHCI_SITD_SET_HUBA(x) ((x) << 16) 138 #define EHCI_SITD_GET_HUBA(x) (((x) >> 16) & 0x7F) 139 volatile uint32_t sitd_mask; 140 #define EHCI_SITD_SET_SMASK(x) (x) 141 #define EHCI_SITD_SET_CMASK(x) ((x) << 8) 142 volatile uint32_t sitd_status; 143 #define EHCI_SITD_COMPLETE_SPLIT (1<<1) 144 #define EHCI_SITD_START_SPLIT (0<<1) 145 #define EHCI_SITD_MISSED_MICRO_FRAME (1<<2) 146 #define EHCI_SITD_XACTERR (1<<3) 147 #define EHCI_SITD_BABBLE (1<<4) 148 #define EHCI_SITD_DATABUFERR (1<<5) 149 #define EHCI_SITD_ERROR (1<<6) 150 #define EHCI_SITD_ACTIVE (1<<7) 151 #define EHCI_SITD_IOC (1<<31) 152 #define EHCI_SITD_SET_LEN(len) ((len)<<16) 153 #define EHCI_SITD_GET_LEN(x) (((x)>>16) & 0x3FF) 154 volatile uint32_t sitd_bp[2]; 155 volatile uint32_t sitd_back; 156 volatile uint32_t sitd_bp_hi[2]; 157 /* 158 * Extra information needed: 159 */ 160 uint32_t sitd_self; 161 struct ehci_sitd *next; 162 struct ehci_sitd *prev; 163 struct ehci_sitd *obj_next; 164 struct usb_page_cache *page_cache; 165 } __aligned(EHCI_SITD_ALIGN); 166 167 typedef struct ehci_sitd ehci_sitd_t; 168 169 /* Queue Element Transfer Descriptor */ 170 struct ehci_qtd { 171 volatile uint32_t qtd_next; 172 volatile uint32_t qtd_altnext; 173 volatile uint32_t qtd_status; 174 #define EHCI_QTD_GET_STATUS(x) (((x) >> 0) & 0xff) 175 #define EHCI_QTD_SET_STATUS(x) ((x) << 0) 176 #define EHCI_QTD_ACTIVE 0x80 177 #define EHCI_QTD_HALTED 0x40 178 #define EHCI_QTD_BUFERR 0x20 179 #define EHCI_QTD_BABBLE 0x10 180 #define EHCI_QTD_XACTERR 0x08 181 #define EHCI_QTD_MISSEDMICRO 0x04 182 #define EHCI_QTD_SPLITXSTATE 0x02 183 #define EHCI_QTD_PINGSTATE 0x01 184 #define EHCI_QTD_STATERRS 0x74 185 #define EHCI_QTD_GET_PID(x) (((x) >> 8) & 0x3) 186 #define EHCI_QTD_SET_PID(x) ((x) << 8) 187 #define EHCI_QTD_PID_OUT 0x0 188 #define EHCI_QTD_PID_IN 0x1 189 #define EHCI_QTD_PID_SETUP 0x2 190 #define EHCI_QTD_GET_CERR(x) (((x) >> 10) & 0x3) 191 #define EHCI_QTD_SET_CERR(x) ((x) << 10) 192 #define EHCI_QTD_GET_C_PAGE(x) (((x) >> 12) & 0x7) 193 #define EHCI_QTD_SET_C_PAGE(x) ((x) << 12) 194 #define EHCI_QTD_GET_IOC(x) (((x) >> 15) & 0x1) 195 #define EHCI_QTD_IOC 0x00008000 196 #define EHCI_QTD_GET_BYTES(x) (((x) >> 16) & 0x7fff) 197 #define EHCI_QTD_SET_BYTES(x) ((x) << 16) 198 #define EHCI_QTD_GET_TOGGLE(x) (((x) >> 31) & 0x1) 199 #define EHCI_QTD_SET_TOGGLE(x) ((x) << 31) 200 #define EHCI_QTD_TOGGLE_MASK 0x80000000 201 #define EHCI_QTD_NBUFFERS 5 202 #define EHCI_QTD_PAYLOAD_MAX ((EHCI_QTD_NBUFFERS-1)*EHCI_PAGE_SIZE) 203 volatile uint32_t qtd_buffer[EHCI_QTD_NBUFFERS]; 204 volatile uint32_t qtd_buffer_hi[EHCI_QTD_NBUFFERS]; 205 /* 206 * Extra information needed: 207 */ 208 struct ehci_qtd *alt_next; 209 struct ehci_qtd *obj_next; 210 struct usb_page_cache *page_cache; 211 uint32_t qtd_self; 212 uint16_t len; 213 } __aligned(EHCI_QTD_ALIGN); 214 215 typedef struct ehci_qtd ehci_qtd_t; 216 217 /* Queue Head Sub Structure */ 218 struct ehci_qh_sub { 219 volatile uint32_t qtd_next; 220 volatile uint32_t qtd_altnext; 221 volatile uint32_t qtd_status; 222 volatile uint32_t qtd_buffer[EHCI_QTD_NBUFFERS]; 223 volatile uint32_t qtd_buffer_hi[EHCI_QTD_NBUFFERS]; 224 } __aligned(4); 225 226 /* Queue Head */ 227 struct ehci_qh { 228 volatile uint32_t qh_link; 229 volatile uint32_t qh_endp; 230 #define EHCI_QH_GET_ADDR(x) (((x) >> 0) & 0x7f) /* endpoint addr */ 231 #define EHCI_QH_SET_ADDR(x) (x) 232 #define EHCI_QH_ADDRMASK 0x0000007f 233 #define EHCI_QH_GET_INACT(x) (((x) >> 7) & 0x01) /* inactivate on next */ 234 #define EHCI_QH_INACT 0x00000080 235 #define EHCI_QH_GET_ENDPT(x) (((x) >> 8) & 0x0f) /* endpoint no */ 236 #define EHCI_QH_SET_ENDPT(x) ((x) << 8) 237 #define EHCI_QH_GET_EPS(x) (((x) >> 12) & 0x03) /* endpoint speed */ 238 #define EHCI_QH_SET_EPS(x) ((x) << 12) 239 #define EHCI_QH_SPEED_FULL 0x0 240 #define EHCI_QH_SPEED_LOW 0x1 241 #define EHCI_QH_SPEED_HIGH 0x2 242 #define EHCI_QH_GET_DTC(x) (((x) >> 14) & 0x01) /* data toggle control */ 243 #define EHCI_QH_DTC 0x00004000 244 #define EHCI_QH_GET_HRECL(x) (((x) >> 15) & 0x01) /* head of reclamation */ 245 #define EHCI_QH_HRECL 0x00008000 246 #define EHCI_QH_GET_MPL(x) (((x) >> 16) & 0x7ff) /* max packet len */ 247 #define EHCI_QH_SET_MPL(x) ((x) << 16) 248 #define EHCI_QH_MPLMASK 0x07ff0000 249 #define EHCI_QH_GET_CTL(x) (((x) >> 27) & 0x01) /* control endpoint */ 250 #define EHCI_QH_CTL 0x08000000 251 #define EHCI_QH_GET_NRL(x) (((x) >> 28) & 0x0f) /* NAK reload */ 252 #define EHCI_QH_SET_NRL(x) ((x) << 28) 253 volatile uint32_t qh_endphub; 254 #define EHCI_QH_GET_SMASK(x) (((x) >> 0) & 0xff) /* intr sched mask */ 255 #define EHCI_QH_SET_SMASK(x) ((x) << 0) 256 #define EHCI_QH_GET_CMASK(x) (((x) >> 8) & 0xff) /* split completion mask */ 257 #define EHCI_QH_SET_CMASK(x) ((x) << 8) 258 #define EHCI_QH_GET_HUBA(x) (((x) >> 16) & 0x7f) /* hub address */ 259 #define EHCI_QH_SET_HUBA(x) ((x) << 16) 260 #define EHCI_QH_GET_PORT(x) (((x) >> 23) & 0x7f) /* hub port */ 261 #define EHCI_QH_SET_PORT(x) ((x) << 23) 262 #define EHCI_QH_GET_MULT(x) (((x) >> 30) & 0x03) /* pipe multiplier */ 263 #define EHCI_QH_SET_MULT(x) ((x) << 30) 264 volatile uint32_t qh_curqtd; 265 struct ehci_qh_sub qh_qtd; 266 /* 267 * Extra information needed: 268 */ 269 struct ehci_qh *next; 270 struct ehci_qh *prev; 271 struct ehci_qh *obj_next; 272 struct usb_page_cache *page_cache; 273 uint32_t qh_self; 274 } __aligned(EHCI_QH_ALIGN); 275 276 typedef struct ehci_qh ehci_qh_t; 277 278 /* Periodic Frame Span Traversal Node */ 279 struct ehci_fstn { 280 volatile uint32_t fstn_link; 281 volatile uint32_t fstn_back; 282 } __aligned(EHCI_FSTN_ALIGN); 283 284 typedef struct ehci_fstn ehci_fstn_t; 285 286 struct ehci_hw_softc { 287 struct usb_page_cache pframes_pc; 288 struct usb_page_cache terminate_pc; 289 struct usb_page_cache async_start_pc; 290 struct usb_page_cache intr_start_pc[EHCI_VIRTUAL_FRAMELIST_COUNT]; 291 struct usb_page_cache isoc_hs_start_pc[EHCI_VIRTUAL_FRAMELIST_COUNT]; 292 struct usb_page_cache isoc_fs_start_pc[EHCI_VIRTUAL_FRAMELIST_COUNT]; 293 294 struct usb_page pframes_pg; 295 struct usb_page terminate_pg; 296 struct usb_page async_start_pg; 297 struct usb_page intr_start_pg[EHCI_VIRTUAL_FRAMELIST_COUNT]; 298 struct usb_page isoc_hs_start_pg[EHCI_VIRTUAL_FRAMELIST_COUNT]; 299 struct usb_page isoc_fs_start_pg[EHCI_VIRTUAL_FRAMELIST_COUNT]; 300 }; 301 302 struct ehci_config_desc { 303 struct usb_config_descriptor confd; 304 struct usb_interface_descriptor ifcd; 305 struct usb_endpoint_descriptor endpd; 306 } __packed; 307 308 union ehci_hub_desc { 309 struct usb_status stat; 310 struct usb_port_status ps; 311 struct usb_hub_descriptor hubd; 312 uint8_t temp[128]; 313 }; 314 315 typedef struct ehci_softc { 316 struct ehci_hw_softc sc_hw; 317 struct usb_bus sc_bus; /* base device */ 318 struct usb_callout sc_tmo_pcd; 319 struct usb_callout sc_tmo_poll; 320 union ehci_hub_desc sc_hub_desc; 321 322 struct usb_device *sc_devices[EHCI_MAX_DEVICES]; 323 struct resource *sc_io_res; 324 struct resource *sc_irq_res; 325 struct ehci_qh *sc_async_p_last; 326 struct ehci_qh *sc_intr_p_last[EHCI_VIRTUAL_FRAMELIST_COUNT]; 327 struct ehci_sitd *sc_isoc_fs_p_last[EHCI_VIRTUAL_FRAMELIST_COUNT]; 328 struct ehci_itd *sc_isoc_hs_p_last[EHCI_VIRTUAL_FRAMELIST_COUNT]; 329 void *sc_intr_hdl; 330 bus_size_t sc_io_size; 331 bus_space_tag_t sc_io_tag; 332 bus_space_handle_t sc_io_hdl; 333 334 uint32_t sc_terminate_self; /* TD short packet termination link */ 335 uint32_t sc_eintrs; 336 337 uint16_t sc_intr_stat[EHCI_VIRTUAL_FRAMELIST_COUNT]; 338 uint16_t sc_id_vendor; /* vendor ID for root hub */ 339 uint16_t sc_flags; /* chip specific flags */ 340 #define EHCI_SCFLG_SETMODE 0x0001 /* set bridge mode again after init */ 341 #define EHCI_SCFLG_FORCESPEED 0x0002 /* force speed */ 342 #define EHCI_SCFLG_NORESTERM 0x0004 /* don't terminate reset sequence */ 343 #define EHCI_SCFLG_BIGEDESC 0x0008 /* big-endian byte order descriptors */ 344 #define EHCI_SCFLG_BIGEMMIO 0x0010 /* big-endian byte order MMIO */ 345 #define EHCI_SCFLG_TT 0x0020 /* transaction translator present */ 346 #define EHCI_SCFLG_LOSTINTRBUG 0x0040 /* workaround for VIA / ATI chipsets */ 347 #define EHCI_SCFLG_IAADBUG 0x0080 /* workaround for nVidia chipsets */ 348 #define EHCI_SCFLG_DONTRESET 0x0100 /* don't reset ctrl. in ehci_init() */ 349 #define EHCI_SCFLG_DONEINIT 0x1000 /* ehci_init() has been called. */ 350 351 uint8_t sc_offs; /* offset to operational registers */ 352 uint8_t sc_doorbell_disable; /* set on doorbell failure */ 353 uint8_t sc_noport; 354 uint8_t sc_addr; /* device address */ 355 uint8_t sc_conf; /* device configuration */ 356 uint8_t sc_isreset; 357 uint8_t sc_hub_idata[8]; 358 359 char sc_vendor[16]; /* vendor string for root hub */ 360 int doorbell_match; 361 int doorbell_again; 362 363 } ehci_softc_t; 364 365 #define EREAD1(sc, a) bus_space_read_1((sc)->sc_io_tag, (sc)->sc_io_hdl, (a)) 366 #define EREAD2(sc, a) bus_space_read_2((sc)->sc_io_tag, (sc)->sc_io_hdl, (a)) 367 #define EREAD4(sc, a) bus_space_read_4((sc)->sc_io_tag, (sc)->sc_io_hdl, (a)) 368 #define EWRITE1(sc, a, x) \ 369 bus_space_write_1((sc)->sc_io_tag, (sc)->sc_io_hdl, (a), (x)) 370 #define EWRITE2(sc, a, x) \ 371 bus_space_write_2((sc)->sc_io_tag, (sc)->sc_io_hdl, (a), (x)) 372 #define EWRITE4(sc, a, x) \ 373 bus_space_write_4((sc)->sc_io_tag, (sc)->sc_io_hdl, (a), (x)) 374 #define EOREAD1(sc, a) \ 375 bus_space_read_1((sc)->sc_io_tag, (sc)->sc_io_hdl, (sc)->sc_offs+(a)) 376 #define EOREAD2(sc, a) \ 377 bus_space_read_2((sc)->sc_io_tag, (sc)->sc_io_hdl, (sc)->sc_offs+(a)) 378 #define EOREAD4(sc, a) \ 379 bus_space_read_4((sc)->sc_io_tag, (sc)->sc_io_hdl, (sc)->sc_offs+(a)) 380 #define EOWRITE1(sc, a, x) \ 381 bus_space_write_1((sc)->sc_io_tag, (sc)->sc_io_hdl, (sc)->sc_offs+(a), (x)) 382 #define EOWRITE2(sc, a, x) \ 383 bus_space_write_2((sc)->sc_io_tag, (sc)->sc_io_hdl, (sc)->sc_offs+(a), (x)) 384 #define EOWRITE4(sc, a, x) \ 385 bus_space_write_4((sc)->sc_io_tag, (sc)->sc_io_hdl, (sc)->sc_offs+(a), (x)) 386 387 #ifdef USB_EHCI_BIG_ENDIAN_DESC 388 /* 389 * Handle byte order conversion between host and ``host controller''. 390 * Typically the latter is little-endian but some controllers require 391 * big-endian in which case we may need to manually swap. 392 */ 393 static __inline uint32_t 394 htohc32(const struct ehci_softc *sc, const uint32_t v) 395 { 396 return sc->sc_flags & EHCI_SCFLG_BIGEDESC ? htobe32(v) : htole32(v); 397 } 398 399 static __inline uint16_t 400 htohc16(const struct ehci_softc *sc, const uint16_t v) 401 { 402 return sc->sc_flags & EHCI_SCFLG_BIGEDESC ? htobe16(v) : htole16(v); 403 } 404 405 static __inline uint32_t 406 hc32toh(const struct ehci_softc *sc, const uint32_t v) 407 { 408 return sc->sc_flags & EHCI_SCFLG_BIGEDESC ? be32toh(v) : le32toh(v); 409 } 410 411 static __inline uint16_t 412 hc16toh(const struct ehci_softc *sc, const uint16_t v) 413 { 414 return sc->sc_flags & EHCI_SCFLG_BIGEDESC ? be16toh(v) : le16toh(v); 415 } 416 #else 417 /* 418 * Normal little-endian only conversion routines. 419 */ 420 static __inline uint32_t 421 htohc32(const struct ehci_softc *sc, const uint32_t v) 422 { 423 return htole32(v); 424 } 425 426 static __inline uint16_t 427 htohc16(const struct ehci_softc *sc, const uint16_t v) 428 { 429 return htole16(v); 430 } 431 432 static __inline uint32_t 433 hc32toh(const struct ehci_softc *sc, const uint32_t v) 434 { 435 return le32toh(v); 436 } 437 438 static __inline uint16_t 439 hc16toh(const struct ehci_softc *sc, const uint16_t v) 440 { 441 return le16toh(v); 442 } 443 #endif 444 445 usb_bus_mem_cb_t ehci_iterate_hw_softc; 446 447 usb_error_t ehci_reset(ehci_softc_t *sc); 448 usb_error_t ehci_init(ehci_softc_t *sc); 449 void ehci_detach(struct ehci_softc *sc); 450 void ehci_interrupt(ehci_softc_t *sc); 451 452 #endif /* _EHCI_H_ */ 453