1 /*- 2 * Copyright (c) 1998 The NetBSD Foundation, Inc. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to The NetBSD Foundation 6 * by Lennart Augustsson (augustss@carlstedt.se) at 7 * Carlstedt Research & Technology. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 19 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 20 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 21 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 22 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31 /* 32 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller. 33 * 34 * The EHCI 1.0 spec can be found at 35 * http://developer.intel.com/technology/usb/download/ehci-r10.pdf 36 * and the USB 2.0 spec at 37 * http://www.usb.org/developers/docs/usb_20.zip 38 */ 39 40 /* The low level controller code for EHCI has been split into 41 * PCI probes and EHCI specific code. This was done to facilitate the 42 * sharing of code between *BSD's 43 */ 44 45 #include <sys/stdint.h> 46 #include <sys/param.h> 47 #include <sys/queue.h> 48 #include <sys/types.h> 49 #include <sys/systm.h> 50 #include <sys/kernel.h> 51 #include <sys/bus.h> 52 #include <sys/module.h> 53 #include <sys/lock.h> 54 #include <sys/condvar.h> 55 #include <sys/sysctl.h> 56 #include <sys/unistd.h> 57 #include <sys/callout.h> 58 #include <sys/malloc.h> 59 #include <sys/priv.h> 60 61 #include <bus/u4b/usb.h> 62 #include <bus/u4b/usbdi.h> 63 64 #include <bus/u4b/usb_core.h> 65 #include <bus/u4b/usb_busdma.h> 66 #include <bus/u4b/usb_process.h> 67 #include <bus/u4b/usb_util.h> 68 69 #include <bus/u4b/usb_controller.h> 70 #include <bus/u4b/usb_bus.h> 71 #include <bus/u4b/usb_pci.h> 72 #include <bus/u4b/controller/ehci.h> 73 #include <bus/u4b/controller/ehcireg.h> 74 #include "usb_if.h" 75 76 #define PCI_EHCI_VENDORID_ACERLABS 0x10b9 77 #define PCI_EHCI_VENDORID_AMD 0x1022 78 #define PCI_EHCI_VENDORID_APPLE 0x106b 79 #define PCI_EHCI_VENDORID_ATI 0x1002 80 #define PCI_EHCI_VENDORID_CMDTECH 0x1095 81 #define PCI_EHCI_VENDORID_INTEL 0x8086 82 #define PCI_EHCI_VENDORID_NEC 0x1033 83 #define PCI_EHCI_VENDORID_OPTI 0x1045 84 #define PCI_EHCI_VENDORID_PHILIPS 0x1131 85 #define PCI_EHCI_VENDORID_SIS 0x1039 86 #define PCI_EHCI_VENDORID_NVIDIA 0x12D2 87 #define PCI_EHCI_VENDORID_NVIDIA2 0x10DE 88 #define PCI_EHCI_VENDORID_VIA 0x1106 89 90 static device_probe_t ehci_pci_probe; 91 static device_attach_t ehci_pci_attach; 92 static device_detach_t ehci_pci_detach; 93 static usb_take_controller_t ehci_pci_take_controller; 94 95 static const char * 96 ehci_pci_match(device_t self) 97 { 98 uint32_t device_id = pci_get_devid(self); 99 100 switch (device_id) { 101 case 0x523910b9: 102 return "ALi M5239 USB 2.0 controller"; 103 104 case 0x10227463: 105 return "AMD 8111 USB 2.0 controller"; 106 107 case 0x20951022: 108 return ("AMD CS5536 (Geode) USB 2.0 controller"); 109 110 case 0x43451002: 111 return "ATI SB200 USB 2.0 controller"; 112 case 0x43731002: 113 return "ATI SB400 USB 2.0 controller"; 114 case 0x43961002: 115 return ("AMD SB7x0/SB8x0/SB9x0 USB 2.0 controller"); 116 117 case 0x1e268086: 118 return ("Intel Panther Point USB 2.0 controller"); 119 case 0x1e2d8086: 120 return ("Intel Panther Point USB 2.0 controller"); 121 case 0x1f2c8086: 122 return ("Intel Avoton USB 2.0 controller"); 123 case 0x25ad8086: 124 return "Intel 6300ESB USB 2.0 controller"; 125 case 0x24cd8086: 126 return "Intel 82801DB/L/M (ICH4) USB 2.0 controller"; 127 case 0x24dd8086: 128 return "Intel 82801EB/R (ICH5) USB 2.0 controller"; 129 case 0x265c8086: 130 return "Intel 82801FB (ICH6) USB 2.0 controller"; 131 case 0x268c8086: 132 return ("Intel 63XXESB USB 2.0 controller"); 133 case 0x27cc8086: 134 return "Intel 82801GB/R (ICH7) USB 2.0 controller"; 135 case 0x28368086: 136 return "Intel 82801H (ICH8) USB 2.0 controller USB2-A"; 137 case 0x283a8086: 138 return "Intel 82801H (ICH8) USB 2.0 controller USB2-B"; 139 case 0x293a8086: 140 return "Intel 82801I (ICH9) USB 2.0 controller"; 141 case 0x293c8086: 142 return "Intel 82801I (ICH9) USB 2.0 controller"; 143 case 0x3a3a8086: 144 return "Intel 82801JI (ICH10) USB 2.0 controller USB-A"; 145 case 0x3a3c8086: 146 return "Intel 82801JI (ICH10) USB 2.0 controller USB-B"; 147 case 0x3b348086: 148 return ("Intel PCH USB 2.0 controller USB-A"); 149 case 0x3b3c8086: 150 return ("Intel PCH USB 2.0 controller USB-B"); 151 case 0x8c268086: 152 return ("Intel Lynx Point USB 2.0 controller USB-A"); 153 case 0x8c2d8086: 154 return ("Intel Lynx Point USB 2.0 controller USB-B"); 155 156 case 0x00e01033: 157 return ("NEC uPD 720100 USB 2.0 controller"); 158 159 case 0x006810de: 160 return "NVIDIA nForce2 USB 2.0 controller"; 161 case 0x008810de: 162 return "NVIDIA nForce2 Ultra 400 USB 2.0 controller"; 163 case 0x00d810de: 164 return "NVIDIA nForce3 USB 2.0 controller"; 165 case 0x00e810de: 166 return "NVIDIA nForce3 250 USB 2.0 controller"; 167 case 0x005b10de: 168 return "NVIDIA nForce CK804 USB 2.0 controller"; 169 case 0x036d10de: 170 return "NVIDIA nForce MCP55 USB 2.0 controller"; 171 case 0x03f210de: 172 return "NVIDIA nForce MCP61 USB 2.0 controller"; 173 case 0x0aa610de: 174 return "NVIDIA nForce MCP79 USB 2.0 controller"; 175 case 0x0aa910de: 176 return "NVIDIA nForce MCP79 USB 2.0 controller"; 177 case 0x0aaa10de: 178 return "NVIDIA nForce MCP79 USB 2.0 controller"; 179 180 case 0x15621131: 181 return "Philips ISP156x USB 2.0 controller"; 182 183 case 0x31041106: 184 return ("VIA VT6202 USB 2.0 controller"); 185 186 default: 187 break; 188 } 189 190 if ((pci_get_class(self) == PCIC_SERIALBUS) 191 && (pci_get_subclass(self) == PCIS_SERIALBUS_USB) 192 && (pci_get_progif(self) == PCI_INTERFACE_EHCI)) { 193 return ("EHCI (generic) USB 2.0 controller"); 194 } 195 return (NULL); /* dunno */ 196 } 197 198 static int 199 ehci_pci_probe(device_t self) 200 { 201 const char *desc = ehci_pci_match(self); 202 203 if (desc) { 204 device_set_desc(self, desc); 205 return (0); 206 } else { 207 return (ENXIO); 208 } 209 } 210 211 static void 212 ehci_pci_ati_quirk(device_t self, uint8_t is_sb700) 213 { 214 device_t smbdev; 215 uint32_t val; 216 217 if (is_sb700) { 218 /* Lookup SMBUS PCI device */ 219 smbdev = pci_find_device(PCI_EHCI_VENDORID_ATI, 0x4385); 220 if (smbdev == NULL) 221 return; 222 val = pci_get_revid(smbdev); 223 if (val != 0x3a && val != 0x3b) 224 return; 225 } 226 227 /* 228 * Note: this bit is described as reserved in SB700 229 * Register Reference Guide. 230 */ 231 val = pci_read_config(self, 0x53, 1); 232 if (!(val & 0x8)) { 233 val |= 0x8; 234 pci_write_config(self, 0x53, val, 1); 235 device_printf(self, "AMD SB600/700 quirk applied\n"); 236 } 237 } 238 239 static void 240 ehci_pci_via_quirk(device_t self) 241 { 242 uint32_t val; 243 244 if ((pci_get_device(self) == 0x3104) && 245 ((pci_get_revid(self) & 0xf0) == 0x60)) { 246 /* Correct schedule sleep time to 10us */ 247 val = pci_read_config(self, 0x4b, 1); 248 if (val & 0x20) 249 return; 250 val |= 0x20; 251 pci_write_config(self, 0x4b, val, 1); 252 device_printf(self, "VIA-quirk applied\n"); 253 } 254 } 255 256 static int 257 ehci_pci_attach(device_t self) 258 { 259 ehci_softc_t *sc = device_get_softc(self); 260 int err; 261 int rid; 262 263 /* initialise some bus fields */ 264 sc->sc_bus.parent = self; 265 sc->sc_bus.devices = sc->sc_devices; 266 sc->sc_bus.devices_max = EHCI_MAX_DEVICES; 267 268 /* get all DMA memory */ 269 if (usb_bus_mem_alloc_all(&sc->sc_bus, 270 USB_GET_DMA_TAG(self), &ehci_iterate_hw_softc)) { 271 return (ENOMEM); 272 } 273 274 pci_enable_busmaster(self); 275 276 switch (pci_read_config(self, PCI_USBREV, 1) & PCI_USB_REV_MASK) { 277 case PCI_USB_REV_PRE_1_0: 278 case PCI_USB_REV_1_0: 279 case PCI_USB_REV_1_1: 280 /* 281 * NOTE: some EHCI USB controllers have the wrong USB 282 * revision number. It appears those controllers are 283 * fully compliant so we just ignore this value in 284 * some common cases. 285 */ 286 device_printf(self, "pre-2.0 USB revision (ignored)\n"); 287 /* fallthrough */ 288 case PCI_USB_REV_2_0: 289 break; 290 default: 291 /* Quirk for Parallels Desktop 4.0 */ 292 device_printf(self, "USB revision is unknown. Assuming v2.0.\n"); 293 break; 294 } 295 296 rid = PCI_CBMEM; 297 sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid, 298 RF_ACTIVE); 299 if (!sc->sc_io_res) { 300 device_printf(self, "Could not map memory\n"); 301 goto error; 302 } 303 sc->sc_io_tag = rman_get_bustag(sc->sc_io_res); 304 sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res); 305 sc->sc_io_size = rman_get_size(sc->sc_io_res); 306 307 rid = 0; 308 sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid, 309 RF_SHAREABLE | RF_ACTIVE); 310 if (sc->sc_irq_res == NULL) { 311 device_printf(self, "Could not allocate irq\n"); 312 goto error; 313 } 314 sc->sc_bus.bdev = device_add_child(self, "usbus", -1); 315 if (!sc->sc_bus.bdev) { 316 device_printf(self, "Could not add USB device\n"); 317 goto error; 318 } 319 device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus); 320 321 /* 322 * ehci_pci_match will never return NULL if ehci_pci_probe 323 * succeeded 324 */ 325 device_set_desc(sc->sc_bus.bdev, ehci_pci_match(self)); 326 switch (pci_get_vendor(self)) { 327 case PCI_EHCI_VENDORID_ACERLABS: 328 ksprintf(sc->sc_vendor, "AcerLabs"); 329 break; 330 case PCI_EHCI_VENDORID_AMD: 331 ksprintf(sc->sc_vendor, "AMD"); 332 break; 333 case PCI_EHCI_VENDORID_APPLE: 334 ksprintf(sc->sc_vendor, "Apple"); 335 break; 336 case PCI_EHCI_VENDORID_ATI: 337 ksprintf(sc->sc_vendor, "ATI"); 338 break; 339 case PCI_EHCI_VENDORID_CMDTECH: 340 ksprintf(sc->sc_vendor, "CMDTECH"); 341 break; 342 case PCI_EHCI_VENDORID_INTEL: 343 ksprintf(sc->sc_vendor, "Intel"); 344 break; 345 case PCI_EHCI_VENDORID_NEC: 346 ksprintf(sc->sc_vendor, "NEC"); 347 break; 348 case PCI_EHCI_VENDORID_OPTI: 349 ksprintf(sc->sc_vendor, "OPTi"); 350 break; 351 case PCI_EHCI_VENDORID_PHILIPS: 352 ksprintf(sc->sc_vendor, "Philips"); 353 break; 354 case PCI_EHCI_VENDORID_SIS: 355 ksprintf(sc->sc_vendor, "SiS"); 356 break; 357 case PCI_EHCI_VENDORID_NVIDIA: 358 case PCI_EHCI_VENDORID_NVIDIA2: 359 ksprintf(sc->sc_vendor, "nVidia"); 360 break; 361 case PCI_EHCI_VENDORID_VIA: 362 ksprintf(sc->sc_vendor, "VIA"); 363 break; 364 default: 365 if (bootverbose) 366 device_printf(self, "(New EHCI DeviceId=0x%08x)\n", 367 pci_get_devid(self)); 368 ksprintf(sc->sc_vendor, "(0x%04x)", pci_get_vendor(self)); 369 } 370 371 err = bus_setup_intr(self, sc->sc_irq_res, INTR_MPSAFE, 372 (driver_intr_t *)ehci_interrupt, sc, &sc->sc_intr_hdl, NULL); 373 374 if (err) { 375 device_printf(self, "Could not setup irq, %d\n", err); 376 sc->sc_intr_hdl = NULL; 377 goto error; 378 } 379 ehci_pci_take_controller(self); 380 381 /* Undocumented quirks taken from Linux */ 382 383 switch (pci_get_vendor(self)) { 384 case PCI_EHCI_VENDORID_ATI: 385 /* SB600 and SB700 EHCI quirk */ 386 switch (pci_get_device(self)) { 387 case 0x4386: 388 ehci_pci_ati_quirk(self, 0); 389 break; 390 case 0x4396: 391 ehci_pci_ati_quirk(self, 1); 392 break; 393 default: 394 break; 395 } 396 break; 397 398 case PCI_EHCI_VENDORID_VIA: 399 ehci_pci_via_quirk(self); 400 break; 401 402 default: 403 break; 404 } 405 406 /* Dropped interrupts workaround */ 407 switch (pci_get_vendor(self)) { 408 case PCI_EHCI_VENDORID_ATI: 409 case PCI_EHCI_VENDORID_VIA: 410 sc->sc_flags |= EHCI_SCFLG_LOSTINTRBUG; 411 if (bootverbose) 412 device_printf(self, 413 "Dropped interrupts workaround enabled\n"); 414 break; 415 default: 416 break; 417 } 418 419 /* Doorbell feature workaround */ 420 switch (pci_get_vendor(self)) { 421 case PCI_EHCI_VENDORID_NVIDIA: 422 case PCI_EHCI_VENDORID_NVIDIA2: 423 sc->sc_flags |= EHCI_SCFLG_IAADBUG; 424 if (bootverbose) 425 device_printf(self, 426 "Doorbell workaround enabled\n"); 427 break; 428 default: 429 break; 430 } 431 432 err = ehci_init(sc); 433 if (!err) { 434 err = device_probe_and_attach(sc->sc_bus.bdev); 435 } 436 if (err) { 437 device_printf(self, "USB init failed err=%d\n", err); 438 goto error; 439 } 440 return (0); 441 442 error: 443 ehci_pci_detach(self); 444 return (ENXIO); 445 } 446 447 static int 448 ehci_pci_detach(device_t self) 449 { 450 ehci_softc_t *sc = device_get_softc(self); 451 device_t bdev; 452 453 if (sc->sc_bus.bdev) { 454 bdev = sc->sc_bus.bdev; 455 device_detach(bdev); 456 device_delete_child(self, bdev); 457 } 458 /* during module unload there are lots of children leftover */ 459 device_delete_children(self); 460 461 pci_disable_busmaster(self); 462 463 if (sc->sc_irq_res && sc->sc_intr_hdl) { 464 /* 465 * only call ehci_detach() after ehci_init() 466 */ 467 ehci_detach(sc); 468 469 int err = bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl); 470 471 if (err) 472 /* XXX or should we panic? */ 473 device_printf(self, "Could not tear down irq, %d\n", 474 err); 475 sc->sc_intr_hdl = NULL; 476 } 477 if (sc->sc_irq_res) { 478 bus_release_resource(self, SYS_RES_IRQ, 0, sc->sc_irq_res); 479 sc->sc_irq_res = NULL; 480 } 481 if (sc->sc_io_res) { 482 bus_release_resource(self, SYS_RES_MEMORY, PCI_CBMEM, 483 sc->sc_io_res); 484 sc->sc_io_res = NULL; 485 } 486 usb_bus_mem_free_all(&sc->sc_bus, &ehci_iterate_hw_softc); 487 488 return (0); 489 } 490 491 static int 492 ehci_pci_take_controller(device_t self) 493 { 494 ehci_softc_t *sc = device_get_softc(self); 495 uint32_t cparams; 496 uint32_t eec; 497 uint16_t to; 498 uint8_t eecp; 499 uint8_t bios_sem; 500 501 cparams = EREAD4(sc, EHCI_HCCPARAMS); 502 503 /* Synchronise with the BIOS if it owns the controller. */ 504 for (eecp = EHCI_HCC_EECP(cparams); eecp != 0; 505 eecp = EHCI_EECP_NEXT(eec)) { 506 eec = pci_read_config(self, eecp, 4); 507 if (EHCI_EECP_ID(eec) != EHCI_EC_LEGSUP) { 508 continue; 509 } 510 bios_sem = pci_read_config(self, eecp + 511 EHCI_LEGSUP_BIOS_SEM, 1); 512 if (bios_sem == 0) { 513 continue; 514 } 515 device_printf(sc->sc_bus.bdev, "waiting for BIOS " 516 "to give up control\n"); 517 pci_write_config(self, eecp + 518 EHCI_LEGSUP_OS_SEM, 1, 1); 519 to = 500; 520 while (1) { 521 bios_sem = pci_read_config(self, eecp + 522 EHCI_LEGSUP_BIOS_SEM, 1); 523 if (bios_sem == 0) 524 break; 525 526 if (--to == 0) { 527 device_printf(sc->sc_bus.bdev, 528 "timed out waiting for BIOS\n"); 529 break; 530 } 531 usb_pause_mtx(NULL, hz / 100); /* wait 10ms */ 532 } 533 } 534 return (0); 535 } 536 537 static device_method_t ehci_pci_methods[] = { 538 /* Device interface */ 539 DEVMETHOD(device_probe, ehci_pci_probe), 540 DEVMETHOD(device_attach, ehci_pci_attach), 541 DEVMETHOD(device_detach, ehci_pci_detach), 542 DEVMETHOD(device_suspend, bus_generic_suspend), 543 DEVMETHOD(device_resume, bus_generic_resume), 544 DEVMETHOD(device_shutdown, bus_generic_shutdown), 545 DEVMETHOD(usb_take_controller, ehci_pci_take_controller), 546 547 DEVMETHOD_END 548 }; 549 550 static driver_t ehci_driver = { 551 .name = "ehci", 552 .methods = ehci_pci_methods, 553 .size = sizeof(struct ehci_softc), 554 }; 555 556 static devclass_t ehci_devclass; 557 558 DRIVER_MODULE(ehci, pci, ehci_driver, ehci_devclass, NULL, NULL); 559 MODULE_DEPEND(ehci, usb, 1, 1, 1); 560