xref: /dragonfly/sys/bus/u4b/controller/ohci_pci.c (revision 2513f15e)
1 /*-
2  * Copyright (c) 1998 The NetBSD Foundation, Inc.
3  * All rights reserved.
4  *
5  * This code is derived from software contributed to The NetBSD Foundation
6  * by Lennart Augustsson (augustss@carlstedt.se) at
7  * Carlstedt Research & Technology.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  *
18  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
19  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
20  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
21  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
22  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28  * POSSIBILITY OF SUCH DAMAGE.
29  */
30 
31 /*
32  * USB Open Host Controller driver.
33  *
34  * OHCI spec: http://www.intel.com/design/usb/ohci11d.pdf
35  */
36 
37 /* The low level controller code for OHCI has been split into
38  * PCI probes and OHCI specific code. This was done to facilitate the
39  * sharing of code between *BSD's
40  */
41 
42 #include <sys/stdint.h>
43 #include <sys/param.h>
44 #include <sys/queue.h>
45 #include <sys/types.h>
46 #include <sys/systm.h>
47 #include <sys/kernel.h>
48 #include <sys/bus.h>
49 #include <sys/module.h>
50 #include <sys/lock.h>
51 #include <sys/condvar.h>
52 #include <sys/sysctl.h>
53 #include <sys/unistd.h>
54 #include <sys/callout.h>
55 #include <sys/malloc.h>
56 #include <sys/priv.h>
57 
58 #include <bus/u4b/usb.h>
59 #include <bus/u4b/usbdi.h>
60 
61 #include <bus/u4b/usb_core.h>
62 #include <bus/u4b/usb_busdma.h>
63 #include <bus/u4b/usb_process.h>
64 #include <bus/u4b/usb_util.h>
65 
66 #include <bus/u4b/usb_controller.h>
67 #include <bus/u4b/usb_bus.h>
68 #include <bus/u4b/usb_pci.h>
69 #include <bus/u4b/controller/ohci.h>
70 #include <bus/u4b/controller/ohcireg.h>
71 #include "usb_if.h"
72 
73 #define	PCI_OHCI_VENDORID_ACERLABS	0x10b9
74 #define	PCI_OHCI_VENDORID_AMD		0x1022
75 #define	PCI_OHCI_VENDORID_APPLE		0x106b
76 #define	PCI_OHCI_VENDORID_ATI		0x1002
77 #define	PCI_OHCI_VENDORID_CMDTECH	0x1095
78 #define	PCI_OHCI_VENDORID_NEC		0x1033
79 #define	PCI_OHCI_VENDORID_NVIDIA	0x12D2
80 #define	PCI_OHCI_VENDORID_NVIDIA2	0x10DE
81 #define	PCI_OHCI_VENDORID_OPTI		0x1045
82 #define	PCI_OHCI_VENDORID_SIS		0x1039
83 #define	PCI_OHCI_VENDORID_SUN		0x108e
84 
85 #define	PCI_OHCI_BASE_REG	0x10
86 
87 static device_probe_t ohci_pci_probe;
88 static device_attach_t ohci_pci_attach;
89 static device_detach_t ohci_pci_detach;
90 static usb_take_controller_t ohci_pci_take_controller;
91 
92 static int
93 ohci_pci_take_controller(device_t self)
94 {
95 	uint32_t reg;
96 	uint32_t int_line;
97 
98 	if (pci_get_powerstate(self) != PCI_POWERSTATE_D0) {
99 		device_printf(self, "chip is in D%d mode "
100 		    "-- setting to D0\n", pci_get_powerstate(self));
101 		reg = pci_read_config(self, PCI_CBMEM, 4);
102 		int_line = pci_read_config(self, PCIR_INTLINE, 4);
103 		pci_set_powerstate(self, PCI_POWERSTATE_D0);
104 		pci_write_config(self, PCI_CBMEM, reg, 4);
105 		pci_write_config(self, PCIR_INTLINE, int_line, 4);
106 	}
107 	return (0);
108 }
109 
110 static const char *
111 ohci_pci_match(device_t self)
112 {
113 	uint32_t device_id = pci_get_devid(self);
114 
115 	switch (device_id) {
116 	case 0x523710b9:
117 		return ("AcerLabs M5237 (Aladdin-V) USB controller");
118 
119 	case 0x740c1022:
120 		return ("AMD-756 USB Controller");
121 
122 	case 0x74141022:
123 		return ("AMD-766 USB Controller");
124 
125 	case 0x43741002:
126 		return "ATI SB400 USB Controller";
127 	case 0x43751002:
128 		return "ATI SB400 USB Controller";
129 	case 0x43971002:
130 		return ("AMD SB7x0/SB8x0/SB9x0 USB controller");
131 	case 0x43981002:
132 		return ("AMD SB7x0/SB8x0/SB9x0 USB controller");
133 	case 0x43991002:
134 		return ("AMD SB7x0/SB8x0/SB9x0 USB controller");
135 
136 	case 0x06701095:
137 		return ("CMD Tech 670 (USB0670) USB controller");
138 
139 	case 0x06731095:
140 		return ("CMD Tech 673 (USB0673) USB controller");
141 
142 	case 0xc8611045:
143 		return ("OPTi 82C861 (FireLink) USB controller");
144 
145 	case 0x00351033:
146 		return ("NEC uPD 9210 USB controller");
147 
148 	case 0x00d710de:
149 		return ("nVidia nForce3 USB Controller");
150 
151 	case 0x005a10de:
152 		return ("nVidia nForce CK804 USB Controller");
153 	case 0x036c10de:
154 		return ("nVidia nForce MCP55 USB Controller");
155 	case 0x03f110de:
156 		return ("nVidia nForce MCP61 USB Controller");
157 	case 0x0aa510de:
158 		return ("nVidia nForce MCP79 USB Controller");
159 	case 0x0aa710de:
160 		return ("nVidia nForce MCP79 USB Controller");
161 	case 0x0aa810de:
162 		return ("nVidia nForce MCP79 USB Controller");
163 
164 	case 0x70011039:
165 		return ("SiS 5571 USB controller");
166 
167 	case 0x1103108e:
168 		return "Sun PCIO-2 USB controller";
169 
170 	case 0x0019106b:
171 		return ("Apple KeyLargo USB controller");
172 
173 	default:
174 		break;
175 	}
176 	if ((pci_get_class(self) == PCIC_SERIALBUS) &&
177 	    (pci_get_subclass(self) == PCIS_SERIALBUS_USB) &&
178 	    (pci_get_progif(self) == PCI_INTERFACE_OHCI)) {
179 		return ("OHCI (generic) USB controller");
180 	}
181 	return (NULL);
182 }
183 
184 static int
185 ohci_pci_probe(device_t self)
186 {
187 	const char *desc = ohci_pci_match(self);
188 
189 	if (desc) {
190 		device_set_desc(self, desc);
191 		return (0);
192 	} else {
193 		return (ENXIO);
194 	}
195 }
196 
197 static int
198 ohci_pci_attach(device_t self)
199 {
200 	ohci_softc_t *sc = device_get_softc(self);
201 	int rid;
202 	int err;
203 
204 	/* initialise some bus fields */
205 	sc->sc_bus.parent = self;
206 	sc->sc_bus.devices = sc->sc_devices;
207 	sc->sc_bus.devices_max = OHCI_MAX_DEVICES;
208 
209 	/* get all DMA memory */
210 	if (usb_bus_mem_alloc_all(&sc->sc_bus, USB_GET_DMA_TAG(self),
211 	    &ohci_iterate_hw_softc)) {
212 		return (ENOMEM);
213 	}
214 	sc->sc_dev = self;
215 
216 	pci_enable_busmaster(self);
217 
218 	/*
219 	 * Some Sun PCIO-2 USB controllers have their intpin register
220 	 * bogusly set to 0, although it should be 4.  Correct that.
221 	 */
222 	if (pci_get_devid(self) == 0x1103108e && pci_get_intpin(self) == 0)
223 		pci_set_intpin(self, 4);
224 
225 	rid = PCI_CBMEM;
226 	sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid,
227 	    RF_ACTIVE);
228 	if (!sc->sc_io_res) {
229 		device_printf(self, "Could not map memory\n");
230 		goto error;
231 	}
232 	sc->sc_io_tag = rman_get_bustag(sc->sc_io_res);
233 	sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res);
234 	sc->sc_io_size = rman_get_size(sc->sc_io_res);
235 
236 	rid = 0;
237 	sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid,
238 	    RF_SHAREABLE | RF_ACTIVE);
239 	if (sc->sc_irq_res == NULL) {
240 		device_printf(self, "Could not allocate irq\n");
241 		goto error;
242 	}
243 	sc->sc_bus.bdev = device_add_child(self, "usbus", -1);
244 	if (!sc->sc_bus.bdev) {
245 		device_printf(self, "Could not add USB device\n");
246 		goto error;
247 	}
248 	device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
249 
250 	/*
251 	 * ohci_pci_match will never return NULL if ohci_pci_probe
252 	 * succeeded
253 	 */
254 	device_set_desc(sc->sc_bus.bdev, ohci_pci_match(self));
255 	switch (pci_get_vendor(self)) {
256 	case PCI_OHCI_VENDORID_ACERLABS:
257 		ksprintf(sc->sc_vendor, "AcerLabs");
258 		break;
259 	case PCI_OHCI_VENDORID_AMD:
260 		ksprintf(sc->sc_vendor, "AMD");
261 		break;
262 	case PCI_OHCI_VENDORID_APPLE:
263 		ksprintf(sc->sc_vendor, "Apple");
264 		break;
265 	case PCI_OHCI_VENDORID_ATI:
266 		ksprintf(sc->sc_vendor, "ATI");
267 		break;
268 	case PCI_OHCI_VENDORID_CMDTECH:
269 		ksprintf(sc->sc_vendor, "CMDTECH");
270 		break;
271 	case PCI_OHCI_VENDORID_NEC:
272 		ksprintf(sc->sc_vendor, "NEC");
273 		break;
274 	case PCI_OHCI_VENDORID_NVIDIA:
275 	case PCI_OHCI_VENDORID_NVIDIA2:
276 		ksprintf(sc->sc_vendor, "nVidia");
277 		break;
278 	case PCI_OHCI_VENDORID_OPTI:
279 		ksprintf(sc->sc_vendor, "OPTi");
280 		break;
281 	case PCI_OHCI_VENDORID_SIS:
282 		ksprintf(sc->sc_vendor, "SiS");
283 		break;
284 	case PCI_OHCI_VENDORID_SUN:
285 		ksprintf(sc->sc_vendor, "SUN");
286 		break;
287 	default:
288 		if (bootverbose) {
289 			device_printf(self, "(New OHCI DeviceId=0x%08x)\n",
290 			    pci_get_devid(self));
291 		}
292 		ksprintf(sc->sc_vendor, "(0x%04x)", pci_get_vendor(self));
293 	}
294 
295 	/* sc->sc_bus.usbrev; set by ohci_init() */
296 
297 	err = bus_setup_intr(self, sc->sc_irq_res, INTR_MPSAFE,
298 	    (driver_intr_t *)ohci_interrupt, sc, &sc->sc_intr_hdl, NULL);
299 	if (err) {
300 		device_printf(self, "Could not setup irq, %d\n", err);
301 		sc->sc_intr_hdl = NULL;
302 		goto error;
303 	}
304 	err = ohci_init(sc);
305 	if (!err) {
306 		err = device_probe_and_attach(sc->sc_bus.bdev);
307 	}
308 	if (err) {
309 		device_printf(self, "USB init failed\n");
310 		goto error;
311 	}
312 	return (0);
313 
314 error:
315 	ohci_pci_detach(self);
316 	return (ENXIO);
317 }
318 
319 static int
320 ohci_pci_detach(device_t self)
321 {
322 	ohci_softc_t *sc = device_get_softc(self);
323 	device_t bdev;
324 
325 	if (sc->sc_bus.bdev) {
326 		bdev = sc->sc_bus.bdev;
327 		device_detach(bdev);
328 		device_delete_child(self, bdev);
329 	}
330  	/* during module unload there are lots of children leftover */
331 	device_delete_children(self);
332 
333 	pci_disable_busmaster(self);
334 
335 	if (sc->sc_irq_res && sc->sc_intr_hdl) {
336 		/*
337 		 * only call ohci_detach() after ohci_init()
338 		 */
339 		ohci_detach(sc);
340 
341 		int err = bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl);
342 
343 		if (err) {
344 			/* XXX or should we panic? */
345 			device_printf(self, "Could not tear down irq, %d\n",
346 			    err);
347 		}
348 		sc->sc_intr_hdl = NULL;
349 	}
350 	if (sc->sc_irq_res) {
351 		bus_release_resource(self, SYS_RES_IRQ, 0, sc->sc_irq_res);
352 		sc->sc_irq_res = NULL;
353 	}
354 	if (sc->sc_io_res) {
355 		bus_release_resource(self, SYS_RES_MEMORY, PCI_CBMEM,
356 		    sc->sc_io_res);
357 		sc->sc_io_res = NULL;
358 	}
359 	usb_bus_mem_free_all(&sc->sc_bus, &ohci_iterate_hw_softc);
360 
361 	return (0);
362 }
363 
364 static device_method_t ohci_pci_methods[] = {
365 	/* Device interface */
366 	DEVMETHOD(device_probe, ohci_pci_probe),
367 	DEVMETHOD(device_attach, ohci_pci_attach),
368 	DEVMETHOD(device_detach, ohci_pci_detach),
369 	DEVMETHOD(device_suspend, bus_generic_suspend),
370 	DEVMETHOD(device_resume, bus_generic_resume),
371 	DEVMETHOD(device_shutdown, bus_generic_shutdown),
372 	DEVMETHOD(usb_take_controller, ohci_pci_take_controller),
373 
374 	DEVMETHOD_END
375 };
376 
377 static driver_t ohci_driver = {
378 	.name = "ohci",
379 	.methods = ohci_pci_methods,
380 	.size = sizeof(struct ohci_softc),
381 };
382 
383 static devclass_t ohci_devclass;
384 
385 DRIVER_MODULE(ohci, pci, ohci_driver, ohci_devclass, NULL, NULL);
386 MODULE_DEPEND(ohci, usb, 1, 1, 1);
387