xref: /dragonfly/sys/bus/u4b/controller/uhci.h (revision d37f73b6)
1 /*-
2  * Copyright (c) 1998 The NetBSD Foundation, Inc.
3  * All rights reserved.
4  *
5  * This code is derived from software contributed to The NetBSD Foundation
6  * by Lennart Augustsson (lennart@augustsson.net) at
7  * Carlstedt Research & Technology.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  *
18  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
19  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
20  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
21  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
22  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28  * POSSIBILITY OF SUCH DAMAGE.
29  */
30 
31 #ifndef _UHCI_H_
32 #define	_UHCI_H_
33 
34 #define	UHCI_MAX_DEVICES MIN(USB_MAX_DEVICES, 128)
35 
36 #define	UHCI_FRAMELIST_COUNT	1024	/* units */
37 #define	UHCI_FRAMELIST_ALIGN	4096	/* bytes */
38 
39 /* Structures alignment (bytes) */
40 #define	UHCI_TD_ALIGN		16
41 #define	UHCI_QH_ALIGN		16
42 
43 #if	((USB_PAGE_SIZE < UHCI_TD_ALIGN) || (UHCI_TD_ALIGN == 0) ||	\
44 	(USB_PAGE_SIZE < UHCI_QH_ALIGN) || (UHCI_QH_ALIGN == 0))
45 #error	"Invalid USB page size!"
46 #endif
47 
48 typedef uint32_t uhci_physaddr_t;
49 
50 #define	UHCI_PTR_T		0x00000001
51 #define	UHCI_PTR_TD		0x00000000
52 #define	UHCI_PTR_QH		0x00000002
53 #define	UHCI_PTR_VF		0x00000004
54 
55 /*
56  * The Queue Heads (QH) and Transfer Descriptors (TD) are accessed by
57  * both the CPU and the USB-controller which run concurrently. Great
58  * care must be taken. When the data-structures are linked into the
59  * USB controller's frame list, the USB-controller "owns" the
60  * td_status and qh_elink fields, which will not be written by the
61  * CPU.
62  *
63  */
64 
65 struct uhci_td {
66 /*
67  * Data used by the UHCI controller.
68  * volatile is used in order to mantain struct members ordering.
69  */
70 	volatile uint32_t td_next;
71 	volatile uint32_t td_status;
72 #define	UHCI_TD_GET_ACTLEN(s)	(((s) + 1) & 0x3ff)
73 #define	UHCI_TD_ZERO_ACTLEN(t)	((t) | 0x3ff)
74 #define	UHCI_TD_BITSTUFF	0x00020000
75 #define	UHCI_TD_CRCTO		0x00040000
76 #define	UHCI_TD_NAK		0x00080000
77 #define	UHCI_TD_BABBLE		0x00100000
78 #define	UHCI_TD_DBUFFER		0x00200000
79 #define	UHCI_TD_STALLED		0x00400000
80 #define	UHCI_TD_ACTIVE		0x00800000
81 #define	UHCI_TD_IOC		0x01000000
82 #define	UHCI_TD_IOS		0x02000000
83 #define	UHCI_TD_LS		0x04000000
84 #define	UHCI_TD_GET_ERRCNT(s)	(((s) >> 27) & 3)
85 #define	UHCI_TD_SET_ERRCNT(n)	((n) << 27)
86 #define	UHCI_TD_SPD		0x20000000
87 	volatile uint32_t td_token;
88 #define	UHCI_TD_PID		0x000000ff
89 #define	UHCI_TD_PID_IN		0x00000069
90 #define	UHCI_TD_PID_OUT		0x000000e1
91 #define	UHCI_TD_PID_SETUP	0x0000002d
92 #define	UHCI_TD_GET_PID(s)	((s) & 0xff)
93 #define	UHCI_TD_SET_DEVADDR(a)	((a) << 8)
94 #define	UHCI_TD_GET_DEVADDR(s)	(((s) >> 8) & 0x7f)
95 #define	UHCI_TD_SET_ENDPT(e)	(((e) & 0xf) << 15)
96 #define	UHCI_TD_GET_ENDPT(s)	(((s) >> 15) & 0xf)
97 #define	UHCI_TD_SET_DT(t)	((t) << 19)
98 #define	UHCI_TD_GET_DT(s)	(((s) >> 19) & 1)
99 #define	UHCI_TD_SET_MAXLEN(l)	(((l)-1) << 21)
100 #define	UHCI_TD_GET_MAXLEN(s)	((((s) >> 21) + 1) & 0x7ff)
101 #define	UHCI_TD_MAXLEN_MASK	0xffe00000
102 	volatile uint32_t td_buffer;
103 /*
104  * Extra information needed:
105  */
106 	struct uhci_td *next;
107 	struct uhci_td *prev;
108 	struct uhci_td *obj_next;
109 	struct usb_page_cache *page_cache;
110 	struct usb_page_cache *fix_pc;
111 	uint32_t td_self;
112 	uint16_t len;
113 } __aligned(UHCI_TD_ALIGN);
114 
115 typedef struct uhci_td uhci_td_t;
116 
117 #define	UHCI_TD_ERROR	(UHCI_TD_BITSTUFF | UHCI_TD_CRCTO | 		\
118 			UHCI_TD_BABBLE | UHCI_TD_DBUFFER | UHCI_TD_STALLED)
119 
120 #define	UHCI_TD_SETUP(len, endp, dev)	(UHCI_TD_SET_MAXLEN(len) |	\
121 					UHCI_TD_SET_ENDPT(endp) |	\
122 					UHCI_TD_SET_DEVADDR(dev) |	\
123 					UHCI_TD_PID_SETUP)
124 
125 #define	UHCI_TD_OUT(len, endp, dev, dt)	(UHCI_TD_SET_MAXLEN(len) |	\
126 					UHCI_TD_SET_ENDPT(endp) |	\
127 					UHCI_TD_SET_DEVADDR(dev) |	\
128 					UHCI_TD_PID_OUT | UHCI_TD_SET_DT(dt))
129 
130 #define	UHCI_TD_IN(len, endp, dev, dt)	(UHCI_TD_SET_MAXLEN(len) |	\
131 					UHCI_TD_SET_ENDPT(endp) |	\
132 					UHCI_TD_SET_DEVADDR(dev) |	\
133 					UHCI_TD_PID_IN | UHCI_TD_SET_DT(dt))
134 
135 struct uhci_qh {
136 /*
137  * Data used by the UHCI controller.
138  */
139 	volatile uint32_t qh_h_next;
140 	volatile uint32_t qh_e_next;
141 /*
142  * Extra information needed:
143  */
144 	struct uhci_qh *h_next;
145 	struct uhci_qh *h_prev;
146 	struct uhci_qh *obj_next;
147 	struct uhci_td *e_next;
148 	struct usb_page_cache *page_cache;
149 	uint32_t qh_self;
150 	uint16_t intr_pos;
151 } __aligned(UHCI_QH_ALIGN);
152 
153 typedef struct uhci_qh uhci_qh_t;
154 
155 /* Maximum number of isochronous TD's and QH's interrupt */
156 #define	UHCI_VFRAMELIST_COUNT	128
157 #define	UHCI_IFRAMELIST_COUNT	(2 * UHCI_VFRAMELIST_COUNT)
158 
159 #if	(((UHCI_VFRAMELIST_COUNT & (UHCI_VFRAMELIST_COUNT-1)) != 0) ||	\
160 	(UHCI_VFRAMELIST_COUNT > UHCI_FRAMELIST_COUNT))
161 #error	"UHCI_VFRAMELIST_COUNT is not power of two"
162 #error	"or UHCI_VFRAMELIST_COUNT > UHCI_FRAMELIST_COUNT"
163 #endif
164 
165 #if (UHCI_VFRAMELIST_COUNT < USB_MAX_FS_ISOC_FRAMES_PER_XFER)
166 #error "maximum number of full-speed isochronous frames is higher than supported!"
167 #endif
168 
169 struct uhci_config_desc {
170 	struct usb_config_descriptor confd;
171 	struct usb_interface_descriptor ifcd;
172 	struct usb_endpoint_descriptor endpd;
173 } __packed;
174 
175 union uhci_hub_desc {
176 	struct usb_status stat;
177 	struct usb_port_status ps;
178 	uint8_t	temp[128];
179 };
180 
181 struct uhci_hw_softc {
182 	struct usb_page_cache pframes_pc;
183 	struct usb_page_cache isoc_start_pc[UHCI_VFRAMELIST_COUNT];
184 	struct usb_page_cache intr_start_pc[UHCI_IFRAMELIST_COUNT];
185 	struct usb_page_cache ls_ctl_start_pc;
186 	struct usb_page_cache fs_ctl_start_pc;
187 	struct usb_page_cache bulk_start_pc;
188 	struct usb_page_cache last_qh_pc;
189 	struct usb_page_cache last_td_pc;
190 
191 	struct usb_page pframes_pg;
192 	struct usb_page isoc_start_pg[UHCI_VFRAMELIST_COUNT];
193 	struct usb_page intr_start_pg[UHCI_IFRAMELIST_COUNT];
194 	struct usb_page ls_ctl_start_pg;
195 	struct usb_page fs_ctl_start_pg;
196 	struct usb_page bulk_start_pg;
197 	struct usb_page last_qh_pg;
198 	struct usb_page last_td_pg;
199 };
200 
201 typedef struct uhci_softc {
202 	struct uhci_hw_softc sc_hw;
203 	struct usb_bus sc_bus;		/* base device */
204 	union uhci_hub_desc sc_hub_desc;
205 	struct usb_callout sc_root_intr;
206 
207 	struct usb_device *sc_devices[UHCI_MAX_DEVICES];
208 	/* pointer to last TD for isochronous */
209 	struct uhci_td *sc_isoc_p_last[UHCI_VFRAMELIST_COUNT];
210 	/* pointer to last QH for interrupt */
211 	struct uhci_qh *sc_intr_p_last[UHCI_IFRAMELIST_COUNT];
212 	/* pointer to last QH for low speed control */
213 	struct uhci_qh *sc_ls_ctl_p_last;
214 	/* pointer to last QH for full speed control */
215 	struct uhci_qh *sc_fs_ctl_p_last;
216 	/* pointer to last QH for bulk */
217 	struct uhci_qh *sc_bulk_p_last;
218 	struct uhci_qh *sc_reclaim_qh_p;
219 	struct uhci_qh *sc_last_qh_p;
220 	struct uhci_td *sc_last_td_p;
221 	struct resource *sc_io_res;
222 	struct resource *sc_irq_res;
223 	void   *sc_intr_hdl;
224 	device_t sc_dev;
225 	bus_size_t sc_io_size;
226 	bus_space_tag_t sc_io_tag;
227 	bus_space_handle_t sc_io_hdl;
228 
229 	uint32_t sc_loops;		/* number of QHs that wants looping */
230 
231 	uint16_t sc_intr_stat[UHCI_IFRAMELIST_COUNT];
232 
233 	uint8_t	sc_addr;		/* device address */
234 	uint8_t	sc_conf;		/* device configuration */
235 	uint8_t	sc_isreset;		/* bits set if a root hub is reset */
236 	uint8_t	sc_isresumed;		/* bits set if a port was resumed */
237 	uint8_t	sc_hub_idata[1];
238 
239 	char	sc_vendor[16];		/* vendor string for root hub */
240 } uhci_softc_t;
241 
242 usb_bus_mem_cb_t uhci_iterate_hw_softc;
243 
244 usb_error_t uhci_init(uhci_softc_t *sc);
245 void	uhci_reset(uhci_softc_t *sc);
246 void	uhci_interrupt(uhci_softc_t *sc);
247 
248 #endif					/* _UHCI_H_ */
249