1 /*- 2 * Copyright (c) 1998 The NetBSD Foundation, Inc. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to The NetBSD Foundation 6 * by Lennart Augustsson (augustss@carlstedt.se) at 7 * Carlstedt Research & Technology. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 19 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 20 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 21 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 22 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31 /* Universal Host Controller Interface 32 * 33 * UHCI spec: http://www.intel.com/ 34 */ 35 36 /* The low level controller code for UHCI has been split into 37 * PCI probes and UHCI specific code. This was done to facilitate the 38 * sharing of code between *BSD's 39 */ 40 41 #include <sys/stdint.h> 42 #include <sys/param.h> 43 #include <sys/queue.h> 44 #include <sys/types.h> 45 #include <sys/systm.h> 46 #include <sys/kernel.h> 47 #include <sys/bus.h> 48 #include <sys/module.h> 49 #include <sys/lock.h> 50 #include <sys/condvar.h> 51 #include <sys/sysctl.h> 52 #include <sys/unistd.h> 53 #include <sys/callout.h> 54 #include <sys/malloc.h> 55 #include <sys/caps.h> 56 57 #include <bus/u4b/usb.h> 58 #include <bus/u4b/usbdi.h> 59 60 #include <bus/u4b/usb_core.h> 61 #include <bus/u4b/usb_busdma.h> 62 #include <bus/u4b/usb_process.h> 63 #include <bus/u4b/usb_util.h> 64 #include <bus/u4b/usb_debug.h> 65 66 #include <bus/u4b/usb_controller.h> 67 #include <bus/u4b/usb_bus.h> 68 #include <bus/u4b/usb_pci.h> 69 #include <bus/u4b/controller/uhci.h> 70 #include <bus/u4b/controller/uhcireg.h> 71 #include "usb_if.h" 72 73 #define PCI_UHCI_VENDORID_INTEL 0x8086 74 #define PCI_UHCI_VENDORID_VIA 0x1106 75 76 /* PIIX4E has no separate stepping */ 77 78 static device_probe_t uhci_pci_probe; 79 static device_attach_t uhci_pci_attach; 80 static device_detach_t uhci_pci_detach; 81 static usb_take_controller_t uhci_pci_take_controller; 82 83 static int 84 uhci_pci_take_controller(device_t self) 85 { 86 pci_write_config(self, PCI_LEGSUP, PCI_LEGSUP_USBPIRQDEN, 2); 87 88 return (0); 89 } 90 91 static const char * 92 uhci_pci_match(device_t self) 93 { 94 uint32_t device_id = pci_get_devid(self); 95 96 switch (device_id) { 97 case 0x26888086: 98 return ("Intel 631XESB/632XESB/3100 USB controller USB-1"); 99 100 case 0x26898086: 101 return ("Intel 631XESB/632XESB/3100 USB controller USB-2"); 102 103 case 0x268a8086: 104 return ("Intel 631XESB/632XESB/3100 USB controller USB-3"); 105 106 case 0x268b8086: 107 return ("Intel 631XESB/632XESB/3100 USB controller USB-4"); 108 109 case 0x70208086: 110 return ("Intel 82371SB (PIIX3) USB controller"); 111 112 case 0x71128086: 113 return ("Intel 82371AB/EB (PIIX4) USB controller"); 114 115 case 0x24128086: 116 return ("Intel 82801AA (ICH) USB controller"); 117 118 case 0x24228086: 119 return ("Intel 82801AB (ICH0) USB controller"); 120 121 case 0x24428086: 122 return ("Intel 82801BA/BAM (ICH2) USB controller USB-A"); 123 124 case 0x24448086: 125 return ("Intel 82801BA/BAM (ICH2) USB controller USB-B"); 126 127 case 0x24828086: 128 return ("Intel 82801CA/CAM (ICH3) USB controller USB-A"); 129 130 case 0x24848086: 131 return ("Intel 82801CA/CAM (ICH3) USB controller USB-B"); 132 133 case 0x24878086: 134 return ("Intel 82801CA/CAM (ICH3) USB controller USB-C"); 135 136 case 0x24c28086: 137 return ("Intel 82801DB (ICH4) USB controller USB-A"); 138 139 case 0x24c48086: 140 return ("Intel 82801DB (ICH4) USB controller USB-B"); 141 142 case 0x24c78086: 143 return ("Intel 82801DB (ICH4) USB controller USB-C"); 144 145 case 0x24d28086: 146 return ("Intel 82801EB (ICH5) USB controller USB-A"); 147 148 case 0x24d48086: 149 return ("Intel 82801EB (ICH5) USB controller USB-B"); 150 151 case 0x24d78086: 152 return ("Intel 82801EB (ICH5) USB controller USB-C"); 153 154 case 0x24de8086: 155 return ("Intel 82801EB (ICH5) USB controller USB-D"); 156 157 case 0x26588086: 158 return ("Intel 82801FB/FR/FW/FRW (ICH6) USB controller USB-A"); 159 160 case 0x26598086: 161 return ("Intel 82801FB/FR/FW/FRW (ICH6) USB controller USB-B"); 162 163 case 0x265a8086: 164 return ("Intel 82801FB/FR/FW/FRW (ICH6) USB controller USB-C"); 165 166 case 0x265b8086: 167 return ("Intel 82801FB/FR/FW/FRW (ICH6) USB controller USB-D"); 168 169 case 0x27c88086: 170 return ("Intel 82801G (ICH7) USB controller USB-A"); 171 case 0x27c98086: 172 return ("Intel 82801G (ICH7) USB controller USB-B"); 173 case 0x27ca8086: 174 return ("Intel 82801G (ICH7) USB controller USB-C"); 175 case 0x27cb8086: 176 return ("Intel 82801G (ICH7) USB controller USB-D"); 177 178 case 0x28308086: 179 return ("Intel 82801H (ICH8) USB controller USB-A"); 180 case 0x28318086: 181 return ("Intel 82801H (ICH8) USB controller USB-B"); 182 case 0x28328086: 183 return ("Intel 82801H (ICH8) USB controller USB-C"); 184 case 0x28348086: 185 return ("Intel 82801H (ICH8) USB controller USB-D"); 186 case 0x28358086: 187 return ("Intel 82801H (ICH8) USB controller USB-E"); 188 case 0x29348086: 189 return ("Intel 82801I (ICH9) USB controller"); 190 case 0x29358086: 191 return ("Intel 82801I (ICH9) USB controller"); 192 case 0x29368086: 193 return ("Intel 82801I (ICH9) USB controller"); 194 case 0x29378086: 195 return ("Intel 82801I (ICH9) USB controller"); 196 case 0x29388086: 197 return ("Intel 82801I (ICH9) USB controller"); 198 case 0x29398086: 199 return ("Intel 82801I (ICH9) USB controller"); 200 case 0x3a348086: 201 return ("Intel 82801JI (ICH10) USB controller USB-A"); 202 case 0x3a358086: 203 return ("Intel 82801JI (ICH10) USB controller USB-B"); 204 case 0x3a368086: 205 return ("Intel 82801JI (ICH10) USB controller USB-C"); 206 case 0x3a378086: 207 return ("Intel 82801JI (ICH10) USB controller USB-D"); 208 case 0x3a388086: 209 return ("Intel 82801JI (ICH10) USB controller USB-E"); 210 case 0x3a398086: 211 return ("Intel 82801JI (ICH10) USB controller USB-F"); 212 213 case 0x719a8086: 214 return ("Intel 82443MX USB controller"); 215 216 case 0x76028086: 217 return ("Intel 82372FB/82468GX USB controller"); 218 219 case 0x30381106: 220 return ("VIA 83C572 USB controller"); 221 222 default: 223 break; 224 } 225 226 if ((pci_get_class(self) == PCIC_SERIALBUS) && 227 (pci_get_subclass(self) == PCIS_SERIALBUS_USB) && 228 (pci_get_progif(self) == PCI_INTERFACE_UHCI)) { 229 return ("UHCI (generic) USB controller"); 230 } 231 return (NULL); 232 } 233 234 static int 235 uhci_pci_probe(device_t self) 236 { 237 const char *desc = uhci_pci_match(self); 238 239 if (desc) { 240 device_set_desc(self, desc); 241 return (0); 242 } else { 243 return (ENXIO); 244 } 245 } 246 247 static int 248 uhci_pci_attach(device_t self) 249 { 250 uhci_softc_t *sc = device_get_softc(self); 251 int rid; 252 int err; 253 254 /* initialise some bus fields */ 255 sc->sc_bus.parent = self; 256 sc->sc_bus.devices = sc->sc_devices; 257 sc->sc_bus.devices_max = UHCI_MAX_DEVICES; 258 sc->sc_bus.dma_bits = 32; 259 260 /* get all DMA memory */ 261 if (usb_bus_mem_alloc_all(&sc->sc_bus, USB_GET_DMA_TAG(self), 262 &uhci_iterate_hw_softc)) { 263 return ENOMEM; 264 } 265 sc->sc_dev = self; 266 267 pci_enable_busmaster(self); 268 269 rid = PCI_UHCI_BASE_REG; 270 sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_IOPORT, &rid, 271 RF_ACTIVE); 272 if (!sc->sc_io_res) { 273 device_printf(self, "Could not map ports\n"); 274 goto error; 275 } 276 sc->sc_io_tag = rman_get_bustag(sc->sc_io_res); 277 sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res); 278 sc->sc_io_size = rman_get_size(sc->sc_io_res); 279 280 /* disable interrupts */ 281 bus_space_write_2(sc->sc_io_tag, sc->sc_io_hdl, UHCI_INTR, 0); 282 283 rid = 0; 284 sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid, 285 RF_SHAREABLE | RF_ACTIVE); 286 if (sc->sc_irq_res == NULL) { 287 device_printf(self, "Could not allocate irq\n"); 288 goto error; 289 } 290 sc->sc_bus.bdev = device_add_child(self, "usbus", -1); 291 if (!sc->sc_bus.bdev) { 292 device_printf(self, "Could not add USB device\n"); 293 goto error; 294 } 295 device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus); 296 297 /* 298 * uhci_pci_match must never return NULL if uhci_pci_probe 299 * succeeded 300 */ 301 device_set_desc(sc->sc_bus.bdev, uhci_pci_match(self)); 302 switch (pci_get_vendor(self)) { 303 case PCI_UHCI_VENDORID_INTEL: 304 ksprintf(sc->sc_vendor, "Intel"); 305 break; 306 case PCI_UHCI_VENDORID_VIA: 307 ksprintf(sc->sc_vendor, "VIA"); 308 break; 309 default: 310 if (bootverbose) { 311 device_printf(self, "(New UHCI DeviceId=0x%08x)\n", 312 pci_get_devid(self)); 313 } 314 ksprintf(sc->sc_vendor, "(0x%04x)", pci_get_vendor(self)); 315 } 316 317 switch (pci_read_config(self, PCI_USBREV, 1) & PCI_USB_REV_MASK) { 318 case PCI_USB_REV_PRE_1_0: 319 sc->sc_bus.usbrev = USB_REV_PRE_1_0; 320 break; 321 case PCI_USB_REV_1_0: 322 sc->sc_bus.usbrev = USB_REV_1_0; 323 break; 324 default: 325 /* Quirk for Parallels Desktop 4.0 */ 326 device_printf(self, "USB revision is unknown. Assuming v1.1.\n"); 327 sc->sc_bus.usbrev = USB_REV_1_1; 328 break; 329 } 330 331 err = bus_setup_intr(self, sc->sc_irq_res, INTR_MPSAFE, 332 (driver_intr_t *)uhci_interrupt, sc, &sc->sc_intr_hdl, NULL); 333 334 if (err) { 335 device_printf(self, "Could not setup irq, %d\n", err); 336 sc->sc_intr_hdl = NULL; 337 goto error; 338 } 339 /* 340 * Set the PIRQD enable bit and switch off all the others. We don't 341 * want legacy support to interfere with us XXX Does this also mean 342 * that the BIOS won't touch the keyboard anymore if it is connected 343 * to the ports of the root hub? 344 */ 345 #ifdef USB_DEBUG 346 if (pci_read_config(self, PCI_LEGSUP, 2) != PCI_LEGSUP_USBPIRQDEN) { 347 device_printf(self, "LegSup = 0x%04x\n", 348 pci_read_config(self, PCI_LEGSUP, 2)); 349 } 350 #endif 351 pci_write_config(self, PCI_LEGSUP, PCI_LEGSUP_USBPIRQDEN, 2); 352 353 err = uhci_init(sc); 354 if (!err) { 355 err = device_probe_and_attach(sc->sc_bus.bdev); 356 } 357 if (err) { 358 device_printf(self, "USB init failed\n"); 359 goto error; 360 } 361 return (0); 362 363 error: 364 uhci_pci_detach(self); 365 return (ENXIO); 366 } 367 368 int 369 uhci_pci_detach(device_t self) 370 { 371 uhci_softc_t *sc = device_get_softc(self); 372 device_t bdev; 373 374 if (sc->sc_bus.bdev) { 375 bdev = sc->sc_bus.bdev; 376 device_detach(bdev); 377 device_delete_child(self, bdev); 378 } 379 /* during module unload there are lots of children leftover */ 380 device_delete_children(self); 381 382 /* 383 * disable interrupts that might have been switched on in 384 * uhci_init. 385 */ 386 if (sc->sc_io_res) { 387 USB_BUS_LOCK(&sc->sc_bus); 388 389 /* stop the controller */ 390 uhci_reset(sc); 391 392 USB_BUS_UNLOCK(&sc->sc_bus); 393 } 394 pci_disable_busmaster(self); 395 396 if (sc->sc_irq_res && sc->sc_intr_hdl) { 397 int err = bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl); 398 399 if (err) { 400 /* XXX or should we panic? */ 401 device_printf(self, "Could not tear down irq, %d\n", 402 err); 403 } 404 sc->sc_intr_hdl = NULL; 405 } 406 if (sc->sc_irq_res) { 407 bus_release_resource(self, SYS_RES_IRQ, 0, sc->sc_irq_res); 408 sc->sc_irq_res = NULL; 409 } 410 if (sc->sc_io_res) { 411 bus_release_resource(self, SYS_RES_IOPORT, PCI_UHCI_BASE_REG, 412 sc->sc_io_res); 413 sc->sc_io_res = NULL; 414 } 415 usb_bus_mem_free_all(&sc->sc_bus, &uhci_iterate_hw_softc); 416 417 return (0); 418 } 419 420 static device_method_t uhci_pci_methods[] = { 421 /* Device interface */ 422 DEVMETHOD(device_probe, uhci_pci_probe), 423 DEVMETHOD(device_attach, uhci_pci_attach), 424 DEVMETHOD(device_detach, uhci_pci_detach), 425 DEVMETHOD(device_suspend, bus_generic_suspend), 426 DEVMETHOD(device_resume, bus_generic_resume), 427 DEVMETHOD(device_shutdown, bus_generic_shutdown), 428 DEVMETHOD(usb_take_controller, uhci_pci_take_controller), 429 430 DEVMETHOD_END 431 }; 432 433 static driver_t uhci_driver = { 434 .name = "uhci", 435 .methods = uhci_pci_methods, 436 .size = sizeof(struct uhci_softc), 437 }; 438 439 static devclass_t uhci_devclass; 440 441 DRIVER_MODULE(uhci, pci, uhci_driver, uhci_devclass, NULL, NULL); 442 MODULE_DEPEND(uhci, usb, 1, 1, 1); 443