1 /*-
2 * Copyright (c) 1997, 1998, 1999, 2000
3 * Bill Paul <wpaul@ee.columbia.edu>. All rights reserved.
4 *
5 * Copyright (c) 2006
6 * Alfred Perlstein <alfred@FreeBSD.org>. All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. All advertising materials mentioning features or use of this software
17 * must display the following acknowledgement:
18 * This product includes software developed by Bill Paul.
19 * 4. Neither the name of the author nor the names of any co-contributors
20 * may be used to endorse or promote products derived from this software
21 * without specific prior written permission.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
27 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
33 * THE POSSIBILITY OF SUCH DAMAGE.
34 *
35 * $FreeBSD: head/sys/dev/usb/net/if_aue.c 271832 2014-09-18 21:09:22Z glebius $
36 */
37
38 /*
39 * ADMtek AN986 Pegasus and AN8511 Pegasus II USB to ethernet driver.
40 * Datasheet is available from http://www.admtek.com.tw.
41 *
42 * Written by Bill Paul <wpaul@ee.columbia.edu>
43 * Electrical Engineering Department
44 * Columbia University, New York City
45 *
46 * SMP locking by Alfred Perlstein <alfred@FreeBSD.org>.
47 * RED Inc.
48 */
49
50 /*
51 * The Pegasus chip uses four USB "endpoints" to provide 10/100 ethernet
52 * support: the control endpoint for reading/writing registers, burst
53 * read endpoint for packet reception, burst write for packet transmission
54 * and one for "interrupts." The chip uses the same RX filter scheme
55 * as the other ADMtek ethernet parts: one perfect filter entry for the
56 * the station address and a 64-bit multicast hash table. The chip supports
57 * both MII and HomePNA attachments.
58 *
59 * Since the maximum data transfer speed of USB is supposed to be 12Mbps,
60 * you're never really going to get 100Mbps speeds from this device. I
61 * think the idea is to allow the device to connect to 10 or 100Mbps
62 * networks, not necessarily to provide 100Mbps performance. Also, since
63 * the controller uses an external PHY chip, it's possible that board
64 * designers might simply choose a 10Mbps PHY.
65 *
66 * Registers are accessed using uether_do_request(). Packet
67 * transfers are done using usbd_transfer() and friends.
68 */
69
70 #include <sys/stdint.h>
71 #include <sys/param.h>
72 #include <sys/queue.h>
73 #include <sys/types.h>
74 #include <sys/systm.h>
75 #include <sys/socket.h>
76 #include <sys/kernel.h>
77 #include <sys/bus.h>
78 #include <sys/module.h>
79 #include <sys/lock.h>
80 #include <sys/condvar.h>
81 #include <sys/sysctl.h>
82 #include <sys/unistd.h>
83 #include <sys/callout.h>
84 #include <sys/malloc.h>
85 #include <sys/caps.h>
86
87 #include <net/if.h>
88 #include <net/if_var.h>
89 #include <net/ifq_var.h>
90
91 #include <bus/u4b/usb.h>
92 #include <bus/u4b/usbdi.h>
93 #include <bus/u4b/usbdi_util.h>
94 #include "usbdevs.h"
95
96 #define USB_DEBUG_VAR aue_debug
97 #include <bus/u4b/usb_debug.h>
98 #include <bus/u4b/usb_process.h>
99
100 #include <bus/u4b/net/usb_ethernet.h>
101 #include <bus/u4b/net/if_auereg.h>
102
103 #ifdef USB_DEBUG
104 static int aue_debug = 0;
105
106 static SYSCTL_NODE(_hw_usb, OID_AUTO, aue, CTLFLAG_RW, 0, "USB aue");
107 SYSCTL_INT(_hw_usb_aue, OID_AUTO, debug, CTLFLAG_RW, &aue_debug, 0,
108 "Debug level");
109 #endif
110
111 /*
112 * Various supported device vendors/products.
113 */
114 static const STRUCT_USB_HOST_ID aue_devs[] = {
115 #define AUE_DEV(v,p,i) { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, i) }
116 AUE_DEV(3COM, 3C460B, AUE_FLAG_PII),
117 AUE_DEV(ABOCOM, DSB650TX_PNA, 0),
118 AUE_DEV(ABOCOM, UFE1000, AUE_FLAG_LSYS),
119 AUE_DEV(ABOCOM, XX10, 0),
120 AUE_DEV(ABOCOM, XX1, AUE_FLAG_PNA | AUE_FLAG_PII),
121 AUE_DEV(ABOCOM, XX2, AUE_FLAG_PII),
122 AUE_DEV(ABOCOM, XX4, AUE_FLAG_PNA),
123 AUE_DEV(ABOCOM, XX5, AUE_FLAG_PNA),
124 AUE_DEV(ABOCOM, XX6, AUE_FLAG_PII),
125 AUE_DEV(ABOCOM, XX7, AUE_FLAG_PII),
126 AUE_DEV(ABOCOM, XX8, AUE_FLAG_PII),
127 AUE_DEV(ABOCOM, XX9, AUE_FLAG_PNA),
128 AUE_DEV(ACCTON, SS1001, AUE_FLAG_PII),
129 AUE_DEV(ACCTON, USB320_EC, 0),
130 AUE_DEV(ADMTEK, PEGASUSII_2, AUE_FLAG_PII),
131 AUE_DEV(ADMTEK, PEGASUSII_3, AUE_FLAG_PII),
132 AUE_DEV(ADMTEK, PEGASUSII_4, AUE_FLAG_PII),
133 AUE_DEV(ADMTEK, PEGASUSII, AUE_FLAG_PII),
134 AUE_DEV(ADMTEK, PEGASUS, AUE_FLAG_PNA | AUE_FLAG_DUAL_PHY),
135 AUE_DEV(AEI, FASTETHERNET, AUE_FLAG_PII),
136 AUE_DEV(ALLIEDTELESYN, ATUSB100, AUE_FLAG_PII),
137 AUE_DEV(ATEN, UC110T, AUE_FLAG_PII),
138 AUE_DEV(BELKIN, USB2LAN, AUE_FLAG_PII),
139 AUE_DEV(BILLIONTON, USB100, 0),
140 AUE_DEV(BILLIONTON, USBE100, AUE_FLAG_PII),
141 AUE_DEV(BILLIONTON, USBEL100, 0),
142 AUE_DEV(BILLIONTON, USBLP100, AUE_FLAG_PNA),
143 AUE_DEV(COREGA, FETHER_USB_TXS, AUE_FLAG_PII),
144 AUE_DEV(COREGA, FETHER_USB_TX, 0),
145 AUE_DEV(DLINK, DSB650TX1, AUE_FLAG_LSYS),
146 AUE_DEV(DLINK, DSB650TX2, AUE_FLAG_LSYS | AUE_FLAG_PII),
147 AUE_DEV(DLINK, DSB650TX3, AUE_FLAG_LSYS | AUE_FLAG_PII),
148 AUE_DEV(DLINK, DSB650TX4, AUE_FLAG_LSYS | AUE_FLAG_PII),
149 AUE_DEV(DLINK, DSB650TX_PNA, AUE_FLAG_PNA),
150 AUE_DEV(DLINK, DSB650TX, AUE_FLAG_LSYS),
151 AUE_DEV(DLINK, DSB650, AUE_FLAG_LSYS),
152 AUE_DEV(ELCON, PLAN, AUE_FLAG_PNA | AUE_FLAG_PII),
153 AUE_DEV(ELECOM, LDUSB20, AUE_FLAG_PII),
154 AUE_DEV(ELECOM, LDUSBLTX, AUE_FLAG_PII),
155 AUE_DEV(ELECOM, LDUSBTX0, 0),
156 AUE_DEV(ELECOM, LDUSBTX1, AUE_FLAG_LSYS),
157 AUE_DEV(ELECOM, LDUSBTX2, 0),
158 AUE_DEV(ELECOM, LDUSBTX3, AUE_FLAG_LSYS),
159 AUE_DEV(ELSA, USB2ETHERNET, 0),
160 AUE_DEV(GIGABYTE, GNBR402W, 0),
161 AUE_DEV(HAWKING, UF100, AUE_FLAG_PII),
162 AUE_DEV(HP, HN210E, AUE_FLAG_PII),
163 AUE_DEV(IODATA, USBETTXS, AUE_FLAG_PII),
164 AUE_DEV(IODATA, USBETTX, 0),
165 AUE_DEV(KINGSTON, KNU101TX, 0),
166 AUE_DEV(LINKSYS, USB100H1, AUE_FLAG_LSYS | AUE_FLAG_PNA),
167 AUE_DEV(LINKSYS, USB100TX, AUE_FLAG_LSYS),
168 AUE_DEV(LINKSYS, USB10TA, AUE_FLAG_LSYS),
169 AUE_DEV(LINKSYS, USB10TX1, AUE_FLAG_LSYS | AUE_FLAG_PII),
170 AUE_DEV(LINKSYS, USB10TX2, AUE_FLAG_LSYS | AUE_FLAG_PII),
171 AUE_DEV(LINKSYS, USB10T, AUE_FLAG_LSYS),
172 AUE_DEV(MELCO, LUA2TX5, AUE_FLAG_PII),
173 AUE_DEV(MELCO, LUATX1, 0),
174 AUE_DEV(MELCO, LUATX5, 0),
175 AUE_DEV(MICROSOFT, MN110, AUE_FLAG_PII),
176 AUE_DEV(NETGEAR, FA101, AUE_FLAG_PII),
177 AUE_DEV(SIEMENS, SPEEDSTREAM, AUE_FLAG_PII),
178 AUE_DEV(SIIG2, USBTOETHER, AUE_FLAG_PII),
179 AUE_DEV(SMARTBRIDGES, SMARTNIC, AUE_FLAG_PII),
180 AUE_DEV(SMC, 2202USB, 0),
181 AUE_DEV(SMC, 2206USB, AUE_FLAG_PII),
182 AUE_DEV(SOHOWARE, NUB100, 0),
183 AUE_DEV(SOHOWARE, NUB110, AUE_FLAG_PII),
184 #undef AUE_DEV
185 };
186
187 /* prototypes */
188
189 static device_probe_t aue_probe;
190 static device_attach_t aue_attach;
191 static device_detach_t aue_detach;
192 static miibus_readreg_t aue_miibus_readreg;
193 static miibus_writereg_t aue_miibus_writereg;
194 static miibus_statchg_t aue_miibus_statchg;
195
196 static usb_callback_t aue_intr_callback;
197 static usb_callback_t aue_bulk_read_callback;
198 static usb_callback_t aue_bulk_write_callback;
199
200 static uether_fn_t aue_attach_post;
201 static uether_fn_t aue_init;
202 static uether_fn_t aue_stop;
203 static uether_fn_t aue_start;
204 static uether_fn_t aue_tick;
205 static uether_fn_t aue_setmulti;
206 static uether_fn_t aue_setpromisc;
207
208 static uint8_t aue_csr_read_1(struct aue_softc *, uint16_t);
209 static uint16_t aue_csr_read_2(struct aue_softc *, uint16_t);
210 static void aue_csr_write_1(struct aue_softc *, uint16_t, uint8_t);
211 static void aue_csr_write_2(struct aue_softc *, uint16_t, uint16_t);
212 static uint16_t aue_eeprom_getword(struct aue_softc *, int);
213 static void aue_reset(struct aue_softc *);
214 static void aue_reset_pegasus_II(struct aue_softc *);
215
216 static int aue_ifmedia_upd(struct ifnet *);
217 static void aue_ifmedia_sts(struct ifnet *, struct ifmediareq *);
218
219 static const struct usb_config aue_config[AUE_N_TRANSFER] = {
220
221 [AUE_BULK_DT_WR] = {
222 .type = UE_BULK,
223 .endpoint = UE_ADDR_ANY,
224 .direction = UE_DIR_OUT,
225 .bufsize = (MCLBYTES + 2),
226 .flags = {.pipe_bof = 1,.force_short_xfer = 1,},
227 .callback = aue_bulk_write_callback,
228 .timeout = 10000, /* 10 seconds */
229 },
230
231 [AUE_BULK_DT_RD] = {
232 .type = UE_BULK,
233 .endpoint = UE_ADDR_ANY,
234 .direction = UE_DIR_IN,
235 .bufsize = (MCLBYTES + 4 + ETHER_CRC_LEN),
236 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
237 .callback = aue_bulk_read_callback,
238 },
239
240 [AUE_INTR_DT_RD] = {
241 .type = UE_INTERRUPT,
242 .endpoint = UE_ADDR_ANY,
243 .direction = UE_DIR_IN,
244 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
245 .bufsize = 0, /* use wMaxPacketSize */
246 .callback = aue_intr_callback,
247 },
248 };
249
250 static device_method_t aue_methods[] = {
251 /* Device interface */
252 DEVMETHOD(device_probe, aue_probe),
253 DEVMETHOD(device_attach, aue_attach),
254 DEVMETHOD(device_detach, aue_detach),
255
256 /* MII interface */
257 DEVMETHOD(miibus_readreg, aue_miibus_readreg),
258 DEVMETHOD(miibus_writereg, aue_miibus_writereg),
259 DEVMETHOD(miibus_statchg, aue_miibus_statchg),
260
261 DEVMETHOD_END
262 };
263
264 static driver_t aue_driver = {
265 .name = "aue",
266 .methods = aue_methods,
267 .size = sizeof(struct aue_softc)
268 };
269
270 static devclass_t aue_devclass;
271
272 DRIVER_MODULE(aue, uhub, aue_driver, aue_devclass, NULL, NULL);
273 DRIVER_MODULE(miibus, aue, miibus_driver, miibus_devclass, NULL, NULL);
274 MODULE_DEPEND(aue, uether, 1, 1, 1);
275 MODULE_DEPEND(aue, usb, 1, 1, 1);
276 MODULE_DEPEND(aue, ether, 1, 1, 1);
277 MODULE_DEPEND(aue, miibus, 1, 1, 1);
278 MODULE_VERSION(aue, 1);
279
280 static const struct usb_ether_methods aue_ue_methods = {
281 .ue_attach_post = aue_attach_post,
282 .ue_start = aue_start,
283 .ue_init = aue_init,
284 .ue_stop = aue_stop,
285 .ue_tick = aue_tick,
286 .ue_setmulti = aue_setmulti,
287 .ue_setpromisc = aue_setpromisc,
288 .ue_mii_upd = aue_ifmedia_upd,
289 .ue_mii_sts = aue_ifmedia_sts,
290 };
291
292 #define AUE_SETBIT(sc, reg, x) \
293 aue_csr_write_1(sc, reg, aue_csr_read_1(sc, reg) | (x))
294
295 #define AUE_CLRBIT(sc, reg, x) \
296 aue_csr_write_1(sc, reg, aue_csr_read_1(sc, reg) & ~(x))
297
298 static uint8_t
aue_csr_read_1(struct aue_softc * sc,uint16_t reg)299 aue_csr_read_1(struct aue_softc *sc, uint16_t reg)
300 {
301 struct usb_device_request req;
302 usb_error_t err;
303 uint8_t val;
304
305 req.bmRequestType = UT_READ_VENDOR_DEVICE;
306 req.bRequest = AUE_UR_READREG;
307 USETW(req.wValue, 0);
308 USETW(req.wIndex, reg);
309 USETW(req.wLength, 1);
310
311 err = uether_do_request(&sc->sc_ue, &req, &val, 1000);
312 if (err)
313 return (0);
314 return (val);
315 }
316
317 static uint16_t
aue_csr_read_2(struct aue_softc * sc,uint16_t reg)318 aue_csr_read_2(struct aue_softc *sc, uint16_t reg)
319 {
320 struct usb_device_request req;
321 usb_error_t err;
322 uint16_t val;
323
324 req.bmRequestType = UT_READ_VENDOR_DEVICE;
325 req.bRequest = AUE_UR_READREG;
326 USETW(req.wValue, 0);
327 USETW(req.wIndex, reg);
328 USETW(req.wLength, 2);
329
330 err = uether_do_request(&sc->sc_ue, &req, &val, 1000);
331 if (err)
332 return (0);
333 return (le16toh(val));
334 }
335
336 static void
aue_csr_write_1(struct aue_softc * sc,uint16_t reg,uint8_t val)337 aue_csr_write_1(struct aue_softc *sc, uint16_t reg, uint8_t val)
338 {
339 struct usb_device_request req;
340
341 req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
342 req.bRequest = AUE_UR_WRITEREG;
343 req.wValue[0] = val;
344 req.wValue[1] = 0;
345 USETW(req.wIndex, reg);
346 USETW(req.wLength, 1);
347
348 if (uether_do_request(&sc->sc_ue, &req, &val, 1000)) {
349 /* error ignored */
350 }
351 }
352
353 static void
aue_csr_write_2(struct aue_softc * sc,uint16_t reg,uint16_t val)354 aue_csr_write_2(struct aue_softc *sc, uint16_t reg, uint16_t val)
355 {
356 struct usb_device_request req;
357
358 req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
359 req.bRequest = AUE_UR_WRITEREG;
360 USETW(req.wValue, val);
361 USETW(req.wIndex, reg);
362 USETW(req.wLength, 2);
363
364 val = htole16(val);
365
366 if (uether_do_request(&sc->sc_ue, &req, &val, 1000)) {
367 /* error ignored */
368 }
369 }
370
371 /*
372 * Read a word of data stored in the EEPROM at address 'addr.'
373 */
374 static uint16_t
aue_eeprom_getword(struct aue_softc * sc,int addr)375 aue_eeprom_getword(struct aue_softc *sc, int addr)
376 {
377 int i;
378
379 aue_csr_write_1(sc, AUE_EE_REG, addr);
380 aue_csr_write_1(sc, AUE_EE_CTL, AUE_EECTL_READ);
381
382 for (i = 0; i != AUE_TIMEOUT; i++) {
383 if (aue_csr_read_1(sc, AUE_EE_CTL) & AUE_EECTL_DONE)
384 break;
385 if (uether_pause(&sc->sc_ue, hz / 100))
386 break;
387 }
388
389 if (i == AUE_TIMEOUT)
390 device_printf(sc->sc_ue.ue_dev, "EEPROM read timed out\n");
391
392 return (aue_csr_read_2(sc, AUE_EE_DATA));
393 }
394
395 /*
396 * Read station address(offset 0) from the EEPROM.
397 */
398 static void
aue_read_mac(struct aue_softc * sc,uint8_t * eaddr)399 aue_read_mac(struct aue_softc *sc, uint8_t *eaddr)
400 {
401 int i, offset;
402 uint16_t word;
403
404 for (i = 0, offset = 0; i < ETHER_ADDR_LEN / 2; i++) {
405 word = aue_eeprom_getword(sc, offset + i);
406 eaddr[i * 2] = (uint8_t)word;
407 eaddr[i * 2 + 1] = (uint8_t)(word >> 8);
408 }
409 }
410
411 static int
aue_miibus_readreg(device_t dev,int phy,int reg)412 aue_miibus_readreg(device_t dev, int phy, int reg)
413 {
414 struct aue_softc *sc = device_get_softc(dev);
415 int i, locked;
416 uint16_t val = 0;
417
418 locked = lockowned(&sc->sc_lock);
419 if (!locked)
420 AUE_LOCK(sc);
421
422 /*
423 * The Am79C901 HomePNA PHY actually contains two transceivers: a 1Mbps
424 * HomePNA PHY and a 10Mbps full/half duplex ethernet PHY with NWAY
425 * autoneg. However in the ADMtek adapter, only the 1Mbps PHY is
426 * actually connected to anything, so we ignore the 10Mbps one. It
427 * happens to be configured for MII address 3, so we filter that out.
428 */
429 if (sc->sc_flags & AUE_FLAG_DUAL_PHY) {
430 if (phy == 3)
431 goto done;
432 #if 0
433 if (phy != 1)
434 goto done;
435 #endif
436 }
437 aue_csr_write_1(sc, AUE_PHY_ADDR, phy);
438 aue_csr_write_1(sc, AUE_PHY_CTL, reg | AUE_PHYCTL_READ);
439
440 for (i = 0; i != AUE_TIMEOUT; i++) {
441 if (aue_csr_read_1(sc, AUE_PHY_CTL) & AUE_PHYCTL_DONE)
442 break;
443 if (uether_pause(&sc->sc_ue, hz / 100))
444 break;
445 }
446
447 if (i == AUE_TIMEOUT)
448 device_printf(sc->sc_ue.ue_dev, "MII read timed out\n");
449
450 val = aue_csr_read_2(sc, AUE_PHY_DATA);
451
452 done:
453 if (!locked)
454 AUE_UNLOCK(sc);
455 return (val);
456 }
457
458 static int
aue_miibus_writereg(device_t dev,int phy,int reg,int data)459 aue_miibus_writereg(device_t dev, int phy, int reg, int data)
460 {
461 struct aue_softc *sc = device_get_softc(dev);
462 int i;
463 int locked;
464
465 if (phy == 3)
466 return (0);
467
468 locked = lockowned(&sc->sc_lock);
469 if (!locked)
470 AUE_LOCK(sc);
471
472 aue_csr_write_2(sc, AUE_PHY_DATA, data);
473 aue_csr_write_1(sc, AUE_PHY_ADDR, phy);
474 aue_csr_write_1(sc, AUE_PHY_CTL, reg | AUE_PHYCTL_WRITE);
475
476 for (i = 0; i != AUE_TIMEOUT; i++) {
477 if (aue_csr_read_1(sc, AUE_PHY_CTL) & AUE_PHYCTL_DONE)
478 break;
479 if (uether_pause(&sc->sc_ue, hz / 100))
480 break;
481 }
482
483 if (i == AUE_TIMEOUT)
484 device_printf(sc->sc_ue.ue_dev, "MII write timed out\n");
485
486 if (!locked)
487 AUE_UNLOCK(sc);
488 return (0);
489 }
490
491 static void
aue_miibus_statchg(device_t dev)492 aue_miibus_statchg(device_t dev)
493 {
494 struct aue_softc *sc = device_get_softc(dev);
495 struct mii_data *mii = GET_MII(sc);
496 int locked;
497
498 locked = lockowned(&sc->sc_lock);
499 if (!locked)
500 AUE_LOCK(sc);
501
502 AUE_CLRBIT(sc, AUE_CTL0, AUE_CTL0_RX_ENB | AUE_CTL0_TX_ENB);
503 if (IFM_SUBTYPE(mii->mii_media_active) == IFM_100_TX)
504 AUE_SETBIT(sc, AUE_CTL1, AUE_CTL1_SPEEDSEL);
505 else
506 AUE_CLRBIT(sc, AUE_CTL1, AUE_CTL1_SPEEDSEL);
507
508 if ((mii->mii_media_active & IFM_GMASK) == IFM_FDX)
509 AUE_SETBIT(sc, AUE_CTL1, AUE_CTL1_DUPLEX);
510 else
511 AUE_CLRBIT(sc, AUE_CTL1, AUE_CTL1_DUPLEX);
512
513 AUE_SETBIT(sc, AUE_CTL0, AUE_CTL0_RX_ENB | AUE_CTL0_TX_ENB);
514
515 /*
516 * Set the LED modes on the LinkSys adapter.
517 * This turns on the 'dual link LED' bin in the auxmode
518 * register of the Broadcom PHY.
519 */
520 if (sc->sc_flags & AUE_FLAG_LSYS) {
521 uint16_t auxmode;
522
523 auxmode = aue_miibus_readreg(dev, 0, 0x1b);
524 aue_miibus_writereg(dev, 0, 0x1b, auxmode | 0x04);
525 }
526 if (!locked)
527 AUE_UNLOCK(sc);
528 }
529
530 #define AUE_BITS 6
531 static void
aue_setmulti(struct usb_ether * ue)532 aue_setmulti(struct usb_ether *ue)
533 {
534 struct aue_softc *sc = uether_getsc(ue);
535 struct ifnet *ifp = uether_getifp(ue);
536 struct ifmultiaddr *ifma;
537 uint32_t h = 0;
538 uint32_t i;
539 uint8_t hashtbl[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
540
541 AUE_LOCK_ASSERT(sc);
542
543 if (ifp->if_flags & IFF_ALLMULTI || ifp->if_flags & IFF_PROMISC) {
544 AUE_SETBIT(sc, AUE_CTL0, AUE_CTL0_ALLMULTI);
545 return;
546 }
547
548 AUE_CLRBIT(sc, AUE_CTL0, AUE_CTL0_ALLMULTI);
549
550 /* now program new ones */
551 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
552 if (ifma->ifma_addr->sa_family != AF_LINK)
553 continue;
554 h = ether_crc32_le(LLADDR((struct sockaddr_dl *)
555 ifma->ifma_addr), ETHER_ADDR_LEN) & ((1 << AUE_BITS) - 1);
556 hashtbl[(h >> 3)] |= 1 << (h & 0x7);
557 }
558
559 /* write the hashtable */
560 for (i = 0; i != 8; i++)
561 aue_csr_write_1(sc, AUE_MAR0 + i, hashtbl[i]);
562 }
563
564 static void
aue_reset_pegasus_II(struct aue_softc * sc)565 aue_reset_pegasus_II(struct aue_softc *sc)
566 {
567 /* Magic constants taken from Linux driver. */
568 aue_csr_write_1(sc, AUE_REG_1D, 0);
569 aue_csr_write_1(sc, AUE_REG_7B, 2);
570 #if 0
571 if ((sc->sc_flags & HAS_HOME_PNA) && mii_mode)
572 aue_csr_write_1(sc, AUE_REG_81, 6);
573 else
574 #endif
575 aue_csr_write_1(sc, AUE_REG_81, 2);
576 }
577
578 static void
aue_reset(struct aue_softc * sc)579 aue_reset(struct aue_softc *sc)
580 {
581 int i;
582
583 AUE_SETBIT(sc, AUE_CTL1, AUE_CTL1_RESETMAC);
584
585 for (i = 0; i != AUE_TIMEOUT; i++) {
586 if (!(aue_csr_read_1(sc, AUE_CTL1) & AUE_CTL1_RESETMAC))
587 break;
588 if (uether_pause(&sc->sc_ue, hz / 100))
589 break;
590 }
591
592 if (i == AUE_TIMEOUT)
593 device_printf(sc->sc_ue.ue_dev, "reset failed\n");
594
595 /*
596 * The PHY(s) attached to the Pegasus chip may be held
597 * in reset until we flip on the GPIO outputs. Make sure
598 * to set the GPIO pins high so that the PHY(s) will
599 * be enabled.
600 *
601 * NOTE: We used to force all of the GPIO pins low first and then
602 * enable the ones we want. This has been changed to better
603 * match the ADMtek's reference design to avoid setting the
604 * power-down configuration line of the PHY at the same time
605 * it is reset.
606 */
607 aue_csr_write_1(sc, AUE_GPIO0, AUE_GPIO_SEL0|AUE_GPIO_SEL1);
608 aue_csr_write_1(sc, AUE_GPIO0, AUE_GPIO_SEL0|AUE_GPIO_SEL1|AUE_GPIO_OUT0);
609
610 if (sc->sc_flags & AUE_FLAG_LSYS) {
611 /* Grrr. LinkSys has to be different from everyone else. */
612 aue_csr_write_1(sc, AUE_GPIO0, AUE_GPIO_SEL0|AUE_GPIO_SEL1);
613 aue_csr_write_1(sc, AUE_GPIO0,
614 AUE_GPIO_SEL0|AUE_GPIO_SEL1|AUE_GPIO_OUT0);
615 }
616 if (sc->sc_flags & AUE_FLAG_PII)
617 aue_reset_pegasus_II(sc);
618
619 /* Wait a little while for the chip to get its brains in order: */
620 uether_pause(&sc->sc_ue, hz / 100);
621 }
622
623 static void
aue_attach_post(struct usb_ether * ue)624 aue_attach_post(struct usb_ether *ue)
625 {
626 struct aue_softc *sc = uether_getsc(ue);
627
628 /* reset the adapter */
629 aue_reset(sc);
630
631 /* get station address from the EEPROM */
632 aue_read_mac(sc, ue->ue_eaddr);
633 }
634
635 /*
636 * Probe for a Pegasus chip.
637 */
638 static int
aue_probe(device_t dev)639 aue_probe(device_t dev)
640 {
641 struct usb_attach_arg *uaa = device_get_ivars(dev);
642
643 if (uaa->usb_mode != USB_MODE_HOST)
644 return (ENXIO);
645 if (uaa->info.bConfigIndex != AUE_CONFIG_INDEX)
646 return (ENXIO);
647 if (uaa->info.bIfaceIndex != AUE_IFACE_IDX)
648 return (ENXIO);
649 /*
650 * Belkin USB Bluetooth dongles of the F8T012xx1 model series conflict
651 * with older Belkin USB2LAN adapters. Skip if_aue if we detect one of
652 * the devices that look like Bluetooth adapters.
653 */
654 if (uaa->info.idVendor == USB_VENDOR_BELKIN &&
655 uaa->info.idProduct == USB_PRODUCT_BELKIN_F8T012 &&
656 uaa->info.bcdDevice == 0x0413)
657 return (ENXIO);
658
659 return (usbd_lookup_id_by_uaa(aue_devs, sizeof(aue_devs), uaa));
660 }
661
662 /*
663 * Attach the interface. Allocate softc structures, do ifmedia
664 * setup and ethernet/BPF attach.
665 */
666 static int
aue_attach(device_t dev)667 aue_attach(device_t dev)
668 {
669 struct usb_attach_arg *uaa = device_get_ivars(dev);
670 struct aue_softc *sc = device_get_softc(dev);
671 struct usb_ether *ue = &sc->sc_ue;
672 uint8_t iface_index;
673 int error;
674
675 sc->sc_flags = USB_GET_DRIVER_INFO(uaa);
676
677 if (uaa->info.bcdDevice >= 0x0201) {
678 /* XXX currently undocumented */
679 sc->sc_flags |= AUE_FLAG_VER_2;
680 }
681
682 device_set_usb_desc(dev);
683 lockinit(&sc->sc_lock, device_get_nameunit(dev), 0, LK_CANRECURSE);
684
685 iface_index = AUE_IFACE_IDX;
686 error = usbd_transfer_setup(uaa->device, &iface_index,
687 sc->sc_xfer, aue_config, AUE_N_TRANSFER,
688 sc, &sc->sc_lock);
689 if (error) {
690 device_printf(dev, "allocating USB transfers failed\n");
691 goto detach;
692 }
693
694 ue->ue_sc = sc;
695 ue->ue_dev = dev;
696 ue->ue_udev = uaa->device;
697 ue->ue_lock = &sc->sc_lock;
698 ue->ue_methods = &aue_ue_methods;
699
700 error = uether_ifattach(ue);
701 if (error) {
702 device_printf(dev, "could not attach interface\n");
703 goto detach;
704 }
705 return (0); /* success */
706
707 detach:
708 aue_detach(dev);
709 return (ENXIO); /* failure */
710 }
711
712 static int
aue_detach(device_t dev)713 aue_detach(device_t dev)
714 {
715 struct aue_softc *sc = device_get_softc(dev);
716 struct usb_ether *ue = &sc->sc_ue;
717
718 usbd_transfer_unsetup(sc->sc_xfer, AUE_N_TRANSFER);
719 uether_ifdetach(ue);
720 lockuninit(&sc->sc_lock);
721
722 return (0);
723 }
724
725 static void
aue_intr_callback(struct usb_xfer * xfer,usb_error_t error)726 aue_intr_callback(struct usb_xfer *xfer, usb_error_t error)
727 {
728 struct aue_softc *sc = usbd_xfer_softc(xfer);
729 struct ifnet *ifp = uether_getifp(&sc->sc_ue);
730 struct aue_intrpkt pkt;
731 struct usb_page_cache *pc;
732 int actlen;
733
734 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL);
735
736 switch (USB_GET_STATE(xfer)) {
737 case USB_ST_TRANSFERRED:
738
739 if ((ifp->if_flags & IFF_RUNNING) &&
740 actlen >= (int)sizeof(pkt)) {
741
742 pc = usbd_xfer_get_frame(xfer, 0);
743 usbd_copy_out(pc, 0, &pkt, sizeof(pkt));
744
745 if (pkt.aue_txstat0)
746 IFNET_STAT_INC(ifp, oerrors, 1);
747 if (pkt.aue_txstat0 & (AUE_TXSTAT0_LATECOLL |
748 AUE_TXSTAT0_EXCESSCOLL))
749 IFNET_STAT_INC(ifp, collisions, 1);
750 }
751 /* FALLTHROUGH */
752 case USB_ST_SETUP:
753 tr_setup:
754 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer));
755 usbd_transfer_submit(xfer);
756 return;
757
758 default: /* Error */
759 if (error != USB_ERR_CANCELLED) {
760 /* try to clear stall first */
761 usbd_xfer_set_stall(xfer);
762 goto tr_setup;
763 }
764 return;
765 }
766 }
767
768 static void
aue_bulk_read_callback(struct usb_xfer * xfer,usb_error_t error)769 aue_bulk_read_callback(struct usb_xfer *xfer, usb_error_t error)
770 {
771 struct aue_softc *sc = usbd_xfer_softc(xfer);
772 struct usb_ether *ue = &sc->sc_ue;
773 struct ifnet *ifp = uether_getifp(ue);
774 struct aue_rxpkt stat;
775 struct usb_page_cache *pc;
776 int actlen;
777
778 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL);
779 pc = usbd_xfer_get_frame(xfer, 0);
780
781 switch (USB_GET_STATE(xfer)) {
782 case USB_ST_TRANSFERRED:
783 DPRINTFN(11, "received %d bytes\n", actlen);
784
785 if (sc->sc_flags & AUE_FLAG_VER_2) {
786
787 if (actlen == 0) {
788 IFNET_STAT_INC(ifp, ierrors, 1);
789 goto tr_setup;
790 }
791 } else {
792
793 if (actlen <= (int)(sizeof(stat) + ETHER_CRC_LEN)) {
794 IFNET_STAT_INC(ifp, ierrors, 1);
795 goto tr_setup;
796 }
797 usbd_copy_out(pc, actlen - sizeof(stat), &stat,
798 sizeof(stat));
799
800 /*
801 * turn off all the non-error bits in the rx status
802 * word:
803 */
804 stat.aue_rxstat &= AUE_RXSTAT_MASK;
805 if (stat.aue_rxstat) {
806 IFNET_STAT_INC(ifp, ierrors, 1);
807 goto tr_setup;
808 }
809 /* No errors; receive the packet. */
810 actlen -= (sizeof(stat) + ETHER_CRC_LEN);
811 }
812 uether_rxbuf(ue, pc, 0, actlen);
813
814 /* FALLTHROUGH */
815 case USB_ST_SETUP:
816 tr_setup:
817 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer));
818 usbd_transfer_submit(xfer);
819 uether_rxflush(ue);
820 return;
821
822 default: /* Error */
823 DPRINTF("bulk read error, %s\n",
824 usbd_errstr(error));
825
826 if (error != USB_ERR_CANCELLED) {
827 /* try to clear stall first */
828 usbd_xfer_set_stall(xfer);
829 goto tr_setup;
830 }
831 return;
832 }
833 }
834
835 static void
aue_bulk_write_callback(struct usb_xfer * xfer,usb_error_t error)836 aue_bulk_write_callback(struct usb_xfer *xfer, usb_error_t error)
837 {
838 struct aue_softc *sc = usbd_xfer_softc(xfer);
839 struct ifnet *ifp = uether_getifp(&sc->sc_ue);
840 struct usb_page_cache *pc;
841 struct mbuf *m;
842 uint8_t buf[2];
843 int actlen;
844
845 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL);
846 pc = usbd_xfer_get_frame(xfer, 0);
847
848 switch (USB_GET_STATE(xfer)) {
849 case USB_ST_TRANSFERRED:
850 DPRINTFN(11, "transfer of %d bytes complete\n", actlen);
851 IFNET_STAT_INC(ifp, opackets, 1);
852
853 /* FALLTHROUGH */
854 case USB_ST_SETUP:
855 tr_setup:
856 if ((sc->sc_flags & AUE_FLAG_LINK) == 0) {
857 /*
858 * don't send anything if there is no link !
859 */
860 return;
861 }
862 m = ifq_dequeue(&ifp->if_snd);
863
864 if (m == NULL)
865 return;
866 if (m->m_pkthdr.len > MCLBYTES)
867 m->m_pkthdr.len = MCLBYTES;
868 if (sc->sc_flags & AUE_FLAG_VER_2) {
869
870 usbd_xfer_set_frame_len(xfer, 0, m->m_pkthdr.len);
871
872 usbd_m_copy_in(pc, 0, m, 0, m->m_pkthdr.len);
873
874 } else {
875
876 usbd_xfer_set_frame_len(xfer, 0, (m->m_pkthdr.len + 2));
877
878 /*
879 * The ADMtek documentation says that the
880 * packet length is supposed to be specified
881 * in the first two bytes of the transfer,
882 * however it actually seems to ignore this
883 * info and base the frame size on the bulk
884 * transfer length.
885 */
886 buf[0] = (uint8_t)(m->m_pkthdr.len);
887 buf[1] = (uint8_t)(m->m_pkthdr.len >> 8);
888
889 usbd_copy_in(pc, 0, buf, 2);
890 usbd_m_copy_in(pc, 2, m, 0, m->m_pkthdr.len);
891 }
892
893 /*
894 * if there's a BPF listener, bounce a copy
895 * of this frame to him:
896 */
897 BPF_MTAP(ifp, m);
898
899 m_freem(m);
900
901 usbd_transfer_submit(xfer);
902 return;
903
904 default: /* Error */
905 DPRINTFN(11, "transfer error, %s\n",
906 usbd_errstr(error));
907
908 IFNET_STAT_INC(ifp, oerrors, 1);
909
910 if (error != USB_ERR_CANCELLED) {
911 /* try to clear stall first */
912 usbd_xfer_set_stall(xfer);
913 goto tr_setup;
914 }
915 return;
916 }
917 }
918
919 static void
aue_tick(struct usb_ether * ue)920 aue_tick(struct usb_ether *ue)
921 {
922 struct aue_softc *sc = uether_getsc(ue);
923 struct mii_data *mii = GET_MII(sc);
924
925 AUE_LOCK_ASSERT(sc);
926
927 mii_tick(mii);
928 if ((sc->sc_flags & AUE_FLAG_LINK) == 0
929 && mii->mii_media_status & IFM_ACTIVE &&
930 IFM_SUBTYPE(mii->mii_media_active) != IFM_NONE) {
931 sc->sc_flags |= AUE_FLAG_LINK;
932 aue_start(ue);
933 }
934 }
935
936 static void
aue_start(struct usb_ether * ue)937 aue_start(struct usb_ether *ue)
938 {
939 struct aue_softc *sc = uether_getsc(ue);
940
941 /*
942 * start the USB transfers, if not already started:
943 */
944 usbd_transfer_start(sc->sc_xfer[AUE_INTR_DT_RD]);
945 usbd_transfer_start(sc->sc_xfer[AUE_BULK_DT_RD]);
946 usbd_transfer_start(sc->sc_xfer[AUE_BULK_DT_WR]);
947 }
948
949 static void
aue_init(struct usb_ether * ue)950 aue_init(struct usb_ether *ue)
951 {
952 struct aue_softc *sc = uether_getsc(ue);
953 struct ifnet *ifp = uether_getifp(ue);
954 int i;
955
956 AUE_LOCK_ASSERT(sc);
957
958 /*
959 * Cancel pending I/O
960 */
961 aue_reset(sc);
962
963 /* Set MAC address */
964 for (i = 0; i != ETHER_ADDR_LEN; i++)
965 aue_csr_write_1(sc, AUE_PAR0 + i, IF_LLADDR(ifp)[i]);
966
967 /* update promiscuous setting */
968 aue_setpromisc(ue);
969
970 /* Load the multicast filter. */
971 aue_setmulti(ue);
972
973 /* Enable RX and TX */
974 aue_csr_write_1(sc, AUE_CTL0, AUE_CTL0_RXSTAT_APPEND | AUE_CTL0_RX_ENB);
975 AUE_SETBIT(sc, AUE_CTL0, AUE_CTL0_TX_ENB);
976 AUE_SETBIT(sc, AUE_CTL2, AUE_CTL2_EP3_CLR);
977
978 usbd_xfer_set_stall(sc->sc_xfer[AUE_BULK_DT_WR]);
979
980 ifp->if_flags |= IFF_RUNNING;
981 aue_start(ue);
982 }
983
984 static void
aue_setpromisc(struct usb_ether * ue)985 aue_setpromisc(struct usb_ether *ue)
986 {
987 struct aue_softc *sc = uether_getsc(ue);
988 struct ifnet *ifp = uether_getifp(ue);
989
990 AUE_LOCK_ASSERT(sc);
991
992 /* if we want promiscuous mode, set the allframes bit: */
993 if (ifp->if_flags & IFF_PROMISC)
994 AUE_SETBIT(sc, AUE_CTL2, AUE_CTL2_RX_PROMISC);
995 else
996 AUE_CLRBIT(sc, AUE_CTL2, AUE_CTL2_RX_PROMISC);
997 }
998
999 /*
1000 * Set media options.
1001 */
1002 static int
aue_ifmedia_upd(struct ifnet * ifp)1003 aue_ifmedia_upd(struct ifnet *ifp)
1004 {
1005 struct aue_softc *sc = ifp->if_softc;
1006 struct mii_data *mii = GET_MII(sc);
1007 struct mii_softc *miisc;
1008 int error;
1009
1010 AUE_LOCK_ASSERT(sc);
1011
1012 sc->sc_flags &= ~AUE_FLAG_LINK;
1013 LIST_FOREACH(miisc, &mii->mii_phys, mii_list)
1014 mii_phy_reset(miisc);
1015 error = mii_mediachg(mii);
1016 return (error);
1017 }
1018
1019 /*
1020 * Report current media status.
1021 */
1022 static void
aue_ifmedia_sts(struct ifnet * ifp,struct ifmediareq * ifmr)1023 aue_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
1024 {
1025 struct aue_softc *sc = ifp->if_softc;
1026 struct mii_data *mii = GET_MII(sc);
1027
1028 AUE_LOCK(sc);
1029 mii_pollstat(mii);
1030 ifmr->ifm_active = mii->mii_media_active;
1031 ifmr->ifm_status = mii->mii_media_status;
1032 AUE_UNLOCK(sc);
1033 }
1034
1035 /*
1036 * Stop the adapter and free any mbufs allocated to the
1037 * RX and TX lists.
1038 */
1039 static void
aue_stop(struct usb_ether * ue)1040 aue_stop(struct usb_ether *ue)
1041 {
1042 struct aue_softc *sc = uether_getsc(ue);
1043 struct ifnet *ifp = uether_getifp(ue);
1044
1045 AUE_LOCK_ASSERT(sc);
1046
1047 ifp->if_flags &= ~IFF_RUNNING;
1048 sc->sc_flags &= ~AUE_FLAG_LINK;
1049
1050 /*
1051 * stop all the transfers, if not already stopped:
1052 */
1053 usbd_transfer_stop(sc->sc_xfer[AUE_BULK_DT_WR]);
1054 usbd_transfer_stop(sc->sc_xfer[AUE_BULK_DT_RD]);
1055 usbd_transfer_stop(sc->sc_xfer[AUE_INTR_DT_RD]);
1056
1057 aue_csr_write_1(sc, AUE_CTL0, 0);
1058 aue_csr_write_1(sc, AUE_CTL1, 0);
1059 aue_reset(sc);
1060 }
1061