xref: /dragonfly/sys/bus/u4b/net/if_mosreg.h (revision 8af44722)
1 /* $FreeBSD$ */
2 /*-
3  * Copyright (c) 2010, 2011 Rick van der Zwet <info@rickvanderzwet.nl>
4  *
5  * Permission to use, copy, modify, and distribute this software for any
6  * purpose with or without fee is hereby granted, provided that the above
7  * copyright notice and this permission notice appear in all copies.
8  *
9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16  */
17 
18 /*-
19  * Copyright (c) 2008 Johann Christian Rode <jcrode@gmx.net>
20  *
21  * Permission to use, copy, modify, and distribute this software for any
22  * purpose with or without fee is hereby granted, provided that the above
23  * copyright notice and this permission notice appear in all copies.
24  *
25  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
26  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
27  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
28  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
29  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
30  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
31  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
32  */
33 
34 /*-
35  * Copyright (c) 1997, 1998, 1999, 2000-2003
36  *	Bill Paul <wpaul@windriver.com>.  All rights reserved.
37  *
38  * Redistribution and use in source and binary forms, with or without
39  * modification, are permitted provided that the following conditions
40  * are met:
41  * 1. Redistributions of source code must retain the above copyright
42  *    notice, this list of conditions and the following disclaimer.
43  * 2. Redistributions in binary form must reproduce the above copyright
44  *    notice, this list of conditions and the following disclaimer in the
45  *    documentation and/or other materials provided with the distribution.
46  * 3. All advertising materials mentioning features or use of this software
47  *    must display the following acknowledgement:
48  *	This product includes software developed by Ravikanth.
49  * 4. Neither the name of the author nor the names of any co-contributors
50  *    may be used to endorse or promote products derived from this software
51  *    without specific prior written permission.
52  *
53  * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
54  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
55  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
56  * ARE DISCLAIMED.  IN NO EVENT SHALL Bill Paul, THE VOICES IN HIS HEAD OR
57  * THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
58  * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
59  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
60  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
61  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
62  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
63  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
64  *
65  */
66 
67 /*
68  * Register definitions for the Moschip MCS7x30 ethernet controller.
69  */
70 #define	MOS_MCAST_TABLE 	0x00
71 #define	MOS_IPG0		0x08
72 #define	MOS_IPG1		0x09
73 #define	MOS_PHY_DATA0		0x0a
74 #define	MOS_PHY_DATA1		0x0b
75 #define	MOS_PHY_CTL		0x0c
76 #define	MOS_PHY_STS		0x0d
77 #define	MOS_PHY_DATA		MOS_PHY_DATA0
78 #define	MOS_CTL			0x0e
79 #define	MOS_MAC0		0x0f
80 #define	MOS_MAC1		0x10
81 #define	MOS_MAC2		0x11
82 #define	MOS_MAC3		0x12
83 #define	MOS_MAC4		0x13
84 #define	MOS_MAC5		0x14
85 #define	MOS_MAC			MOS_MAC0
86 /* apparently only available on hardware rev. C */
87 #define	MOS_FRAME_DROP_CNT	0x15
88 #define	MOS_PAUSE_TRHD		0x16
89 
90 #define	MOS_PHYCTL_PHYADDR	0x1f
91 #define	MOS_PHYCTL_WRITE	0x20
92 #define	MOS_PHYCTL_READ		0x40
93 
94 #define	MOS_PHYSTS_PHYREG	0x1f
95 #define	MOS_PHYSTS_READY	0x40
96 #define	MOS_PHYSTS_PENDING	0x80
97 
98 #define	MOS_CTL_RX_PROMISC	0x01
99 #define	MOS_CTL_ALLMULTI	0x02
100 #define	MOS_CTL_SLEEP		0x04
101 #define	MOS_CTL_TX_ENB		0x08
102 /*
103  * The documentation calls this bit 'reserved', but in the FreeBSD driver
104  * provided by the vendor, this enables the receiver.
105  */
106 #define	MOS_CTL_RX_ENB		0x10
107 #define	MOS_CTL_FDX_ENB		0x20
108 /* 0 = 10 Mbps, 1 = 100 Mbps */
109 #define	MOS_CTL_SPEEDSEL	0x40
110 /* 0 = PHY controls speed/duplex mode, 1 = bridge controls speed/duplex mode */
111 #define	MOS_CTL_BS_ENB		0x80
112 
113 #define	MOS_RXSTS_SHORT_FRAME	0x01
114 #define	MOS_RXSTS_LENGTH_ERROR	0x02
115 #define	MOS_RXSTS_ALIGN_ERROR	0x04
116 #define	MOS_RXSTS_CRC_ERROR	0x08
117 #define	MOS_RXSTS_LARGE_FRAME	0x10
118 #define	MOS_RXSTS_VALID		0x20
119 /*
120  * The EtherType field of an Ethernet frame can contain values other than
121  * the frame length, hence length errors are ignored.
122  */
123 #define	MOS_RXSTS_MASK		0x3d
124 
125 #define	MOS_PAUSE_TRHD_DEFAULT	0
126 #define	MOS_PAUSE_REWRITES	3
127 
128 #define	MOS_TIMEOUT		1000
129 
130 #define	MOS_RX_LIST_CNT		1
131 #define	MOS_TX_LIST_CNT		1
132 
133 /* Maximum size of a fast ethernet frame plus one byte for the status */
134 #define	MOS_BUFSZ		(ETHER_MAX_LEN+1)
135 
136 /*
137  * USB endpoints.
138  */
139 #define	MOS_ENDPT_RX		0
140 #define	MOS_ENDPT_TX		1
141 #define	MOS_ENDPT_INTR		2
142 #define	MOS_ENDPT_MAX		3
143 
144 /*
145  * USB vendor requests.
146  */
147 #define	MOS_UR_READREG		0x0e
148 #define	MOS_UR_WRITEREG		0x0d
149 
150 #define	MOS_CONFIG_IDX		0
151 #define	MOS_IFACE_IDX		0
152 
153 #define	MCS7730	0x0001
154 #define	MCS7830	0x0002
155 #define	MCS7832	0x0004
156 
157 #define	MOS_INC(x, y)           (x) = (x + 1) % y
158 
159 struct mos_softc {
160 	struct usb_ether sc_ue;
161 	struct ifnet ifp;
162 
163 	struct lock sc_lock;
164 	struct usb_xfer *sc_xfer[MOS_ENDPT_MAX];
165 
166 	uint16_t mos_flags;
167 
168 	int mos_link;
169 	unsigned char mos_ipgs[2];
170 	unsigned char mos_phyaddrs[2];
171 };
172 
173 #define	GET_MII(sc)		uether_getmii(&(sc)->sc_ue)
174 #define	MOS_LOCK(_sc)		lockmgr(&(_sc)->sc_lock, LK_EXCLUSIVE)
175 #define	MOS_UNLOCK(_sc)		lockmgr(&(_sc)->sc_lock, LK_RELEASE)
176 #define	MOS_LOCK_ASSERT(_sc)	KKASSERT(lockowned(&(_sc)->sc_lock))
177